mmu.c 58 KB

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  1. /*
  2. * Copyright (C) 2012 - Virtual Open Systems and Columbia University
  3. * Author: Christoffer Dall <c.dall@virtualopensystems.com>
  4. *
  5. * This program is free software; you can redistribute it and/or modify
  6. * it under the terms of the GNU General Public License, version 2, as
  7. * published by the Free Software Foundation.
  8. *
  9. * This program is distributed in the hope that it will be useful,
  10. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  12. * GNU General Public License for more details.
  13. *
  14. * You should have received a copy of the GNU General Public License
  15. * along with this program; if not, write to the Free Software
  16. * Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
  17. */
  18. #include <linux/mman.h>
  19. #include <linux/kvm_host.h>
  20. #include <linux/io.h>
  21. #include <linux/hugetlb.h>
  22. #include <linux/sched/signal.h>
  23. #include <trace/events/kvm.h>
  24. #include <asm/pgalloc.h>
  25. #include <asm/cacheflush.h>
  26. #include <asm/kvm_arm.h>
  27. #include <asm/kvm_mmu.h>
  28. #include <asm/kvm_mmio.h>
  29. #include <asm/kvm_asm.h>
  30. #include <asm/kvm_emulate.h>
  31. #include <asm/virt.h>
  32. #include <asm/system_misc.h>
  33. #include "trace.h"
  34. static pgd_t *boot_hyp_pgd;
  35. static pgd_t *hyp_pgd;
  36. static pgd_t *merged_hyp_pgd;
  37. static DEFINE_MUTEX(kvm_hyp_pgd_mutex);
  38. static unsigned long hyp_idmap_start;
  39. static unsigned long hyp_idmap_end;
  40. static phys_addr_t hyp_idmap_vector;
  41. static unsigned long io_map_base;
  42. #define hyp_pgd_order get_order(PTRS_PER_PGD * sizeof(pgd_t))
  43. #define KVM_S2PTE_FLAG_IS_IOMAP (1UL << 0)
  44. #define KVM_S2_FLAG_LOGGING_ACTIVE (1UL << 1)
  45. static bool memslot_is_logging(struct kvm_memory_slot *memslot)
  46. {
  47. return memslot->dirty_bitmap && !(memslot->flags & KVM_MEM_READONLY);
  48. }
  49. /**
  50. * kvm_flush_remote_tlbs() - flush all VM TLB entries for v7/8
  51. * @kvm: pointer to kvm structure.
  52. *
  53. * Interface to HYP function to flush all VM TLB entries
  54. */
  55. void kvm_flush_remote_tlbs(struct kvm *kvm)
  56. {
  57. kvm_call_hyp(__kvm_tlb_flush_vmid, kvm);
  58. }
  59. static void kvm_tlb_flush_vmid_ipa(struct kvm *kvm, phys_addr_t ipa)
  60. {
  61. kvm_call_hyp(__kvm_tlb_flush_vmid_ipa, kvm, ipa);
  62. }
  63. /*
  64. * D-Cache management functions. They take the page table entries by
  65. * value, as they are flushing the cache using the kernel mapping (or
  66. * kmap on 32bit).
  67. */
  68. static void kvm_flush_dcache_pte(pte_t pte)
  69. {
  70. __kvm_flush_dcache_pte(pte);
  71. }
  72. static void kvm_flush_dcache_pmd(pmd_t pmd)
  73. {
  74. __kvm_flush_dcache_pmd(pmd);
  75. }
  76. static void kvm_flush_dcache_pud(pud_t pud)
  77. {
  78. __kvm_flush_dcache_pud(pud);
  79. }
  80. static bool kvm_is_device_pfn(unsigned long pfn)
  81. {
  82. return !pfn_valid(pfn);
  83. }
  84. /**
  85. * stage2_dissolve_pmd() - clear and flush huge PMD entry
  86. * @kvm: pointer to kvm structure.
  87. * @addr: IPA
  88. * @pmd: pmd pointer for IPA
  89. *
  90. * Function clears a PMD entry, flushes addr 1st and 2nd stage TLBs. Marks all
  91. * pages in the range dirty.
  92. */
  93. static void stage2_dissolve_pmd(struct kvm *kvm, phys_addr_t addr, pmd_t *pmd)
  94. {
  95. if (!pmd_thp_or_huge(*pmd))
  96. return;
  97. pmd_clear(pmd);
  98. kvm_tlb_flush_vmid_ipa(kvm, addr);
  99. put_page(virt_to_page(pmd));
  100. }
  101. static int mmu_topup_memory_cache(struct kvm_mmu_memory_cache *cache,
  102. int min, int max)
  103. {
  104. void *page;
  105. BUG_ON(max > KVM_NR_MEM_OBJS);
  106. if (cache->nobjs >= min)
  107. return 0;
  108. while (cache->nobjs < max) {
  109. page = (void *)__get_free_page(PGALLOC_GFP);
  110. if (!page)
  111. return -ENOMEM;
  112. cache->objects[cache->nobjs++] = page;
  113. }
  114. return 0;
  115. }
  116. static void mmu_free_memory_cache(struct kvm_mmu_memory_cache *mc)
  117. {
  118. while (mc->nobjs)
  119. free_page((unsigned long)mc->objects[--mc->nobjs]);
  120. }
  121. static void *mmu_memory_cache_alloc(struct kvm_mmu_memory_cache *mc)
  122. {
  123. void *p;
  124. BUG_ON(!mc || !mc->nobjs);
  125. p = mc->objects[--mc->nobjs];
  126. return p;
  127. }
  128. static void clear_stage2_pgd_entry(struct kvm *kvm, pgd_t *pgd, phys_addr_t addr)
  129. {
  130. pud_t *pud_table __maybe_unused = stage2_pud_offset(kvm, pgd, 0UL);
  131. stage2_pgd_clear(kvm, pgd);
  132. kvm_tlb_flush_vmid_ipa(kvm, addr);
  133. stage2_pud_free(kvm, pud_table);
  134. put_page(virt_to_page(pgd));
  135. }
  136. static void clear_stage2_pud_entry(struct kvm *kvm, pud_t *pud, phys_addr_t addr)
  137. {
  138. pmd_t *pmd_table __maybe_unused = stage2_pmd_offset(kvm, pud, 0);
  139. VM_BUG_ON(stage2_pud_huge(kvm, *pud));
  140. stage2_pud_clear(kvm, pud);
  141. kvm_tlb_flush_vmid_ipa(kvm, addr);
  142. stage2_pmd_free(kvm, pmd_table);
  143. put_page(virt_to_page(pud));
  144. }
  145. static void clear_stage2_pmd_entry(struct kvm *kvm, pmd_t *pmd, phys_addr_t addr)
  146. {
  147. pte_t *pte_table = pte_offset_kernel(pmd, 0);
  148. VM_BUG_ON(pmd_thp_or_huge(*pmd));
  149. pmd_clear(pmd);
  150. kvm_tlb_flush_vmid_ipa(kvm, addr);
  151. pte_free_kernel(NULL, pte_table);
  152. put_page(virt_to_page(pmd));
  153. }
  154. static inline void kvm_set_pte(pte_t *ptep, pte_t new_pte)
  155. {
  156. WRITE_ONCE(*ptep, new_pte);
  157. dsb(ishst);
  158. }
  159. static inline void kvm_set_pmd(pmd_t *pmdp, pmd_t new_pmd)
  160. {
  161. WRITE_ONCE(*pmdp, new_pmd);
  162. dsb(ishst);
  163. }
  164. static inline void kvm_pmd_populate(pmd_t *pmdp, pte_t *ptep)
  165. {
  166. kvm_set_pmd(pmdp, kvm_mk_pmd(ptep));
  167. }
  168. static inline void kvm_pud_populate(pud_t *pudp, pmd_t *pmdp)
  169. {
  170. WRITE_ONCE(*pudp, kvm_mk_pud(pmdp));
  171. dsb(ishst);
  172. }
  173. static inline void kvm_pgd_populate(pgd_t *pgdp, pud_t *pudp)
  174. {
  175. WRITE_ONCE(*pgdp, kvm_mk_pgd(pudp));
  176. dsb(ishst);
  177. }
  178. /*
  179. * Unmapping vs dcache management:
  180. *
  181. * If a guest maps certain memory pages as uncached, all writes will
  182. * bypass the data cache and go directly to RAM. However, the CPUs
  183. * can still speculate reads (not writes) and fill cache lines with
  184. * data.
  185. *
  186. * Those cache lines will be *clean* cache lines though, so a
  187. * clean+invalidate operation is equivalent to an invalidate
  188. * operation, because no cache lines are marked dirty.
  189. *
  190. * Those clean cache lines could be filled prior to an uncached write
  191. * by the guest, and the cache coherent IO subsystem would therefore
  192. * end up writing old data to disk.
  193. *
  194. * This is why right after unmapping a page/section and invalidating
  195. * the corresponding TLBs, we call kvm_flush_dcache_p*() to make sure
  196. * the IO subsystem will never hit in the cache.
  197. *
  198. * This is all avoided on systems that have ARM64_HAS_STAGE2_FWB, as
  199. * we then fully enforce cacheability of RAM, no matter what the guest
  200. * does.
  201. */
  202. static void unmap_stage2_ptes(struct kvm *kvm, pmd_t *pmd,
  203. phys_addr_t addr, phys_addr_t end)
  204. {
  205. phys_addr_t start_addr = addr;
  206. pte_t *pte, *start_pte;
  207. start_pte = pte = pte_offset_kernel(pmd, addr);
  208. do {
  209. if (!pte_none(*pte)) {
  210. pte_t old_pte = *pte;
  211. kvm_set_pte(pte, __pte(0));
  212. kvm_tlb_flush_vmid_ipa(kvm, addr);
  213. /* No need to invalidate the cache for device mappings */
  214. if (!kvm_is_device_pfn(pte_pfn(old_pte)))
  215. kvm_flush_dcache_pte(old_pte);
  216. put_page(virt_to_page(pte));
  217. }
  218. } while (pte++, addr += PAGE_SIZE, addr != end);
  219. if (stage2_pte_table_empty(kvm, start_pte))
  220. clear_stage2_pmd_entry(kvm, pmd, start_addr);
  221. }
  222. static void unmap_stage2_pmds(struct kvm *kvm, pud_t *pud,
  223. phys_addr_t addr, phys_addr_t end)
  224. {
  225. phys_addr_t next, start_addr = addr;
  226. pmd_t *pmd, *start_pmd;
  227. start_pmd = pmd = stage2_pmd_offset(kvm, pud, addr);
  228. do {
  229. next = stage2_pmd_addr_end(kvm, addr, end);
  230. if (!pmd_none(*pmd)) {
  231. if (pmd_thp_or_huge(*pmd)) {
  232. pmd_t old_pmd = *pmd;
  233. pmd_clear(pmd);
  234. kvm_tlb_flush_vmid_ipa(kvm, addr);
  235. kvm_flush_dcache_pmd(old_pmd);
  236. put_page(virt_to_page(pmd));
  237. } else {
  238. unmap_stage2_ptes(kvm, pmd, addr, next);
  239. }
  240. }
  241. } while (pmd++, addr = next, addr != end);
  242. if (stage2_pmd_table_empty(kvm, start_pmd))
  243. clear_stage2_pud_entry(kvm, pud, start_addr);
  244. }
  245. static void unmap_stage2_puds(struct kvm *kvm, pgd_t *pgd,
  246. phys_addr_t addr, phys_addr_t end)
  247. {
  248. phys_addr_t next, start_addr = addr;
  249. pud_t *pud, *start_pud;
  250. start_pud = pud = stage2_pud_offset(kvm, pgd, addr);
  251. do {
  252. next = stage2_pud_addr_end(kvm, addr, end);
  253. if (!stage2_pud_none(kvm, *pud)) {
  254. if (stage2_pud_huge(kvm, *pud)) {
  255. pud_t old_pud = *pud;
  256. stage2_pud_clear(kvm, pud);
  257. kvm_tlb_flush_vmid_ipa(kvm, addr);
  258. kvm_flush_dcache_pud(old_pud);
  259. put_page(virt_to_page(pud));
  260. } else {
  261. unmap_stage2_pmds(kvm, pud, addr, next);
  262. }
  263. }
  264. } while (pud++, addr = next, addr != end);
  265. if (stage2_pud_table_empty(kvm, start_pud))
  266. clear_stage2_pgd_entry(kvm, pgd, start_addr);
  267. }
  268. /**
  269. * unmap_stage2_range -- Clear stage2 page table entries to unmap a range
  270. * @kvm: The VM pointer
  271. * @start: The intermediate physical base address of the range to unmap
  272. * @size: The size of the area to unmap
  273. *
  274. * Clear a range of stage-2 mappings, lowering the various ref-counts. Must
  275. * be called while holding mmu_lock (unless for freeing the stage2 pgd before
  276. * destroying the VM), otherwise another faulting VCPU may come in and mess
  277. * with things behind our backs.
  278. */
  279. static void unmap_stage2_range(struct kvm *kvm, phys_addr_t start, u64 size)
  280. {
  281. pgd_t *pgd;
  282. phys_addr_t addr = start, end = start + size;
  283. phys_addr_t next;
  284. assert_spin_locked(&kvm->mmu_lock);
  285. WARN_ON(size & ~PAGE_MASK);
  286. pgd = kvm->arch.pgd + stage2_pgd_index(kvm, addr);
  287. do {
  288. /*
  289. * Make sure the page table is still active, as another thread
  290. * could have possibly freed the page table, while we released
  291. * the lock.
  292. */
  293. if (!READ_ONCE(kvm->arch.pgd))
  294. break;
  295. next = stage2_pgd_addr_end(kvm, addr, end);
  296. if (!stage2_pgd_none(kvm, *pgd))
  297. unmap_stage2_puds(kvm, pgd, addr, next);
  298. /*
  299. * If the range is too large, release the kvm->mmu_lock
  300. * to prevent starvation and lockup detector warnings.
  301. */
  302. if (next != end)
  303. cond_resched_lock(&kvm->mmu_lock);
  304. } while (pgd++, addr = next, addr != end);
  305. }
  306. static void stage2_flush_ptes(struct kvm *kvm, pmd_t *pmd,
  307. phys_addr_t addr, phys_addr_t end)
  308. {
  309. pte_t *pte;
  310. pte = pte_offset_kernel(pmd, addr);
  311. do {
  312. if (!pte_none(*pte) && !kvm_is_device_pfn(pte_pfn(*pte)))
  313. kvm_flush_dcache_pte(*pte);
  314. } while (pte++, addr += PAGE_SIZE, addr != end);
  315. }
  316. static void stage2_flush_pmds(struct kvm *kvm, pud_t *pud,
  317. phys_addr_t addr, phys_addr_t end)
  318. {
  319. pmd_t *pmd;
  320. phys_addr_t next;
  321. pmd = stage2_pmd_offset(kvm, pud, addr);
  322. do {
  323. next = stage2_pmd_addr_end(kvm, addr, end);
  324. if (!pmd_none(*pmd)) {
  325. if (pmd_thp_or_huge(*pmd))
  326. kvm_flush_dcache_pmd(*pmd);
  327. else
  328. stage2_flush_ptes(kvm, pmd, addr, next);
  329. }
  330. } while (pmd++, addr = next, addr != end);
  331. }
  332. static void stage2_flush_puds(struct kvm *kvm, pgd_t *pgd,
  333. phys_addr_t addr, phys_addr_t end)
  334. {
  335. pud_t *pud;
  336. phys_addr_t next;
  337. pud = stage2_pud_offset(kvm, pgd, addr);
  338. do {
  339. next = stage2_pud_addr_end(kvm, addr, end);
  340. if (!stage2_pud_none(kvm, *pud)) {
  341. if (stage2_pud_huge(kvm, *pud))
  342. kvm_flush_dcache_pud(*pud);
  343. else
  344. stage2_flush_pmds(kvm, pud, addr, next);
  345. }
  346. } while (pud++, addr = next, addr != end);
  347. }
  348. static void stage2_flush_memslot(struct kvm *kvm,
  349. struct kvm_memory_slot *memslot)
  350. {
  351. phys_addr_t addr = memslot->base_gfn << PAGE_SHIFT;
  352. phys_addr_t end = addr + PAGE_SIZE * memslot->npages;
  353. phys_addr_t next;
  354. pgd_t *pgd;
  355. pgd = kvm->arch.pgd + stage2_pgd_index(kvm, addr);
  356. do {
  357. next = stage2_pgd_addr_end(kvm, addr, end);
  358. if (!stage2_pgd_none(kvm, *pgd))
  359. stage2_flush_puds(kvm, pgd, addr, next);
  360. } while (pgd++, addr = next, addr != end);
  361. }
  362. /**
  363. * stage2_flush_vm - Invalidate cache for pages mapped in stage 2
  364. * @kvm: The struct kvm pointer
  365. *
  366. * Go through the stage 2 page tables and invalidate any cache lines
  367. * backing memory already mapped to the VM.
  368. */
  369. static void stage2_flush_vm(struct kvm *kvm)
  370. {
  371. struct kvm_memslots *slots;
  372. struct kvm_memory_slot *memslot;
  373. int idx;
  374. idx = srcu_read_lock(&kvm->srcu);
  375. spin_lock(&kvm->mmu_lock);
  376. slots = kvm_memslots(kvm);
  377. kvm_for_each_memslot(memslot, slots)
  378. stage2_flush_memslot(kvm, memslot);
  379. spin_unlock(&kvm->mmu_lock);
  380. srcu_read_unlock(&kvm->srcu, idx);
  381. }
  382. static void clear_hyp_pgd_entry(pgd_t *pgd)
  383. {
  384. pud_t *pud_table __maybe_unused = pud_offset(pgd, 0UL);
  385. pgd_clear(pgd);
  386. pud_free(NULL, pud_table);
  387. put_page(virt_to_page(pgd));
  388. }
  389. static void clear_hyp_pud_entry(pud_t *pud)
  390. {
  391. pmd_t *pmd_table __maybe_unused = pmd_offset(pud, 0);
  392. VM_BUG_ON(pud_huge(*pud));
  393. pud_clear(pud);
  394. pmd_free(NULL, pmd_table);
  395. put_page(virt_to_page(pud));
  396. }
  397. static void clear_hyp_pmd_entry(pmd_t *pmd)
  398. {
  399. pte_t *pte_table = pte_offset_kernel(pmd, 0);
  400. VM_BUG_ON(pmd_thp_or_huge(*pmd));
  401. pmd_clear(pmd);
  402. pte_free_kernel(NULL, pte_table);
  403. put_page(virt_to_page(pmd));
  404. }
  405. static void unmap_hyp_ptes(pmd_t *pmd, phys_addr_t addr, phys_addr_t end)
  406. {
  407. pte_t *pte, *start_pte;
  408. start_pte = pte = pte_offset_kernel(pmd, addr);
  409. do {
  410. if (!pte_none(*pte)) {
  411. kvm_set_pte(pte, __pte(0));
  412. put_page(virt_to_page(pte));
  413. }
  414. } while (pte++, addr += PAGE_SIZE, addr != end);
  415. if (hyp_pte_table_empty(start_pte))
  416. clear_hyp_pmd_entry(pmd);
  417. }
  418. static void unmap_hyp_pmds(pud_t *pud, phys_addr_t addr, phys_addr_t end)
  419. {
  420. phys_addr_t next;
  421. pmd_t *pmd, *start_pmd;
  422. start_pmd = pmd = pmd_offset(pud, addr);
  423. do {
  424. next = pmd_addr_end(addr, end);
  425. /* Hyp doesn't use huge pmds */
  426. if (!pmd_none(*pmd))
  427. unmap_hyp_ptes(pmd, addr, next);
  428. } while (pmd++, addr = next, addr != end);
  429. if (hyp_pmd_table_empty(start_pmd))
  430. clear_hyp_pud_entry(pud);
  431. }
  432. static void unmap_hyp_puds(pgd_t *pgd, phys_addr_t addr, phys_addr_t end)
  433. {
  434. phys_addr_t next;
  435. pud_t *pud, *start_pud;
  436. start_pud = pud = pud_offset(pgd, addr);
  437. do {
  438. next = pud_addr_end(addr, end);
  439. /* Hyp doesn't use huge puds */
  440. if (!pud_none(*pud))
  441. unmap_hyp_pmds(pud, addr, next);
  442. } while (pud++, addr = next, addr != end);
  443. if (hyp_pud_table_empty(start_pud))
  444. clear_hyp_pgd_entry(pgd);
  445. }
  446. static unsigned int kvm_pgd_index(unsigned long addr, unsigned int ptrs_per_pgd)
  447. {
  448. return (addr >> PGDIR_SHIFT) & (ptrs_per_pgd - 1);
  449. }
  450. static void __unmap_hyp_range(pgd_t *pgdp, unsigned long ptrs_per_pgd,
  451. phys_addr_t start, u64 size)
  452. {
  453. pgd_t *pgd;
  454. phys_addr_t addr = start, end = start + size;
  455. phys_addr_t next;
  456. /*
  457. * We don't unmap anything from HYP, except at the hyp tear down.
  458. * Hence, we don't have to invalidate the TLBs here.
  459. */
  460. pgd = pgdp + kvm_pgd_index(addr, ptrs_per_pgd);
  461. do {
  462. next = pgd_addr_end(addr, end);
  463. if (!pgd_none(*pgd))
  464. unmap_hyp_puds(pgd, addr, next);
  465. } while (pgd++, addr = next, addr != end);
  466. }
  467. static void unmap_hyp_range(pgd_t *pgdp, phys_addr_t start, u64 size)
  468. {
  469. __unmap_hyp_range(pgdp, PTRS_PER_PGD, start, size);
  470. }
  471. static void unmap_hyp_idmap_range(pgd_t *pgdp, phys_addr_t start, u64 size)
  472. {
  473. __unmap_hyp_range(pgdp, __kvm_idmap_ptrs_per_pgd(), start, size);
  474. }
  475. /**
  476. * free_hyp_pgds - free Hyp-mode page tables
  477. *
  478. * Assumes hyp_pgd is a page table used strictly in Hyp-mode and
  479. * therefore contains either mappings in the kernel memory area (above
  480. * PAGE_OFFSET), or device mappings in the idmap range.
  481. *
  482. * boot_hyp_pgd should only map the idmap range, and is only used in
  483. * the extended idmap case.
  484. */
  485. void free_hyp_pgds(void)
  486. {
  487. pgd_t *id_pgd;
  488. mutex_lock(&kvm_hyp_pgd_mutex);
  489. id_pgd = boot_hyp_pgd ? boot_hyp_pgd : hyp_pgd;
  490. if (id_pgd) {
  491. /* In case we never called hyp_mmu_init() */
  492. if (!io_map_base)
  493. io_map_base = hyp_idmap_start;
  494. unmap_hyp_idmap_range(id_pgd, io_map_base,
  495. hyp_idmap_start + PAGE_SIZE - io_map_base);
  496. }
  497. if (boot_hyp_pgd) {
  498. free_pages((unsigned long)boot_hyp_pgd, hyp_pgd_order);
  499. boot_hyp_pgd = NULL;
  500. }
  501. if (hyp_pgd) {
  502. unmap_hyp_range(hyp_pgd, kern_hyp_va(PAGE_OFFSET),
  503. (uintptr_t)high_memory - PAGE_OFFSET);
  504. free_pages((unsigned long)hyp_pgd, hyp_pgd_order);
  505. hyp_pgd = NULL;
  506. }
  507. if (merged_hyp_pgd) {
  508. clear_page(merged_hyp_pgd);
  509. free_page((unsigned long)merged_hyp_pgd);
  510. merged_hyp_pgd = NULL;
  511. }
  512. mutex_unlock(&kvm_hyp_pgd_mutex);
  513. }
  514. static void create_hyp_pte_mappings(pmd_t *pmd, unsigned long start,
  515. unsigned long end, unsigned long pfn,
  516. pgprot_t prot)
  517. {
  518. pte_t *pte;
  519. unsigned long addr;
  520. addr = start;
  521. do {
  522. pte = pte_offset_kernel(pmd, addr);
  523. kvm_set_pte(pte, pfn_pte(pfn, prot));
  524. get_page(virt_to_page(pte));
  525. pfn++;
  526. } while (addr += PAGE_SIZE, addr != end);
  527. }
  528. static int create_hyp_pmd_mappings(pud_t *pud, unsigned long start,
  529. unsigned long end, unsigned long pfn,
  530. pgprot_t prot)
  531. {
  532. pmd_t *pmd;
  533. pte_t *pte;
  534. unsigned long addr, next;
  535. addr = start;
  536. do {
  537. pmd = pmd_offset(pud, addr);
  538. BUG_ON(pmd_sect(*pmd));
  539. if (pmd_none(*pmd)) {
  540. pte = pte_alloc_one_kernel(NULL, addr);
  541. if (!pte) {
  542. kvm_err("Cannot allocate Hyp pte\n");
  543. return -ENOMEM;
  544. }
  545. kvm_pmd_populate(pmd, pte);
  546. get_page(virt_to_page(pmd));
  547. }
  548. next = pmd_addr_end(addr, end);
  549. create_hyp_pte_mappings(pmd, addr, next, pfn, prot);
  550. pfn += (next - addr) >> PAGE_SHIFT;
  551. } while (addr = next, addr != end);
  552. return 0;
  553. }
  554. static int create_hyp_pud_mappings(pgd_t *pgd, unsigned long start,
  555. unsigned long end, unsigned long pfn,
  556. pgprot_t prot)
  557. {
  558. pud_t *pud;
  559. pmd_t *pmd;
  560. unsigned long addr, next;
  561. int ret;
  562. addr = start;
  563. do {
  564. pud = pud_offset(pgd, addr);
  565. if (pud_none_or_clear_bad(pud)) {
  566. pmd = pmd_alloc_one(NULL, addr);
  567. if (!pmd) {
  568. kvm_err("Cannot allocate Hyp pmd\n");
  569. return -ENOMEM;
  570. }
  571. kvm_pud_populate(pud, pmd);
  572. get_page(virt_to_page(pud));
  573. }
  574. next = pud_addr_end(addr, end);
  575. ret = create_hyp_pmd_mappings(pud, addr, next, pfn, prot);
  576. if (ret)
  577. return ret;
  578. pfn += (next - addr) >> PAGE_SHIFT;
  579. } while (addr = next, addr != end);
  580. return 0;
  581. }
  582. static int __create_hyp_mappings(pgd_t *pgdp, unsigned long ptrs_per_pgd,
  583. unsigned long start, unsigned long end,
  584. unsigned long pfn, pgprot_t prot)
  585. {
  586. pgd_t *pgd;
  587. pud_t *pud;
  588. unsigned long addr, next;
  589. int err = 0;
  590. mutex_lock(&kvm_hyp_pgd_mutex);
  591. addr = start & PAGE_MASK;
  592. end = PAGE_ALIGN(end);
  593. do {
  594. pgd = pgdp + kvm_pgd_index(addr, ptrs_per_pgd);
  595. if (pgd_none(*pgd)) {
  596. pud = pud_alloc_one(NULL, addr);
  597. if (!pud) {
  598. kvm_err("Cannot allocate Hyp pud\n");
  599. err = -ENOMEM;
  600. goto out;
  601. }
  602. kvm_pgd_populate(pgd, pud);
  603. get_page(virt_to_page(pgd));
  604. }
  605. next = pgd_addr_end(addr, end);
  606. err = create_hyp_pud_mappings(pgd, addr, next, pfn, prot);
  607. if (err)
  608. goto out;
  609. pfn += (next - addr) >> PAGE_SHIFT;
  610. } while (addr = next, addr != end);
  611. out:
  612. mutex_unlock(&kvm_hyp_pgd_mutex);
  613. return err;
  614. }
  615. static phys_addr_t kvm_kaddr_to_phys(void *kaddr)
  616. {
  617. if (!is_vmalloc_addr(kaddr)) {
  618. BUG_ON(!virt_addr_valid(kaddr));
  619. return __pa(kaddr);
  620. } else {
  621. return page_to_phys(vmalloc_to_page(kaddr)) +
  622. offset_in_page(kaddr);
  623. }
  624. }
  625. /**
  626. * create_hyp_mappings - duplicate a kernel virtual address range in Hyp mode
  627. * @from: The virtual kernel start address of the range
  628. * @to: The virtual kernel end address of the range (exclusive)
  629. * @prot: The protection to be applied to this range
  630. *
  631. * The same virtual address as the kernel virtual address is also used
  632. * in Hyp-mode mapping (modulo HYP_PAGE_OFFSET) to the same underlying
  633. * physical pages.
  634. */
  635. int create_hyp_mappings(void *from, void *to, pgprot_t prot)
  636. {
  637. phys_addr_t phys_addr;
  638. unsigned long virt_addr;
  639. unsigned long start = kern_hyp_va((unsigned long)from);
  640. unsigned long end = kern_hyp_va((unsigned long)to);
  641. if (is_kernel_in_hyp_mode())
  642. return 0;
  643. start = start & PAGE_MASK;
  644. end = PAGE_ALIGN(end);
  645. for (virt_addr = start; virt_addr < end; virt_addr += PAGE_SIZE) {
  646. int err;
  647. phys_addr = kvm_kaddr_to_phys(from + virt_addr - start);
  648. err = __create_hyp_mappings(hyp_pgd, PTRS_PER_PGD,
  649. virt_addr, virt_addr + PAGE_SIZE,
  650. __phys_to_pfn(phys_addr),
  651. prot);
  652. if (err)
  653. return err;
  654. }
  655. return 0;
  656. }
  657. static int __create_hyp_private_mapping(phys_addr_t phys_addr, size_t size,
  658. unsigned long *haddr, pgprot_t prot)
  659. {
  660. pgd_t *pgd = hyp_pgd;
  661. unsigned long base;
  662. int ret = 0;
  663. mutex_lock(&kvm_hyp_pgd_mutex);
  664. /*
  665. * This assumes that we we have enough space below the idmap
  666. * page to allocate our VAs. If not, the check below will
  667. * kick. A potential alternative would be to detect that
  668. * overflow and switch to an allocation above the idmap.
  669. *
  670. * The allocated size is always a multiple of PAGE_SIZE.
  671. */
  672. size = PAGE_ALIGN(size + offset_in_page(phys_addr));
  673. base = io_map_base - size;
  674. /*
  675. * Verify that BIT(VA_BITS - 1) hasn't been flipped by
  676. * allocating the new area, as it would indicate we've
  677. * overflowed the idmap/IO address range.
  678. */
  679. if ((base ^ io_map_base) & BIT(VA_BITS - 1))
  680. ret = -ENOMEM;
  681. else
  682. io_map_base = base;
  683. mutex_unlock(&kvm_hyp_pgd_mutex);
  684. if (ret)
  685. goto out;
  686. if (__kvm_cpu_uses_extended_idmap())
  687. pgd = boot_hyp_pgd;
  688. ret = __create_hyp_mappings(pgd, __kvm_idmap_ptrs_per_pgd(),
  689. base, base + size,
  690. __phys_to_pfn(phys_addr), prot);
  691. if (ret)
  692. goto out;
  693. *haddr = base + offset_in_page(phys_addr);
  694. out:
  695. return ret;
  696. }
  697. /**
  698. * create_hyp_io_mappings - Map IO into both kernel and HYP
  699. * @phys_addr: The physical start address which gets mapped
  700. * @size: Size of the region being mapped
  701. * @kaddr: Kernel VA for this mapping
  702. * @haddr: HYP VA for this mapping
  703. */
  704. int create_hyp_io_mappings(phys_addr_t phys_addr, size_t size,
  705. void __iomem **kaddr,
  706. void __iomem **haddr)
  707. {
  708. unsigned long addr;
  709. int ret;
  710. *kaddr = ioremap(phys_addr, size);
  711. if (!*kaddr)
  712. return -ENOMEM;
  713. if (is_kernel_in_hyp_mode()) {
  714. *haddr = *kaddr;
  715. return 0;
  716. }
  717. ret = __create_hyp_private_mapping(phys_addr, size,
  718. &addr, PAGE_HYP_DEVICE);
  719. if (ret) {
  720. iounmap(*kaddr);
  721. *kaddr = NULL;
  722. *haddr = NULL;
  723. return ret;
  724. }
  725. *haddr = (void __iomem *)addr;
  726. return 0;
  727. }
  728. /**
  729. * create_hyp_exec_mappings - Map an executable range into HYP
  730. * @phys_addr: The physical start address which gets mapped
  731. * @size: Size of the region being mapped
  732. * @haddr: HYP VA for this mapping
  733. */
  734. int create_hyp_exec_mappings(phys_addr_t phys_addr, size_t size,
  735. void **haddr)
  736. {
  737. unsigned long addr;
  738. int ret;
  739. BUG_ON(is_kernel_in_hyp_mode());
  740. ret = __create_hyp_private_mapping(phys_addr, size,
  741. &addr, PAGE_HYP_EXEC);
  742. if (ret) {
  743. *haddr = NULL;
  744. return ret;
  745. }
  746. *haddr = (void *)addr;
  747. return 0;
  748. }
  749. /**
  750. * kvm_alloc_stage2_pgd - allocate level-1 table for stage-2 translation.
  751. * @kvm: The KVM struct pointer for the VM.
  752. *
  753. * Allocates only the stage-2 HW PGD level table(s) (can support either full
  754. * 40-bit input addresses or limited to 32-bit input addresses). Clears the
  755. * allocated pages.
  756. *
  757. * Note we don't need locking here as this is only called when the VM is
  758. * created, which can only be done once.
  759. */
  760. int kvm_alloc_stage2_pgd(struct kvm *kvm)
  761. {
  762. pgd_t *pgd;
  763. if (kvm->arch.pgd != NULL) {
  764. kvm_err("kvm_arch already initialized?\n");
  765. return -EINVAL;
  766. }
  767. /* Allocate the HW PGD, making sure that each page gets its own refcount */
  768. pgd = alloc_pages_exact(stage2_pgd_size(kvm), GFP_KERNEL | __GFP_ZERO);
  769. if (!pgd)
  770. return -ENOMEM;
  771. kvm->arch.pgd = pgd;
  772. return 0;
  773. }
  774. static void stage2_unmap_memslot(struct kvm *kvm,
  775. struct kvm_memory_slot *memslot)
  776. {
  777. hva_t hva = memslot->userspace_addr;
  778. phys_addr_t addr = memslot->base_gfn << PAGE_SHIFT;
  779. phys_addr_t size = PAGE_SIZE * memslot->npages;
  780. hva_t reg_end = hva + size;
  781. /*
  782. * A memory region could potentially cover multiple VMAs, and any holes
  783. * between them, so iterate over all of them to find out if we should
  784. * unmap any of them.
  785. *
  786. * +--------------------------------------------+
  787. * +---------------+----------------+ +----------------+
  788. * | : VMA 1 | VMA 2 | | VMA 3 : |
  789. * +---------------+----------------+ +----------------+
  790. * | memory region |
  791. * +--------------------------------------------+
  792. */
  793. do {
  794. struct vm_area_struct *vma = find_vma(current->mm, hva);
  795. hva_t vm_start, vm_end;
  796. if (!vma || vma->vm_start >= reg_end)
  797. break;
  798. /*
  799. * Take the intersection of this VMA with the memory region
  800. */
  801. vm_start = max(hva, vma->vm_start);
  802. vm_end = min(reg_end, vma->vm_end);
  803. if (!(vma->vm_flags & VM_PFNMAP)) {
  804. gpa_t gpa = addr + (vm_start - memslot->userspace_addr);
  805. unmap_stage2_range(kvm, gpa, vm_end - vm_start);
  806. }
  807. hva = vm_end;
  808. } while (hva < reg_end);
  809. }
  810. /**
  811. * stage2_unmap_vm - Unmap Stage-2 RAM mappings
  812. * @kvm: The struct kvm pointer
  813. *
  814. * Go through the memregions and unmap any reguler RAM
  815. * backing memory already mapped to the VM.
  816. */
  817. void stage2_unmap_vm(struct kvm *kvm)
  818. {
  819. struct kvm_memslots *slots;
  820. struct kvm_memory_slot *memslot;
  821. int idx;
  822. idx = srcu_read_lock(&kvm->srcu);
  823. down_read(&current->mm->mmap_sem);
  824. spin_lock(&kvm->mmu_lock);
  825. slots = kvm_memslots(kvm);
  826. kvm_for_each_memslot(memslot, slots)
  827. stage2_unmap_memslot(kvm, memslot);
  828. spin_unlock(&kvm->mmu_lock);
  829. up_read(&current->mm->mmap_sem);
  830. srcu_read_unlock(&kvm->srcu, idx);
  831. }
  832. /**
  833. * kvm_free_stage2_pgd - free all stage-2 tables
  834. * @kvm: The KVM struct pointer for the VM.
  835. *
  836. * Walks the level-1 page table pointed to by kvm->arch.pgd and frees all
  837. * underlying level-2 and level-3 tables before freeing the actual level-1 table
  838. * and setting the struct pointer to NULL.
  839. */
  840. void kvm_free_stage2_pgd(struct kvm *kvm)
  841. {
  842. void *pgd = NULL;
  843. spin_lock(&kvm->mmu_lock);
  844. if (kvm->arch.pgd) {
  845. unmap_stage2_range(kvm, 0, kvm_phys_size(kvm));
  846. pgd = READ_ONCE(kvm->arch.pgd);
  847. kvm->arch.pgd = NULL;
  848. }
  849. spin_unlock(&kvm->mmu_lock);
  850. /* Free the HW pgd, one page at a time */
  851. if (pgd)
  852. free_pages_exact(pgd, stage2_pgd_size(kvm));
  853. }
  854. static pud_t *stage2_get_pud(struct kvm *kvm, struct kvm_mmu_memory_cache *cache,
  855. phys_addr_t addr)
  856. {
  857. pgd_t *pgd;
  858. pud_t *pud;
  859. pgd = kvm->arch.pgd + stage2_pgd_index(kvm, addr);
  860. if (stage2_pgd_none(kvm, *pgd)) {
  861. if (!cache)
  862. return NULL;
  863. pud = mmu_memory_cache_alloc(cache);
  864. stage2_pgd_populate(kvm, pgd, pud);
  865. get_page(virt_to_page(pgd));
  866. }
  867. return stage2_pud_offset(kvm, pgd, addr);
  868. }
  869. static pmd_t *stage2_get_pmd(struct kvm *kvm, struct kvm_mmu_memory_cache *cache,
  870. phys_addr_t addr)
  871. {
  872. pud_t *pud;
  873. pmd_t *pmd;
  874. pud = stage2_get_pud(kvm, cache, addr);
  875. if (!pud)
  876. return NULL;
  877. if (stage2_pud_none(kvm, *pud)) {
  878. if (!cache)
  879. return NULL;
  880. pmd = mmu_memory_cache_alloc(cache);
  881. stage2_pud_populate(kvm, pud, pmd);
  882. get_page(virt_to_page(pud));
  883. }
  884. return stage2_pmd_offset(kvm, pud, addr);
  885. }
  886. static int stage2_set_pmd_huge(struct kvm *kvm, struct kvm_mmu_memory_cache
  887. *cache, phys_addr_t addr, const pmd_t *new_pmd)
  888. {
  889. pmd_t *pmd, old_pmd;
  890. pmd = stage2_get_pmd(kvm, cache, addr);
  891. VM_BUG_ON(!pmd);
  892. old_pmd = *pmd;
  893. if (pmd_present(old_pmd)) {
  894. /*
  895. * Multiple vcpus faulting on the same PMD entry, can
  896. * lead to them sequentially updating the PMD with the
  897. * same value. Following the break-before-make
  898. * (pmd_clear() followed by tlb_flush()) process can
  899. * hinder forward progress due to refaults generated
  900. * on missing translations.
  901. *
  902. * Skip updating the page table if the entry is
  903. * unchanged.
  904. */
  905. if (pmd_val(old_pmd) == pmd_val(*new_pmd))
  906. return 0;
  907. /*
  908. * Mapping in huge pages should only happen through a
  909. * fault. If a page is merged into a transparent huge
  910. * page, the individual subpages of that huge page
  911. * should be unmapped through MMU notifiers before we
  912. * get here.
  913. *
  914. * Merging of CompoundPages is not supported; they
  915. * should become splitting first, unmapped, merged,
  916. * and mapped back in on-demand.
  917. */
  918. VM_BUG_ON(pmd_pfn(old_pmd) != pmd_pfn(*new_pmd));
  919. pmd_clear(pmd);
  920. kvm_tlb_flush_vmid_ipa(kvm, addr);
  921. } else {
  922. get_page(virt_to_page(pmd));
  923. }
  924. kvm_set_pmd(pmd, *new_pmd);
  925. return 0;
  926. }
  927. static bool stage2_is_exec(struct kvm *kvm, phys_addr_t addr)
  928. {
  929. pmd_t *pmdp;
  930. pte_t *ptep;
  931. pmdp = stage2_get_pmd(kvm, NULL, addr);
  932. if (!pmdp || pmd_none(*pmdp) || !pmd_present(*pmdp))
  933. return false;
  934. if (pmd_thp_or_huge(*pmdp))
  935. return kvm_s2pmd_exec(pmdp);
  936. ptep = pte_offset_kernel(pmdp, addr);
  937. if (!ptep || pte_none(*ptep) || !pte_present(*ptep))
  938. return false;
  939. return kvm_s2pte_exec(ptep);
  940. }
  941. static int stage2_set_pte(struct kvm *kvm, struct kvm_mmu_memory_cache *cache,
  942. phys_addr_t addr, const pte_t *new_pte,
  943. unsigned long flags)
  944. {
  945. pmd_t *pmd;
  946. pte_t *pte, old_pte;
  947. bool iomap = flags & KVM_S2PTE_FLAG_IS_IOMAP;
  948. bool logging_active = flags & KVM_S2_FLAG_LOGGING_ACTIVE;
  949. VM_BUG_ON(logging_active && !cache);
  950. /* Create stage-2 page table mapping - Levels 0 and 1 */
  951. pmd = stage2_get_pmd(kvm, cache, addr);
  952. if (!pmd) {
  953. /*
  954. * Ignore calls from kvm_set_spte_hva for unallocated
  955. * address ranges.
  956. */
  957. return 0;
  958. }
  959. /*
  960. * While dirty page logging - dissolve huge PMD, then continue on to
  961. * allocate page.
  962. */
  963. if (logging_active)
  964. stage2_dissolve_pmd(kvm, addr, pmd);
  965. /* Create stage-2 page mappings - Level 2 */
  966. if (pmd_none(*pmd)) {
  967. if (!cache)
  968. return 0; /* ignore calls from kvm_set_spte_hva */
  969. pte = mmu_memory_cache_alloc(cache);
  970. kvm_pmd_populate(pmd, pte);
  971. get_page(virt_to_page(pmd));
  972. }
  973. pte = pte_offset_kernel(pmd, addr);
  974. if (iomap && pte_present(*pte))
  975. return -EFAULT;
  976. /* Create 2nd stage page table mapping - Level 3 */
  977. old_pte = *pte;
  978. if (pte_present(old_pte)) {
  979. /* Skip page table update if there is no change */
  980. if (pte_val(old_pte) == pte_val(*new_pte))
  981. return 0;
  982. kvm_set_pte(pte, __pte(0));
  983. kvm_tlb_flush_vmid_ipa(kvm, addr);
  984. } else {
  985. get_page(virt_to_page(pte));
  986. }
  987. kvm_set_pte(pte, *new_pte);
  988. return 0;
  989. }
  990. #ifndef __HAVE_ARCH_PTEP_TEST_AND_CLEAR_YOUNG
  991. static int stage2_ptep_test_and_clear_young(pte_t *pte)
  992. {
  993. if (pte_young(*pte)) {
  994. *pte = pte_mkold(*pte);
  995. return 1;
  996. }
  997. return 0;
  998. }
  999. #else
  1000. static int stage2_ptep_test_and_clear_young(pte_t *pte)
  1001. {
  1002. return __ptep_test_and_clear_young(pte);
  1003. }
  1004. #endif
  1005. static int stage2_pmdp_test_and_clear_young(pmd_t *pmd)
  1006. {
  1007. return stage2_ptep_test_and_clear_young((pte_t *)pmd);
  1008. }
  1009. /**
  1010. * kvm_phys_addr_ioremap - map a device range to guest IPA
  1011. *
  1012. * @kvm: The KVM pointer
  1013. * @guest_ipa: The IPA at which to insert the mapping
  1014. * @pa: The physical address of the device
  1015. * @size: The size of the mapping
  1016. */
  1017. int kvm_phys_addr_ioremap(struct kvm *kvm, phys_addr_t guest_ipa,
  1018. phys_addr_t pa, unsigned long size, bool writable)
  1019. {
  1020. phys_addr_t addr, end;
  1021. int ret = 0;
  1022. unsigned long pfn;
  1023. struct kvm_mmu_memory_cache cache = { 0, };
  1024. end = (guest_ipa + size + PAGE_SIZE - 1) & PAGE_MASK;
  1025. pfn = __phys_to_pfn(pa);
  1026. for (addr = guest_ipa; addr < end; addr += PAGE_SIZE) {
  1027. pte_t pte = pfn_pte(pfn, PAGE_S2_DEVICE);
  1028. if (writable)
  1029. pte = kvm_s2pte_mkwrite(pte);
  1030. ret = mmu_topup_memory_cache(&cache,
  1031. kvm_mmu_cache_min_pages(kvm),
  1032. KVM_NR_MEM_OBJS);
  1033. if (ret)
  1034. goto out;
  1035. spin_lock(&kvm->mmu_lock);
  1036. ret = stage2_set_pte(kvm, &cache, addr, &pte,
  1037. KVM_S2PTE_FLAG_IS_IOMAP);
  1038. spin_unlock(&kvm->mmu_lock);
  1039. if (ret)
  1040. goto out;
  1041. pfn++;
  1042. }
  1043. out:
  1044. mmu_free_memory_cache(&cache);
  1045. return ret;
  1046. }
  1047. static bool transparent_hugepage_adjust(kvm_pfn_t *pfnp, phys_addr_t *ipap)
  1048. {
  1049. kvm_pfn_t pfn = *pfnp;
  1050. gfn_t gfn = *ipap >> PAGE_SHIFT;
  1051. struct page *page = pfn_to_page(pfn);
  1052. /*
  1053. * PageTransCompoungMap() returns true for THP and
  1054. * hugetlbfs. Make sure the adjustment is done only for THP
  1055. * pages.
  1056. */
  1057. if (!PageHuge(page) && PageTransCompoundMap(page)) {
  1058. unsigned long mask;
  1059. /*
  1060. * The address we faulted on is backed by a transparent huge
  1061. * page. However, because we map the compound huge page and
  1062. * not the individual tail page, we need to transfer the
  1063. * refcount to the head page. We have to be careful that the
  1064. * THP doesn't start to split while we are adjusting the
  1065. * refcounts.
  1066. *
  1067. * We are sure this doesn't happen, because mmu_notifier_retry
  1068. * was successful and we are holding the mmu_lock, so if this
  1069. * THP is trying to split, it will be blocked in the mmu
  1070. * notifier before touching any of the pages, specifically
  1071. * before being able to call __split_huge_page_refcount().
  1072. *
  1073. * We can therefore safely transfer the refcount from PG_tail
  1074. * to PG_head and switch the pfn from a tail page to the head
  1075. * page accordingly.
  1076. */
  1077. mask = PTRS_PER_PMD - 1;
  1078. VM_BUG_ON((gfn & mask) != (pfn & mask));
  1079. if (pfn & mask) {
  1080. *ipap &= PMD_MASK;
  1081. kvm_release_pfn_clean(pfn);
  1082. pfn &= ~mask;
  1083. kvm_get_pfn(pfn);
  1084. *pfnp = pfn;
  1085. }
  1086. return true;
  1087. }
  1088. return false;
  1089. }
  1090. static bool kvm_is_write_fault(struct kvm_vcpu *vcpu)
  1091. {
  1092. if (kvm_vcpu_trap_is_iabt(vcpu))
  1093. return false;
  1094. return kvm_vcpu_dabt_iswrite(vcpu);
  1095. }
  1096. /**
  1097. * stage2_wp_ptes - write protect PMD range
  1098. * @pmd: pointer to pmd entry
  1099. * @addr: range start address
  1100. * @end: range end address
  1101. */
  1102. static void stage2_wp_ptes(pmd_t *pmd, phys_addr_t addr, phys_addr_t end)
  1103. {
  1104. pte_t *pte;
  1105. pte = pte_offset_kernel(pmd, addr);
  1106. do {
  1107. if (!pte_none(*pte)) {
  1108. if (!kvm_s2pte_readonly(pte))
  1109. kvm_set_s2pte_readonly(pte);
  1110. }
  1111. } while (pte++, addr += PAGE_SIZE, addr != end);
  1112. }
  1113. /**
  1114. * stage2_wp_pmds - write protect PUD range
  1115. * kvm: kvm instance for the VM
  1116. * @pud: pointer to pud entry
  1117. * @addr: range start address
  1118. * @end: range end address
  1119. */
  1120. static void stage2_wp_pmds(struct kvm *kvm, pud_t *pud,
  1121. phys_addr_t addr, phys_addr_t end)
  1122. {
  1123. pmd_t *pmd;
  1124. phys_addr_t next;
  1125. pmd = stage2_pmd_offset(kvm, pud, addr);
  1126. do {
  1127. next = stage2_pmd_addr_end(kvm, addr, end);
  1128. if (!pmd_none(*pmd)) {
  1129. if (pmd_thp_or_huge(*pmd)) {
  1130. if (!kvm_s2pmd_readonly(pmd))
  1131. kvm_set_s2pmd_readonly(pmd);
  1132. } else {
  1133. stage2_wp_ptes(pmd, addr, next);
  1134. }
  1135. }
  1136. } while (pmd++, addr = next, addr != end);
  1137. }
  1138. /**
  1139. * stage2_wp_puds - write protect PGD range
  1140. * @pgd: pointer to pgd entry
  1141. * @addr: range start address
  1142. * @end: range end address
  1143. *
  1144. * Process PUD entries, for a huge PUD we cause a panic.
  1145. */
  1146. static void stage2_wp_puds(struct kvm *kvm, pgd_t *pgd,
  1147. phys_addr_t addr, phys_addr_t end)
  1148. {
  1149. pud_t *pud;
  1150. phys_addr_t next;
  1151. pud = stage2_pud_offset(kvm, pgd, addr);
  1152. do {
  1153. next = stage2_pud_addr_end(kvm, addr, end);
  1154. if (!stage2_pud_none(kvm, *pud)) {
  1155. /* TODO:PUD not supported, revisit later if supported */
  1156. BUG_ON(stage2_pud_huge(kvm, *pud));
  1157. stage2_wp_pmds(kvm, pud, addr, next);
  1158. }
  1159. } while (pud++, addr = next, addr != end);
  1160. }
  1161. /**
  1162. * stage2_wp_range() - write protect stage2 memory region range
  1163. * @kvm: The KVM pointer
  1164. * @addr: Start address of range
  1165. * @end: End address of range
  1166. */
  1167. static void stage2_wp_range(struct kvm *kvm, phys_addr_t addr, phys_addr_t end)
  1168. {
  1169. pgd_t *pgd;
  1170. phys_addr_t next;
  1171. pgd = kvm->arch.pgd + stage2_pgd_index(kvm, addr);
  1172. do {
  1173. /*
  1174. * Release kvm_mmu_lock periodically if the memory region is
  1175. * large. Otherwise, we may see kernel panics with
  1176. * CONFIG_DETECT_HUNG_TASK, CONFIG_LOCKUP_DETECTOR,
  1177. * CONFIG_LOCKDEP. Additionally, holding the lock too long
  1178. * will also starve other vCPUs. We have to also make sure
  1179. * that the page tables are not freed while we released
  1180. * the lock.
  1181. */
  1182. cond_resched_lock(&kvm->mmu_lock);
  1183. if (!READ_ONCE(kvm->arch.pgd))
  1184. break;
  1185. next = stage2_pgd_addr_end(kvm, addr, end);
  1186. if (stage2_pgd_present(kvm, *pgd))
  1187. stage2_wp_puds(kvm, pgd, addr, next);
  1188. } while (pgd++, addr = next, addr != end);
  1189. }
  1190. /**
  1191. * kvm_mmu_wp_memory_region() - write protect stage 2 entries for memory slot
  1192. * @kvm: The KVM pointer
  1193. * @slot: The memory slot to write protect
  1194. *
  1195. * Called to start logging dirty pages after memory region
  1196. * KVM_MEM_LOG_DIRTY_PAGES operation is called. After this function returns
  1197. * all present PMD and PTEs are write protected in the memory region.
  1198. * Afterwards read of dirty page log can be called.
  1199. *
  1200. * Acquires kvm_mmu_lock. Called with kvm->slots_lock mutex acquired,
  1201. * serializing operations for VM memory regions.
  1202. */
  1203. void kvm_mmu_wp_memory_region(struct kvm *kvm, int slot)
  1204. {
  1205. struct kvm_memslots *slots = kvm_memslots(kvm);
  1206. struct kvm_memory_slot *memslot = id_to_memslot(slots, slot);
  1207. phys_addr_t start = memslot->base_gfn << PAGE_SHIFT;
  1208. phys_addr_t end = (memslot->base_gfn + memslot->npages) << PAGE_SHIFT;
  1209. spin_lock(&kvm->mmu_lock);
  1210. stage2_wp_range(kvm, start, end);
  1211. spin_unlock(&kvm->mmu_lock);
  1212. kvm_flush_remote_tlbs(kvm);
  1213. }
  1214. /**
  1215. * kvm_mmu_write_protect_pt_masked() - write protect dirty pages
  1216. * @kvm: The KVM pointer
  1217. * @slot: The memory slot associated with mask
  1218. * @gfn_offset: The gfn offset in memory slot
  1219. * @mask: The mask of dirty pages at offset 'gfn_offset' in this memory
  1220. * slot to be write protected
  1221. *
  1222. * Walks bits set in mask write protects the associated pte's. Caller must
  1223. * acquire kvm_mmu_lock.
  1224. */
  1225. static void kvm_mmu_write_protect_pt_masked(struct kvm *kvm,
  1226. struct kvm_memory_slot *slot,
  1227. gfn_t gfn_offset, unsigned long mask)
  1228. {
  1229. phys_addr_t base_gfn = slot->base_gfn + gfn_offset;
  1230. phys_addr_t start = (base_gfn + __ffs(mask)) << PAGE_SHIFT;
  1231. phys_addr_t end = (base_gfn + __fls(mask) + 1) << PAGE_SHIFT;
  1232. stage2_wp_range(kvm, start, end);
  1233. }
  1234. /*
  1235. * kvm_arch_mmu_enable_log_dirty_pt_masked - enable dirty logging for selected
  1236. * dirty pages.
  1237. *
  1238. * It calls kvm_mmu_write_protect_pt_masked to write protect selected pages to
  1239. * enable dirty logging for them.
  1240. */
  1241. void kvm_arch_mmu_enable_log_dirty_pt_masked(struct kvm *kvm,
  1242. struct kvm_memory_slot *slot,
  1243. gfn_t gfn_offset, unsigned long mask)
  1244. {
  1245. kvm_mmu_write_protect_pt_masked(kvm, slot, gfn_offset, mask);
  1246. }
  1247. static void clean_dcache_guest_page(kvm_pfn_t pfn, unsigned long size)
  1248. {
  1249. __clean_dcache_guest_page(pfn, size);
  1250. }
  1251. static void invalidate_icache_guest_page(kvm_pfn_t pfn, unsigned long size)
  1252. {
  1253. __invalidate_icache_guest_page(pfn, size);
  1254. }
  1255. static void kvm_send_hwpoison_signal(unsigned long address,
  1256. struct vm_area_struct *vma)
  1257. {
  1258. short lsb;
  1259. if (is_vm_hugetlb_page(vma))
  1260. lsb = huge_page_shift(hstate_vma(vma));
  1261. else
  1262. lsb = PAGE_SHIFT;
  1263. send_sig_mceerr(BUS_MCEERR_AR, (void __user *)address, lsb, current);
  1264. }
  1265. static int user_mem_abort(struct kvm_vcpu *vcpu, phys_addr_t fault_ipa,
  1266. struct kvm_memory_slot *memslot, unsigned long hva,
  1267. unsigned long fault_status)
  1268. {
  1269. int ret;
  1270. bool write_fault, exec_fault, writable, hugetlb = false, force_pte = false;
  1271. unsigned long mmu_seq;
  1272. gfn_t gfn = fault_ipa >> PAGE_SHIFT;
  1273. struct kvm *kvm = vcpu->kvm;
  1274. struct kvm_mmu_memory_cache *memcache = &vcpu->arch.mmu_page_cache;
  1275. struct vm_area_struct *vma;
  1276. kvm_pfn_t pfn;
  1277. pgprot_t mem_type = PAGE_S2;
  1278. bool logging_active = memslot_is_logging(memslot);
  1279. unsigned long flags = 0;
  1280. write_fault = kvm_is_write_fault(vcpu);
  1281. exec_fault = kvm_vcpu_trap_is_iabt(vcpu);
  1282. VM_BUG_ON(write_fault && exec_fault);
  1283. if (fault_status == FSC_PERM && !write_fault && !exec_fault) {
  1284. kvm_err("Unexpected L2 read permission error\n");
  1285. return -EFAULT;
  1286. }
  1287. /* Let's check if we will get back a huge page backed by hugetlbfs */
  1288. down_read(&current->mm->mmap_sem);
  1289. vma = find_vma_intersection(current->mm, hva, hva + 1);
  1290. if (unlikely(!vma)) {
  1291. kvm_err("Failed to find VMA for hva 0x%lx\n", hva);
  1292. up_read(&current->mm->mmap_sem);
  1293. return -EFAULT;
  1294. }
  1295. if (vma_kernel_pagesize(vma) == PMD_SIZE && !logging_active) {
  1296. hugetlb = true;
  1297. gfn = (fault_ipa & PMD_MASK) >> PAGE_SHIFT;
  1298. } else {
  1299. /*
  1300. * Pages belonging to memslots that don't have the same
  1301. * alignment for userspace and IPA cannot be mapped using
  1302. * block descriptors even if the pages belong to a THP for
  1303. * the process, because the stage-2 block descriptor will
  1304. * cover more than a single THP and we loose atomicity for
  1305. * unmapping, updates, and splits of the THP or other pages
  1306. * in the stage-2 block range.
  1307. */
  1308. if ((memslot->userspace_addr & ~PMD_MASK) !=
  1309. ((memslot->base_gfn << PAGE_SHIFT) & ~PMD_MASK))
  1310. force_pte = true;
  1311. }
  1312. up_read(&current->mm->mmap_sem);
  1313. /* We need minimum second+third level pages */
  1314. ret = mmu_topup_memory_cache(memcache, kvm_mmu_cache_min_pages(kvm),
  1315. KVM_NR_MEM_OBJS);
  1316. if (ret)
  1317. return ret;
  1318. mmu_seq = vcpu->kvm->mmu_notifier_seq;
  1319. /*
  1320. * Ensure the read of mmu_notifier_seq happens before we call
  1321. * gfn_to_pfn_prot (which calls get_user_pages), so that we don't risk
  1322. * the page we just got a reference to gets unmapped before we have a
  1323. * chance to grab the mmu_lock, which ensure that if the page gets
  1324. * unmapped afterwards, the call to kvm_unmap_hva will take it away
  1325. * from us again properly. This smp_rmb() interacts with the smp_wmb()
  1326. * in kvm_mmu_notifier_invalidate_<page|range_end>.
  1327. */
  1328. smp_rmb();
  1329. pfn = gfn_to_pfn_prot(kvm, gfn, write_fault, &writable);
  1330. if (pfn == KVM_PFN_ERR_HWPOISON) {
  1331. kvm_send_hwpoison_signal(hva, vma);
  1332. return 0;
  1333. }
  1334. if (is_error_noslot_pfn(pfn))
  1335. return -EFAULT;
  1336. if (kvm_is_device_pfn(pfn)) {
  1337. mem_type = PAGE_S2_DEVICE;
  1338. flags |= KVM_S2PTE_FLAG_IS_IOMAP;
  1339. } else if (logging_active) {
  1340. /*
  1341. * Faults on pages in a memslot with logging enabled
  1342. * should not be mapped with huge pages (it introduces churn
  1343. * and performance degradation), so force a pte mapping.
  1344. */
  1345. force_pte = true;
  1346. flags |= KVM_S2_FLAG_LOGGING_ACTIVE;
  1347. /*
  1348. * Only actually map the page as writable if this was a write
  1349. * fault.
  1350. */
  1351. if (!write_fault)
  1352. writable = false;
  1353. }
  1354. spin_lock(&kvm->mmu_lock);
  1355. if (mmu_notifier_retry(kvm, mmu_seq))
  1356. goto out_unlock;
  1357. if (!hugetlb && !force_pte)
  1358. hugetlb = transparent_hugepage_adjust(&pfn, &fault_ipa);
  1359. if (hugetlb) {
  1360. pmd_t new_pmd = pfn_pmd(pfn, mem_type);
  1361. new_pmd = pmd_mkhuge(new_pmd);
  1362. if (writable) {
  1363. new_pmd = kvm_s2pmd_mkwrite(new_pmd);
  1364. kvm_set_pfn_dirty(pfn);
  1365. }
  1366. if (fault_status != FSC_PERM)
  1367. clean_dcache_guest_page(pfn, PMD_SIZE);
  1368. if (exec_fault) {
  1369. new_pmd = kvm_s2pmd_mkexec(new_pmd);
  1370. invalidate_icache_guest_page(pfn, PMD_SIZE);
  1371. } else if (fault_status == FSC_PERM) {
  1372. /* Preserve execute if XN was already cleared */
  1373. if (stage2_is_exec(kvm, fault_ipa))
  1374. new_pmd = kvm_s2pmd_mkexec(new_pmd);
  1375. }
  1376. ret = stage2_set_pmd_huge(kvm, memcache, fault_ipa, &new_pmd);
  1377. } else {
  1378. pte_t new_pte = pfn_pte(pfn, mem_type);
  1379. if (writable) {
  1380. new_pte = kvm_s2pte_mkwrite(new_pte);
  1381. kvm_set_pfn_dirty(pfn);
  1382. mark_page_dirty(kvm, gfn);
  1383. }
  1384. if (fault_status != FSC_PERM)
  1385. clean_dcache_guest_page(pfn, PAGE_SIZE);
  1386. if (exec_fault) {
  1387. new_pte = kvm_s2pte_mkexec(new_pte);
  1388. invalidate_icache_guest_page(pfn, PAGE_SIZE);
  1389. } else if (fault_status == FSC_PERM) {
  1390. /* Preserve execute if XN was already cleared */
  1391. if (stage2_is_exec(kvm, fault_ipa))
  1392. new_pte = kvm_s2pte_mkexec(new_pte);
  1393. }
  1394. ret = stage2_set_pte(kvm, memcache, fault_ipa, &new_pte, flags);
  1395. }
  1396. out_unlock:
  1397. spin_unlock(&kvm->mmu_lock);
  1398. kvm_set_pfn_accessed(pfn);
  1399. kvm_release_pfn_clean(pfn);
  1400. return ret;
  1401. }
  1402. /*
  1403. * Resolve the access fault by making the page young again.
  1404. * Note that because the faulting entry is guaranteed not to be
  1405. * cached in the TLB, we don't need to invalidate anything.
  1406. * Only the HW Access Flag updates are supported for Stage 2 (no DBM),
  1407. * so there is no need for atomic (pte|pmd)_mkyoung operations.
  1408. */
  1409. static void handle_access_fault(struct kvm_vcpu *vcpu, phys_addr_t fault_ipa)
  1410. {
  1411. pmd_t *pmd;
  1412. pte_t *pte;
  1413. kvm_pfn_t pfn;
  1414. bool pfn_valid = false;
  1415. trace_kvm_access_fault(fault_ipa);
  1416. spin_lock(&vcpu->kvm->mmu_lock);
  1417. pmd = stage2_get_pmd(vcpu->kvm, NULL, fault_ipa);
  1418. if (!pmd || pmd_none(*pmd)) /* Nothing there */
  1419. goto out;
  1420. if (pmd_thp_or_huge(*pmd)) { /* THP, HugeTLB */
  1421. *pmd = pmd_mkyoung(*pmd);
  1422. pfn = pmd_pfn(*pmd);
  1423. pfn_valid = true;
  1424. goto out;
  1425. }
  1426. pte = pte_offset_kernel(pmd, fault_ipa);
  1427. if (pte_none(*pte)) /* Nothing there either */
  1428. goto out;
  1429. *pte = pte_mkyoung(*pte); /* Just a page... */
  1430. pfn = pte_pfn(*pte);
  1431. pfn_valid = true;
  1432. out:
  1433. spin_unlock(&vcpu->kvm->mmu_lock);
  1434. if (pfn_valid)
  1435. kvm_set_pfn_accessed(pfn);
  1436. }
  1437. /**
  1438. * kvm_handle_guest_abort - handles all 2nd stage aborts
  1439. * @vcpu: the VCPU pointer
  1440. * @run: the kvm_run structure
  1441. *
  1442. * Any abort that gets to the host is almost guaranteed to be caused by a
  1443. * missing second stage translation table entry, which can mean that either the
  1444. * guest simply needs more memory and we must allocate an appropriate page or it
  1445. * can mean that the guest tried to access I/O memory, which is emulated by user
  1446. * space. The distinction is based on the IPA causing the fault and whether this
  1447. * memory region has been registered as standard RAM by user space.
  1448. */
  1449. int kvm_handle_guest_abort(struct kvm_vcpu *vcpu, struct kvm_run *run)
  1450. {
  1451. unsigned long fault_status;
  1452. phys_addr_t fault_ipa;
  1453. struct kvm_memory_slot *memslot;
  1454. unsigned long hva;
  1455. bool is_iabt, write_fault, writable;
  1456. gfn_t gfn;
  1457. int ret, idx;
  1458. fault_status = kvm_vcpu_trap_get_fault_type(vcpu);
  1459. fault_ipa = kvm_vcpu_get_fault_ipa(vcpu);
  1460. is_iabt = kvm_vcpu_trap_is_iabt(vcpu);
  1461. /* Synchronous External Abort? */
  1462. if (kvm_vcpu_dabt_isextabt(vcpu)) {
  1463. /*
  1464. * For RAS the host kernel may handle this abort.
  1465. * There is no need to pass the error into the guest.
  1466. */
  1467. if (!handle_guest_sea(fault_ipa, kvm_vcpu_get_hsr(vcpu)))
  1468. return 1;
  1469. if (unlikely(!is_iabt)) {
  1470. kvm_inject_vabt(vcpu);
  1471. return 1;
  1472. }
  1473. }
  1474. trace_kvm_guest_fault(*vcpu_pc(vcpu), kvm_vcpu_get_hsr(vcpu),
  1475. kvm_vcpu_get_hfar(vcpu), fault_ipa);
  1476. /* Check the stage-2 fault is trans. fault or write fault */
  1477. if (fault_status != FSC_FAULT && fault_status != FSC_PERM &&
  1478. fault_status != FSC_ACCESS) {
  1479. kvm_err("Unsupported FSC: EC=%#x xFSC=%#lx ESR_EL2=%#lx\n",
  1480. kvm_vcpu_trap_get_class(vcpu),
  1481. (unsigned long)kvm_vcpu_trap_get_fault(vcpu),
  1482. (unsigned long)kvm_vcpu_get_hsr(vcpu));
  1483. return -EFAULT;
  1484. }
  1485. idx = srcu_read_lock(&vcpu->kvm->srcu);
  1486. gfn = fault_ipa >> PAGE_SHIFT;
  1487. memslot = gfn_to_memslot(vcpu->kvm, gfn);
  1488. hva = gfn_to_hva_memslot_prot(memslot, gfn, &writable);
  1489. write_fault = kvm_is_write_fault(vcpu);
  1490. if (kvm_is_error_hva(hva) || (write_fault && !writable)) {
  1491. if (is_iabt) {
  1492. /* Prefetch Abort on I/O address */
  1493. kvm_inject_pabt(vcpu, kvm_vcpu_get_hfar(vcpu));
  1494. ret = 1;
  1495. goto out_unlock;
  1496. }
  1497. /*
  1498. * Check for a cache maintenance operation. Since we
  1499. * ended-up here, we know it is outside of any memory
  1500. * slot. But we can't find out if that is for a device,
  1501. * or if the guest is just being stupid. The only thing
  1502. * we know for sure is that this range cannot be cached.
  1503. *
  1504. * So let's assume that the guest is just being
  1505. * cautious, and skip the instruction.
  1506. */
  1507. if (kvm_vcpu_dabt_is_cm(vcpu)) {
  1508. kvm_skip_instr(vcpu, kvm_vcpu_trap_il_is32bit(vcpu));
  1509. ret = 1;
  1510. goto out_unlock;
  1511. }
  1512. /*
  1513. * The IPA is reported as [MAX:12], so we need to
  1514. * complement it with the bottom 12 bits from the
  1515. * faulting VA. This is always 12 bits, irrespective
  1516. * of the page size.
  1517. */
  1518. fault_ipa |= kvm_vcpu_get_hfar(vcpu) & ((1 << 12) - 1);
  1519. ret = io_mem_abort(vcpu, run, fault_ipa);
  1520. goto out_unlock;
  1521. }
  1522. /* Userspace should not be able to register out-of-bounds IPAs */
  1523. VM_BUG_ON(fault_ipa >= kvm_phys_size(vcpu->kvm));
  1524. if (fault_status == FSC_ACCESS) {
  1525. handle_access_fault(vcpu, fault_ipa);
  1526. ret = 1;
  1527. goto out_unlock;
  1528. }
  1529. ret = user_mem_abort(vcpu, fault_ipa, memslot, hva, fault_status);
  1530. if (ret == 0)
  1531. ret = 1;
  1532. out_unlock:
  1533. srcu_read_unlock(&vcpu->kvm->srcu, idx);
  1534. return ret;
  1535. }
  1536. static int handle_hva_to_gpa(struct kvm *kvm,
  1537. unsigned long start,
  1538. unsigned long end,
  1539. int (*handler)(struct kvm *kvm,
  1540. gpa_t gpa, u64 size,
  1541. void *data),
  1542. void *data)
  1543. {
  1544. struct kvm_memslots *slots;
  1545. struct kvm_memory_slot *memslot;
  1546. int ret = 0;
  1547. slots = kvm_memslots(kvm);
  1548. /* we only care about the pages that the guest sees */
  1549. kvm_for_each_memslot(memslot, slots) {
  1550. unsigned long hva_start, hva_end;
  1551. gfn_t gpa;
  1552. hva_start = max(start, memslot->userspace_addr);
  1553. hva_end = min(end, memslot->userspace_addr +
  1554. (memslot->npages << PAGE_SHIFT));
  1555. if (hva_start >= hva_end)
  1556. continue;
  1557. gpa = hva_to_gfn_memslot(hva_start, memslot) << PAGE_SHIFT;
  1558. ret |= handler(kvm, gpa, (u64)(hva_end - hva_start), data);
  1559. }
  1560. return ret;
  1561. }
  1562. static int kvm_unmap_hva_handler(struct kvm *kvm, gpa_t gpa, u64 size, void *data)
  1563. {
  1564. unmap_stage2_range(kvm, gpa, size);
  1565. return 0;
  1566. }
  1567. int kvm_unmap_hva_range(struct kvm *kvm,
  1568. unsigned long start, unsigned long end)
  1569. {
  1570. if (!kvm->arch.pgd)
  1571. return 0;
  1572. trace_kvm_unmap_hva_range(start, end);
  1573. handle_hva_to_gpa(kvm, start, end, &kvm_unmap_hva_handler, NULL);
  1574. return 0;
  1575. }
  1576. static int kvm_set_spte_handler(struct kvm *kvm, gpa_t gpa, u64 size, void *data)
  1577. {
  1578. pte_t *pte = (pte_t *)data;
  1579. WARN_ON(size != PAGE_SIZE);
  1580. /*
  1581. * We can always call stage2_set_pte with KVM_S2PTE_FLAG_LOGGING_ACTIVE
  1582. * flag clear because MMU notifiers will have unmapped a huge PMD before
  1583. * calling ->change_pte() (which in turn calls kvm_set_spte_hva()) and
  1584. * therefore stage2_set_pte() never needs to clear out a huge PMD
  1585. * through this calling path.
  1586. */
  1587. stage2_set_pte(kvm, NULL, gpa, pte, 0);
  1588. return 0;
  1589. }
  1590. void kvm_set_spte_hva(struct kvm *kvm, unsigned long hva, pte_t pte)
  1591. {
  1592. unsigned long end = hva + PAGE_SIZE;
  1593. kvm_pfn_t pfn = pte_pfn(pte);
  1594. pte_t stage2_pte;
  1595. if (!kvm->arch.pgd)
  1596. return;
  1597. trace_kvm_set_spte_hva(hva);
  1598. /*
  1599. * We've moved a page around, probably through CoW, so let's treat it
  1600. * just like a translation fault and clean the cache to the PoC.
  1601. */
  1602. clean_dcache_guest_page(pfn, PAGE_SIZE);
  1603. stage2_pte = pfn_pte(pfn, PAGE_S2);
  1604. handle_hva_to_gpa(kvm, hva, end, &kvm_set_spte_handler, &stage2_pte);
  1605. }
  1606. static int kvm_age_hva_handler(struct kvm *kvm, gpa_t gpa, u64 size, void *data)
  1607. {
  1608. pmd_t *pmd;
  1609. pte_t *pte;
  1610. WARN_ON(size != PAGE_SIZE && size != PMD_SIZE);
  1611. pmd = stage2_get_pmd(kvm, NULL, gpa);
  1612. if (!pmd || pmd_none(*pmd)) /* Nothing there */
  1613. return 0;
  1614. if (pmd_thp_or_huge(*pmd)) /* THP, HugeTLB */
  1615. return stage2_pmdp_test_and_clear_young(pmd);
  1616. pte = pte_offset_kernel(pmd, gpa);
  1617. if (pte_none(*pte))
  1618. return 0;
  1619. return stage2_ptep_test_and_clear_young(pte);
  1620. }
  1621. static int kvm_test_age_hva_handler(struct kvm *kvm, gpa_t gpa, u64 size, void *data)
  1622. {
  1623. pmd_t *pmd;
  1624. pte_t *pte;
  1625. WARN_ON(size != PAGE_SIZE && size != PMD_SIZE);
  1626. pmd = stage2_get_pmd(kvm, NULL, gpa);
  1627. if (!pmd || pmd_none(*pmd)) /* Nothing there */
  1628. return 0;
  1629. if (pmd_thp_or_huge(*pmd)) /* THP, HugeTLB */
  1630. return pmd_young(*pmd);
  1631. pte = pte_offset_kernel(pmd, gpa);
  1632. if (!pte_none(*pte)) /* Just a page... */
  1633. return pte_young(*pte);
  1634. return 0;
  1635. }
  1636. int kvm_age_hva(struct kvm *kvm, unsigned long start, unsigned long end)
  1637. {
  1638. if (!kvm->arch.pgd)
  1639. return 0;
  1640. trace_kvm_age_hva(start, end);
  1641. return handle_hva_to_gpa(kvm, start, end, kvm_age_hva_handler, NULL);
  1642. }
  1643. int kvm_test_age_hva(struct kvm *kvm, unsigned long hva)
  1644. {
  1645. if (!kvm->arch.pgd)
  1646. return 0;
  1647. trace_kvm_test_age_hva(hva);
  1648. return handle_hva_to_gpa(kvm, hva, hva, kvm_test_age_hva_handler, NULL);
  1649. }
  1650. void kvm_mmu_free_memory_caches(struct kvm_vcpu *vcpu)
  1651. {
  1652. mmu_free_memory_cache(&vcpu->arch.mmu_page_cache);
  1653. }
  1654. phys_addr_t kvm_mmu_get_httbr(void)
  1655. {
  1656. if (__kvm_cpu_uses_extended_idmap())
  1657. return virt_to_phys(merged_hyp_pgd);
  1658. else
  1659. return virt_to_phys(hyp_pgd);
  1660. }
  1661. phys_addr_t kvm_get_idmap_vector(void)
  1662. {
  1663. return hyp_idmap_vector;
  1664. }
  1665. static int kvm_map_idmap_text(pgd_t *pgd)
  1666. {
  1667. int err;
  1668. /* Create the idmap in the boot page tables */
  1669. err = __create_hyp_mappings(pgd, __kvm_idmap_ptrs_per_pgd(),
  1670. hyp_idmap_start, hyp_idmap_end,
  1671. __phys_to_pfn(hyp_idmap_start),
  1672. PAGE_HYP_EXEC);
  1673. if (err)
  1674. kvm_err("Failed to idmap %lx-%lx\n",
  1675. hyp_idmap_start, hyp_idmap_end);
  1676. return err;
  1677. }
  1678. int kvm_mmu_init(void)
  1679. {
  1680. int err;
  1681. hyp_idmap_start = kvm_virt_to_phys(__hyp_idmap_text_start);
  1682. hyp_idmap_start = ALIGN_DOWN(hyp_idmap_start, PAGE_SIZE);
  1683. hyp_idmap_end = kvm_virt_to_phys(__hyp_idmap_text_end);
  1684. hyp_idmap_end = ALIGN(hyp_idmap_end, PAGE_SIZE);
  1685. hyp_idmap_vector = kvm_virt_to_phys(__kvm_hyp_init);
  1686. /*
  1687. * We rely on the linker script to ensure at build time that the HYP
  1688. * init code does not cross a page boundary.
  1689. */
  1690. BUG_ON((hyp_idmap_start ^ (hyp_idmap_end - 1)) & PAGE_MASK);
  1691. kvm_debug("IDMAP page: %lx\n", hyp_idmap_start);
  1692. kvm_debug("HYP VA range: %lx:%lx\n",
  1693. kern_hyp_va(PAGE_OFFSET),
  1694. kern_hyp_va((unsigned long)high_memory - 1));
  1695. if (hyp_idmap_start >= kern_hyp_va(PAGE_OFFSET) &&
  1696. hyp_idmap_start < kern_hyp_va((unsigned long)high_memory - 1) &&
  1697. hyp_idmap_start != (unsigned long)__hyp_idmap_text_start) {
  1698. /*
  1699. * The idmap page is intersecting with the VA space,
  1700. * it is not safe to continue further.
  1701. */
  1702. kvm_err("IDMAP intersecting with HYP VA, unable to continue\n");
  1703. err = -EINVAL;
  1704. goto out;
  1705. }
  1706. hyp_pgd = (pgd_t *)__get_free_pages(GFP_KERNEL | __GFP_ZERO, hyp_pgd_order);
  1707. if (!hyp_pgd) {
  1708. kvm_err("Hyp mode PGD not allocated\n");
  1709. err = -ENOMEM;
  1710. goto out;
  1711. }
  1712. if (__kvm_cpu_uses_extended_idmap()) {
  1713. boot_hyp_pgd = (pgd_t *)__get_free_pages(GFP_KERNEL | __GFP_ZERO,
  1714. hyp_pgd_order);
  1715. if (!boot_hyp_pgd) {
  1716. kvm_err("Hyp boot PGD not allocated\n");
  1717. err = -ENOMEM;
  1718. goto out;
  1719. }
  1720. err = kvm_map_idmap_text(boot_hyp_pgd);
  1721. if (err)
  1722. goto out;
  1723. merged_hyp_pgd = (pgd_t *)__get_free_page(GFP_KERNEL | __GFP_ZERO);
  1724. if (!merged_hyp_pgd) {
  1725. kvm_err("Failed to allocate extra HYP pgd\n");
  1726. goto out;
  1727. }
  1728. __kvm_extend_hypmap(boot_hyp_pgd, hyp_pgd, merged_hyp_pgd,
  1729. hyp_idmap_start);
  1730. } else {
  1731. err = kvm_map_idmap_text(hyp_pgd);
  1732. if (err)
  1733. goto out;
  1734. }
  1735. io_map_base = hyp_idmap_start;
  1736. return 0;
  1737. out:
  1738. free_hyp_pgds();
  1739. return err;
  1740. }
  1741. void kvm_arch_commit_memory_region(struct kvm *kvm,
  1742. const struct kvm_userspace_memory_region *mem,
  1743. const struct kvm_memory_slot *old,
  1744. const struct kvm_memory_slot *new,
  1745. enum kvm_mr_change change)
  1746. {
  1747. /*
  1748. * At this point memslot has been committed and there is an
  1749. * allocated dirty_bitmap[], dirty pages will be be tracked while the
  1750. * memory slot is write protected.
  1751. */
  1752. if (change != KVM_MR_DELETE && mem->flags & KVM_MEM_LOG_DIRTY_PAGES)
  1753. kvm_mmu_wp_memory_region(kvm, mem->slot);
  1754. }
  1755. int kvm_arch_prepare_memory_region(struct kvm *kvm,
  1756. struct kvm_memory_slot *memslot,
  1757. const struct kvm_userspace_memory_region *mem,
  1758. enum kvm_mr_change change)
  1759. {
  1760. hva_t hva = mem->userspace_addr;
  1761. hva_t reg_end = hva + mem->memory_size;
  1762. bool writable = !(mem->flags & KVM_MEM_READONLY);
  1763. int ret = 0;
  1764. if (change != KVM_MR_CREATE && change != KVM_MR_MOVE &&
  1765. change != KVM_MR_FLAGS_ONLY)
  1766. return 0;
  1767. /*
  1768. * Prevent userspace from creating a memory region outside of the IPA
  1769. * space addressable by the KVM guest IPA space.
  1770. */
  1771. if (memslot->base_gfn + memslot->npages >=
  1772. (kvm_phys_size(kvm) >> PAGE_SHIFT))
  1773. return -EFAULT;
  1774. down_read(&current->mm->mmap_sem);
  1775. /*
  1776. * A memory region could potentially cover multiple VMAs, and any holes
  1777. * between them, so iterate over all of them to find out if we can map
  1778. * any of them right now.
  1779. *
  1780. * +--------------------------------------------+
  1781. * +---------------+----------------+ +----------------+
  1782. * | : VMA 1 | VMA 2 | | VMA 3 : |
  1783. * +---------------+----------------+ +----------------+
  1784. * | memory region |
  1785. * +--------------------------------------------+
  1786. */
  1787. do {
  1788. struct vm_area_struct *vma = find_vma(current->mm, hva);
  1789. hva_t vm_start, vm_end;
  1790. if (!vma || vma->vm_start >= reg_end)
  1791. break;
  1792. /*
  1793. * Mapping a read-only VMA is only allowed if the
  1794. * memory region is configured as read-only.
  1795. */
  1796. if (writable && !(vma->vm_flags & VM_WRITE)) {
  1797. ret = -EPERM;
  1798. break;
  1799. }
  1800. /*
  1801. * Take the intersection of this VMA with the memory region
  1802. */
  1803. vm_start = max(hva, vma->vm_start);
  1804. vm_end = min(reg_end, vma->vm_end);
  1805. if (vma->vm_flags & VM_PFNMAP) {
  1806. gpa_t gpa = mem->guest_phys_addr +
  1807. (vm_start - mem->userspace_addr);
  1808. phys_addr_t pa;
  1809. pa = (phys_addr_t)vma->vm_pgoff << PAGE_SHIFT;
  1810. pa += vm_start - vma->vm_start;
  1811. /* IO region dirty page logging not allowed */
  1812. if (memslot->flags & KVM_MEM_LOG_DIRTY_PAGES) {
  1813. ret = -EINVAL;
  1814. goto out;
  1815. }
  1816. ret = kvm_phys_addr_ioremap(kvm, gpa, pa,
  1817. vm_end - vm_start,
  1818. writable);
  1819. if (ret)
  1820. break;
  1821. }
  1822. hva = vm_end;
  1823. } while (hva < reg_end);
  1824. if (change == KVM_MR_FLAGS_ONLY)
  1825. goto out;
  1826. spin_lock(&kvm->mmu_lock);
  1827. if (ret)
  1828. unmap_stage2_range(kvm, mem->guest_phys_addr, mem->memory_size);
  1829. else
  1830. stage2_flush_memslot(kvm, memslot);
  1831. spin_unlock(&kvm->mmu_lock);
  1832. out:
  1833. up_read(&current->mm->mmap_sem);
  1834. return ret;
  1835. }
  1836. void kvm_arch_free_memslot(struct kvm *kvm, struct kvm_memory_slot *free,
  1837. struct kvm_memory_slot *dont)
  1838. {
  1839. }
  1840. int kvm_arch_create_memslot(struct kvm *kvm, struct kvm_memory_slot *slot,
  1841. unsigned long npages)
  1842. {
  1843. return 0;
  1844. }
  1845. void kvm_arch_memslots_updated(struct kvm *kvm, struct kvm_memslots *slots)
  1846. {
  1847. }
  1848. void kvm_arch_flush_shadow_all(struct kvm *kvm)
  1849. {
  1850. kvm_free_stage2_pgd(kvm);
  1851. }
  1852. void kvm_arch_flush_shadow_memslot(struct kvm *kvm,
  1853. struct kvm_memory_slot *slot)
  1854. {
  1855. gpa_t gpa = slot->base_gfn << PAGE_SHIFT;
  1856. phys_addr_t size = slot->npages << PAGE_SHIFT;
  1857. spin_lock(&kvm->mmu_lock);
  1858. unmap_stage2_range(kvm, gpa, size);
  1859. spin_unlock(&kvm->mmu_lock);
  1860. }
  1861. /*
  1862. * See note at ARMv7 ARM B1.14.4 (TL;DR: S/W ops are not easily virtualized).
  1863. *
  1864. * Main problems:
  1865. * - S/W ops are local to a CPU (not broadcast)
  1866. * - We have line migration behind our back (speculation)
  1867. * - System caches don't support S/W at all (damn!)
  1868. *
  1869. * In the face of the above, the best we can do is to try and convert
  1870. * S/W ops to VA ops. Because the guest is not allowed to infer the
  1871. * S/W to PA mapping, it can only use S/W to nuke the whole cache,
  1872. * which is a rather good thing for us.
  1873. *
  1874. * Also, it is only used when turning caches on/off ("The expected
  1875. * usage of the cache maintenance instructions that operate by set/way
  1876. * is associated with the cache maintenance instructions associated
  1877. * with the powerdown and powerup of caches, if this is required by
  1878. * the implementation.").
  1879. *
  1880. * We use the following policy:
  1881. *
  1882. * - If we trap a S/W operation, we enable VM trapping to detect
  1883. * caches being turned on/off, and do a full clean.
  1884. *
  1885. * - We flush the caches on both caches being turned on and off.
  1886. *
  1887. * - Once the caches are enabled, we stop trapping VM ops.
  1888. */
  1889. void kvm_set_way_flush(struct kvm_vcpu *vcpu)
  1890. {
  1891. unsigned long hcr = *vcpu_hcr(vcpu);
  1892. /*
  1893. * If this is the first time we do a S/W operation
  1894. * (i.e. HCR_TVM not set) flush the whole memory, and set the
  1895. * VM trapping.
  1896. *
  1897. * Otherwise, rely on the VM trapping to wait for the MMU +
  1898. * Caches to be turned off. At that point, we'll be able to
  1899. * clean the caches again.
  1900. */
  1901. if (!(hcr & HCR_TVM)) {
  1902. trace_kvm_set_way_flush(*vcpu_pc(vcpu),
  1903. vcpu_has_cache_enabled(vcpu));
  1904. stage2_flush_vm(vcpu->kvm);
  1905. *vcpu_hcr(vcpu) = hcr | HCR_TVM;
  1906. }
  1907. }
  1908. void kvm_toggle_cache(struct kvm_vcpu *vcpu, bool was_enabled)
  1909. {
  1910. bool now_enabled = vcpu_has_cache_enabled(vcpu);
  1911. /*
  1912. * If switching the MMU+caches on, need to invalidate the caches.
  1913. * If switching it off, need to clean the caches.
  1914. * Clean + invalidate does the trick always.
  1915. */
  1916. if (now_enabled != was_enabled)
  1917. stage2_flush_vm(vcpu->kvm);
  1918. /* Caches are now on, stop trapping VM ops (until a S/W op) */
  1919. if (now_enabled)
  1920. *vcpu_hcr(vcpu) &= ~HCR_TVM;
  1921. trace_kvm_toggle_cache(*vcpu_pc(vcpu), was_enabled, now_enabled);
  1922. }