rockchip_pdm.h 2.4 KB

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  1. /*
  2. * Rockchip PDM ALSA SoC Digital Audio Interface(DAI) driver
  3. *
  4. * Copyright (C) 2017 Fuzhou Rockchip Electronics Co., Ltd
  5. *
  6. * This software is licensed under the terms of the GNU General Public
  7. * License version 2, as published by the Free Software Foundation, and
  8. * may be copied, distributed, and modified under those terms.
  9. *
  10. * This program is distributed in the hope that it will be useful,
  11. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  12. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  13. * GNU General Public License for more details.
  14. *
  15. */
  16. #ifndef _ROCKCHIP_PDM_H
  17. #define _ROCKCHIP_PDM_H
  18. /* PDM REGS */
  19. #define PDM_SYSCONFIG (0x0000)
  20. #define PDM_CTRL0 (0x0004)
  21. #define PDM_CTRL1 (0x0008)
  22. #define PDM_CLK_CTRL (0x000c)
  23. #define PDM_HPF_CTRL (0x0010)
  24. #define PDM_FIFO_CTRL (0x0014)
  25. #define PDM_DMA_CTRL (0x0018)
  26. #define PDM_INT_EN (0x001c)
  27. #define PDM_INT_CLR (0x0020)
  28. #define PDM_INT_ST (0x0024)
  29. #define PDM_RXFIFO_DATA (0x0030)
  30. #define PDM_DATA_VALID (0x0054)
  31. #define PDM_VERSION (0x0058)
  32. /* PDM_SYSCONFIG */
  33. #define PDM_RX_MASK (0x1 << 2)
  34. #define PDM_RX_START (0x1 << 2)
  35. #define PDM_RX_STOP (0x0 << 2)
  36. #define PDM_RX_CLR_MASK (0x1 << 0)
  37. #define PDM_RX_CLR_WR (0x1 << 0)
  38. #define PDM_RX_CLR_DONE (0x0 << 0)
  39. /* PDM CTRL0 */
  40. #define PDM_PATH_MSK (0xf << 27)
  41. #define PDM_PATH3_EN BIT(30)
  42. #define PDM_PATH2_EN BIT(29)
  43. #define PDM_PATH1_EN BIT(28)
  44. #define PDM_PATH0_EN BIT(27)
  45. #define PDM_HWT_EN BIT(26)
  46. #define PDM_VDW_MSK (0x1f << 0)
  47. #define PDM_VDW(X) ((X - 1) << 0)
  48. /* PDM CLK CTRL */
  49. #define PDM_CLK_MSK BIT(5)
  50. #define PDM_CLK_EN BIT(5)
  51. #define PDM_CLK_DIS (0x0 << 5)
  52. #define PDM_CKP_MSK BIT(3)
  53. #define PDM_CKP_NORMAL (0x0 << 3)
  54. #define PDM_CKP_INVERTED BIT(3)
  55. #define PDM_DS_RATIO_MSK (0x7 << 0)
  56. #define PDM_CLK_320FS (0x0 << 0)
  57. #define PDM_CLK_640FS (0x1 << 0)
  58. #define PDM_CLK_1280FS (0x2 << 0)
  59. #define PDM_CLK_2560FS (0x3 << 0)
  60. #define PDM_CLK_5120FS (0x4 << 0)
  61. /* PDM HPF CTRL */
  62. #define PDM_HPF_LE BIT(3)
  63. #define PDM_HPF_RE BIT(2)
  64. #define PDM_HPF_CF_MSK (0x3 << 0)
  65. #define PDM_HPF_3P79HZ (0x0 << 0)
  66. #define PDM_HPF_60HZ (0x1 << 0)
  67. #define PDM_HPF_243HZ (0x2 << 0)
  68. #define PDM_HPF_493HZ (0x3 << 0)
  69. /* PDM DMA CTRL */
  70. #define PDM_DMA_RD_MSK BIT(8)
  71. #define PDM_DMA_RD_EN BIT(8)
  72. #define PDM_DMA_RD_DIS (0x0 << 8)
  73. #define PDM_DMA_RDL_MSK (0x7f << 0)
  74. #define PDM_DMA_RDL(X) ((X - 1) << 0)
  75. #endif /* _ROCKCHIP_PDM_H */