img-spdif-in.c 23 KB

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  1. /*
  2. * IMG SPDIF input controller driver
  3. *
  4. * Copyright (C) 2015 Imagination Technologies Ltd.
  5. *
  6. * Author: Damien Horsley <Damien.Horsley@imgtec.com>
  7. *
  8. * This program is free software; you can redistribute it and/or modify it
  9. * under the terms and conditions of the GNU General Public License,
  10. * version 2, as published by the Free Software Foundation.
  11. */
  12. #include <linux/clk.h>
  13. #include <linux/init.h>
  14. #include <linux/kernel.h>
  15. #include <linux/module.h>
  16. #include <linux/of.h>
  17. #include <linux/platform_device.h>
  18. #include <linux/pm_runtime.h>
  19. #include <linux/reset.h>
  20. #include <sound/core.h>
  21. #include <sound/dmaengine_pcm.h>
  22. #include <sound/initval.h>
  23. #include <sound/pcm.h>
  24. #include <sound/pcm_params.h>
  25. #include <sound/soc.h>
  26. #define IMG_SPDIF_IN_RX_FIFO_OFFSET 0
  27. #define IMG_SPDIF_IN_CTL 0x4
  28. #define IMG_SPDIF_IN_CTL_LOCKLO_MASK 0xff
  29. #define IMG_SPDIF_IN_CTL_LOCKLO_SHIFT 0
  30. #define IMG_SPDIF_IN_CTL_LOCKHI_MASK 0xff00
  31. #define IMG_SPDIF_IN_CTL_LOCKHI_SHIFT 8
  32. #define IMG_SPDIF_IN_CTL_TRK_MASK 0xff0000
  33. #define IMG_SPDIF_IN_CTL_TRK_SHIFT 16
  34. #define IMG_SPDIF_IN_CTL_SRD_MASK 0x70000000
  35. #define IMG_SPDIF_IN_CTL_SRD_SHIFT 28
  36. #define IMG_SPDIF_IN_CTL_SRT_MASK BIT(31)
  37. #define IMG_SPDIF_IN_STATUS 0x8
  38. #define IMG_SPDIF_IN_STATUS_SAM_MASK 0x7000
  39. #define IMG_SPDIF_IN_STATUS_SAM_SHIFT 12
  40. #define IMG_SPDIF_IN_STATUS_LOCK_MASK BIT(15)
  41. #define IMG_SPDIF_IN_STATUS_LOCK_SHIFT 15
  42. #define IMG_SPDIF_IN_CLKGEN 0x1c
  43. #define IMG_SPDIF_IN_CLKGEN_NOM_MASK 0x3ff
  44. #define IMG_SPDIF_IN_CLKGEN_NOM_SHIFT 0
  45. #define IMG_SPDIF_IN_CLKGEN_HLD_MASK 0x3ff0000
  46. #define IMG_SPDIF_IN_CLKGEN_HLD_SHIFT 16
  47. #define IMG_SPDIF_IN_CSL 0x20
  48. #define IMG_SPDIF_IN_CSH 0x24
  49. #define IMG_SPDIF_IN_CSH_MASK 0xff
  50. #define IMG_SPDIF_IN_CSH_SHIFT 0
  51. #define IMG_SPDIF_IN_SOFT_RESET 0x28
  52. #define IMG_SPDIF_IN_SOFT_RESET_MASK BIT(0)
  53. #define IMG_SPDIF_IN_ACLKGEN_START 0x2c
  54. #define IMG_SPDIF_IN_ACLKGEN_NOM_MASK 0x3ff
  55. #define IMG_SPDIF_IN_ACLKGEN_NOM_SHIFT 0
  56. #define IMG_SPDIF_IN_ACLKGEN_HLD_MASK 0xffc00
  57. #define IMG_SPDIF_IN_ACLKGEN_HLD_SHIFT 10
  58. #define IMG_SPDIF_IN_ACLKGEN_TRK_MASK 0xff00000
  59. #define IMG_SPDIF_IN_ACLKGEN_TRK_SHIFT 20
  60. #define IMG_SPDIF_IN_NUM_ACLKGEN 4
  61. struct img_spdif_in {
  62. spinlock_t lock;
  63. void __iomem *base;
  64. struct clk *clk_sys;
  65. struct snd_dmaengine_dai_dma_data dma_data;
  66. struct device *dev;
  67. unsigned int trk;
  68. bool multi_freq;
  69. int lock_acquire;
  70. int lock_release;
  71. unsigned int single_freq;
  72. unsigned int multi_freqs[IMG_SPDIF_IN_NUM_ACLKGEN];
  73. bool active;
  74. u32 suspend_clkgen;
  75. u32 suspend_ctl;
  76. /* Write-only registers */
  77. unsigned int aclkgen_regs[IMG_SPDIF_IN_NUM_ACLKGEN];
  78. };
  79. static int img_spdif_in_runtime_suspend(struct device *dev)
  80. {
  81. struct img_spdif_in *spdif = dev_get_drvdata(dev);
  82. clk_disable_unprepare(spdif->clk_sys);
  83. return 0;
  84. }
  85. static int img_spdif_in_runtime_resume(struct device *dev)
  86. {
  87. struct img_spdif_in *spdif = dev_get_drvdata(dev);
  88. int ret;
  89. ret = clk_prepare_enable(spdif->clk_sys);
  90. if (ret) {
  91. dev_err(dev, "Unable to enable sys clock\n");
  92. return ret;
  93. }
  94. return 0;
  95. }
  96. static inline void img_spdif_in_writel(struct img_spdif_in *spdif,
  97. u32 val, u32 reg)
  98. {
  99. writel(val, spdif->base + reg);
  100. }
  101. static inline u32 img_spdif_in_readl(struct img_spdif_in *spdif, u32 reg)
  102. {
  103. return readl(spdif->base + reg);
  104. }
  105. static inline void img_spdif_in_aclkgen_writel(struct img_spdif_in *spdif,
  106. u32 index)
  107. {
  108. img_spdif_in_writel(spdif, spdif->aclkgen_regs[index],
  109. IMG_SPDIF_IN_ACLKGEN_START + (index * 0x4));
  110. }
  111. static int img_spdif_in_check_max_rate(struct img_spdif_in *spdif,
  112. unsigned int sample_rate, unsigned long *actual_freq)
  113. {
  114. unsigned long min_freq, freq_t;
  115. /* Clock rate must be at least 24x the bit rate */
  116. min_freq = sample_rate * 2 * 32 * 24;
  117. freq_t = clk_get_rate(spdif->clk_sys);
  118. if (freq_t < min_freq)
  119. return -EINVAL;
  120. *actual_freq = freq_t;
  121. return 0;
  122. }
  123. static int img_spdif_in_do_clkgen_calc(unsigned int rate, unsigned int *pnom,
  124. unsigned int *phld, unsigned long clk_rate)
  125. {
  126. unsigned int ori, nom, hld;
  127. /*
  128. * Calculate oversampling ratio, nominal phase increment and hold
  129. * increment for the given rate / frequency
  130. */
  131. if (!rate)
  132. return -EINVAL;
  133. ori = clk_rate / (rate * 64);
  134. if (!ori)
  135. return -EINVAL;
  136. nom = (4096 / ori) + 1;
  137. do
  138. hld = 4096 - (--nom * (ori - 1));
  139. while (hld < 120);
  140. *pnom = nom;
  141. *phld = hld;
  142. return 0;
  143. }
  144. static int img_spdif_in_do_clkgen_single(struct img_spdif_in *spdif,
  145. unsigned int rate)
  146. {
  147. unsigned int nom, hld;
  148. unsigned long flags, clk_rate;
  149. int ret = 0;
  150. u32 reg;
  151. ret = img_spdif_in_check_max_rate(spdif, rate, &clk_rate);
  152. if (ret)
  153. return ret;
  154. ret = img_spdif_in_do_clkgen_calc(rate, &nom, &hld, clk_rate);
  155. if (ret)
  156. return ret;
  157. reg = (nom << IMG_SPDIF_IN_CLKGEN_NOM_SHIFT) &
  158. IMG_SPDIF_IN_CLKGEN_NOM_MASK;
  159. reg |= (hld << IMG_SPDIF_IN_CLKGEN_HLD_SHIFT) &
  160. IMG_SPDIF_IN_CLKGEN_HLD_MASK;
  161. spin_lock_irqsave(&spdif->lock, flags);
  162. if (spdif->active) {
  163. spin_unlock_irqrestore(&spdif->lock, flags);
  164. return -EBUSY;
  165. }
  166. img_spdif_in_writel(spdif, reg, IMG_SPDIF_IN_CLKGEN);
  167. spdif->single_freq = rate;
  168. spin_unlock_irqrestore(&spdif->lock, flags);
  169. return 0;
  170. }
  171. static int img_spdif_in_do_clkgen_multi(struct img_spdif_in *spdif,
  172. unsigned int multi_freqs[])
  173. {
  174. unsigned int nom, hld, rate, max_rate = 0;
  175. unsigned long flags, clk_rate;
  176. int i, ret = 0;
  177. u32 reg, trk_reg, temp_regs[IMG_SPDIF_IN_NUM_ACLKGEN];
  178. for (i = 0; i < IMG_SPDIF_IN_NUM_ACLKGEN; i++)
  179. if (multi_freqs[i] > max_rate)
  180. max_rate = multi_freqs[i];
  181. ret = img_spdif_in_check_max_rate(spdif, max_rate, &clk_rate);
  182. if (ret)
  183. return ret;
  184. for (i = 0; i < IMG_SPDIF_IN_NUM_ACLKGEN; i++) {
  185. rate = multi_freqs[i];
  186. ret = img_spdif_in_do_clkgen_calc(rate, &nom, &hld, clk_rate);
  187. if (ret)
  188. return ret;
  189. reg = (nom << IMG_SPDIF_IN_ACLKGEN_NOM_SHIFT) &
  190. IMG_SPDIF_IN_ACLKGEN_NOM_MASK;
  191. reg |= (hld << IMG_SPDIF_IN_ACLKGEN_HLD_SHIFT) &
  192. IMG_SPDIF_IN_ACLKGEN_HLD_MASK;
  193. temp_regs[i] = reg;
  194. }
  195. spin_lock_irqsave(&spdif->lock, flags);
  196. if (spdif->active) {
  197. spin_unlock_irqrestore(&spdif->lock, flags);
  198. return -EBUSY;
  199. }
  200. trk_reg = spdif->trk << IMG_SPDIF_IN_ACLKGEN_TRK_SHIFT;
  201. for (i = 0; i < IMG_SPDIF_IN_NUM_ACLKGEN; i++) {
  202. spdif->aclkgen_regs[i] = temp_regs[i] | trk_reg;
  203. img_spdif_in_aclkgen_writel(spdif, i);
  204. }
  205. spdif->multi_freq = true;
  206. spdif->multi_freqs[0] = multi_freqs[0];
  207. spdif->multi_freqs[1] = multi_freqs[1];
  208. spdif->multi_freqs[2] = multi_freqs[2];
  209. spdif->multi_freqs[3] = multi_freqs[3];
  210. spin_unlock_irqrestore(&spdif->lock, flags);
  211. return 0;
  212. }
  213. static int img_spdif_in_iec958_info(struct snd_kcontrol *kcontrol,
  214. struct snd_ctl_elem_info *uinfo)
  215. {
  216. uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
  217. uinfo->count = 1;
  218. return 0;
  219. }
  220. static int img_spdif_in_get_status_mask(struct snd_kcontrol *kcontrol,
  221. struct snd_ctl_elem_value *ucontrol)
  222. {
  223. ucontrol->value.iec958.status[0] = 0xff;
  224. ucontrol->value.iec958.status[1] = 0xff;
  225. ucontrol->value.iec958.status[2] = 0xff;
  226. ucontrol->value.iec958.status[3] = 0xff;
  227. ucontrol->value.iec958.status[4] = 0xff;
  228. return 0;
  229. }
  230. static int img_spdif_in_get_status(struct snd_kcontrol *kcontrol,
  231. struct snd_ctl_elem_value *ucontrol)
  232. {
  233. struct snd_soc_dai *cpu_dai = snd_kcontrol_chip(kcontrol);
  234. struct img_spdif_in *spdif = snd_soc_dai_get_drvdata(cpu_dai);
  235. u32 reg;
  236. reg = img_spdif_in_readl(spdif, IMG_SPDIF_IN_CSL);
  237. ucontrol->value.iec958.status[0] = reg & 0xff;
  238. ucontrol->value.iec958.status[1] = (reg >> 8) & 0xff;
  239. ucontrol->value.iec958.status[2] = (reg >> 16) & 0xff;
  240. ucontrol->value.iec958.status[3] = (reg >> 24) & 0xff;
  241. reg = img_spdif_in_readl(spdif, IMG_SPDIF_IN_CSH);
  242. ucontrol->value.iec958.status[4] = (reg & IMG_SPDIF_IN_CSH_MASK)
  243. >> IMG_SPDIF_IN_CSH_SHIFT;
  244. return 0;
  245. }
  246. static int img_spdif_in_info_multi_freq(struct snd_kcontrol *kcontrol,
  247. struct snd_ctl_elem_info *uinfo)
  248. {
  249. uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
  250. uinfo->count = IMG_SPDIF_IN_NUM_ACLKGEN;
  251. uinfo->value.integer.min = 0;
  252. uinfo->value.integer.max = LONG_MAX;
  253. return 0;
  254. }
  255. static int img_spdif_in_get_multi_freq(struct snd_kcontrol *kcontrol,
  256. struct snd_ctl_elem_value *ucontrol)
  257. {
  258. struct snd_soc_dai *cpu_dai = snd_kcontrol_chip(kcontrol);
  259. struct img_spdif_in *spdif = snd_soc_dai_get_drvdata(cpu_dai);
  260. unsigned long flags;
  261. spin_lock_irqsave(&spdif->lock, flags);
  262. if (spdif->multi_freq) {
  263. ucontrol->value.integer.value[0] = spdif->multi_freqs[0];
  264. ucontrol->value.integer.value[1] = spdif->multi_freqs[1];
  265. ucontrol->value.integer.value[2] = spdif->multi_freqs[2];
  266. ucontrol->value.integer.value[3] = spdif->multi_freqs[3];
  267. } else {
  268. ucontrol->value.integer.value[0] = 0;
  269. ucontrol->value.integer.value[1] = 0;
  270. ucontrol->value.integer.value[2] = 0;
  271. ucontrol->value.integer.value[3] = 0;
  272. }
  273. spin_unlock_irqrestore(&spdif->lock, flags);
  274. return 0;
  275. }
  276. static int img_spdif_in_set_multi_freq(struct snd_kcontrol *kcontrol,
  277. struct snd_ctl_elem_value *ucontrol)
  278. {
  279. struct snd_soc_dai *cpu_dai = snd_kcontrol_chip(kcontrol);
  280. struct img_spdif_in *spdif = snd_soc_dai_get_drvdata(cpu_dai);
  281. unsigned int multi_freqs[IMG_SPDIF_IN_NUM_ACLKGEN];
  282. bool multi_freq;
  283. unsigned long flags;
  284. if ((ucontrol->value.integer.value[0] == 0) &&
  285. (ucontrol->value.integer.value[1] == 0) &&
  286. (ucontrol->value.integer.value[2] == 0) &&
  287. (ucontrol->value.integer.value[3] == 0)) {
  288. multi_freq = false;
  289. } else {
  290. multi_freqs[0] = ucontrol->value.integer.value[0];
  291. multi_freqs[1] = ucontrol->value.integer.value[1];
  292. multi_freqs[2] = ucontrol->value.integer.value[2];
  293. multi_freqs[3] = ucontrol->value.integer.value[3];
  294. multi_freq = true;
  295. }
  296. if (multi_freq)
  297. return img_spdif_in_do_clkgen_multi(spdif, multi_freqs);
  298. spin_lock_irqsave(&spdif->lock, flags);
  299. if (spdif->active) {
  300. spin_unlock_irqrestore(&spdif->lock, flags);
  301. return -EBUSY;
  302. }
  303. spdif->multi_freq = false;
  304. spin_unlock_irqrestore(&spdif->lock, flags);
  305. return 0;
  306. }
  307. static int img_spdif_in_info_lock_freq(struct snd_kcontrol *kcontrol,
  308. struct snd_ctl_elem_info *uinfo)
  309. {
  310. uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
  311. uinfo->count = 1;
  312. uinfo->value.integer.min = 0;
  313. uinfo->value.integer.max = LONG_MAX;
  314. return 0;
  315. }
  316. static int img_spdif_in_get_lock_freq(struct snd_kcontrol *kcontrol,
  317. struct snd_ctl_elem_value *uc)
  318. {
  319. struct snd_soc_dai *cpu_dai = snd_kcontrol_chip(kcontrol);
  320. struct img_spdif_in *spdif = snd_soc_dai_get_drvdata(cpu_dai);
  321. u32 reg;
  322. int i;
  323. unsigned long flags;
  324. spin_lock_irqsave(&spdif->lock, flags);
  325. reg = img_spdif_in_readl(spdif, IMG_SPDIF_IN_STATUS);
  326. if (reg & IMG_SPDIF_IN_STATUS_LOCK_MASK) {
  327. if (spdif->multi_freq) {
  328. i = ((reg & IMG_SPDIF_IN_STATUS_SAM_MASK) >>
  329. IMG_SPDIF_IN_STATUS_SAM_SHIFT) - 1;
  330. uc->value.integer.value[0] = spdif->multi_freqs[i];
  331. } else {
  332. uc->value.integer.value[0] = spdif->single_freq;
  333. }
  334. } else {
  335. uc->value.integer.value[0] = 0;
  336. }
  337. spin_unlock_irqrestore(&spdif->lock, flags);
  338. return 0;
  339. }
  340. static int img_spdif_in_info_trk(struct snd_kcontrol *kcontrol,
  341. struct snd_ctl_elem_info *uinfo)
  342. {
  343. uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
  344. uinfo->count = 1;
  345. uinfo->value.integer.min = 0;
  346. uinfo->value.integer.max = 255;
  347. return 0;
  348. }
  349. static int img_spdif_in_get_trk(struct snd_kcontrol *kcontrol,
  350. struct snd_ctl_elem_value *ucontrol)
  351. {
  352. struct snd_soc_dai *cpu_dai = snd_kcontrol_chip(kcontrol);
  353. struct img_spdif_in *spdif = snd_soc_dai_get_drvdata(cpu_dai);
  354. ucontrol->value.integer.value[0] = spdif->trk;
  355. return 0;
  356. }
  357. static int img_spdif_in_set_trk(struct snd_kcontrol *kcontrol,
  358. struct snd_ctl_elem_value *ucontrol)
  359. {
  360. struct snd_soc_dai *cpu_dai = snd_kcontrol_chip(kcontrol);
  361. struct img_spdif_in *spdif = snd_soc_dai_get_drvdata(cpu_dai);
  362. unsigned long flags;
  363. int i;
  364. u32 reg;
  365. spin_lock_irqsave(&spdif->lock, flags);
  366. if (spdif->active) {
  367. spin_unlock_irqrestore(&spdif->lock, flags);
  368. return -EBUSY;
  369. }
  370. spdif->trk = ucontrol->value.integer.value[0];
  371. reg = img_spdif_in_readl(spdif, IMG_SPDIF_IN_CTL);
  372. reg &= ~IMG_SPDIF_IN_CTL_TRK_MASK;
  373. reg |= spdif->trk << IMG_SPDIF_IN_CTL_TRK_SHIFT;
  374. img_spdif_in_writel(spdif, reg, IMG_SPDIF_IN_CTL);
  375. for (i = 0; i < IMG_SPDIF_IN_NUM_ACLKGEN; i++) {
  376. spdif->aclkgen_regs[i] = (spdif->aclkgen_regs[i] &
  377. ~IMG_SPDIF_IN_ACLKGEN_TRK_MASK) |
  378. (spdif->trk << IMG_SPDIF_IN_ACLKGEN_TRK_SHIFT);
  379. img_spdif_in_aclkgen_writel(spdif, i);
  380. }
  381. spin_unlock_irqrestore(&spdif->lock, flags);
  382. return 0;
  383. }
  384. static int img_spdif_in_info_lock(struct snd_kcontrol *kcontrol,
  385. struct snd_ctl_elem_info *uinfo)
  386. {
  387. uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
  388. uinfo->count = 1;
  389. uinfo->value.integer.min = -128;
  390. uinfo->value.integer.max = 127;
  391. return 0;
  392. }
  393. static int img_spdif_in_get_lock_acquire(struct snd_kcontrol *kcontrol,
  394. struct snd_ctl_elem_value *ucontrol)
  395. {
  396. struct snd_soc_dai *cpu_dai = snd_kcontrol_chip(kcontrol);
  397. struct img_spdif_in *spdif = snd_soc_dai_get_drvdata(cpu_dai);
  398. ucontrol->value.integer.value[0] = spdif->lock_acquire;
  399. return 0;
  400. }
  401. static int img_spdif_in_set_lock_acquire(struct snd_kcontrol *kcontrol,
  402. struct snd_ctl_elem_value *ucontrol)
  403. {
  404. struct snd_soc_dai *cpu_dai = snd_kcontrol_chip(kcontrol);
  405. struct img_spdif_in *spdif = snd_soc_dai_get_drvdata(cpu_dai);
  406. unsigned long flags;
  407. u32 reg;
  408. spin_lock_irqsave(&spdif->lock, flags);
  409. if (spdif->active) {
  410. spin_unlock_irqrestore(&spdif->lock, flags);
  411. return -EBUSY;
  412. }
  413. spdif->lock_acquire = ucontrol->value.integer.value[0];
  414. reg = img_spdif_in_readl(spdif, IMG_SPDIF_IN_CTL);
  415. reg &= ~IMG_SPDIF_IN_CTL_LOCKHI_MASK;
  416. reg |= (spdif->lock_acquire << IMG_SPDIF_IN_CTL_LOCKHI_SHIFT) &
  417. IMG_SPDIF_IN_CTL_LOCKHI_MASK;
  418. img_spdif_in_writel(spdif, reg, IMG_SPDIF_IN_CTL);
  419. spin_unlock_irqrestore(&spdif->lock, flags);
  420. return 0;
  421. }
  422. static int img_spdif_in_get_lock_release(struct snd_kcontrol *kcontrol,
  423. struct snd_ctl_elem_value *ucontrol)
  424. {
  425. struct snd_soc_dai *cpu_dai = snd_kcontrol_chip(kcontrol);
  426. struct img_spdif_in *spdif = snd_soc_dai_get_drvdata(cpu_dai);
  427. ucontrol->value.integer.value[0] = spdif->lock_release;
  428. return 0;
  429. }
  430. static int img_spdif_in_set_lock_release(struct snd_kcontrol *kcontrol,
  431. struct snd_ctl_elem_value *ucontrol)
  432. {
  433. struct snd_soc_dai *cpu_dai = snd_kcontrol_chip(kcontrol);
  434. struct img_spdif_in *spdif = snd_soc_dai_get_drvdata(cpu_dai);
  435. unsigned long flags;
  436. u32 reg;
  437. spin_lock_irqsave(&spdif->lock, flags);
  438. if (spdif->active) {
  439. spin_unlock_irqrestore(&spdif->lock, flags);
  440. return -EBUSY;
  441. }
  442. spdif->lock_release = ucontrol->value.integer.value[0];
  443. reg = img_spdif_in_readl(spdif, IMG_SPDIF_IN_CTL);
  444. reg &= ~IMG_SPDIF_IN_CTL_LOCKLO_MASK;
  445. reg |= (spdif->lock_release << IMG_SPDIF_IN_CTL_LOCKLO_SHIFT) &
  446. IMG_SPDIF_IN_CTL_LOCKLO_MASK;
  447. img_spdif_in_writel(spdif, reg, IMG_SPDIF_IN_CTL);
  448. spin_unlock_irqrestore(&spdif->lock, flags);
  449. return 0;
  450. }
  451. static struct snd_kcontrol_new img_spdif_in_controls[] = {
  452. {
  453. .access = SNDRV_CTL_ELEM_ACCESS_READ,
  454. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  455. .name = SNDRV_CTL_NAME_IEC958("", CAPTURE, MASK),
  456. .info = img_spdif_in_iec958_info,
  457. .get = img_spdif_in_get_status_mask
  458. },
  459. {
  460. .access = SNDRV_CTL_ELEM_ACCESS_READ |
  461. SNDRV_CTL_ELEM_ACCESS_VOLATILE,
  462. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  463. .name = SNDRV_CTL_NAME_IEC958("", CAPTURE, DEFAULT),
  464. .info = img_spdif_in_iec958_info,
  465. .get = img_spdif_in_get_status
  466. },
  467. {
  468. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  469. .name = "SPDIF In Multi Frequency Acquire",
  470. .info = img_spdif_in_info_multi_freq,
  471. .get = img_spdif_in_get_multi_freq,
  472. .put = img_spdif_in_set_multi_freq
  473. },
  474. {
  475. .access = SNDRV_CTL_ELEM_ACCESS_READ |
  476. SNDRV_CTL_ELEM_ACCESS_VOLATILE,
  477. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  478. .name = "SPDIF In Lock Frequency",
  479. .info = img_spdif_in_info_lock_freq,
  480. .get = img_spdif_in_get_lock_freq
  481. },
  482. {
  483. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  484. .name = "SPDIF In Lock TRK",
  485. .info = img_spdif_in_info_trk,
  486. .get = img_spdif_in_get_trk,
  487. .put = img_spdif_in_set_trk
  488. },
  489. {
  490. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  491. .name = "SPDIF In Lock Acquire Threshold",
  492. .info = img_spdif_in_info_lock,
  493. .get = img_spdif_in_get_lock_acquire,
  494. .put = img_spdif_in_set_lock_acquire
  495. },
  496. {
  497. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  498. .name = "SPDIF In Lock Release Threshold",
  499. .info = img_spdif_in_info_lock,
  500. .get = img_spdif_in_get_lock_release,
  501. .put = img_spdif_in_set_lock_release
  502. }
  503. };
  504. static int img_spdif_in_trigger(struct snd_pcm_substream *substream, int cmd,
  505. struct snd_soc_dai *dai)
  506. {
  507. unsigned long flags;
  508. struct img_spdif_in *spdif = snd_soc_dai_get_drvdata(dai);
  509. int ret = 0;
  510. u32 reg;
  511. spin_lock_irqsave(&spdif->lock, flags);
  512. switch (cmd) {
  513. case SNDRV_PCM_TRIGGER_START:
  514. case SNDRV_PCM_TRIGGER_RESUME:
  515. case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
  516. reg = img_spdif_in_readl(spdif, IMG_SPDIF_IN_CTL);
  517. if (spdif->multi_freq)
  518. reg &= ~IMG_SPDIF_IN_CTL_SRD_MASK;
  519. else
  520. reg |= (1UL << IMG_SPDIF_IN_CTL_SRD_SHIFT);
  521. reg |= IMG_SPDIF_IN_CTL_SRT_MASK;
  522. img_spdif_in_writel(spdif, reg, IMG_SPDIF_IN_CTL);
  523. spdif->active = true;
  524. break;
  525. case SNDRV_PCM_TRIGGER_STOP:
  526. case SNDRV_PCM_TRIGGER_SUSPEND:
  527. case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
  528. reg = img_spdif_in_readl(spdif, IMG_SPDIF_IN_CTL);
  529. reg &= ~IMG_SPDIF_IN_CTL_SRT_MASK;
  530. img_spdif_in_writel(spdif, reg, IMG_SPDIF_IN_CTL);
  531. spdif->active = false;
  532. break;
  533. default:
  534. ret = -EINVAL;
  535. }
  536. spin_unlock_irqrestore(&spdif->lock, flags);
  537. return ret;
  538. }
  539. static int img_spdif_in_hw_params(struct snd_pcm_substream *substream,
  540. struct snd_pcm_hw_params *params, struct snd_soc_dai *dai)
  541. {
  542. struct img_spdif_in *spdif = snd_soc_dai_get_drvdata(dai);
  543. unsigned int rate, channels;
  544. snd_pcm_format_t format;
  545. rate = params_rate(params);
  546. channels = params_channels(params);
  547. format = params_format(params);
  548. if (format != SNDRV_PCM_FORMAT_S32_LE)
  549. return -EINVAL;
  550. if (channels != 2)
  551. return -EINVAL;
  552. return img_spdif_in_do_clkgen_single(spdif, rate);
  553. }
  554. static const struct snd_soc_dai_ops img_spdif_in_dai_ops = {
  555. .trigger = img_spdif_in_trigger,
  556. .hw_params = img_spdif_in_hw_params
  557. };
  558. static int img_spdif_in_dai_probe(struct snd_soc_dai *dai)
  559. {
  560. struct img_spdif_in *spdif = snd_soc_dai_get_drvdata(dai);
  561. snd_soc_dai_init_dma_data(dai, NULL, &spdif->dma_data);
  562. snd_soc_add_dai_controls(dai, img_spdif_in_controls,
  563. ARRAY_SIZE(img_spdif_in_controls));
  564. return 0;
  565. }
  566. static struct snd_soc_dai_driver img_spdif_in_dai = {
  567. .probe = img_spdif_in_dai_probe,
  568. .capture = {
  569. .channels_min = 2,
  570. .channels_max = 2,
  571. .rates = SNDRV_PCM_RATE_8000_192000,
  572. .formats = SNDRV_PCM_FMTBIT_S32_LE
  573. },
  574. .ops = &img_spdif_in_dai_ops
  575. };
  576. static const struct snd_soc_component_driver img_spdif_in_component = {
  577. .name = "img-spdif-in"
  578. };
  579. static int img_spdif_in_probe(struct platform_device *pdev)
  580. {
  581. struct img_spdif_in *spdif;
  582. struct resource *res;
  583. void __iomem *base;
  584. int ret;
  585. struct reset_control *rst;
  586. u32 reg;
  587. struct device *dev = &pdev->dev;
  588. spdif = devm_kzalloc(&pdev->dev, sizeof(*spdif), GFP_KERNEL);
  589. if (!spdif)
  590. return -ENOMEM;
  591. platform_set_drvdata(pdev, spdif);
  592. spdif->dev = &pdev->dev;
  593. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  594. base = devm_ioremap_resource(&pdev->dev, res);
  595. if (IS_ERR(base))
  596. return PTR_ERR(base);
  597. spdif->base = base;
  598. spdif->clk_sys = devm_clk_get(dev, "sys");
  599. if (IS_ERR(spdif->clk_sys)) {
  600. if (PTR_ERR(spdif->clk_sys) != -EPROBE_DEFER)
  601. dev_err(dev, "Failed to acquire clock 'sys'\n");
  602. return PTR_ERR(spdif->clk_sys);
  603. }
  604. pm_runtime_enable(&pdev->dev);
  605. if (!pm_runtime_enabled(&pdev->dev)) {
  606. ret = img_spdif_in_runtime_resume(&pdev->dev);
  607. if (ret)
  608. goto err_pm_disable;
  609. }
  610. ret = pm_runtime_get_sync(&pdev->dev);
  611. if (ret < 0)
  612. goto err_suspend;
  613. rst = devm_reset_control_get_exclusive(&pdev->dev, "rst");
  614. if (IS_ERR(rst)) {
  615. if (PTR_ERR(rst) == -EPROBE_DEFER) {
  616. ret = -EPROBE_DEFER;
  617. goto err_pm_put;
  618. }
  619. dev_dbg(dev, "No top level reset found\n");
  620. img_spdif_in_writel(spdif, IMG_SPDIF_IN_SOFT_RESET_MASK,
  621. IMG_SPDIF_IN_SOFT_RESET);
  622. img_spdif_in_writel(spdif, 0, IMG_SPDIF_IN_SOFT_RESET);
  623. } else {
  624. reset_control_assert(rst);
  625. reset_control_deassert(rst);
  626. }
  627. spin_lock_init(&spdif->lock);
  628. spdif->dma_data.addr = res->start + IMG_SPDIF_IN_RX_FIFO_OFFSET;
  629. spdif->dma_data.addr_width = 4;
  630. spdif->dma_data.maxburst = 4;
  631. spdif->trk = 0x80;
  632. spdif->lock_acquire = 4;
  633. spdif->lock_release = -128;
  634. reg = (spdif->lock_acquire << IMG_SPDIF_IN_CTL_LOCKHI_SHIFT) &
  635. IMG_SPDIF_IN_CTL_LOCKHI_MASK;
  636. reg |= (spdif->lock_release << IMG_SPDIF_IN_CTL_LOCKLO_SHIFT) &
  637. IMG_SPDIF_IN_CTL_LOCKLO_MASK;
  638. reg |= (spdif->trk << IMG_SPDIF_IN_CTL_TRK_SHIFT) &
  639. IMG_SPDIF_IN_CTL_TRK_MASK;
  640. img_spdif_in_writel(spdif, reg, IMG_SPDIF_IN_CTL);
  641. pm_runtime_put(&pdev->dev);
  642. ret = devm_snd_soc_register_component(&pdev->dev,
  643. &img_spdif_in_component, &img_spdif_in_dai, 1);
  644. if (ret)
  645. goto err_suspend;
  646. ret = devm_snd_dmaengine_pcm_register(&pdev->dev, NULL, 0);
  647. if (ret)
  648. goto err_suspend;
  649. return 0;
  650. err_pm_put:
  651. pm_runtime_put(&pdev->dev);
  652. err_suspend:
  653. if (!pm_runtime_enabled(&pdev->dev))
  654. img_spdif_in_runtime_suspend(&pdev->dev);
  655. err_pm_disable:
  656. pm_runtime_disable(&pdev->dev);
  657. return ret;
  658. }
  659. static int img_spdif_in_dev_remove(struct platform_device *pdev)
  660. {
  661. pm_runtime_disable(&pdev->dev);
  662. if (!pm_runtime_status_suspended(&pdev->dev))
  663. img_spdif_in_runtime_suspend(&pdev->dev);
  664. return 0;
  665. }
  666. #ifdef CONFIG_PM_SLEEP
  667. static int img_spdif_in_suspend(struct device *dev)
  668. {
  669. struct img_spdif_in *spdif = dev_get_drvdata(dev);
  670. int ret;
  671. if (pm_runtime_status_suspended(dev)) {
  672. ret = img_spdif_in_runtime_resume(dev);
  673. if (ret)
  674. return ret;
  675. }
  676. spdif->suspend_clkgen = img_spdif_in_readl(spdif, IMG_SPDIF_IN_CLKGEN);
  677. spdif->suspend_ctl = img_spdif_in_readl(spdif, IMG_SPDIF_IN_CTL);
  678. img_spdif_in_runtime_suspend(dev);
  679. return 0;
  680. }
  681. static int img_spdif_in_resume(struct device *dev)
  682. {
  683. struct img_spdif_in *spdif = dev_get_drvdata(dev);
  684. int i, ret;
  685. ret = img_spdif_in_runtime_resume(dev);
  686. if (ret)
  687. return ret;
  688. for (i = 0; i < IMG_SPDIF_IN_NUM_ACLKGEN; i++)
  689. img_spdif_in_aclkgen_writel(spdif, i);
  690. img_spdif_in_writel(spdif, spdif->suspend_clkgen, IMG_SPDIF_IN_CLKGEN);
  691. img_spdif_in_writel(spdif, spdif->suspend_ctl, IMG_SPDIF_IN_CTL);
  692. if (pm_runtime_status_suspended(dev))
  693. img_spdif_in_runtime_suspend(dev);
  694. return 0;
  695. }
  696. #endif
  697. static const struct of_device_id img_spdif_in_of_match[] = {
  698. { .compatible = "img,spdif-in" },
  699. {}
  700. };
  701. MODULE_DEVICE_TABLE(of, img_spdif_in_of_match);
  702. static const struct dev_pm_ops img_spdif_in_pm_ops = {
  703. SET_RUNTIME_PM_OPS(img_spdif_in_runtime_suspend,
  704. img_spdif_in_runtime_resume, NULL)
  705. SET_SYSTEM_SLEEP_PM_OPS(img_spdif_in_suspend, img_spdif_in_resume)
  706. };
  707. static struct platform_driver img_spdif_in_driver = {
  708. .driver = {
  709. .name = "img-spdif-in",
  710. .of_match_table = img_spdif_in_of_match,
  711. .pm = &img_spdif_in_pm_ops
  712. },
  713. .probe = img_spdif_in_probe,
  714. .remove = img_spdif_in_dev_remove
  715. };
  716. module_platform_driver(img_spdif_in_driver);
  717. MODULE_AUTHOR("Damien Horsley <Damien.Horsley@imgtec.com>");
  718. MODULE_DESCRIPTION("IMG SPDIF Input driver");
  719. MODULE_LICENSE("GPL v2");