hdac_i915.c 4.2 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158
  1. /*
  2. * hdac_i915.c - routines for sync between HD-A core and i915 display driver
  3. *
  4. * This program is free software; you can redistribute it and/or modify it
  5. * under the terms of the GNU General Public License as published by the Free
  6. * Software Foundation; either version 2 of the License, or (at your option)
  7. * any later version.
  8. *
  9. * This program is distributed in the hope that it will be useful, but
  10. * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
  11. * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
  12. * for more details.
  13. */
  14. #include <linux/init.h>
  15. #include <linux/module.h>
  16. #include <linux/pci.h>
  17. #include <sound/core.h>
  18. #include <sound/hdaudio.h>
  19. #include <sound/hda_i915.h>
  20. #include <sound/hda_register.h>
  21. static struct completion bind_complete;
  22. #define CONTROLLER_IN_GPU(pci) (((pci)->device == 0x0a0c) || \
  23. ((pci)->device == 0x0c0c) || \
  24. ((pci)->device == 0x0d0c) || \
  25. ((pci)->device == 0x160c))
  26. /**
  27. * snd_hdac_i915_set_bclk - Reprogram BCLK for HSW/BDW
  28. * @bus: HDA core bus
  29. *
  30. * Intel HSW/BDW display HDA controller is in GPU. Both its power and link BCLK
  31. * depends on GPU. Two Extended Mode registers EM4 (M value) and EM5 (N Value)
  32. * are used to convert CDClk (Core Display Clock) to 24MHz BCLK:
  33. * BCLK = CDCLK * M / N
  34. * The values will be lost when the display power well is disabled and need to
  35. * be restored to avoid abnormal playback speed.
  36. *
  37. * Call this function at initializing and changing power well, as well as
  38. * at ELD notifier for the hotplug.
  39. */
  40. void snd_hdac_i915_set_bclk(struct hdac_bus *bus)
  41. {
  42. struct drm_audio_component *acomp = bus->audio_component;
  43. struct pci_dev *pci = to_pci_dev(bus->dev);
  44. int cdclk_freq;
  45. unsigned int bclk_m, bclk_n;
  46. if (!acomp || !acomp->ops || !acomp->ops->get_cdclk_freq)
  47. return; /* only for i915 binding */
  48. if (!CONTROLLER_IN_GPU(pci))
  49. return; /* only HSW/BDW */
  50. cdclk_freq = acomp->ops->get_cdclk_freq(acomp->dev);
  51. switch (cdclk_freq) {
  52. case 337500:
  53. bclk_m = 16;
  54. bclk_n = 225;
  55. break;
  56. case 450000:
  57. default: /* default CDCLK 450MHz */
  58. bclk_m = 4;
  59. bclk_n = 75;
  60. break;
  61. case 540000:
  62. bclk_m = 4;
  63. bclk_n = 90;
  64. break;
  65. case 675000:
  66. bclk_m = 8;
  67. bclk_n = 225;
  68. break;
  69. }
  70. snd_hdac_chip_writew(bus, HSW_EM4, bclk_m);
  71. snd_hdac_chip_writew(bus, HSW_EM5, bclk_n);
  72. }
  73. EXPORT_SYMBOL_GPL(snd_hdac_i915_set_bclk);
  74. static int i915_component_master_match(struct device *dev, void *data)
  75. {
  76. return !strcmp(dev->driver->name, "i915");
  77. }
  78. /* check whether intel graphics is present */
  79. static bool i915_gfx_present(void)
  80. {
  81. static const struct pci_device_id ids[] = {
  82. { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_ANY_ID),
  83. .class = PCI_BASE_CLASS_DISPLAY << 16,
  84. .class_mask = 0xff << 16 },
  85. {}
  86. };
  87. return pci_dev_present(ids);
  88. }
  89. static int i915_master_bind(struct device *dev,
  90. struct drm_audio_component *acomp)
  91. {
  92. complete_all(&bind_complete);
  93. /* clear audio_ops here as it was needed only for completion call */
  94. acomp->audio_ops = NULL;
  95. return 0;
  96. }
  97. static const struct drm_audio_component_audio_ops i915_init_ops = {
  98. .master_bind = i915_master_bind
  99. };
  100. /**
  101. * snd_hdac_i915_init - Initialize i915 audio component
  102. * @bus: HDA core bus
  103. *
  104. * This function is supposed to be used only by a HD-audio controller
  105. * driver that needs the interaction with i915 graphics.
  106. *
  107. * This function initializes and sets up the audio component to communicate
  108. * with i915 graphics driver.
  109. *
  110. * Returns zero for success or a negative error code.
  111. */
  112. int snd_hdac_i915_init(struct hdac_bus *bus)
  113. {
  114. struct drm_audio_component *acomp;
  115. int err;
  116. if (!i915_gfx_present())
  117. return -ENODEV;
  118. init_completion(&bind_complete);
  119. err = snd_hdac_acomp_init(bus, &i915_init_ops,
  120. i915_component_master_match,
  121. sizeof(struct i915_audio_component) - sizeof(*acomp));
  122. if (err < 0)
  123. return err;
  124. acomp = bus->audio_component;
  125. if (!acomp)
  126. return -ENODEV;
  127. if (!acomp->ops) {
  128. request_module("i915");
  129. /* 10s timeout */
  130. wait_for_completion_timeout(&bind_complete,
  131. msecs_to_jiffies(10 * 1000));
  132. }
  133. if (!acomp->ops) {
  134. dev_info(bus->dev, "couldn't bind with audio component\n");
  135. snd_hdac_acomp_exit(bus);
  136. return -ENODEV;
  137. }
  138. return 0;
  139. }
  140. EXPORT_SYMBOL_GPL(snd_hdac_i915_init);