dwc3-exynos.c 5.9 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /**
  3. * dwc3-exynos.c - Samsung EXYNOS DWC3 Specific Glue layer
  4. *
  5. * Copyright (c) 2012 Samsung Electronics Co., Ltd.
  6. * http://www.samsung.com
  7. *
  8. * Author: Anton Tikhomirov <av.tikhomirov@samsung.com>
  9. */
  10. #include <linux/module.h>
  11. #include <linux/kernel.h>
  12. #include <linux/slab.h>
  13. #include <linux/platform_device.h>
  14. #include <linux/clk.h>
  15. #include <linux/of.h>
  16. #include <linux/of_platform.h>
  17. #include <linux/regulator/consumer.h>
  18. #define DWC3_EXYNOS_MAX_CLOCKS 4
  19. struct dwc3_exynos_driverdata {
  20. const char *clk_names[DWC3_EXYNOS_MAX_CLOCKS];
  21. int num_clks;
  22. int suspend_clk_idx;
  23. };
  24. struct dwc3_exynos {
  25. struct device *dev;
  26. const char **clk_names;
  27. struct clk *clks[DWC3_EXYNOS_MAX_CLOCKS];
  28. int num_clks;
  29. int suspend_clk_idx;
  30. struct regulator *vdd33;
  31. struct regulator *vdd10;
  32. };
  33. static int dwc3_exynos_remove_child(struct device *dev, void *unused)
  34. {
  35. struct platform_device *pdev = to_platform_device(dev);
  36. platform_device_unregister(pdev);
  37. return 0;
  38. }
  39. static int dwc3_exynos_probe(struct platform_device *pdev)
  40. {
  41. struct dwc3_exynos *exynos;
  42. struct device *dev = &pdev->dev;
  43. struct device_node *node = dev->of_node;
  44. const struct dwc3_exynos_driverdata *driver_data;
  45. int i, ret;
  46. exynos = devm_kzalloc(dev, sizeof(*exynos), GFP_KERNEL);
  47. if (!exynos)
  48. return -ENOMEM;
  49. driver_data = of_device_get_match_data(dev);
  50. exynos->dev = dev;
  51. exynos->num_clks = driver_data->num_clks;
  52. exynos->clk_names = (const char **)driver_data->clk_names;
  53. exynos->suspend_clk_idx = driver_data->suspend_clk_idx;
  54. platform_set_drvdata(pdev, exynos);
  55. for (i = 0; i < exynos->num_clks; i++) {
  56. exynos->clks[i] = devm_clk_get(dev, exynos->clk_names[i]);
  57. if (IS_ERR(exynos->clks[i])) {
  58. dev_err(dev, "failed to get clock: %s\n",
  59. exynos->clk_names[i]);
  60. return PTR_ERR(exynos->clks[i]);
  61. }
  62. }
  63. for (i = 0; i < exynos->num_clks; i++) {
  64. ret = clk_prepare_enable(exynos->clks[i]);
  65. if (ret) {
  66. while (--i > 0)
  67. clk_disable_unprepare(exynos->clks[i]);
  68. return ret;
  69. }
  70. }
  71. if (exynos->suspend_clk_idx >= 0)
  72. clk_prepare_enable(exynos->clks[exynos->suspend_clk_idx]);
  73. exynos->vdd33 = devm_regulator_get(dev, "vdd33");
  74. if (IS_ERR(exynos->vdd33)) {
  75. ret = PTR_ERR(exynos->vdd33);
  76. goto vdd33_err;
  77. }
  78. ret = regulator_enable(exynos->vdd33);
  79. if (ret) {
  80. dev_err(dev, "Failed to enable VDD33 supply\n");
  81. goto vdd33_err;
  82. }
  83. exynos->vdd10 = devm_regulator_get(dev, "vdd10");
  84. if (IS_ERR(exynos->vdd10)) {
  85. ret = PTR_ERR(exynos->vdd10);
  86. goto vdd10_err;
  87. }
  88. ret = regulator_enable(exynos->vdd10);
  89. if (ret) {
  90. dev_err(dev, "Failed to enable VDD10 supply\n");
  91. goto vdd10_err;
  92. }
  93. if (node) {
  94. ret = of_platform_populate(node, NULL, NULL, dev);
  95. if (ret) {
  96. dev_err(dev, "failed to add dwc3 core\n");
  97. goto populate_err;
  98. }
  99. } else {
  100. dev_err(dev, "no device node, failed to add dwc3 core\n");
  101. ret = -ENODEV;
  102. goto populate_err;
  103. }
  104. return 0;
  105. populate_err:
  106. regulator_disable(exynos->vdd10);
  107. vdd10_err:
  108. regulator_disable(exynos->vdd33);
  109. vdd33_err:
  110. for (i = exynos->num_clks - 1; i >= 0; i--)
  111. clk_disable_unprepare(exynos->clks[i]);
  112. if (exynos->suspend_clk_idx >= 0)
  113. clk_disable_unprepare(exynos->clks[exynos->suspend_clk_idx]);
  114. return ret;
  115. }
  116. static int dwc3_exynos_remove(struct platform_device *pdev)
  117. {
  118. struct dwc3_exynos *exynos = platform_get_drvdata(pdev);
  119. int i;
  120. device_for_each_child(&pdev->dev, NULL, dwc3_exynos_remove_child);
  121. for (i = exynos->num_clks - 1; i >= 0; i--)
  122. clk_disable_unprepare(exynos->clks[i]);
  123. if (exynos->suspend_clk_idx >= 0)
  124. clk_disable_unprepare(exynos->clks[exynos->suspend_clk_idx]);
  125. regulator_disable(exynos->vdd33);
  126. regulator_disable(exynos->vdd10);
  127. return 0;
  128. }
  129. static const struct dwc3_exynos_driverdata exynos5250_drvdata = {
  130. .clk_names = { "usbdrd30" },
  131. .num_clks = 1,
  132. .suspend_clk_idx = -1,
  133. };
  134. static const struct dwc3_exynos_driverdata exynos5433_drvdata = {
  135. .clk_names = { "aclk", "susp_clk", "pipe_pclk", "phyclk" },
  136. .num_clks = 4,
  137. .suspend_clk_idx = 1,
  138. };
  139. static const struct dwc3_exynos_driverdata exynos7_drvdata = {
  140. .clk_names = { "usbdrd30", "usbdrd30_susp_clk", "usbdrd30_axius_clk" },
  141. .num_clks = 3,
  142. .suspend_clk_idx = 1,
  143. };
  144. static const struct of_device_id exynos_dwc3_match[] = {
  145. {
  146. .compatible = "samsung,exynos5250-dwusb3",
  147. .data = &exynos5250_drvdata,
  148. }, {
  149. .compatible = "samsung,exynos5433-dwusb3",
  150. .data = &exynos5433_drvdata,
  151. }, {
  152. .compatible = "samsung,exynos7-dwusb3",
  153. .data = &exynos7_drvdata,
  154. }, {
  155. }
  156. };
  157. MODULE_DEVICE_TABLE(of, exynos_dwc3_match);
  158. #ifdef CONFIG_PM_SLEEP
  159. static int dwc3_exynos_suspend(struct device *dev)
  160. {
  161. struct dwc3_exynos *exynos = dev_get_drvdata(dev);
  162. int i;
  163. for (i = exynos->num_clks - 1; i >= 0; i--)
  164. clk_disable_unprepare(exynos->clks[i]);
  165. regulator_disable(exynos->vdd33);
  166. regulator_disable(exynos->vdd10);
  167. return 0;
  168. }
  169. static int dwc3_exynos_resume(struct device *dev)
  170. {
  171. struct dwc3_exynos *exynos = dev_get_drvdata(dev);
  172. int i, ret;
  173. ret = regulator_enable(exynos->vdd33);
  174. if (ret) {
  175. dev_err(dev, "Failed to enable VDD33 supply\n");
  176. return ret;
  177. }
  178. ret = regulator_enable(exynos->vdd10);
  179. if (ret) {
  180. dev_err(dev, "Failed to enable VDD10 supply\n");
  181. return ret;
  182. }
  183. for (i = 0; i < exynos->num_clks; i++) {
  184. ret = clk_prepare_enable(exynos->clks[i]);
  185. if (ret) {
  186. while (--i > 0)
  187. clk_disable_unprepare(exynos->clks[i]);
  188. return ret;
  189. }
  190. }
  191. return 0;
  192. }
  193. static const struct dev_pm_ops dwc3_exynos_dev_pm_ops = {
  194. SET_SYSTEM_SLEEP_PM_OPS(dwc3_exynos_suspend, dwc3_exynos_resume)
  195. };
  196. #define DEV_PM_OPS (&dwc3_exynos_dev_pm_ops)
  197. #else
  198. #define DEV_PM_OPS NULL
  199. #endif /* CONFIG_PM_SLEEP */
  200. static struct platform_driver dwc3_exynos_driver = {
  201. .probe = dwc3_exynos_probe,
  202. .remove = dwc3_exynos_remove,
  203. .driver = {
  204. .name = "exynos-dwc3",
  205. .of_match_table = exynos_dwc3_match,
  206. .pm = DEV_PM_OPS,
  207. },
  208. };
  209. module_platform_driver(dwc3_exynos_driver);
  210. MODULE_AUTHOR("Anton Tikhomirov <av.tikhomirov@samsung.com>");
  211. MODULE_LICENSE("GPL v2");
  212. MODULE_DESCRIPTION("DesignWare USB3 EXYNOS Glue Layer");