udc.c 48 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * udc.c - ChipIdea UDC driver
  4. *
  5. * Copyright (C) 2008 Chipidea - MIPS Technologies, Inc. All rights reserved.
  6. *
  7. * Author: David Lopo
  8. */
  9. #include <linux/delay.h>
  10. #include <linux/device.h>
  11. #include <linux/dmapool.h>
  12. #include <linux/err.h>
  13. #include <linux/irqreturn.h>
  14. #include <linux/kernel.h>
  15. #include <linux/slab.h>
  16. #include <linux/pm_runtime.h>
  17. #include <linux/pinctrl/consumer.h>
  18. #include <linux/usb/ch9.h>
  19. #include <linux/usb/gadget.h>
  20. #include <linux/usb/otg-fsm.h>
  21. #include <linux/usb/chipidea.h>
  22. #include "ci.h"
  23. #include "udc.h"
  24. #include "bits.h"
  25. #include "otg.h"
  26. #include "otg_fsm.h"
  27. /* control endpoint description */
  28. static const struct usb_endpoint_descriptor
  29. ctrl_endpt_out_desc = {
  30. .bLength = USB_DT_ENDPOINT_SIZE,
  31. .bDescriptorType = USB_DT_ENDPOINT,
  32. .bEndpointAddress = USB_DIR_OUT,
  33. .bmAttributes = USB_ENDPOINT_XFER_CONTROL,
  34. .wMaxPacketSize = cpu_to_le16(CTRL_PAYLOAD_MAX),
  35. };
  36. static const struct usb_endpoint_descriptor
  37. ctrl_endpt_in_desc = {
  38. .bLength = USB_DT_ENDPOINT_SIZE,
  39. .bDescriptorType = USB_DT_ENDPOINT,
  40. .bEndpointAddress = USB_DIR_IN,
  41. .bmAttributes = USB_ENDPOINT_XFER_CONTROL,
  42. .wMaxPacketSize = cpu_to_le16(CTRL_PAYLOAD_MAX),
  43. };
  44. /**
  45. * hw_ep_bit: calculates the bit number
  46. * @num: endpoint number
  47. * @dir: endpoint direction
  48. *
  49. * This function returns bit number
  50. */
  51. static inline int hw_ep_bit(int num, int dir)
  52. {
  53. return num + ((dir == TX) ? 16 : 0);
  54. }
  55. static inline int ep_to_bit(struct ci_hdrc *ci, int n)
  56. {
  57. int fill = 16 - ci->hw_ep_max / 2;
  58. if (n >= ci->hw_ep_max / 2)
  59. n += fill;
  60. return n;
  61. }
  62. /**
  63. * hw_device_state: enables/disables interrupts (execute without interruption)
  64. * @dma: 0 => disable, !0 => enable and set dma engine
  65. *
  66. * This function returns an error code
  67. */
  68. static int hw_device_state(struct ci_hdrc *ci, u32 dma)
  69. {
  70. if (dma) {
  71. hw_write(ci, OP_ENDPTLISTADDR, ~0, dma);
  72. /* interrupt, error, port change, reset, sleep/suspend */
  73. hw_write(ci, OP_USBINTR, ~0,
  74. USBi_UI|USBi_UEI|USBi_PCI|USBi_URI|USBi_SLI);
  75. } else {
  76. hw_write(ci, OP_USBINTR, ~0, 0);
  77. }
  78. return 0;
  79. }
  80. /**
  81. * hw_ep_flush: flush endpoint fifo (execute without interruption)
  82. * @num: endpoint number
  83. * @dir: endpoint direction
  84. *
  85. * This function returns an error code
  86. */
  87. static int hw_ep_flush(struct ci_hdrc *ci, int num, int dir)
  88. {
  89. int n = hw_ep_bit(num, dir);
  90. do {
  91. /* flush any pending transfer */
  92. hw_write(ci, OP_ENDPTFLUSH, ~0, BIT(n));
  93. while (hw_read(ci, OP_ENDPTFLUSH, BIT(n)))
  94. cpu_relax();
  95. } while (hw_read(ci, OP_ENDPTSTAT, BIT(n)));
  96. return 0;
  97. }
  98. /**
  99. * hw_ep_disable: disables endpoint (execute without interruption)
  100. * @num: endpoint number
  101. * @dir: endpoint direction
  102. *
  103. * This function returns an error code
  104. */
  105. static int hw_ep_disable(struct ci_hdrc *ci, int num, int dir)
  106. {
  107. hw_write(ci, OP_ENDPTCTRL + num,
  108. (dir == TX) ? ENDPTCTRL_TXE : ENDPTCTRL_RXE, 0);
  109. return 0;
  110. }
  111. /**
  112. * hw_ep_enable: enables endpoint (execute without interruption)
  113. * @num: endpoint number
  114. * @dir: endpoint direction
  115. * @type: endpoint type
  116. *
  117. * This function returns an error code
  118. */
  119. static int hw_ep_enable(struct ci_hdrc *ci, int num, int dir, int type)
  120. {
  121. u32 mask, data;
  122. if (dir == TX) {
  123. mask = ENDPTCTRL_TXT; /* type */
  124. data = type << __ffs(mask);
  125. mask |= ENDPTCTRL_TXS; /* unstall */
  126. mask |= ENDPTCTRL_TXR; /* reset data toggle */
  127. data |= ENDPTCTRL_TXR;
  128. mask |= ENDPTCTRL_TXE; /* enable */
  129. data |= ENDPTCTRL_TXE;
  130. } else {
  131. mask = ENDPTCTRL_RXT; /* type */
  132. data = type << __ffs(mask);
  133. mask |= ENDPTCTRL_RXS; /* unstall */
  134. mask |= ENDPTCTRL_RXR; /* reset data toggle */
  135. data |= ENDPTCTRL_RXR;
  136. mask |= ENDPTCTRL_RXE; /* enable */
  137. data |= ENDPTCTRL_RXE;
  138. }
  139. hw_write(ci, OP_ENDPTCTRL + num, mask, data);
  140. return 0;
  141. }
  142. /**
  143. * hw_ep_get_halt: return endpoint halt status
  144. * @num: endpoint number
  145. * @dir: endpoint direction
  146. *
  147. * This function returns 1 if endpoint halted
  148. */
  149. static int hw_ep_get_halt(struct ci_hdrc *ci, int num, int dir)
  150. {
  151. u32 mask = (dir == TX) ? ENDPTCTRL_TXS : ENDPTCTRL_RXS;
  152. return hw_read(ci, OP_ENDPTCTRL + num, mask) ? 1 : 0;
  153. }
  154. /**
  155. * hw_ep_prime: primes endpoint (execute without interruption)
  156. * @num: endpoint number
  157. * @dir: endpoint direction
  158. * @is_ctrl: true if control endpoint
  159. *
  160. * This function returns an error code
  161. */
  162. static int hw_ep_prime(struct ci_hdrc *ci, int num, int dir, int is_ctrl)
  163. {
  164. int n = hw_ep_bit(num, dir);
  165. /* Synchronize before ep prime */
  166. wmb();
  167. if (is_ctrl && dir == RX && hw_read(ci, OP_ENDPTSETUPSTAT, BIT(num)))
  168. return -EAGAIN;
  169. hw_write(ci, OP_ENDPTPRIME, ~0, BIT(n));
  170. while (hw_read(ci, OP_ENDPTPRIME, BIT(n)))
  171. cpu_relax();
  172. if (is_ctrl && dir == RX && hw_read(ci, OP_ENDPTSETUPSTAT, BIT(num)))
  173. return -EAGAIN;
  174. /* status shoult be tested according with manual but it doesn't work */
  175. return 0;
  176. }
  177. /**
  178. * hw_ep_set_halt: configures ep halt & resets data toggle after clear (execute
  179. * without interruption)
  180. * @num: endpoint number
  181. * @dir: endpoint direction
  182. * @value: true => stall, false => unstall
  183. *
  184. * This function returns an error code
  185. */
  186. static int hw_ep_set_halt(struct ci_hdrc *ci, int num, int dir, int value)
  187. {
  188. if (value != 0 && value != 1)
  189. return -EINVAL;
  190. do {
  191. enum ci_hw_regs reg = OP_ENDPTCTRL + num;
  192. u32 mask_xs = (dir == TX) ? ENDPTCTRL_TXS : ENDPTCTRL_RXS;
  193. u32 mask_xr = (dir == TX) ? ENDPTCTRL_TXR : ENDPTCTRL_RXR;
  194. /* data toggle - reserved for EP0 but it's in ESS */
  195. hw_write(ci, reg, mask_xs|mask_xr,
  196. value ? mask_xs : mask_xr);
  197. } while (value != hw_ep_get_halt(ci, num, dir));
  198. return 0;
  199. }
  200. /**
  201. * hw_is_port_high_speed: test if port is high speed
  202. *
  203. * This function returns true if high speed port
  204. */
  205. static int hw_port_is_high_speed(struct ci_hdrc *ci)
  206. {
  207. return ci->hw_bank.lpm ? hw_read(ci, OP_DEVLC, DEVLC_PSPD) :
  208. hw_read(ci, OP_PORTSC, PORTSC_HSP);
  209. }
  210. /**
  211. * hw_test_and_clear_complete: test & clear complete status (execute without
  212. * interruption)
  213. * @n: endpoint number
  214. *
  215. * This function returns complete status
  216. */
  217. static int hw_test_and_clear_complete(struct ci_hdrc *ci, int n)
  218. {
  219. n = ep_to_bit(ci, n);
  220. return hw_test_and_clear(ci, OP_ENDPTCOMPLETE, BIT(n));
  221. }
  222. /**
  223. * hw_test_and_clear_intr_active: test & clear active interrupts (execute
  224. * without interruption)
  225. *
  226. * This function returns active interrutps
  227. */
  228. static u32 hw_test_and_clear_intr_active(struct ci_hdrc *ci)
  229. {
  230. u32 reg = hw_read_intr_status(ci) & hw_read_intr_enable(ci);
  231. hw_write(ci, OP_USBSTS, ~0, reg);
  232. return reg;
  233. }
  234. /**
  235. * hw_test_and_clear_setup_guard: test & clear setup guard (execute without
  236. * interruption)
  237. *
  238. * This function returns guard value
  239. */
  240. static int hw_test_and_clear_setup_guard(struct ci_hdrc *ci)
  241. {
  242. return hw_test_and_write(ci, OP_USBCMD, USBCMD_SUTW, 0);
  243. }
  244. /**
  245. * hw_test_and_set_setup_guard: test & set setup guard (execute without
  246. * interruption)
  247. *
  248. * This function returns guard value
  249. */
  250. static int hw_test_and_set_setup_guard(struct ci_hdrc *ci)
  251. {
  252. return hw_test_and_write(ci, OP_USBCMD, USBCMD_SUTW, USBCMD_SUTW);
  253. }
  254. /**
  255. * hw_usb_set_address: configures USB address (execute without interruption)
  256. * @value: new USB address
  257. *
  258. * This function explicitly sets the address, without the "USBADRA" (advance)
  259. * feature, which is not supported by older versions of the controller.
  260. */
  261. static void hw_usb_set_address(struct ci_hdrc *ci, u8 value)
  262. {
  263. hw_write(ci, OP_DEVICEADDR, DEVICEADDR_USBADR,
  264. value << __ffs(DEVICEADDR_USBADR));
  265. }
  266. /**
  267. * hw_usb_reset: restart device after a bus reset (execute without
  268. * interruption)
  269. *
  270. * This function returns an error code
  271. */
  272. static int hw_usb_reset(struct ci_hdrc *ci)
  273. {
  274. hw_usb_set_address(ci, 0);
  275. /* ESS flushes only at end?!? */
  276. hw_write(ci, OP_ENDPTFLUSH, ~0, ~0);
  277. /* clear setup token semaphores */
  278. hw_write(ci, OP_ENDPTSETUPSTAT, 0, 0);
  279. /* clear complete status */
  280. hw_write(ci, OP_ENDPTCOMPLETE, 0, 0);
  281. /* wait until all bits cleared */
  282. while (hw_read(ci, OP_ENDPTPRIME, ~0))
  283. udelay(10); /* not RTOS friendly */
  284. /* reset all endpoints ? */
  285. /* reset internal status and wait for further instructions
  286. no need to verify the port reset status (ESS does it) */
  287. return 0;
  288. }
  289. /******************************************************************************
  290. * UTIL block
  291. *****************************************************************************/
  292. static int add_td_to_list(struct ci_hw_ep *hwep, struct ci_hw_req *hwreq,
  293. unsigned length)
  294. {
  295. int i;
  296. u32 temp;
  297. struct td_node *lastnode, *node = kzalloc(sizeof(struct td_node),
  298. GFP_ATOMIC);
  299. if (node == NULL)
  300. return -ENOMEM;
  301. node->ptr = dma_pool_zalloc(hwep->td_pool, GFP_ATOMIC, &node->dma);
  302. if (node->ptr == NULL) {
  303. kfree(node);
  304. return -ENOMEM;
  305. }
  306. node->ptr->token = cpu_to_le32(length << __ffs(TD_TOTAL_BYTES));
  307. node->ptr->token &= cpu_to_le32(TD_TOTAL_BYTES);
  308. node->ptr->token |= cpu_to_le32(TD_STATUS_ACTIVE);
  309. if (hwep->type == USB_ENDPOINT_XFER_ISOC && hwep->dir == TX) {
  310. u32 mul = hwreq->req.length / hwep->ep.maxpacket;
  311. if (hwreq->req.length == 0
  312. || hwreq->req.length % hwep->ep.maxpacket)
  313. mul++;
  314. node->ptr->token |= cpu_to_le32(mul << __ffs(TD_MULTO));
  315. }
  316. temp = (u32) (hwreq->req.dma + hwreq->req.actual);
  317. if (length) {
  318. node->ptr->page[0] = cpu_to_le32(temp);
  319. for (i = 1; i < TD_PAGE_COUNT; i++) {
  320. u32 page = temp + i * CI_HDRC_PAGE_SIZE;
  321. page &= ~TD_RESERVED_MASK;
  322. node->ptr->page[i] = cpu_to_le32(page);
  323. }
  324. }
  325. hwreq->req.actual += length;
  326. if (!list_empty(&hwreq->tds)) {
  327. /* get the last entry */
  328. lastnode = list_entry(hwreq->tds.prev,
  329. struct td_node, td);
  330. lastnode->ptr->next = cpu_to_le32(node->dma);
  331. }
  332. INIT_LIST_HEAD(&node->td);
  333. list_add_tail(&node->td, &hwreq->tds);
  334. return 0;
  335. }
  336. /**
  337. * _usb_addr: calculates endpoint address from direction & number
  338. * @ep: endpoint
  339. */
  340. static inline u8 _usb_addr(struct ci_hw_ep *ep)
  341. {
  342. return ((ep->dir == TX) ? USB_ENDPOINT_DIR_MASK : 0) | ep->num;
  343. }
  344. /**
  345. * _hardware_enqueue: configures a request at hardware level
  346. * @hwep: endpoint
  347. * @hwreq: request
  348. *
  349. * This function returns an error code
  350. */
  351. static int _hardware_enqueue(struct ci_hw_ep *hwep, struct ci_hw_req *hwreq)
  352. {
  353. struct ci_hdrc *ci = hwep->ci;
  354. int ret = 0;
  355. unsigned rest = hwreq->req.length;
  356. int pages = TD_PAGE_COUNT;
  357. struct td_node *firstnode, *lastnode;
  358. /* don't queue twice */
  359. if (hwreq->req.status == -EALREADY)
  360. return -EALREADY;
  361. hwreq->req.status = -EALREADY;
  362. ret = usb_gadget_map_request_by_dev(ci->dev->parent,
  363. &hwreq->req, hwep->dir);
  364. if (ret)
  365. return ret;
  366. /*
  367. * The first buffer could be not page aligned.
  368. * In that case we have to span into one extra td.
  369. */
  370. if (hwreq->req.dma % PAGE_SIZE)
  371. pages--;
  372. if (rest == 0) {
  373. ret = add_td_to_list(hwep, hwreq, 0);
  374. if (ret < 0)
  375. goto done;
  376. }
  377. while (rest > 0) {
  378. unsigned count = min(hwreq->req.length - hwreq->req.actual,
  379. (unsigned)(pages * CI_HDRC_PAGE_SIZE));
  380. ret = add_td_to_list(hwep, hwreq, count);
  381. if (ret < 0)
  382. goto done;
  383. rest -= count;
  384. }
  385. if (hwreq->req.zero && hwreq->req.length && hwep->dir == TX
  386. && (hwreq->req.length % hwep->ep.maxpacket == 0)) {
  387. ret = add_td_to_list(hwep, hwreq, 0);
  388. if (ret < 0)
  389. goto done;
  390. }
  391. firstnode = list_first_entry(&hwreq->tds, struct td_node, td);
  392. lastnode = list_entry(hwreq->tds.prev,
  393. struct td_node, td);
  394. lastnode->ptr->next = cpu_to_le32(TD_TERMINATE);
  395. if (!hwreq->req.no_interrupt)
  396. lastnode->ptr->token |= cpu_to_le32(TD_IOC);
  397. wmb();
  398. hwreq->req.actual = 0;
  399. if (!list_empty(&hwep->qh.queue)) {
  400. struct ci_hw_req *hwreqprev;
  401. int n = hw_ep_bit(hwep->num, hwep->dir);
  402. int tmp_stat;
  403. struct td_node *prevlastnode;
  404. u32 next = firstnode->dma & TD_ADDR_MASK;
  405. hwreqprev = list_entry(hwep->qh.queue.prev,
  406. struct ci_hw_req, queue);
  407. prevlastnode = list_entry(hwreqprev->tds.prev,
  408. struct td_node, td);
  409. prevlastnode->ptr->next = cpu_to_le32(next);
  410. wmb();
  411. if (hw_read(ci, OP_ENDPTPRIME, BIT(n)))
  412. goto done;
  413. do {
  414. hw_write(ci, OP_USBCMD, USBCMD_ATDTW, USBCMD_ATDTW);
  415. tmp_stat = hw_read(ci, OP_ENDPTSTAT, BIT(n));
  416. } while (!hw_read(ci, OP_USBCMD, USBCMD_ATDTW));
  417. hw_write(ci, OP_USBCMD, USBCMD_ATDTW, 0);
  418. if (tmp_stat)
  419. goto done;
  420. }
  421. /* QH configuration */
  422. hwep->qh.ptr->td.next = cpu_to_le32(firstnode->dma);
  423. hwep->qh.ptr->td.token &=
  424. cpu_to_le32(~(TD_STATUS_HALTED|TD_STATUS_ACTIVE));
  425. if (hwep->type == USB_ENDPOINT_XFER_ISOC && hwep->dir == RX) {
  426. u32 mul = hwreq->req.length / hwep->ep.maxpacket;
  427. if (hwreq->req.length == 0
  428. || hwreq->req.length % hwep->ep.maxpacket)
  429. mul++;
  430. hwep->qh.ptr->cap |= cpu_to_le32(mul << __ffs(QH_MULT));
  431. }
  432. ret = hw_ep_prime(ci, hwep->num, hwep->dir,
  433. hwep->type == USB_ENDPOINT_XFER_CONTROL);
  434. done:
  435. return ret;
  436. }
  437. /*
  438. * free_pending_td: remove a pending request for the endpoint
  439. * @hwep: endpoint
  440. */
  441. static void free_pending_td(struct ci_hw_ep *hwep)
  442. {
  443. struct td_node *pending = hwep->pending_td;
  444. dma_pool_free(hwep->td_pool, pending->ptr, pending->dma);
  445. hwep->pending_td = NULL;
  446. kfree(pending);
  447. }
  448. static int reprime_dtd(struct ci_hdrc *ci, struct ci_hw_ep *hwep,
  449. struct td_node *node)
  450. {
  451. hwep->qh.ptr->td.next = cpu_to_le32(node->dma);
  452. hwep->qh.ptr->td.token &=
  453. cpu_to_le32(~(TD_STATUS_HALTED | TD_STATUS_ACTIVE));
  454. return hw_ep_prime(ci, hwep->num, hwep->dir,
  455. hwep->type == USB_ENDPOINT_XFER_CONTROL);
  456. }
  457. /**
  458. * _hardware_dequeue: handles a request at hardware level
  459. * @gadget: gadget
  460. * @hwep: endpoint
  461. *
  462. * This function returns an error code
  463. */
  464. static int _hardware_dequeue(struct ci_hw_ep *hwep, struct ci_hw_req *hwreq)
  465. {
  466. u32 tmptoken;
  467. struct td_node *node, *tmpnode;
  468. unsigned remaining_length;
  469. unsigned actual = hwreq->req.length;
  470. struct ci_hdrc *ci = hwep->ci;
  471. if (hwreq->req.status != -EALREADY)
  472. return -EINVAL;
  473. hwreq->req.status = 0;
  474. list_for_each_entry_safe(node, tmpnode, &hwreq->tds, td) {
  475. tmptoken = le32_to_cpu(node->ptr->token);
  476. if ((TD_STATUS_ACTIVE & tmptoken) != 0) {
  477. int n = hw_ep_bit(hwep->num, hwep->dir);
  478. if (ci->rev == CI_REVISION_24)
  479. if (!hw_read(ci, OP_ENDPTSTAT, BIT(n)))
  480. reprime_dtd(ci, hwep, node);
  481. hwreq->req.status = -EALREADY;
  482. return -EBUSY;
  483. }
  484. remaining_length = (tmptoken & TD_TOTAL_BYTES);
  485. remaining_length >>= __ffs(TD_TOTAL_BYTES);
  486. actual -= remaining_length;
  487. hwreq->req.status = tmptoken & TD_STATUS;
  488. if ((TD_STATUS_HALTED & hwreq->req.status)) {
  489. hwreq->req.status = -EPIPE;
  490. break;
  491. } else if ((TD_STATUS_DT_ERR & hwreq->req.status)) {
  492. hwreq->req.status = -EPROTO;
  493. break;
  494. } else if ((TD_STATUS_TR_ERR & hwreq->req.status)) {
  495. hwreq->req.status = -EILSEQ;
  496. break;
  497. }
  498. if (remaining_length) {
  499. if (hwep->dir == TX) {
  500. hwreq->req.status = -EPROTO;
  501. break;
  502. }
  503. }
  504. /*
  505. * As the hardware could still address the freed td
  506. * which will run the udc unusable, the cleanup of the
  507. * td has to be delayed by one.
  508. */
  509. if (hwep->pending_td)
  510. free_pending_td(hwep);
  511. hwep->pending_td = node;
  512. list_del_init(&node->td);
  513. }
  514. usb_gadget_unmap_request_by_dev(hwep->ci->dev->parent,
  515. &hwreq->req, hwep->dir);
  516. hwreq->req.actual += actual;
  517. if (hwreq->req.status)
  518. return hwreq->req.status;
  519. return hwreq->req.actual;
  520. }
  521. /**
  522. * _ep_nuke: dequeues all endpoint requests
  523. * @hwep: endpoint
  524. *
  525. * This function returns an error code
  526. * Caller must hold lock
  527. */
  528. static int _ep_nuke(struct ci_hw_ep *hwep)
  529. __releases(hwep->lock)
  530. __acquires(hwep->lock)
  531. {
  532. struct td_node *node, *tmpnode;
  533. if (hwep == NULL)
  534. return -EINVAL;
  535. hw_ep_flush(hwep->ci, hwep->num, hwep->dir);
  536. while (!list_empty(&hwep->qh.queue)) {
  537. /* pop oldest request */
  538. struct ci_hw_req *hwreq = list_entry(hwep->qh.queue.next,
  539. struct ci_hw_req, queue);
  540. list_for_each_entry_safe(node, tmpnode, &hwreq->tds, td) {
  541. dma_pool_free(hwep->td_pool, node->ptr, node->dma);
  542. list_del_init(&node->td);
  543. node->ptr = NULL;
  544. kfree(node);
  545. }
  546. list_del_init(&hwreq->queue);
  547. hwreq->req.status = -ESHUTDOWN;
  548. if (hwreq->req.complete != NULL) {
  549. spin_unlock(hwep->lock);
  550. usb_gadget_giveback_request(&hwep->ep, &hwreq->req);
  551. spin_lock(hwep->lock);
  552. }
  553. }
  554. if (hwep->pending_td)
  555. free_pending_td(hwep);
  556. return 0;
  557. }
  558. static int _ep_set_halt(struct usb_ep *ep, int value, bool check_transfer)
  559. {
  560. struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
  561. int direction, retval = 0;
  562. unsigned long flags;
  563. if (ep == NULL || hwep->ep.desc == NULL)
  564. return -EINVAL;
  565. if (usb_endpoint_xfer_isoc(hwep->ep.desc))
  566. return -EOPNOTSUPP;
  567. spin_lock_irqsave(hwep->lock, flags);
  568. if (value && hwep->dir == TX && check_transfer &&
  569. !list_empty(&hwep->qh.queue) &&
  570. !usb_endpoint_xfer_control(hwep->ep.desc)) {
  571. spin_unlock_irqrestore(hwep->lock, flags);
  572. return -EAGAIN;
  573. }
  574. direction = hwep->dir;
  575. do {
  576. retval |= hw_ep_set_halt(hwep->ci, hwep->num, hwep->dir, value);
  577. if (!value)
  578. hwep->wedge = 0;
  579. if (hwep->type == USB_ENDPOINT_XFER_CONTROL)
  580. hwep->dir = (hwep->dir == TX) ? RX : TX;
  581. } while (hwep->dir != direction);
  582. spin_unlock_irqrestore(hwep->lock, flags);
  583. return retval;
  584. }
  585. /**
  586. * _gadget_stop_activity: stops all USB activity, flushes & disables all endpts
  587. * @gadget: gadget
  588. *
  589. * This function returns an error code
  590. */
  591. static int _gadget_stop_activity(struct usb_gadget *gadget)
  592. {
  593. struct usb_ep *ep;
  594. struct ci_hdrc *ci = container_of(gadget, struct ci_hdrc, gadget);
  595. unsigned long flags;
  596. spin_lock_irqsave(&ci->lock, flags);
  597. ci->gadget.speed = USB_SPEED_UNKNOWN;
  598. ci->remote_wakeup = 0;
  599. ci->suspended = 0;
  600. spin_unlock_irqrestore(&ci->lock, flags);
  601. /* flush all endpoints */
  602. gadget_for_each_ep(ep, gadget) {
  603. usb_ep_fifo_flush(ep);
  604. }
  605. usb_ep_fifo_flush(&ci->ep0out->ep);
  606. usb_ep_fifo_flush(&ci->ep0in->ep);
  607. /* make sure to disable all endpoints */
  608. gadget_for_each_ep(ep, gadget) {
  609. usb_ep_disable(ep);
  610. }
  611. if (ci->status != NULL) {
  612. usb_ep_free_request(&ci->ep0in->ep, ci->status);
  613. ci->status = NULL;
  614. }
  615. return 0;
  616. }
  617. /******************************************************************************
  618. * ISR block
  619. *****************************************************************************/
  620. /**
  621. * isr_reset_handler: USB reset interrupt handler
  622. * @ci: UDC device
  623. *
  624. * This function resets USB engine after a bus reset occurred
  625. */
  626. static void isr_reset_handler(struct ci_hdrc *ci)
  627. __releases(ci->lock)
  628. __acquires(ci->lock)
  629. {
  630. int retval;
  631. spin_unlock(&ci->lock);
  632. if (ci->gadget.speed != USB_SPEED_UNKNOWN)
  633. usb_gadget_udc_reset(&ci->gadget, ci->driver);
  634. retval = _gadget_stop_activity(&ci->gadget);
  635. if (retval)
  636. goto done;
  637. retval = hw_usb_reset(ci);
  638. if (retval)
  639. goto done;
  640. ci->status = usb_ep_alloc_request(&ci->ep0in->ep, GFP_ATOMIC);
  641. if (ci->status == NULL)
  642. retval = -ENOMEM;
  643. done:
  644. spin_lock(&ci->lock);
  645. if (retval)
  646. dev_err(ci->dev, "error: %i\n", retval);
  647. }
  648. /**
  649. * isr_get_status_complete: get_status request complete function
  650. * @ep: endpoint
  651. * @req: request handled
  652. *
  653. * Caller must release lock
  654. */
  655. static void isr_get_status_complete(struct usb_ep *ep, struct usb_request *req)
  656. {
  657. if (ep == NULL || req == NULL)
  658. return;
  659. kfree(req->buf);
  660. usb_ep_free_request(ep, req);
  661. }
  662. /**
  663. * _ep_queue: queues (submits) an I/O request to an endpoint
  664. * @ep: endpoint
  665. * @req: request
  666. * @gfp_flags: GFP flags (not used)
  667. *
  668. * Caller must hold lock
  669. * This function returns an error code
  670. */
  671. static int _ep_queue(struct usb_ep *ep, struct usb_request *req,
  672. gfp_t __maybe_unused gfp_flags)
  673. {
  674. struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
  675. struct ci_hw_req *hwreq = container_of(req, struct ci_hw_req, req);
  676. struct ci_hdrc *ci = hwep->ci;
  677. int retval = 0;
  678. if (ep == NULL || req == NULL || hwep->ep.desc == NULL)
  679. return -EINVAL;
  680. if (hwep->type == USB_ENDPOINT_XFER_CONTROL) {
  681. if (req->length)
  682. hwep = (ci->ep0_dir == RX) ?
  683. ci->ep0out : ci->ep0in;
  684. if (!list_empty(&hwep->qh.queue)) {
  685. _ep_nuke(hwep);
  686. dev_warn(hwep->ci->dev, "endpoint ctrl %X nuked\n",
  687. _usb_addr(hwep));
  688. }
  689. }
  690. if (usb_endpoint_xfer_isoc(hwep->ep.desc) &&
  691. hwreq->req.length > hwep->ep.mult * hwep->ep.maxpacket) {
  692. dev_err(hwep->ci->dev, "request length too big for isochronous\n");
  693. return -EMSGSIZE;
  694. }
  695. /* first nuke then test link, e.g. previous status has not sent */
  696. if (!list_empty(&hwreq->queue)) {
  697. dev_err(hwep->ci->dev, "request already in queue\n");
  698. return -EBUSY;
  699. }
  700. /* push request */
  701. hwreq->req.status = -EINPROGRESS;
  702. hwreq->req.actual = 0;
  703. retval = _hardware_enqueue(hwep, hwreq);
  704. if (retval == -EALREADY)
  705. retval = 0;
  706. if (!retval)
  707. list_add_tail(&hwreq->queue, &hwep->qh.queue);
  708. return retval;
  709. }
  710. /**
  711. * isr_get_status_response: get_status request response
  712. * @ci: ci struct
  713. * @setup: setup request packet
  714. *
  715. * This function returns an error code
  716. */
  717. static int isr_get_status_response(struct ci_hdrc *ci,
  718. struct usb_ctrlrequest *setup)
  719. __releases(hwep->lock)
  720. __acquires(hwep->lock)
  721. {
  722. struct ci_hw_ep *hwep = ci->ep0in;
  723. struct usb_request *req = NULL;
  724. gfp_t gfp_flags = GFP_ATOMIC;
  725. int dir, num, retval;
  726. if (hwep == NULL || setup == NULL)
  727. return -EINVAL;
  728. spin_unlock(hwep->lock);
  729. req = usb_ep_alloc_request(&hwep->ep, gfp_flags);
  730. spin_lock(hwep->lock);
  731. if (req == NULL)
  732. return -ENOMEM;
  733. req->complete = isr_get_status_complete;
  734. req->length = 2;
  735. req->buf = kzalloc(req->length, gfp_flags);
  736. if (req->buf == NULL) {
  737. retval = -ENOMEM;
  738. goto err_free_req;
  739. }
  740. if ((setup->bRequestType & USB_RECIP_MASK) == USB_RECIP_DEVICE) {
  741. *(u16 *)req->buf = (ci->remote_wakeup << 1) |
  742. ci->gadget.is_selfpowered;
  743. } else if ((setup->bRequestType & USB_RECIP_MASK) \
  744. == USB_RECIP_ENDPOINT) {
  745. dir = (le16_to_cpu(setup->wIndex) & USB_ENDPOINT_DIR_MASK) ?
  746. TX : RX;
  747. num = le16_to_cpu(setup->wIndex) & USB_ENDPOINT_NUMBER_MASK;
  748. *(u16 *)req->buf = hw_ep_get_halt(ci, num, dir);
  749. }
  750. /* else do nothing; reserved for future use */
  751. retval = _ep_queue(&hwep->ep, req, gfp_flags);
  752. if (retval)
  753. goto err_free_buf;
  754. return 0;
  755. err_free_buf:
  756. kfree(req->buf);
  757. err_free_req:
  758. spin_unlock(hwep->lock);
  759. usb_ep_free_request(&hwep->ep, req);
  760. spin_lock(hwep->lock);
  761. return retval;
  762. }
  763. /**
  764. * isr_setup_status_complete: setup_status request complete function
  765. * @ep: endpoint
  766. * @req: request handled
  767. *
  768. * Caller must release lock. Put the port in test mode if test mode
  769. * feature is selected.
  770. */
  771. static void
  772. isr_setup_status_complete(struct usb_ep *ep, struct usb_request *req)
  773. {
  774. struct ci_hdrc *ci = req->context;
  775. unsigned long flags;
  776. if (ci->setaddr) {
  777. hw_usb_set_address(ci, ci->address);
  778. ci->setaddr = false;
  779. if (ci->address)
  780. usb_gadget_set_state(&ci->gadget, USB_STATE_ADDRESS);
  781. }
  782. spin_lock_irqsave(&ci->lock, flags);
  783. if (ci->test_mode)
  784. hw_port_test_set(ci, ci->test_mode);
  785. spin_unlock_irqrestore(&ci->lock, flags);
  786. }
  787. /**
  788. * isr_setup_status_phase: queues the status phase of a setup transation
  789. * @ci: ci struct
  790. *
  791. * This function returns an error code
  792. */
  793. static int isr_setup_status_phase(struct ci_hdrc *ci)
  794. {
  795. struct ci_hw_ep *hwep;
  796. /*
  797. * Unexpected USB controller behavior, caused by bad signal integrity
  798. * or ground reference problems, can lead to isr_setup_status_phase
  799. * being called with ci->status equal to NULL.
  800. * If this situation occurs, you should review your USB hardware design.
  801. */
  802. if (WARN_ON_ONCE(!ci->status))
  803. return -EPIPE;
  804. hwep = (ci->ep0_dir == TX) ? ci->ep0out : ci->ep0in;
  805. ci->status->context = ci;
  806. ci->status->complete = isr_setup_status_complete;
  807. return _ep_queue(&hwep->ep, ci->status, GFP_ATOMIC);
  808. }
  809. /**
  810. * isr_tr_complete_low: transaction complete low level handler
  811. * @hwep: endpoint
  812. *
  813. * This function returns an error code
  814. * Caller must hold lock
  815. */
  816. static int isr_tr_complete_low(struct ci_hw_ep *hwep)
  817. __releases(hwep->lock)
  818. __acquires(hwep->lock)
  819. {
  820. struct ci_hw_req *hwreq, *hwreqtemp;
  821. struct ci_hw_ep *hweptemp = hwep;
  822. int retval = 0;
  823. list_for_each_entry_safe(hwreq, hwreqtemp, &hwep->qh.queue,
  824. queue) {
  825. retval = _hardware_dequeue(hwep, hwreq);
  826. if (retval < 0)
  827. break;
  828. list_del_init(&hwreq->queue);
  829. if (hwreq->req.complete != NULL) {
  830. spin_unlock(hwep->lock);
  831. if ((hwep->type == USB_ENDPOINT_XFER_CONTROL) &&
  832. hwreq->req.length)
  833. hweptemp = hwep->ci->ep0in;
  834. usb_gadget_giveback_request(&hweptemp->ep, &hwreq->req);
  835. spin_lock(hwep->lock);
  836. }
  837. }
  838. if (retval == -EBUSY)
  839. retval = 0;
  840. return retval;
  841. }
  842. static int otg_a_alt_hnp_support(struct ci_hdrc *ci)
  843. {
  844. dev_warn(&ci->gadget.dev,
  845. "connect the device to an alternate port if you want HNP\n");
  846. return isr_setup_status_phase(ci);
  847. }
  848. /**
  849. * isr_setup_packet_handler: setup packet handler
  850. * @ci: UDC descriptor
  851. *
  852. * This function handles setup packet
  853. */
  854. static void isr_setup_packet_handler(struct ci_hdrc *ci)
  855. __releases(ci->lock)
  856. __acquires(ci->lock)
  857. {
  858. struct ci_hw_ep *hwep = &ci->ci_hw_ep[0];
  859. struct usb_ctrlrequest req;
  860. int type, num, dir, err = -EINVAL;
  861. u8 tmode = 0;
  862. /*
  863. * Flush data and handshake transactions of previous
  864. * setup packet.
  865. */
  866. _ep_nuke(ci->ep0out);
  867. _ep_nuke(ci->ep0in);
  868. /* read_setup_packet */
  869. do {
  870. hw_test_and_set_setup_guard(ci);
  871. memcpy(&req, &hwep->qh.ptr->setup, sizeof(req));
  872. } while (!hw_test_and_clear_setup_guard(ci));
  873. type = req.bRequestType;
  874. ci->ep0_dir = (type & USB_DIR_IN) ? TX : RX;
  875. switch (req.bRequest) {
  876. case USB_REQ_CLEAR_FEATURE:
  877. if (type == (USB_DIR_OUT|USB_RECIP_ENDPOINT) &&
  878. le16_to_cpu(req.wValue) ==
  879. USB_ENDPOINT_HALT) {
  880. if (req.wLength != 0)
  881. break;
  882. num = le16_to_cpu(req.wIndex);
  883. dir = (num & USB_ENDPOINT_DIR_MASK) ? TX : RX;
  884. num &= USB_ENDPOINT_NUMBER_MASK;
  885. if (dir == TX)
  886. num += ci->hw_ep_max / 2;
  887. if (!ci->ci_hw_ep[num].wedge) {
  888. spin_unlock(&ci->lock);
  889. err = usb_ep_clear_halt(
  890. &ci->ci_hw_ep[num].ep);
  891. spin_lock(&ci->lock);
  892. if (err)
  893. break;
  894. }
  895. err = isr_setup_status_phase(ci);
  896. } else if (type == (USB_DIR_OUT|USB_RECIP_DEVICE) &&
  897. le16_to_cpu(req.wValue) ==
  898. USB_DEVICE_REMOTE_WAKEUP) {
  899. if (req.wLength != 0)
  900. break;
  901. ci->remote_wakeup = 0;
  902. err = isr_setup_status_phase(ci);
  903. } else {
  904. goto delegate;
  905. }
  906. break;
  907. case USB_REQ_GET_STATUS:
  908. if ((type != (USB_DIR_IN|USB_RECIP_DEVICE) ||
  909. le16_to_cpu(req.wIndex) == OTG_STS_SELECTOR) &&
  910. type != (USB_DIR_IN|USB_RECIP_ENDPOINT) &&
  911. type != (USB_DIR_IN|USB_RECIP_INTERFACE))
  912. goto delegate;
  913. if (le16_to_cpu(req.wLength) != 2 ||
  914. le16_to_cpu(req.wValue) != 0)
  915. break;
  916. err = isr_get_status_response(ci, &req);
  917. break;
  918. case USB_REQ_SET_ADDRESS:
  919. if (type != (USB_DIR_OUT|USB_RECIP_DEVICE))
  920. goto delegate;
  921. if (le16_to_cpu(req.wLength) != 0 ||
  922. le16_to_cpu(req.wIndex) != 0)
  923. break;
  924. ci->address = (u8)le16_to_cpu(req.wValue);
  925. ci->setaddr = true;
  926. err = isr_setup_status_phase(ci);
  927. break;
  928. case USB_REQ_SET_FEATURE:
  929. if (type == (USB_DIR_OUT|USB_RECIP_ENDPOINT) &&
  930. le16_to_cpu(req.wValue) ==
  931. USB_ENDPOINT_HALT) {
  932. if (req.wLength != 0)
  933. break;
  934. num = le16_to_cpu(req.wIndex);
  935. dir = (num & USB_ENDPOINT_DIR_MASK) ? TX : RX;
  936. num &= USB_ENDPOINT_NUMBER_MASK;
  937. if (dir == TX)
  938. num += ci->hw_ep_max / 2;
  939. spin_unlock(&ci->lock);
  940. err = _ep_set_halt(&ci->ci_hw_ep[num].ep, 1, false);
  941. spin_lock(&ci->lock);
  942. if (!err)
  943. isr_setup_status_phase(ci);
  944. } else if (type == (USB_DIR_OUT|USB_RECIP_DEVICE)) {
  945. if (req.wLength != 0)
  946. break;
  947. switch (le16_to_cpu(req.wValue)) {
  948. case USB_DEVICE_REMOTE_WAKEUP:
  949. ci->remote_wakeup = 1;
  950. err = isr_setup_status_phase(ci);
  951. break;
  952. case USB_DEVICE_TEST_MODE:
  953. tmode = le16_to_cpu(req.wIndex) >> 8;
  954. switch (tmode) {
  955. case TEST_J:
  956. case TEST_K:
  957. case TEST_SE0_NAK:
  958. case TEST_PACKET:
  959. case TEST_FORCE_EN:
  960. ci->test_mode = tmode;
  961. err = isr_setup_status_phase(
  962. ci);
  963. break;
  964. default:
  965. break;
  966. }
  967. break;
  968. case USB_DEVICE_B_HNP_ENABLE:
  969. if (ci_otg_is_fsm_mode(ci)) {
  970. ci->gadget.b_hnp_enable = 1;
  971. err = isr_setup_status_phase(
  972. ci);
  973. }
  974. break;
  975. case USB_DEVICE_A_ALT_HNP_SUPPORT:
  976. if (ci_otg_is_fsm_mode(ci))
  977. err = otg_a_alt_hnp_support(ci);
  978. break;
  979. case USB_DEVICE_A_HNP_SUPPORT:
  980. if (ci_otg_is_fsm_mode(ci)) {
  981. ci->gadget.a_hnp_support = 1;
  982. err = isr_setup_status_phase(
  983. ci);
  984. }
  985. break;
  986. default:
  987. goto delegate;
  988. }
  989. } else {
  990. goto delegate;
  991. }
  992. break;
  993. default:
  994. delegate:
  995. if (req.wLength == 0) /* no data phase */
  996. ci->ep0_dir = TX;
  997. spin_unlock(&ci->lock);
  998. err = ci->driver->setup(&ci->gadget, &req);
  999. spin_lock(&ci->lock);
  1000. break;
  1001. }
  1002. if (err < 0) {
  1003. spin_unlock(&ci->lock);
  1004. if (_ep_set_halt(&hwep->ep, 1, false))
  1005. dev_err(ci->dev, "error: _ep_set_halt\n");
  1006. spin_lock(&ci->lock);
  1007. }
  1008. }
  1009. /**
  1010. * isr_tr_complete_handler: transaction complete interrupt handler
  1011. * @ci: UDC descriptor
  1012. *
  1013. * This function handles traffic events
  1014. */
  1015. static void isr_tr_complete_handler(struct ci_hdrc *ci)
  1016. __releases(ci->lock)
  1017. __acquires(ci->lock)
  1018. {
  1019. unsigned i;
  1020. int err;
  1021. for (i = 0; i < ci->hw_ep_max; i++) {
  1022. struct ci_hw_ep *hwep = &ci->ci_hw_ep[i];
  1023. if (hwep->ep.desc == NULL)
  1024. continue; /* not configured */
  1025. if (hw_test_and_clear_complete(ci, i)) {
  1026. err = isr_tr_complete_low(hwep);
  1027. if (hwep->type == USB_ENDPOINT_XFER_CONTROL) {
  1028. if (err > 0) /* needs status phase */
  1029. err = isr_setup_status_phase(ci);
  1030. if (err < 0) {
  1031. spin_unlock(&ci->lock);
  1032. if (_ep_set_halt(&hwep->ep, 1, false))
  1033. dev_err(ci->dev,
  1034. "error: _ep_set_halt\n");
  1035. spin_lock(&ci->lock);
  1036. }
  1037. }
  1038. }
  1039. /* Only handle setup packet below */
  1040. if (i == 0 &&
  1041. hw_test_and_clear(ci, OP_ENDPTSETUPSTAT, BIT(0)))
  1042. isr_setup_packet_handler(ci);
  1043. }
  1044. }
  1045. /******************************************************************************
  1046. * ENDPT block
  1047. *****************************************************************************/
  1048. /**
  1049. * ep_enable: configure endpoint, making it usable
  1050. *
  1051. * Check usb_ep_enable() at "usb_gadget.h" for details
  1052. */
  1053. static int ep_enable(struct usb_ep *ep,
  1054. const struct usb_endpoint_descriptor *desc)
  1055. {
  1056. struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
  1057. int retval = 0;
  1058. unsigned long flags;
  1059. u32 cap = 0;
  1060. if (ep == NULL || desc == NULL)
  1061. return -EINVAL;
  1062. spin_lock_irqsave(hwep->lock, flags);
  1063. /* only internal SW should enable ctrl endpts */
  1064. if (!list_empty(&hwep->qh.queue)) {
  1065. dev_warn(hwep->ci->dev, "enabling a non-empty endpoint!\n");
  1066. spin_unlock_irqrestore(hwep->lock, flags);
  1067. return -EBUSY;
  1068. }
  1069. hwep->ep.desc = desc;
  1070. hwep->dir = usb_endpoint_dir_in(desc) ? TX : RX;
  1071. hwep->num = usb_endpoint_num(desc);
  1072. hwep->type = usb_endpoint_type(desc);
  1073. hwep->ep.maxpacket = usb_endpoint_maxp(desc);
  1074. hwep->ep.mult = usb_endpoint_maxp_mult(desc);
  1075. if (hwep->type == USB_ENDPOINT_XFER_CONTROL)
  1076. cap |= QH_IOS;
  1077. cap |= QH_ZLT;
  1078. cap |= (hwep->ep.maxpacket << __ffs(QH_MAX_PKT)) & QH_MAX_PKT;
  1079. /*
  1080. * For ISO-TX, we set mult at QH as the largest value, and use
  1081. * MultO at TD as real mult value.
  1082. */
  1083. if (hwep->type == USB_ENDPOINT_XFER_ISOC && hwep->dir == TX)
  1084. cap |= 3 << __ffs(QH_MULT);
  1085. hwep->qh.ptr->cap = cpu_to_le32(cap);
  1086. hwep->qh.ptr->td.next |= cpu_to_le32(TD_TERMINATE); /* needed? */
  1087. if (hwep->num != 0 && hwep->type == USB_ENDPOINT_XFER_CONTROL) {
  1088. dev_err(hwep->ci->dev, "Set control xfer at non-ep0\n");
  1089. retval = -EINVAL;
  1090. }
  1091. /*
  1092. * Enable endpoints in the HW other than ep0 as ep0
  1093. * is always enabled
  1094. */
  1095. if (hwep->num)
  1096. retval |= hw_ep_enable(hwep->ci, hwep->num, hwep->dir,
  1097. hwep->type);
  1098. spin_unlock_irqrestore(hwep->lock, flags);
  1099. return retval;
  1100. }
  1101. /**
  1102. * ep_disable: endpoint is no longer usable
  1103. *
  1104. * Check usb_ep_disable() at "usb_gadget.h" for details
  1105. */
  1106. static int ep_disable(struct usb_ep *ep)
  1107. {
  1108. struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
  1109. int direction, retval = 0;
  1110. unsigned long flags;
  1111. if (ep == NULL)
  1112. return -EINVAL;
  1113. else if (hwep->ep.desc == NULL)
  1114. return -EBUSY;
  1115. spin_lock_irqsave(hwep->lock, flags);
  1116. /* only internal SW should disable ctrl endpts */
  1117. direction = hwep->dir;
  1118. do {
  1119. retval |= _ep_nuke(hwep);
  1120. retval |= hw_ep_disable(hwep->ci, hwep->num, hwep->dir);
  1121. if (hwep->type == USB_ENDPOINT_XFER_CONTROL)
  1122. hwep->dir = (hwep->dir == TX) ? RX : TX;
  1123. } while (hwep->dir != direction);
  1124. hwep->ep.desc = NULL;
  1125. spin_unlock_irqrestore(hwep->lock, flags);
  1126. return retval;
  1127. }
  1128. /**
  1129. * ep_alloc_request: allocate a request object to use with this endpoint
  1130. *
  1131. * Check usb_ep_alloc_request() at "usb_gadget.h" for details
  1132. */
  1133. static struct usb_request *ep_alloc_request(struct usb_ep *ep, gfp_t gfp_flags)
  1134. {
  1135. struct ci_hw_req *hwreq = NULL;
  1136. if (ep == NULL)
  1137. return NULL;
  1138. hwreq = kzalloc(sizeof(struct ci_hw_req), gfp_flags);
  1139. if (hwreq != NULL) {
  1140. INIT_LIST_HEAD(&hwreq->queue);
  1141. INIT_LIST_HEAD(&hwreq->tds);
  1142. }
  1143. return (hwreq == NULL) ? NULL : &hwreq->req;
  1144. }
  1145. /**
  1146. * ep_free_request: frees a request object
  1147. *
  1148. * Check usb_ep_free_request() at "usb_gadget.h" for details
  1149. */
  1150. static void ep_free_request(struct usb_ep *ep, struct usb_request *req)
  1151. {
  1152. struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
  1153. struct ci_hw_req *hwreq = container_of(req, struct ci_hw_req, req);
  1154. struct td_node *node, *tmpnode;
  1155. unsigned long flags;
  1156. if (ep == NULL || req == NULL) {
  1157. return;
  1158. } else if (!list_empty(&hwreq->queue)) {
  1159. dev_err(hwep->ci->dev, "freeing queued request\n");
  1160. return;
  1161. }
  1162. spin_lock_irqsave(hwep->lock, flags);
  1163. list_for_each_entry_safe(node, tmpnode, &hwreq->tds, td) {
  1164. dma_pool_free(hwep->td_pool, node->ptr, node->dma);
  1165. list_del_init(&node->td);
  1166. node->ptr = NULL;
  1167. kfree(node);
  1168. }
  1169. kfree(hwreq);
  1170. spin_unlock_irqrestore(hwep->lock, flags);
  1171. }
  1172. /**
  1173. * ep_queue: queues (submits) an I/O request to an endpoint
  1174. *
  1175. * Check usb_ep_queue()* at usb_gadget.h" for details
  1176. */
  1177. static int ep_queue(struct usb_ep *ep, struct usb_request *req,
  1178. gfp_t __maybe_unused gfp_flags)
  1179. {
  1180. struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
  1181. int retval = 0;
  1182. unsigned long flags;
  1183. if (ep == NULL || req == NULL || hwep->ep.desc == NULL)
  1184. return -EINVAL;
  1185. spin_lock_irqsave(hwep->lock, flags);
  1186. retval = _ep_queue(ep, req, gfp_flags);
  1187. spin_unlock_irqrestore(hwep->lock, flags);
  1188. return retval;
  1189. }
  1190. /**
  1191. * ep_dequeue: dequeues (cancels, unlinks) an I/O request from an endpoint
  1192. *
  1193. * Check usb_ep_dequeue() at "usb_gadget.h" for details
  1194. */
  1195. static int ep_dequeue(struct usb_ep *ep, struct usb_request *req)
  1196. {
  1197. struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
  1198. struct ci_hw_req *hwreq = container_of(req, struct ci_hw_req, req);
  1199. unsigned long flags;
  1200. struct td_node *node, *tmpnode;
  1201. if (ep == NULL || req == NULL || hwreq->req.status != -EALREADY ||
  1202. hwep->ep.desc == NULL || list_empty(&hwreq->queue) ||
  1203. list_empty(&hwep->qh.queue))
  1204. return -EINVAL;
  1205. spin_lock_irqsave(hwep->lock, flags);
  1206. hw_ep_flush(hwep->ci, hwep->num, hwep->dir);
  1207. list_for_each_entry_safe(node, tmpnode, &hwreq->tds, td) {
  1208. dma_pool_free(hwep->td_pool, node->ptr, node->dma);
  1209. list_del(&node->td);
  1210. kfree(node);
  1211. }
  1212. /* pop request */
  1213. list_del_init(&hwreq->queue);
  1214. usb_gadget_unmap_request(&hwep->ci->gadget, req, hwep->dir);
  1215. req->status = -ECONNRESET;
  1216. if (hwreq->req.complete != NULL) {
  1217. spin_unlock(hwep->lock);
  1218. usb_gadget_giveback_request(&hwep->ep, &hwreq->req);
  1219. spin_lock(hwep->lock);
  1220. }
  1221. spin_unlock_irqrestore(hwep->lock, flags);
  1222. return 0;
  1223. }
  1224. /**
  1225. * ep_set_halt: sets the endpoint halt feature
  1226. *
  1227. * Check usb_ep_set_halt() at "usb_gadget.h" for details
  1228. */
  1229. static int ep_set_halt(struct usb_ep *ep, int value)
  1230. {
  1231. return _ep_set_halt(ep, value, true);
  1232. }
  1233. /**
  1234. * ep_set_wedge: sets the halt feature and ignores clear requests
  1235. *
  1236. * Check usb_ep_set_wedge() at "usb_gadget.h" for details
  1237. */
  1238. static int ep_set_wedge(struct usb_ep *ep)
  1239. {
  1240. struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
  1241. unsigned long flags;
  1242. if (ep == NULL || hwep->ep.desc == NULL)
  1243. return -EINVAL;
  1244. spin_lock_irqsave(hwep->lock, flags);
  1245. hwep->wedge = 1;
  1246. spin_unlock_irqrestore(hwep->lock, flags);
  1247. return usb_ep_set_halt(ep);
  1248. }
  1249. /**
  1250. * ep_fifo_flush: flushes contents of a fifo
  1251. *
  1252. * Check usb_ep_fifo_flush() at "usb_gadget.h" for details
  1253. */
  1254. static void ep_fifo_flush(struct usb_ep *ep)
  1255. {
  1256. struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
  1257. unsigned long flags;
  1258. if (ep == NULL) {
  1259. dev_err(hwep->ci->dev, "%02X: -EINVAL\n", _usb_addr(hwep));
  1260. return;
  1261. }
  1262. spin_lock_irqsave(hwep->lock, flags);
  1263. hw_ep_flush(hwep->ci, hwep->num, hwep->dir);
  1264. spin_unlock_irqrestore(hwep->lock, flags);
  1265. }
  1266. /**
  1267. * Endpoint-specific part of the API to the USB controller hardware
  1268. * Check "usb_gadget.h" for details
  1269. */
  1270. static const struct usb_ep_ops usb_ep_ops = {
  1271. .enable = ep_enable,
  1272. .disable = ep_disable,
  1273. .alloc_request = ep_alloc_request,
  1274. .free_request = ep_free_request,
  1275. .queue = ep_queue,
  1276. .dequeue = ep_dequeue,
  1277. .set_halt = ep_set_halt,
  1278. .set_wedge = ep_set_wedge,
  1279. .fifo_flush = ep_fifo_flush,
  1280. };
  1281. /******************************************************************************
  1282. * GADGET block
  1283. *****************************************************************************/
  1284. static int ci_udc_vbus_session(struct usb_gadget *_gadget, int is_active)
  1285. {
  1286. struct ci_hdrc *ci = container_of(_gadget, struct ci_hdrc, gadget);
  1287. unsigned long flags;
  1288. int gadget_ready = 0;
  1289. spin_lock_irqsave(&ci->lock, flags);
  1290. ci->vbus_active = is_active;
  1291. if (ci->driver)
  1292. gadget_ready = 1;
  1293. spin_unlock_irqrestore(&ci->lock, flags);
  1294. if (ci->usb_phy)
  1295. usb_phy_set_charger_state(ci->usb_phy, is_active ?
  1296. USB_CHARGER_PRESENT : USB_CHARGER_ABSENT);
  1297. if (gadget_ready) {
  1298. if (is_active) {
  1299. pm_runtime_get_sync(&_gadget->dev);
  1300. hw_device_reset(ci);
  1301. hw_device_state(ci, ci->ep0out->qh.dma);
  1302. usb_gadget_set_state(_gadget, USB_STATE_POWERED);
  1303. usb_udc_vbus_handler(_gadget, true);
  1304. } else {
  1305. usb_udc_vbus_handler(_gadget, false);
  1306. if (ci->driver)
  1307. ci->driver->disconnect(&ci->gadget);
  1308. hw_device_state(ci, 0);
  1309. if (ci->platdata->notify_event)
  1310. ci->platdata->notify_event(ci,
  1311. CI_HDRC_CONTROLLER_STOPPED_EVENT);
  1312. _gadget_stop_activity(&ci->gadget);
  1313. pm_runtime_put_sync(&_gadget->dev);
  1314. usb_gadget_set_state(_gadget, USB_STATE_NOTATTACHED);
  1315. }
  1316. }
  1317. return 0;
  1318. }
  1319. static int ci_udc_wakeup(struct usb_gadget *_gadget)
  1320. {
  1321. struct ci_hdrc *ci = container_of(_gadget, struct ci_hdrc, gadget);
  1322. unsigned long flags;
  1323. int ret = 0;
  1324. spin_lock_irqsave(&ci->lock, flags);
  1325. if (!ci->remote_wakeup) {
  1326. ret = -EOPNOTSUPP;
  1327. goto out;
  1328. }
  1329. if (!hw_read(ci, OP_PORTSC, PORTSC_SUSP)) {
  1330. ret = -EINVAL;
  1331. goto out;
  1332. }
  1333. hw_write(ci, OP_PORTSC, PORTSC_FPR, PORTSC_FPR);
  1334. out:
  1335. spin_unlock_irqrestore(&ci->lock, flags);
  1336. return ret;
  1337. }
  1338. static int ci_udc_vbus_draw(struct usb_gadget *_gadget, unsigned ma)
  1339. {
  1340. struct ci_hdrc *ci = container_of(_gadget, struct ci_hdrc, gadget);
  1341. if (ci->usb_phy)
  1342. return usb_phy_set_power(ci->usb_phy, ma);
  1343. return -ENOTSUPP;
  1344. }
  1345. static int ci_udc_selfpowered(struct usb_gadget *_gadget, int is_on)
  1346. {
  1347. struct ci_hdrc *ci = container_of(_gadget, struct ci_hdrc, gadget);
  1348. struct ci_hw_ep *hwep = ci->ep0in;
  1349. unsigned long flags;
  1350. spin_lock_irqsave(hwep->lock, flags);
  1351. _gadget->is_selfpowered = (is_on != 0);
  1352. spin_unlock_irqrestore(hwep->lock, flags);
  1353. return 0;
  1354. }
  1355. /* Change Data+ pullup status
  1356. * this func is used by usb_gadget_connect/disconnet
  1357. */
  1358. static int ci_udc_pullup(struct usb_gadget *_gadget, int is_on)
  1359. {
  1360. struct ci_hdrc *ci = container_of(_gadget, struct ci_hdrc, gadget);
  1361. /*
  1362. * Data+ pullup controlled by OTG state machine in OTG fsm mode;
  1363. * and don't touch Data+ in host mode for dual role config.
  1364. */
  1365. if (ci_otg_is_fsm_mode(ci) || ci->role == CI_ROLE_HOST)
  1366. return 0;
  1367. pm_runtime_get_sync(&ci->gadget.dev);
  1368. if (is_on)
  1369. hw_write(ci, OP_USBCMD, USBCMD_RS, USBCMD_RS);
  1370. else
  1371. hw_write(ci, OP_USBCMD, USBCMD_RS, 0);
  1372. pm_runtime_put_sync(&ci->gadget.dev);
  1373. return 0;
  1374. }
  1375. static int ci_udc_start(struct usb_gadget *gadget,
  1376. struct usb_gadget_driver *driver);
  1377. static int ci_udc_stop(struct usb_gadget *gadget);
  1378. /**
  1379. * Device operations part of the API to the USB controller hardware,
  1380. * which don't involve endpoints (or i/o)
  1381. * Check "usb_gadget.h" for details
  1382. */
  1383. static const struct usb_gadget_ops usb_gadget_ops = {
  1384. .vbus_session = ci_udc_vbus_session,
  1385. .wakeup = ci_udc_wakeup,
  1386. .set_selfpowered = ci_udc_selfpowered,
  1387. .pullup = ci_udc_pullup,
  1388. .vbus_draw = ci_udc_vbus_draw,
  1389. .udc_start = ci_udc_start,
  1390. .udc_stop = ci_udc_stop,
  1391. };
  1392. static int init_eps(struct ci_hdrc *ci)
  1393. {
  1394. int retval = 0, i, j;
  1395. for (i = 0; i < ci->hw_ep_max/2; i++)
  1396. for (j = RX; j <= TX; j++) {
  1397. int k = i + j * ci->hw_ep_max/2;
  1398. struct ci_hw_ep *hwep = &ci->ci_hw_ep[k];
  1399. scnprintf(hwep->name, sizeof(hwep->name), "ep%i%s", i,
  1400. (j == TX) ? "in" : "out");
  1401. hwep->ci = ci;
  1402. hwep->lock = &ci->lock;
  1403. hwep->td_pool = ci->td_pool;
  1404. hwep->ep.name = hwep->name;
  1405. hwep->ep.ops = &usb_ep_ops;
  1406. if (i == 0) {
  1407. hwep->ep.caps.type_control = true;
  1408. } else {
  1409. hwep->ep.caps.type_iso = true;
  1410. hwep->ep.caps.type_bulk = true;
  1411. hwep->ep.caps.type_int = true;
  1412. }
  1413. if (j == TX)
  1414. hwep->ep.caps.dir_in = true;
  1415. else
  1416. hwep->ep.caps.dir_out = true;
  1417. /*
  1418. * for ep0: maxP defined in desc, for other
  1419. * eps, maxP is set by epautoconfig() called
  1420. * by gadget layer
  1421. */
  1422. usb_ep_set_maxpacket_limit(&hwep->ep, (unsigned short)~0);
  1423. INIT_LIST_HEAD(&hwep->qh.queue);
  1424. hwep->qh.ptr = dma_pool_zalloc(ci->qh_pool, GFP_KERNEL,
  1425. &hwep->qh.dma);
  1426. if (hwep->qh.ptr == NULL)
  1427. retval = -ENOMEM;
  1428. /*
  1429. * set up shorthands for ep0 out and in endpoints,
  1430. * don't add to gadget's ep_list
  1431. */
  1432. if (i == 0) {
  1433. if (j == RX)
  1434. ci->ep0out = hwep;
  1435. else
  1436. ci->ep0in = hwep;
  1437. usb_ep_set_maxpacket_limit(&hwep->ep, CTRL_PAYLOAD_MAX);
  1438. continue;
  1439. }
  1440. list_add_tail(&hwep->ep.ep_list, &ci->gadget.ep_list);
  1441. }
  1442. return retval;
  1443. }
  1444. static void destroy_eps(struct ci_hdrc *ci)
  1445. {
  1446. int i;
  1447. for (i = 0; i < ci->hw_ep_max; i++) {
  1448. struct ci_hw_ep *hwep = &ci->ci_hw_ep[i];
  1449. if (hwep->pending_td)
  1450. free_pending_td(hwep);
  1451. dma_pool_free(ci->qh_pool, hwep->qh.ptr, hwep->qh.dma);
  1452. }
  1453. }
  1454. /**
  1455. * ci_udc_start: register a gadget driver
  1456. * @gadget: our gadget
  1457. * @driver: the driver being registered
  1458. *
  1459. * Interrupts are enabled here.
  1460. */
  1461. static int ci_udc_start(struct usb_gadget *gadget,
  1462. struct usb_gadget_driver *driver)
  1463. {
  1464. struct ci_hdrc *ci = container_of(gadget, struct ci_hdrc, gadget);
  1465. int retval = -ENOMEM;
  1466. if (driver->disconnect == NULL)
  1467. return -EINVAL;
  1468. ci->ep0out->ep.desc = &ctrl_endpt_out_desc;
  1469. retval = usb_ep_enable(&ci->ep0out->ep);
  1470. if (retval)
  1471. return retval;
  1472. ci->ep0in->ep.desc = &ctrl_endpt_in_desc;
  1473. retval = usb_ep_enable(&ci->ep0in->ep);
  1474. if (retval)
  1475. return retval;
  1476. ci->driver = driver;
  1477. /* Start otg fsm for B-device */
  1478. if (ci_otg_is_fsm_mode(ci) && ci->fsm.id) {
  1479. ci_hdrc_otg_fsm_start(ci);
  1480. return retval;
  1481. }
  1482. pm_runtime_get_sync(&ci->gadget.dev);
  1483. if (ci->vbus_active) {
  1484. hw_device_reset(ci);
  1485. } else {
  1486. usb_udc_vbus_handler(&ci->gadget, false);
  1487. pm_runtime_put_sync(&ci->gadget.dev);
  1488. return retval;
  1489. }
  1490. retval = hw_device_state(ci, ci->ep0out->qh.dma);
  1491. if (retval)
  1492. pm_runtime_put_sync(&ci->gadget.dev);
  1493. return retval;
  1494. }
  1495. static void ci_udc_stop_for_otg_fsm(struct ci_hdrc *ci)
  1496. {
  1497. if (!ci_otg_is_fsm_mode(ci))
  1498. return;
  1499. mutex_lock(&ci->fsm.lock);
  1500. if (ci->fsm.otg->state == OTG_STATE_A_PERIPHERAL) {
  1501. ci->fsm.a_bidl_adis_tmout = 1;
  1502. ci_hdrc_otg_fsm_start(ci);
  1503. } else if (ci->fsm.otg->state == OTG_STATE_B_PERIPHERAL) {
  1504. ci->fsm.protocol = PROTO_UNDEF;
  1505. ci->fsm.otg->state = OTG_STATE_UNDEFINED;
  1506. }
  1507. mutex_unlock(&ci->fsm.lock);
  1508. }
  1509. /**
  1510. * ci_udc_stop: unregister a gadget driver
  1511. */
  1512. static int ci_udc_stop(struct usb_gadget *gadget)
  1513. {
  1514. struct ci_hdrc *ci = container_of(gadget, struct ci_hdrc, gadget);
  1515. unsigned long flags;
  1516. spin_lock_irqsave(&ci->lock, flags);
  1517. if (ci->vbus_active) {
  1518. hw_device_state(ci, 0);
  1519. spin_unlock_irqrestore(&ci->lock, flags);
  1520. if (ci->platdata->notify_event)
  1521. ci->platdata->notify_event(ci,
  1522. CI_HDRC_CONTROLLER_STOPPED_EVENT);
  1523. _gadget_stop_activity(&ci->gadget);
  1524. spin_lock_irqsave(&ci->lock, flags);
  1525. pm_runtime_put(&ci->gadget.dev);
  1526. }
  1527. ci->driver = NULL;
  1528. spin_unlock_irqrestore(&ci->lock, flags);
  1529. ci_udc_stop_for_otg_fsm(ci);
  1530. return 0;
  1531. }
  1532. /******************************************************************************
  1533. * BUS block
  1534. *****************************************************************************/
  1535. /**
  1536. * udc_irq: ci interrupt handler
  1537. *
  1538. * This function returns IRQ_HANDLED if the IRQ has been handled
  1539. * It locks access to registers
  1540. */
  1541. static irqreturn_t udc_irq(struct ci_hdrc *ci)
  1542. {
  1543. irqreturn_t retval;
  1544. u32 intr;
  1545. if (ci == NULL)
  1546. return IRQ_HANDLED;
  1547. spin_lock(&ci->lock);
  1548. if (ci->platdata->flags & CI_HDRC_REGS_SHARED) {
  1549. if (hw_read(ci, OP_USBMODE, USBMODE_CM) !=
  1550. USBMODE_CM_DC) {
  1551. spin_unlock(&ci->lock);
  1552. return IRQ_NONE;
  1553. }
  1554. }
  1555. intr = hw_test_and_clear_intr_active(ci);
  1556. if (intr) {
  1557. /* order defines priority - do NOT change it */
  1558. if (USBi_URI & intr)
  1559. isr_reset_handler(ci);
  1560. if (USBi_PCI & intr) {
  1561. ci->gadget.speed = hw_port_is_high_speed(ci) ?
  1562. USB_SPEED_HIGH : USB_SPEED_FULL;
  1563. if (ci->suspended) {
  1564. if (ci->driver->resume) {
  1565. spin_unlock(&ci->lock);
  1566. ci->driver->resume(&ci->gadget);
  1567. spin_lock(&ci->lock);
  1568. }
  1569. ci->suspended = 0;
  1570. usb_gadget_set_state(&ci->gadget,
  1571. ci->resume_state);
  1572. }
  1573. }
  1574. if (USBi_UI & intr)
  1575. isr_tr_complete_handler(ci);
  1576. if ((USBi_SLI & intr) && !(ci->suspended)) {
  1577. ci->suspended = 1;
  1578. ci->resume_state = ci->gadget.state;
  1579. if (ci->gadget.speed != USB_SPEED_UNKNOWN &&
  1580. ci->driver->suspend) {
  1581. spin_unlock(&ci->lock);
  1582. ci->driver->suspend(&ci->gadget);
  1583. spin_lock(&ci->lock);
  1584. }
  1585. usb_gadget_set_state(&ci->gadget,
  1586. USB_STATE_SUSPENDED);
  1587. }
  1588. retval = IRQ_HANDLED;
  1589. } else {
  1590. retval = IRQ_NONE;
  1591. }
  1592. spin_unlock(&ci->lock);
  1593. return retval;
  1594. }
  1595. /**
  1596. * udc_start: initialize gadget role
  1597. * @ci: chipidea controller
  1598. */
  1599. static int udc_start(struct ci_hdrc *ci)
  1600. {
  1601. struct device *dev = ci->dev;
  1602. struct usb_otg_caps *otg_caps = &ci->platdata->ci_otg_caps;
  1603. int retval = 0;
  1604. ci->gadget.ops = &usb_gadget_ops;
  1605. ci->gadget.speed = USB_SPEED_UNKNOWN;
  1606. ci->gadget.max_speed = USB_SPEED_HIGH;
  1607. ci->gadget.name = ci->platdata->name;
  1608. ci->gadget.otg_caps = otg_caps;
  1609. if (ci->platdata->flags & CI_HDRC_REQUIRES_ALIGNED_DMA)
  1610. ci->gadget.quirk_avoids_skb_reserve = 1;
  1611. if (ci->is_otg && (otg_caps->hnp_support || otg_caps->srp_support ||
  1612. otg_caps->adp_support))
  1613. ci->gadget.is_otg = 1;
  1614. INIT_LIST_HEAD(&ci->gadget.ep_list);
  1615. /* alloc resources */
  1616. ci->qh_pool = dma_pool_create("ci_hw_qh", dev->parent,
  1617. sizeof(struct ci_hw_qh),
  1618. 64, CI_HDRC_PAGE_SIZE);
  1619. if (ci->qh_pool == NULL)
  1620. return -ENOMEM;
  1621. ci->td_pool = dma_pool_create("ci_hw_td", dev->parent,
  1622. sizeof(struct ci_hw_td),
  1623. 64, CI_HDRC_PAGE_SIZE);
  1624. if (ci->td_pool == NULL) {
  1625. retval = -ENOMEM;
  1626. goto free_qh_pool;
  1627. }
  1628. retval = init_eps(ci);
  1629. if (retval)
  1630. goto free_pools;
  1631. ci->gadget.ep0 = &ci->ep0in->ep;
  1632. retval = usb_add_gadget_udc(dev, &ci->gadget);
  1633. if (retval)
  1634. goto destroy_eps;
  1635. pm_runtime_no_callbacks(&ci->gadget.dev);
  1636. pm_runtime_enable(&ci->gadget.dev);
  1637. return retval;
  1638. destroy_eps:
  1639. destroy_eps(ci);
  1640. free_pools:
  1641. dma_pool_destroy(ci->td_pool);
  1642. free_qh_pool:
  1643. dma_pool_destroy(ci->qh_pool);
  1644. return retval;
  1645. }
  1646. /**
  1647. * ci_hdrc_gadget_destroy: parent remove must call this to remove UDC
  1648. *
  1649. * No interrupts active, the IRQ has been released
  1650. */
  1651. void ci_hdrc_gadget_destroy(struct ci_hdrc *ci)
  1652. {
  1653. if (!ci->roles[CI_ROLE_GADGET])
  1654. return;
  1655. usb_del_gadget_udc(&ci->gadget);
  1656. destroy_eps(ci);
  1657. dma_pool_destroy(ci->td_pool);
  1658. dma_pool_destroy(ci->qh_pool);
  1659. }
  1660. static int udc_id_switch_for_device(struct ci_hdrc *ci)
  1661. {
  1662. if (ci->platdata->pins_device)
  1663. pinctrl_select_state(ci->platdata->pctl,
  1664. ci->platdata->pins_device);
  1665. if (ci->is_otg)
  1666. /* Clear and enable BSV irq */
  1667. hw_write_otgsc(ci, OTGSC_BSVIS | OTGSC_BSVIE,
  1668. OTGSC_BSVIS | OTGSC_BSVIE);
  1669. return 0;
  1670. }
  1671. static void udc_id_switch_for_host(struct ci_hdrc *ci)
  1672. {
  1673. /*
  1674. * host doesn't care B_SESSION_VALID event
  1675. * so clear and disbale BSV irq
  1676. */
  1677. if (ci->is_otg)
  1678. hw_write_otgsc(ci, OTGSC_BSVIE | OTGSC_BSVIS, OTGSC_BSVIS);
  1679. ci->vbus_active = 0;
  1680. if (ci->platdata->pins_device && ci->platdata->pins_default)
  1681. pinctrl_select_state(ci->platdata->pctl,
  1682. ci->platdata->pins_default);
  1683. }
  1684. /**
  1685. * ci_hdrc_gadget_init - initialize device related bits
  1686. * ci: the controller
  1687. *
  1688. * This function initializes the gadget, if the device is "device capable".
  1689. */
  1690. int ci_hdrc_gadget_init(struct ci_hdrc *ci)
  1691. {
  1692. struct ci_role_driver *rdrv;
  1693. int ret;
  1694. if (!hw_read(ci, CAP_DCCPARAMS, DCCPARAMS_DC))
  1695. return -ENXIO;
  1696. rdrv = devm_kzalloc(ci->dev, sizeof(*rdrv), GFP_KERNEL);
  1697. if (!rdrv)
  1698. return -ENOMEM;
  1699. rdrv->start = udc_id_switch_for_device;
  1700. rdrv->stop = udc_id_switch_for_host;
  1701. rdrv->irq = udc_irq;
  1702. rdrv->name = "gadget";
  1703. ret = udc_start(ci);
  1704. if (!ret)
  1705. ci->roles[CI_ROLE_GADGET] = rdrv;
  1706. return ret;
  1707. }