host.c 6.3 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * host.c - ChipIdea USB host controller driver
  4. *
  5. * Copyright (c) 2012 Intel Corporation
  6. *
  7. * Author: Alexander Shishkin
  8. */
  9. #include <linux/kernel.h>
  10. #include <linux/io.h>
  11. #include <linux/usb.h>
  12. #include <linux/usb/hcd.h>
  13. #include <linux/usb/chipidea.h>
  14. #include <linux/regulator/consumer.h>
  15. #include <linux/pinctrl/consumer.h>
  16. #include "../host/ehci.h"
  17. #include "ci.h"
  18. #include "bits.h"
  19. #include "host.h"
  20. static struct hc_driver __read_mostly ci_ehci_hc_driver;
  21. static int (*orig_bus_suspend)(struct usb_hcd *hcd);
  22. struct ehci_ci_priv {
  23. struct regulator *reg_vbus;
  24. };
  25. static int ehci_ci_portpower(struct usb_hcd *hcd, int portnum, bool enable)
  26. {
  27. struct ehci_hcd *ehci = hcd_to_ehci(hcd);
  28. struct ehci_ci_priv *priv = (struct ehci_ci_priv *)ehci->priv;
  29. struct device *dev = hcd->self.controller;
  30. struct ci_hdrc *ci = dev_get_drvdata(dev);
  31. int ret = 0;
  32. int port = HCS_N_PORTS(ehci->hcs_params);
  33. if (priv->reg_vbus) {
  34. if (port > 1) {
  35. dev_warn(dev,
  36. "Not support multi-port regulator control\n");
  37. return 0;
  38. }
  39. if (enable)
  40. ret = regulator_enable(priv->reg_vbus);
  41. else
  42. ret = regulator_disable(priv->reg_vbus);
  43. if (ret) {
  44. dev_err(dev,
  45. "Failed to %s vbus regulator, ret=%d\n",
  46. enable ? "enable" : "disable", ret);
  47. return ret;
  48. }
  49. }
  50. if (enable && (ci->platdata->phy_mode == USBPHY_INTERFACE_MODE_HSIC)) {
  51. /*
  52. * Marvell 28nm HSIC PHY requires forcing the port to HS mode.
  53. * As HSIC is always HS, this should be safe for others.
  54. */
  55. hw_port_test_set(ci, 5);
  56. hw_port_test_set(ci, 0);
  57. }
  58. return 0;
  59. };
  60. static int ehci_ci_reset(struct usb_hcd *hcd)
  61. {
  62. struct device *dev = hcd->self.controller;
  63. struct ci_hdrc *ci = dev_get_drvdata(dev);
  64. struct ehci_hcd *ehci = hcd_to_ehci(hcd);
  65. int ret;
  66. ret = ehci_setup(hcd);
  67. if (ret)
  68. return ret;
  69. ehci->need_io_watchdog = 0;
  70. if (ci->platdata->notify_event) {
  71. ret = ci->platdata->notify_event(ci,
  72. CI_HDRC_CONTROLLER_RESET_EVENT);
  73. if (ret)
  74. return ret;
  75. }
  76. ci_platform_configure(ci);
  77. return ret;
  78. }
  79. static const struct ehci_driver_overrides ehci_ci_overrides = {
  80. .extra_priv_size = sizeof(struct ehci_ci_priv),
  81. .port_power = ehci_ci_portpower,
  82. .reset = ehci_ci_reset,
  83. };
  84. static irqreturn_t host_irq(struct ci_hdrc *ci)
  85. {
  86. return usb_hcd_irq(ci->irq, ci->hcd);
  87. }
  88. static int host_start(struct ci_hdrc *ci)
  89. {
  90. struct usb_hcd *hcd;
  91. struct ehci_hcd *ehci;
  92. struct ehci_ci_priv *priv;
  93. int ret;
  94. if (usb_disabled())
  95. return -ENODEV;
  96. hcd = __usb_create_hcd(&ci_ehci_hc_driver, ci->dev->parent,
  97. ci->dev, dev_name(ci->dev), NULL);
  98. if (!hcd)
  99. return -ENOMEM;
  100. dev_set_drvdata(ci->dev, ci);
  101. hcd->rsrc_start = ci->hw_bank.phys;
  102. hcd->rsrc_len = ci->hw_bank.size;
  103. hcd->regs = ci->hw_bank.abs;
  104. hcd->has_tt = 1;
  105. hcd->power_budget = ci->platdata->power_budget;
  106. hcd->tpl_support = ci->platdata->tpl_support;
  107. if (ci->phy || ci->usb_phy) {
  108. hcd->skip_phy_initialization = 1;
  109. if (ci->usb_phy)
  110. hcd->usb_phy = ci->usb_phy;
  111. }
  112. ehci = hcd_to_ehci(hcd);
  113. ehci->caps = ci->hw_bank.cap;
  114. ehci->has_hostpc = ci->hw_bank.lpm;
  115. ehci->has_tdi_phy_lpm = ci->hw_bank.lpm;
  116. ehci->imx28_write_fix = ci->imx28_write_fix;
  117. priv = (struct ehci_ci_priv *)ehci->priv;
  118. priv->reg_vbus = NULL;
  119. if (ci->platdata->reg_vbus && !ci_otg_is_fsm_mode(ci)) {
  120. if (ci->platdata->flags & CI_HDRC_TURN_VBUS_EARLY_ON) {
  121. ret = regulator_enable(ci->platdata->reg_vbus);
  122. if (ret) {
  123. dev_err(ci->dev,
  124. "Failed to enable vbus regulator, ret=%d\n",
  125. ret);
  126. goto put_hcd;
  127. }
  128. } else {
  129. priv->reg_vbus = ci->platdata->reg_vbus;
  130. }
  131. }
  132. if (ci->platdata->pins_host)
  133. pinctrl_select_state(ci->platdata->pctl,
  134. ci->platdata->pins_host);
  135. ret = usb_add_hcd(hcd, 0, 0);
  136. if (ret) {
  137. goto disable_reg;
  138. } else {
  139. struct usb_otg *otg = &ci->otg;
  140. ci->hcd = hcd;
  141. if (ci_otg_is_fsm_mode(ci)) {
  142. otg->host = &hcd->self;
  143. hcd->self.otg_port = 1;
  144. }
  145. }
  146. return ret;
  147. disable_reg:
  148. if (ci->platdata->reg_vbus && !ci_otg_is_fsm_mode(ci) &&
  149. (ci->platdata->flags & CI_HDRC_TURN_VBUS_EARLY_ON))
  150. regulator_disable(ci->platdata->reg_vbus);
  151. put_hcd:
  152. usb_put_hcd(hcd);
  153. return ret;
  154. }
  155. static void host_stop(struct ci_hdrc *ci)
  156. {
  157. struct usb_hcd *hcd = ci->hcd;
  158. if (hcd) {
  159. if (ci->platdata->notify_event)
  160. ci->platdata->notify_event(ci,
  161. CI_HDRC_CONTROLLER_STOPPED_EVENT);
  162. usb_remove_hcd(hcd);
  163. ci->role = CI_ROLE_END;
  164. synchronize_irq(ci->irq);
  165. usb_put_hcd(hcd);
  166. if (ci->platdata->reg_vbus && !ci_otg_is_fsm_mode(ci) &&
  167. (ci->platdata->flags & CI_HDRC_TURN_VBUS_EARLY_ON))
  168. regulator_disable(ci->platdata->reg_vbus);
  169. }
  170. ci->hcd = NULL;
  171. ci->otg.host = NULL;
  172. if (ci->platdata->pins_host && ci->platdata->pins_default)
  173. pinctrl_select_state(ci->platdata->pctl,
  174. ci->platdata->pins_default);
  175. }
  176. void ci_hdrc_host_destroy(struct ci_hdrc *ci)
  177. {
  178. if (ci->role == CI_ROLE_HOST && ci->hcd)
  179. host_stop(ci);
  180. }
  181. static int ci_ehci_bus_suspend(struct usb_hcd *hcd)
  182. {
  183. struct ehci_hcd *ehci = hcd_to_ehci(hcd);
  184. int port;
  185. u32 tmp;
  186. int ret = orig_bus_suspend(hcd);
  187. if (ret)
  188. return ret;
  189. port = HCS_N_PORTS(ehci->hcs_params);
  190. while (port--) {
  191. u32 __iomem *reg = &ehci->regs->port_status[port];
  192. u32 portsc = ehci_readl(ehci, reg);
  193. if (portsc & PORT_CONNECT) {
  194. /*
  195. * For chipidea, the resume signal will be ended
  196. * automatically, so for remote wakeup case, the
  197. * usbcmd.rs may not be set before the resume has
  198. * ended if other resume paths consumes too much
  199. * time (~24ms), in that case, the SOF will not
  200. * send out within 3ms after resume ends, then the
  201. * high speed device will enter full speed mode.
  202. */
  203. tmp = ehci_readl(ehci, &ehci->regs->command);
  204. tmp |= CMD_RUN;
  205. ehci_writel(ehci, tmp, &ehci->regs->command);
  206. /*
  207. * It needs a short delay between set RS bit and PHCD.
  208. */
  209. usleep_range(150, 200);
  210. break;
  211. }
  212. }
  213. return 0;
  214. }
  215. int ci_hdrc_host_init(struct ci_hdrc *ci)
  216. {
  217. struct ci_role_driver *rdrv;
  218. if (!hw_read(ci, CAP_DCCPARAMS, DCCPARAMS_HC))
  219. return -ENXIO;
  220. rdrv = devm_kzalloc(ci->dev, sizeof(struct ci_role_driver), GFP_KERNEL);
  221. if (!rdrv)
  222. return -ENOMEM;
  223. rdrv->start = host_start;
  224. rdrv->stop = host_stop;
  225. rdrv->irq = host_irq;
  226. rdrv->name = "host";
  227. ci->roles[CI_ROLE_HOST] = rdrv;
  228. return 0;
  229. }
  230. void ci_hdrc_host_driver_init(void)
  231. {
  232. ehci_init_driver(&ci_ehci_hc_driver, &ehci_ci_overrides);
  233. orig_bus_suspend = ci_ehci_hc_driver.bus_suspend;
  234. ci_ehci_hc_driver.bus_suspend = ci_ehci_bus_suspend;
  235. }