cxgbit.h 8.1 KB

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  1. /*
  2. * Copyright (c) 2016 Chelsio Communications, Inc.
  3. *
  4. * This program is free software; you can redistribute it and/or modify
  5. * it under the terms of the GNU General Public License version 2 as
  6. * published by the Free Software Foundation.
  7. */
  8. #ifndef __CXGBIT_H__
  9. #define __CXGBIT_H__
  10. #include <linux/mutex.h>
  11. #include <linux/list.h>
  12. #include <linux/spinlock.h>
  13. #include <linux/idr.h>
  14. #include <linux/completion.h>
  15. #include <linux/netdevice.h>
  16. #include <linux/sched.h>
  17. #include <linux/pci.h>
  18. #include <linux/dma-mapping.h>
  19. #include <linux/inet.h>
  20. #include <linux/wait.h>
  21. #include <linux/kref.h>
  22. #include <linux/timer.h>
  23. #include <linux/io.h>
  24. #include <asm/byteorder.h>
  25. #include <net/net_namespace.h>
  26. #include <target/iscsi/iscsi_transport.h>
  27. #include <iscsi_target_parameters.h>
  28. #include <iscsi_target_login.h>
  29. #include "t4_regs.h"
  30. #include "t4_msg.h"
  31. #include "cxgb4.h"
  32. #include "cxgb4_uld.h"
  33. #include "l2t.h"
  34. #include "libcxgb_ppm.h"
  35. #include "cxgbit_lro.h"
  36. extern struct mutex cdev_list_lock;
  37. extern struct list_head cdev_list_head;
  38. struct cxgbit_np;
  39. struct cxgbit_sock;
  40. struct cxgbit_cmd {
  41. struct scatterlist sg;
  42. struct cxgbi_task_tag_info ttinfo;
  43. bool setup_ddp;
  44. bool release;
  45. };
  46. #define CXGBIT_MAX_ISO_PAYLOAD \
  47. min_t(u32, MAX_SKB_FRAGS * PAGE_SIZE, 65535)
  48. struct cxgbit_iso_info {
  49. u8 flags;
  50. u32 mpdu;
  51. u32 len;
  52. u32 burst_len;
  53. };
  54. enum cxgbit_skcb_flags {
  55. SKCBF_TX_NEED_HDR = (1 << 0), /* packet needs a header */
  56. SKCBF_TX_FLAG_COMPL = (1 << 1), /* wr completion flag */
  57. SKCBF_TX_ISO = (1 << 2), /* iso cpl in tx skb */
  58. SKCBF_RX_LRO = (1 << 3), /* lro skb */
  59. };
  60. struct cxgbit_skb_rx_cb {
  61. u8 opcode;
  62. void *pdu_cb;
  63. void (*backlog_fn)(struct cxgbit_sock *, struct sk_buff *);
  64. };
  65. struct cxgbit_skb_tx_cb {
  66. u8 submode;
  67. u32 extra_len;
  68. };
  69. union cxgbit_skb_cb {
  70. struct {
  71. u8 flags;
  72. union {
  73. struct cxgbit_skb_tx_cb tx;
  74. struct cxgbit_skb_rx_cb rx;
  75. };
  76. };
  77. struct {
  78. /* This member must be first. */
  79. struct l2t_skb_cb l2t;
  80. struct sk_buff *wr_next;
  81. };
  82. };
  83. #define CXGBIT_SKB_CB(skb) ((union cxgbit_skb_cb *)&((skb)->cb[0]))
  84. #define cxgbit_skcb_flags(skb) (CXGBIT_SKB_CB(skb)->flags)
  85. #define cxgbit_skcb_submode(skb) (CXGBIT_SKB_CB(skb)->tx.submode)
  86. #define cxgbit_skcb_tx_wr_next(skb) (CXGBIT_SKB_CB(skb)->wr_next)
  87. #define cxgbit_skcb_tx_extralen(skb) (CXGBIT_SKB_CB(skb)->tx.extra_len)
  88. #define cxgbit_skcb_rx_opcode(skb) (CXGBIT_SKB_CB(skb)->rx.opcode)
  89. #define cxgbit_skcb_rx_backlog_fn(skb) (CXGBIT_SKB_CB(skb)->rx.backlog_fn)
  90. #define cxgbit_rx_pdu_cb(skb) (CXGBIT_SKB_CB(skb)->rx.pdu_cb)
  91. static inline void *cplhdr(struct sk_buff *skb)
  92. {
  93. return skb->data;
  94. }
  95. enum cxgbit_cdev_flags {
  96. CDEV_STATE_UP = 0,
  97. CDEV_ISO_ENABLE,
  98. CDEV_DDP_ENABLE,
  99. };
  100. #define NP_INFO_HASH_SIZE 32
  101. struct np_info {
  102. struct np_info *next;
  103. struct cxgbit_np *cnp;
  104. unsigned int stid;
  105. };
  106. struct cxgbit_list_head {
  107. struct list_head list;
  108. /* device lock */
  109. spinlock_t lock;
  110. };
  111. struct cxgbit_device {
  112. struct list_head list;
  113. struct cxgb4_lld_info lldi;
  114. struct np_info *np_hash_tab[NP_INFO_HASH_SIZE];
  115. /* np lock */
  116. spinlock_t np_lock;
  117. u8 selectq[MAX_NPORTS][2];
  118. struct cxgbit_list_head cskq;
  119. u32 mdsl;
  120. struct kref kref;
  121. unsigned long flags;
  122. };
  123. struct cxgbit_wr_wait {
  124. struct completion completion;
  125. int ret;
  126. };
  127. enum cxgbit_csk_state {
  128. CSK_STATE_IDLE = 0,
  129. CSK_STATE_LISTEN,
  130. CSK_STATE_CONNECTING,
  131. CSK_STATE_ESTABLISHED,
  132. CSK_STATE_ABORTING,
  133. CSK_STATE_CLOSING,
  134. CSK_STATE_MORIBUND,
  135. CSK_STATE_DEAD,
  136. };
  137. enum cxgbit_csk_flags {
  138. CSK_TX_DATA_SENT = 0,
  139. CSK_LOGIN_PDU_DONE,
  140. CSK_LOGIN_DONE,
  141. CSK_DDP_ENABLE,
  142. CSK_ABORT_RPL_WAIT,
  143. };
  144. struct cxgbit_sock_common {
  145. struct cxgbit_device *cdev;
  146. struct sockaddr_storage local_addr;
  147. struct sockaddr_storage remote_addr;
  148. struct cxgbit_wr_wait wr_wait;
  149. enum cxgbit_csk_state state;
  150. unsigned long flags;
  151. };
  152. struct cxgbit_np {
  153. struct cxgbit_sock_common com;
  154. wait_queue_head_t accept_wait;
  155. struct iscsi_np *np;
  156. struct completion accept_comp;
  157. struct list_head np_accept_list;
  158. /* np accept lock */
  159. spinlock_t np_accept_lock;
  160. struct kref kref;
  161. unsigned int stid;
  162. };
  163. struct cxgbit_sock {
  164. struct cxgbit_sock_common com;
  165. struct cxgbit_np *cnp;
  166. struct iscsi_conn *conn;
  167. struct l2t_entry *l2t;
  168. struct dst_entry *dst;
  169. struct list_head list;
  170. struct sk_buff_head rxq;
  171. struct sk_buff_head txq;
  172. struct sk_buff_head ppodq;
  173. struct sk_buff_head backlogq;
  174. struct sk_buff_head skbq;
  175. struct sk_buff *wr_pending_head;
  176. struct sk_buff *wr_pending_tail;
  177. struct sk_buff *skb;
  178. struct sk_buff *lro_skb;
  179. struct sk_buff *lro_hskb;
  180. struct list_head accept_node;
  181. /* socket lock */
  182. spinlock_t lock;
  183. wait_queue_head_t waitq;
  184. wait_queue_head_t ack_waitq;
  185. bool lock_owner;
  186. struct kref kref;
  187. u32 max_iso_npdu;
  188. u32 wr_cred;
  189. u32 wr_una_cred;
  190. u32 wr_max_cred;
  191. u32 snd_una;
  192. u32 tid;
  193. u32 snd_nxt;
  194. u32 rcv_nxt;
  195. u32 smac_idx;
  196. u32 tx_chan;
  197. u32 mtu;
  198. u32 write_seq;
  199. u32 rx_credits;
  200. u32 snd_win;
  201. u32 rcv_win;
  202. u16 mss;
  203. u16 emss;
  204. u16 plen;
  205. u16 rss_qid;
  206. u16 txq_idx;
  207. u16 ctrlq_idx;
  208. u8 tos;
  209. u8 port_id;
  210. #define CXGBIT_SUBMODE_HCRC 0x1
  211. #define CXGBIT_SUBMODE_DCRC 0x2
  212. u8 submode;
  213. #ifdef CONFIG_CHELSIO_T4_DCB
  214. u8 dcb_priority;
  215. #endif
  216. u8 snd_wscale;
  217. };
  218. void _cxgbit_free_cdev(struct kref *kref);
  219. void _cxgbit_free_csk(struct kref *kref);
  220. void _cxgbit_free_cnp(struct kref *kref);
  221. static inline void cxgbit_get_cdev(struct cxgbit_device *cdev)
  222. {
  223. kref_get(&cdev->kref);
  224. }
  225. static inline void cxgbit_put_cdev(struct cxgbit_device *cdev)
  226. {
  227. kref_put(&cdev->kref, _cxgbit_free_cdev);
  228. }
  229. static inline void cxgbit_get_csk(struct cxgbit_sock *csk)
  230. {
  231. kref_get(&csk->kref);
  232. }
  233. static inline void cxgbit_put_csk(struct cxgbit_sock *csk)
  234. {
  235. kref_put(&csk->kref, _cxgbit_free_csk);
  236. }
  237. static inline void cxgbit_get_cnp(struct cxgbit_np *cnp)
  238. {
  239. kref_get(&cnp->kref);
  240. }
  241. static inline void cxgbit_put_cnp(struct cxgbit_np *cnp)
  242. {
  243. kref_put(&cnp->kref, _cxgbit_free_cnp);
  244. }
  245. static inline void cxgbit_sock_reset_wr_list(struct cxgbit_sock *csk)
  246. {
  247. csk->wr_pending_tail = NULL;
  248. csk->wr_pending_head = NULL;
  249. }
  250. static inline struct sk_buff *cxgbit_sock_peek_wr(const struct cxgbit_sock *csk)
  251. {
  252. return csk->wr_pending_head;
  253. }
  254. static inline void
  255. cxgbit_sock_enqueue_wr(struct cxgbit_sock *csk, struct sk_buff *skb)
  256. {
  257. cxgbit_skcb_tx_wr_next(skb) = NULL;
  258. skb_get(skb);
  259. if (!csk->wr_pending_head)
  260. csk->wr_pending_head = skb;
  261. else
  262. cxgbit_skcb_tx_wr_next(csk->wr_pending_tail) = skb;
  263. csk->wr_pending_tail = skb;
  264. }
  265. static inline struct sk_buff *cxgbit_sock_dequeue_wr(struct cxgbit_sock *csk)
  266. {
  267. struct sk_buff *skb = csk->wr_pending_head;
  268. if (likely(skb)) {
  269. csk->wr_pending_head = cxgbit_skcb_tx_wr_next(skb);
  270. cxgbit_skcb_tx_wr_next(skb) = NULL;
  271. }
  272. return skb;
  273. }
  274. typedef void (*cxgbit_cplhandler_func)(struct cxgbit_device *,
  275. struct sk_buff *);
  276. int cxgbit_setup_np(struct iscsi_np *, struct sockaddr_storage *);
  277. int cxgbit_setup_conn_digest(struct cxgbit_sock *);
  278. int cxgbit_accept_np(struct iscsi_np *, struct iscsi_conn *);
  279. void cxgbit_free_np(struct iscsi_np *);
  280. void cxgbit_abort_conn(struct cxgbit_sock *csk);
  281. void cxgbit_free_conn(struct iscsi_conn *);
  282. extern cxgbit_cplhandler_func cxgbit_cplhandlers[NUM_CPL_CMDS];
  283. int cxgbit_get_login_rx(struct iscsi_conn *, struct iscsi_login *);
  284. int cxgbit_rx_data_ack(struct cxgbit_sock *);
  285. int cxgbit_l2t_send(struct cxgbit_device *, struct sk_buff *,
  286. struct l2t_entry *);
  287. void cxgbit_push_tx_frames(struct cxgbit_sock *);
  288. int cxgbit_put_login_tx(struct iscsi_conn *, struct iscsi_login *, u32);
  289. int cxgbit_xmit_pdu(struct iscsi_conn *, struct iscsi_cmd *,
  290. struct iscsi_datain_req *, const void *, u32);
  291. void cxgbit_get_r2t_ttt(struct iscsi_conn *, struct iscsi_cmd *,
  292. struct iscsi_r2t *);
  293. u32 cxgbit_send_tx_flowc_wr(struct cxgbit_sock *);
  294. int cxgbit_ofld_send(struct cxgbit_device *, struct sk_buff *);
  295. void cxgbit_get_rx_pdu(struct iscsi_conn *);
  296. int cxgbit_validate_params(struct iscsi_conn *);
  297. struct cxgbit_device *cxgbit_find_device(struct net_device *, u8 *);
  298. /* DDP */
  299. int cxgbit_ddp_init(struct cxgbit_device *);
  300. int cxgbit_setup_conn_pgidx(struct cxgbit_sock *, u32);
  301. int cxgbit_reserve_ttt(struct cxgbit_sock *, struct iscsi_cmd *);
  302. void cxgbit_release_cmd(struct iscsi_conn *, struct iscsi_cmd *);
  303. static inline
  304. struct cxgbi_ppm *cdev2ppm(struct cxgbit_device *cdev)
  305. {
  306. return (struct cxgbi_ppm *)(*cdev->lldi.iscsi_ppm);
  307. }
  308. #endif /* __CXGBIT_H__ */