bus.c 24 KB

12345678910111213141516171819202122232425262728293031323334353637383940414243444546474849505152535455565758596061626364656667686970717273747576777879808182838485868788899091929394959697989910010110210310410510610710810911011111211311411511611711811912012112212312412512612712812913013113213313413513613713813914014114214314414514614714814915015115215315415515615715815916016116216316416516616716816917017117217317417517617717817918018118218318418518618718818919019119219319419519619719819920020120220320420520620720820921021121221321421521621721821922022122222322422522622722822923023123223323423523623723823924024124224324424524624724824925025125225325425525625725825926026126226326426526626726826927027127227327427527627727827928028128228328428528628728828929029129229329429529629729829930030130230330430530630730830931031131231331431531631731831932032132232332432532632732832933033133233333433533633733833934034134234334434534634734834935035135235335435535635735835936036136236336436536636736836937037137237337437537637737837938038138238338438538638738838939039139239339439539639739839940040140240340440540640740840941041141241341441541641741841942042142242342442542642742842943043143243343443543643743843944044144244344444544644744844945045145245345445545645745845946046146246346446546646746846947047147247347447547647747847948048148248348448548648748848949049149249349449549649749849950050150250350450550650750850951051151251351451551651751851952052152252352452552652752852953053153253353453553653753853954054154254354454554654754854955055155255355455555655755855956056156256356456556656756856957057157257357457557657757857958058158258358458558658758858959059159259359459559659759859960060160260360460560660760860961061161261361461561661761861962062162262362462562662762862963063163263363463563663763863964064164264364464564664764864965065165265365465565665765865966066166266366466566666766866967067167267367467567667767867968068168268368468568668768868969069169269369469569669769869970070170270370470570670770870971071171271371471571671771871972072172272372472572672772872973073173273373473573673773873974074174274374474574674774874975075175275375475575675775875976076176276376476576676776876977077177277377477577677777877978078178278378478578678778878979079179279379479579679779879980080180280380480580680780880981081181281381481581681781881982082182282382482582682782882983083183283383483583683783883984084184284384484584684784884985085185285385485585685785885986086186286386486586686786886987087187287387487587687787887988088188288388488588688788888989089189289389489589689789889990090190290390490590690790890991091191291391491591691791891992092192292392492592692792892993093193293393493593693793893994094194294394494594694794894995095195295395495595695795895996096196296396496596696796896997097197297397497597697797897998098198298398498598698798898999099199299399499599699799899910001001100210031004100510061007100810091010101110121013101410151016101710181019102010211022102310241025102610271028102910301031103210331034103510361037103810391040104110421043104410451046
  1. // SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause)
  2. // Copyright(c) 2015-17 Intel Corporation.
  3. #include <linux/acpi.h>
  4. #include <linux/mod_devicetable.h>
  5. #include <linux/pm_runtime.h>
  6. #include <linux/soundwire/sdw_registers.h>
  7. #include <linux/soundwire/sdw.h>
  8. #include "bus.h"
  9. /**
  10. * sdw_add_bus_master() - add a bus Master instance
  11. * @bus: bus instance
  12. *
  13. * Initializes the bus instance, read properties and create child
  14. * devices.
  15. */
  16. int sdw_add_bus_master(struct sdw_bus *bus)
  17. {
  18. struct sdw_master_prop *prop = NULL;
  19. int ret;
  20. if (!bus->dev) {
  21. pr_err("SoundWire bus has no device");
  22. return -ENODEV;
  23. }
  24. if (!bus->ops) {
  25. dev_err(bus->dev, "SoundWire Bus ops are not set");
  26. return -EINVAL;
  27. }
  28. mutex_init(&bus->msg_lock);
  29. mutex_init(&bus->bus_lock);
  30. INIT_LIST_HEAD(&bus->slaves);
  31. INIT_LIST_HEAD(&bus->m_rt_list);
  32. /*
  33. * Initialize multi_link flag
  34. * TODO: populate this flag by reading property from FW node
  35. */
  36. bus->multi_link = false;
  37. if (bus->ops->read_prop) {
  38. ret = bus->ops->read_prop(bus);
  39. if (ret < 0) {
  40. dev_err(bus->dev, "Bus read properties failed:%d", ret);
  41. return ret;
  42. }
  43. }
  44. /*
  45. * Device numbers in SoundWire are 0 thru 15. Enumeration device
  46. * number (0), Broadcast device number (15), Group numbers (12 and
  47. * 13) and Master device number (14) are not used for assignment so
  48. * mask these and other higher bits.
  49. */
  50. /* Set higher order bits */
  51. *bus->assigned = ~GENMASK(SDW_BROADCAST_DEV_NUM, SDW_ENUM_DEV_NUM);
  52. /* Set enumuration device number and broadcast device number */
  53. set_bit(SDW_ENUM_DEV_NUM, bus->assigned);
  54. set_bit(SDW_BROADCAST_DEV_NUM, bus->assigned);
  55. /* Set group device numbers and master device number */
  56. set_bit(SDW_GROUP12_DEV_NUM, bus->assigned);
  57. set_bit(SDW_GROUP13_DEV_NUM, bus->assigned);
  58. set_bit(SDW_MASTER_DEV_NUM, bus->assigned);
  59. /*
  60. * SDW is an enumerable bus, but devices can be powered off. So,
  61. * they won't be able to report as present.
  62. *
  63. * Create Slave devices based on Slaves described in
  64. * the respective firmware (ACPI/DT)
  65. */
  66. if (IS_ENABLED(CONFIG_ACPI) && ACPI_HANDLE(bus->dev))
  67. ret = sdw_acpi_find_slaves(bus);
  68. else
  69. ret = -ENOTSUPP; /* No ACPI/DT so error out */
  70. if (ret) {
  71. dev_err(bus->dev, "Finding slaves failed:%d\n", ret);
  72. return ret;
  73. }
  74. /*
  75. * Initialize clock values based on Master properties. The max
  76. * frequency is read from max_freq property. Current assumption
  77. * is that the bus will start at highest clock frequency when
  78. * powered on.
  79. *
  80. * Default active bank will be 0 as out of reset the Slaves have
  81. * to start with bank 0 (Table 40 of Spec)
  82. */
  83. prop = &bus->prop;
  84. bus->params.max_dr_freq = prop->max_freq * SDW_DOUBLE_RATE_FACTOR;
  85. bus->params.curr_dr_freq = bus->params.max_dr_freq;
  86. bus->params.curr_bank = SDW_BANK0;
  87. bus->params.next_bank = SDW_BANK1;
  88. return 0;
  89. }
  90. EXPORT_SYMBOL(sdw_add_bus_master);
  91. static int sdw_delete_slave(struct device *dev, void *data)
  92. {
  93. struct sdw_slave *slave = dev_to_sdw_dev(dev);
  94. struct sdw_bus *bus = slave->bus;
  95. mutex_lock(&bus->bus_lock);
  96. if (slave->dev_num) /* clear dev_num if assigned */
  97. clear_bit(slave->dev_num, bus->assigned);
  98. list_del_init(&slave->node);
  99. mutex_unlock(&bus->bus_lock);
  100. device_unregister(dev);
  101. return 0;
  102. }
  103. /**
  104. * sdw_delete_bus_master() - delete the bus master instance
  105. * @bus: bus to be deleted
  106. *
  107. * Remove the instance, delete the child devices.
  108. */
  109. void sdw_delete_bus_master(struct sdw_bus *bus)
  110. {
  111. device_for_each_child(bus->dev, NULL, sdw_delete_slave);
  112. }
  113. EXPORT_SYMBOL(sdw_delete_bus_master);
  114. /*
  115. * SDW IO Calls
  116. */
  117. static inline int find_response_code(enum sdw_command_response resp)
  118. {
  119. switch (resp) {
  120. case SDW_CMD_OK:
  121. return 0;
  122. case SDW_CMD_IGNORED:
  123. return -ENODATA;
  124. case SDW_CMD_TIMEOUT:
  125. return -ETIMEDOUT;
  126. default:
  127. return -EIO;
  128. }
  129. }
  130. static inline int do_transfer(struct sdw_bus *bus, struct sdw_msg *msg)
  131. {
  132. int retry = bus->prop.err_threshold;
  133. enum sdw_command_response resp;
  134. int ret = 0, i;
  135. for (i = 0; i <= retry; i++) {
  136. resp = bus->ops->xfer_msg(bus, msg);
  137. ret = find_response_code(resp);
  138. /* if cmd is ok or ignored return */
  139. if (ret == 0 || ret == -ENODATA)
  140. return ret;
  141. }
  142. return ret;
  143. }
  144. static inline int do_transfer_defer(struct sdw_bus *bus,
  145. struct sdw_msg *msg, struct sdw_defer *defer)
  146. {
  147. int retry = bus->prop.err_threshold;
  148. enum sdw_command_response resp;
  149. int ret = 0, i;
  150. defer->msg = msg;
  151. defer->length = msg->len;
  152. init_completion(&defer->complete);
  153. for (i = 0; i <= retry; i++) {
  154. resp = bus->ops->xfer_msg_defer(bus, msg, defer);
  155. ret = find_response_code(resp);
  156. /* if cmd is ok or ignored return */
  157. if (ret == 0 || ret == -ENODATA)
  158. return ret;
  159. }
  160. return ret;
  161. }
  162. static int sdw_reset_page(struct sdw_bus *bus, u16 dev_num)
  163. {
  164. int retry = bus->prop.err_threshold;
  165. enum sdw_command_response resp;
  166. int ret = 0, i;
  167. for (i = 0; i <= retry; i++) {
  168. resp = bus->ops->reset_page_addr(bus, dev_num);
  169. ret = find_response_code(resp);
  170. /* if cmd is ok or ignored return */
  171. if (ret == 0 || ret == -ENODATA)
  172. return ret;
  173. }
  174. return ret;
  175. }
  176. /**
  177. * sdw_transfer() - Synchronous transfer message to a SDW Slave device
  178. * @bus: SDW bus
  179. * @msg: SDW message to be xfered
  180. */
  181. int sdw_transfer(struct sdw_bus *bus, struct sdw_msg *msg)
  182. {
  183. int ret;
  184. mutex_lock(&bus->msg_lock);
  185. ret = do_transfer(bus, msg);
  186. if (ret != 0 && ret != -ENODATA)
  187. dev_err(bus->dev, "trf on Slave %d failed:%d\n",
  188. msg->dev_num, ret);
  189. if (msg->page)
  190. sdw_reset_page(bus, msg->dev_num);
  191. mutex_unlock(&bus->msg_lock);
  192. return ret;
  193. }
  194. /**
  195. * sdw_transfer_defer() - Asynchronously transfer message to a SDW Slave device
  196. * @bus: SDW bus
  197. * @msg: SDW message to be xfered
  198. * @defer: Defer block for signal completion
  199. *
  200. * Caller needs to hold the msg_lock lock while calling this
  201. */
  202. int sdw_transfer_defer(struct sdw_bus *bus, struct sdw_msg *msg,
  203. struct sdw_defer *defer)
  204. {
  205. int ret;
  206. if (!bus->ops->xfer_msg_defer)
  207. return -ENOTSUPP;
  208. ret = do_transfer_defer(bus, msg, defer);
  209. if (ret != 0 && ret != -ENODATA)
  210. dev_err(bus->dev, "Defer trf on Slave %d failed:%d\n",
  211. msg->dev_num, ret);
  212. if (msg->page)
  213. sdw_reset_page(bus, msg->dev_num);
  214. return ret;
  215. }
  216. int sdw_fill_msg(struct sdw_msg *msg, struct sdw_slave *slave,
  217. u32 addr, size_t count, u16 dev_num, u8 flags, u8 *buf)
  218. {
  219. memset(msg, 0, sizeof(*msg));
  220. msg->addr = addr; /* addr is 16 bit and truncated here */
  221. msg->len = count;
  222. msg->dev_num = dev_num;
  223. msg->flags = flags;
  224. msg->buf = buf;
  225. msg->ssp_sync = false;
  226. msg->page = false;
  227. if (addr < SDW_REG_NO_PAGE) { /* no paging area */
  228. return 0;
  229. } else if (addr >= SDW_REG_MAX) { /* illegal addr */
  230. pr_err("SDW: Invalid address %x passed\n", addr);
  231. return -EINVAL;
  232. }
  233. if (addr < SDW_REG_OPTIONAL_PAGE) { /* 32k but no page */
  234. if (slave && !slave->prop.paging_support)
  235. return 0;
  236. /* no need for else as that will fall thru to paging */
  237. }
  238. /* paging mandatory */
  239. if (dev_num == SDW_ENUM_DEV_NUM || dev_num == SDW_BROADCAST_DEV_NUM) {
  240. pr_err("SDW: Invalid device for paging :%d\n", dev_num);
  241. return -EINVAL;
  242. }
  243. if (!slave) {
  244. pr_err("SDW: No slave for paging addr\n");
  245. return -EINVAL;
  246. } else if (!slave->prop.paging_support) {
  247. dev_err(&slave->dev,
  248. "address %x needs paging but no support", addr);
  249. return -EINVAL;
  250. }
  251. msg->addr_page1 = (addr >> SDW_REG_SHIFT(SDW_SCP_ADDRPAGE1_MASK));
  252. msg->addr_page2 = (addr >> SDW_REG_SHIFT(SDW_SCP_ADDRPAGE2_MASK));
  253. msg->addr |= BIT(15);
  254. msg->page = true;
  255. return 0;
  256. }
  257. /**
  258. * sdw_nread() - Read "n" contiguous SDW Slave registers
  259. * @slave: SDW Slave
  260. * @addr: Register address
  261. * @count: length
  262. * @val: Buffer for values to be read
  263. */
  264. int sdw_nread(struct sdw_slave *slave, u32 addr, size_t count, u8 *val)
  265. {
  266. struct sdw_msg msg;
  267. int ret;
  268. ret = sdw_fill_msg(&msg, slave, addr, count,
  269. slave->dev_num, SDW_MSG_FLAG_READ, val);
  270. if (ret < 0)
  271. return ret;
  272. ret = pm_runtime_get_sync(slave->bus->dev);
  273. if (ret < 0)
  274. return ret;
  275. ret = sdw_transfer(slave->bus, &msg);
  276. pm_runtime_put(slave->bus->dev);
  277. return ret;
  278. }
  279. EXPORT_SYMBOL(sdw_nread);
  280. /**
  281. * sdw_nwrite() - Write "n" contiguous SDW Slave registers
  282. * @slave: SDW Slave
  283. * @addr: Register address
  284. * @count: length
  285. * @val: Buffer for values to be read
  286. */
  287. int sdw_nwrite(struct sdw_slave *slave, u32 addr, size_t count, u8 *val)
  288. {
  289. struct sdw_msg msg;
  290. int ret;
  291. ret = sdw_fill_msg(&msg, slave, addr, count,
  292. slave->dev_num, SDW_MSG_FLAG_WRITE, val);
  293. if (ret < 0)
  294. return ret;
  295. ret = pm_runtime_get_sync(slave->bus->dev);
  296. if (ret < 0)
  297. return ret;
  298. ret = sdw_transfer(slave->bus, &msg);
  299. pm_runtime_put(slave->bus->dev);
  300. return ret;
  301. }
  302. EXPORT_SYMBOL(sdw_nwrite);
  303. /**
  304. * sdw_read() - Read a SDW Slave register
  305. * @slave: SDW Slave
  306. * @addr: Register address
  307. */
  308. int sdw_read(struct sdw_slave *slave, u32 addr)
  309. {
  310. u8 buf;
  311. int ret;
  312. ret = sdw_nread(slave, addr, 1, &buf);
  313. if (ret < 0)
  314. return ret;
  315. else
  316. return buf;
  317. }
  318. EXPORT_SYMBOL(sdw_read);
  319. /**
  320. * sdw_write() - Write a SDW Slave register
  321. * @slave: SDW Slave
  322. * @addr: Register address
  323. * @value: Register value
  324. */
  325. int sdw_write(struct sdw_slave *slave, u32 addr, u8 value)
  326. {
  327. return sdw_nwrite(slave, addr, 1, &value);
  328. }
  329. EXPORT_SYMBOL(sdw_write);
  330. /*
  331. * SDW alert handling
  332. */
  333. /* called with bus_lock held */
  334. static struct sdw_slave *sdw_get_slave(struct sdw_bus *bus, int i)
  335. {
  336. struct sdw_slave *slave = NULL;
  337. list_for_each_entry(slave, &bus->slaves, node) {
  338. if (slave->dev_num == i)
  339. return slave;
  340. }
  341. return NULL;
  342. }
  343. static int sdw_compare_devid(struct sdw_slave *slave, struct sdw_slave_id id)
  344. {
  345. if ((slave->id.unique_id != id.unique_id) ||
  346. (slave->id.mfg_id != id.mfg_id) ||
  347. (slave->id.part_id != id.part_id) ||
  348. (slave->id.class_id != id.class_id))
  349. return -ENODEV;
  350. return 0;
  351. }
  352. /* called with bus_lock held */
  353. static int sdw_get_device_num(struct sdw_slave *slave)
  354. {
  355. int bit;
  356. bit = find_first_zero_bit(slave->bus->assigned, SDW_MAX_DEVICES);
  357. if (bit == SDW_MAX_DEVICES) {
  358. bit = -ENODEV;
  359. goto err;
  360. }
  361. /*
  362. * Do not update dev_num in Slave data structure here,
  363. * Update once program dev_num is successful
  364. */
  365. set_bit(bit, slave->bus->assigned);
  366. err:
  367. return bit;
  368. }
  369. static int sdw_assign_device_num(struct sdw_slave *slave)
  370. {
  371. int ret, dev_num;
  372. /* check first if device number is assigned, if so reuse that */
  373. if (!slave->dev_num) {
  374. mutex_lock(&slave->bus->bus_lock);
  375. dev_num = sdw_get_device_num(slave);
  376. mutex_unlock(&slave->bus->bus_lock);
  377. if (dev_num < 0) {
  378. dev_err(slave->bus->dev, "Get dev_num failed: %d",
  379. dev_num);
  380. return dev_num;
  381. }
  382. } else {
  383. dev_info(slave->bus->dev,
  384. "Slave already registered dev_num:%d",
  385. slave->dev_num);
  386. /* Clear the slave->dev_num to transfer message on device 0 */
  387. dev_num = slave->dev_num;
  388. slave->dev_num = 0;
  389. }
  390. ret = sdw_write(slave, SDW_SCP_DEVNUMBER, dev_num);
  391. if (ret < 0) {
  392. dev_err(&slave->dev, "Program device_num failed: %d", ret);
  393. return ret;
  394. }
  395. /* After xfer of msg, restore dev_num */
  396. slave->dev_num = dev_num;
  397. return 0;
  398. }
  399. void sdw_extract_slave_id(struct sdw_bus *bus,
  400. u64 addr, struct sdw_slave_id *id)
  401. {
  402. dev_dbg(bus->dev, "SDW Slave Addr: %llx", addr);
  403. /*
  404. * Spec definition
  405. * Register Bit Contents
  406. * DevId_0 [7:4] 47:44 sdw_version
  407. * DevId_0 [3:0] 43:40 unique_id
  408. * DevId_1 39:32 mfg_id [15:8]
  409. * DevId_2 31:24 mfg_id [7:0]
  410. * DevId_3 23:16 part_id [15:8]
  411. * DevId_4 15:08 part_id [7:0]
  412. * DevId_5 07:00 class_id
  413. */
  414. id->sdw_version = (addr >> 44) & GENMASK(3, 0);
  415. id->unique_id = (addr >> 40) & GENMASK(3, 0);
  416. id->mfg_id = (addr >> 24) & GENMASK(15, 0);
  417. id->part_id = (addr >> 8) & GENMASK(15, 0);
  418. id->class_id = addr & GENMASK(7, 0);
  419. dev_dbg(bus->dev,
  420. "SDW Slave class_id %x, part_id %x, mfg_id %x, unique_id %x, version %x",
  421. id->class_id, id->part_id, id->mfg_id,
  422. id->unique_id, id->sdw_version);
  423. }
  424. static int sdw_program_device_num(struct sdw_bus *bus)
  425. {
  426. u8 buf[SDW_NUM_DEV_ID_REGISTERS] = {0};
  427. struct sdw_slave *slave, *_s;
  428. struct sdw_slave_id id;
  429. struct sdw_msg msg;
  430. bool found = false;
  431. int count = 0, ret;
  432. u64 addr;
  433. /* No Slave, so use raw xfer api */
  434. ret = sdw_fill_msg(&msg, NULL, SDW_SCP_DEVID_0,
  435. SDW_NUM_DEV_ID_REGISTERS, 0, SDW_MSG_FLAG_READ, buf);
  436. if (ret < 0)
  437. return ret;
  438. do {
  439. ret = sdw_transfer(bus, &msg);
  440. if (ret == -ENODATA) { /* end of device id reads */
  441. ret = 0;
  442. break;
  443. }
  444. if (ret < 0) {
  445. dev_err(bus->dev, "DEVID read fail:%d\n", ret);
  446. break;
  447. }
  448. /*
  449. * Construct the addr and extract. Cast the higher shift
  450. * bits to avoid truncation due to size limit.
  451. */
  452. addr = buf[5] | (buf[4] << 8) | (buf[3] << 16) |
  453. ((u64)buf[2] << 24) | ((u64)buf[1] << 32) |
  454. ((u64)buf[0] << 40);
  455. sdw_extract_slave_id(bus, addr, &id);
  456. /* Now compare with entries */
  457. list_for_each_entry_safe(slave, _s, &bus->slaves, node) {
  458. if (sdw_compare_devid(slave, id) == 0) {
  459. found = true;
  460. /*
  461. * Assign a new dev_num to this Slave and
  462. * not mark it present. It will be marked
  463. * present after it reports ATTACHED on new
  464. * dev_num
  465. */
  466. ret = sdw_assign_device_num(slave);
  467. if (ret) {
  468. dev_err(slave->bus->dev,
  469. "Assign dev_num failed:%d",
  470. ret);
  471. return ret;
  472. }
  473. break;
  474. }
  475. }
  476. if (found == false) {
  477. /* TODO: Park this device in Group 13 */
  478. dev_err(bus->dev, "Slave Entry not found");
  479. }
  480. count++;
  481. /*
  482. * Check till error out or retry (count) exhausts.
  483. * Device can drop off and rejoin during enumeration
  484. * so count till twice the bound.
  485. */
  486. } while (ret == 0 && count < (SDW_MAX_DEVICES * 2));
  487. return ret;
  488. }
  489. static void sdw_modify_slave_status(struct sdw_slave *slave,
  490. enum sdw_slave_status status)
  491. {
  492. mutex_lock(&slave->bus->bus_lock);
  493. slave->status = status;
  494. mutex_unlock(&slave->bus->bus_lock);
  495. }
  496. int sdw_configure_dpn_intr(struct sdw_slave *slave,
  497. int port, bool enable, int mask)
  498. {
  499. u32 addr;
  500. int ret;
  501. u8 val = 0;
  502. addr = SDW_DPN_INTMASK(port);
  503. /* Set/Clear port ready interrupt mask */
  504. if (enable) {
  505. val |= mask;
  506. val |= SDW_DPN_INT_PORT_READY;
  507. } else {
  508. val &= ~(mask);
  509. val &= ~SDW_DPN_INT_PORT_READY;
  510. }
  511. ret = sdw_update(slave, addr, (mask | SDW_DPN_INT_PORT_READY), val);
  512. if (ret < 0)
  513. dev_err(slave->bus->dev,
  514. "SDW_DPN_INTMASK write failed:%d", val);
  515. return ret;
  516. }
  517. static int sdw_initialize_slave(struct sdw_slave *slave)
  518. {
  519. struct sdw_slave_prop *prop = &slave->prop;
  520. int ret;
  521. u8 val;
  522. /*
  523. * Set bus clash, parity and SCP implementation
  524. * defined interrupt mask
  525. * TODO: Read implementation defined interrupt mask
  526. * from Slave property
  527. */
  528. val = SDW_SCP_INT1_IMPL_DEF | SDW_SCP_INT1_BUS_CLASH |
  529. SDW_SCP_INT1_PARITY;
  530. /* Enable SCP interrupts */
  531. ret = sdw_update(slave, SDW_SCP_INTMASK1, val, val);
  532. if (ret < 0) {
  533. dev_err(slave->bus->dev,
  534. "SDW_SCP_INTMASK1 write failed:%d", ret);
  535. return ret;
  536. }
  537. /* No need to continue if DP0 is not present */
  538. if (!slave->prop.dp0_prop)
  539. return 0;
  540. /* Enable DP0 interrupts */
  541. val = prop->dp0_prop->device_interrupts;
  542. val |= SDW_DP0_INT_PORT_READY | SDW_DP0_INT_BRA_FAILURE;
  543. ret = sdw_update(slave, SDW_DP0_INTMASK, val, val);
  544. if (ret < 0) {
  545. dev_err(slave->bus->dev,
  546. "SDW_DP0_INTMASK read failed:%d", ret);
  547. return val;
  548. }
  549. return 0;
  550. }
  551. static int sdw_handle_dp0_interrupt(struct sdw_slave *slave, u8 *slave_status)
  552. {
  553. u8 clear = 0, impl_int_mask;
  554. int status, status2, ret, count = 0;
  555. status = sdw_read(slave, SDW_DP0_INT);
  556. if (status < 0) {
  557. dev_err(slave->bus->dev,
  558. "SDW_DP0_INT read failed:%d", status);
  559. return status;
  560. }
  561. do {
  562. if (status & SDW_DP0_INT_TEST_FAIL) {
  563. dev_err(&slave->dev, "Test fail for port 0");
  564. clear |= SDW_DP0_INT_TEST_FAIL;
  565. }
  566. /*
  567. * Assumption: PORT_READY interrupt will be received only for
  568. * ports implementing Channel Prepare state machine (CP_SM)
  569. */
  570. if (status & SDW_DP0_INT_PORT_READY) {
  571. complete(&slave->port_ready[0]);
  572. clear |= SDW_DP0_INT_PORT_READY;
  573. }
  574. if (status & SDW_DP0_INT_BRA_FAILURE) {
  575. dev_err(&slave->dev, "BRA failed");
  576. clear |= SDW_DP0_INT_BRA_FAILURE;
  577. }
  578. impl_int_mask = SDW_DP0_INT_IMPDEF1 |
  579. SDW_DP0_INT_IMPDEF2 | SDW_DP0_INT_IMPDEF3;
  580. if (status & impl_int_mask) {
  581. clear |= impl_int_mask;
  582. *slave_status = clear;
  583. }
  584. /* clear the interrupt */
  585. ret = sdw_write(slave, SDW_DP0_INT, clear);
  586. if (ret < 0) {
  587. dev_err(slave->bus->dev,
  588. "SDW_DP0_INT write failed:%d", ret);
  589. return ret;
  590. }
  591. /* Read DP0 interrupt again */
  592. status2 = sdw_read(slave, SDW_DP0_INT);
  593. if (status2 < 0) {
  594. dev_err(slave->bus->dev,
  595. "SDW_DP0_INT read failed:%d", status2);
  596. return status2;
  597. }
  598. status &= status2;
  599. count++;
  600. /* we can get alerts while processing so keep retrying */
  601. } while (status != 0 && count < SDW_READ_INTR_CLEAR_RETRY);
  602. if (count == SDW_READ_INTR_CLEAR_RETRY)
  603. dev_warn(slave->bus->dev, "Reached MAX_RETRY on DP0 read");
  604. return ret;
  605. }
  606. static int sdw_handle_port_interrupt(struct sdw_slave *slave,
  607. int port, u8 *slave_status)
  608. {
  609. u8 clear = 0, impl_int_mask;
  610. int status, status2, ret, count = 0;
  611. u32 addr;
  612. if (port == 0)
  613. return sdw_handle_dp0_interrupt(slave, slave_status);
  614. addr = SDW_DPN_INT(port);
  615. status = sdw_read(slave, addr);
  616. if (status < 0) {
  617. dev_err(slave->bus->dev,
  618. "SDW_DPN_INT read failed:%d", status);
  619. return status;
  620. }
  621. do {
  622. if (status & SDW_DPN_INT_TEST_FAIL) {
  623. dev_err(&slave->dev, "Test fail for port:%d", port);
  624. clear |= SDW_DPN_INT_TEST_FAIL;
  625. }
  626. /*
  627. * Assumption: PORT_READY interrupt will be received only
  628. * for ports implementing CP_SM.
  629. */
  630. if (status & SDW_DPN_INT_PORT_READY) {
  631. complete(&slave->port_ready[port]);
  632. clear |= SDW_DPN_INT_PORT_READY;
  633. }
  634. impl_int_mask = SDW_DPN_INT_IMPDEF1 |
  635. SDW_DPN_INT_IMPDEF2 | SDW_DPN_INT_IMPDEF3;
  636. if (status & impl_int_mask) {
  637. clear |= impl_int_mask;
  638. *slave_status = clear;
  639. }
  640. /* clear the interrupt */
  641. ret = sdw_write(slave, addr, clear);
  642. if (ret < 0) {
  643. dev_err(slave->bus->dev,
  644. "SDW_DPN_INT write failed:%d", ret);
  645. return ret;
  646. }
  647. /* Read DPN interrupt again */
  648. status2 = sdw_read(slave, addr);
  649. if (status2 < 0) {
  650. dev_err(slave->bus->dev,
  651. "SDW_DPN_INT read failed:%d", status2);
  652. return status2;
  653. }
  654. status &= status2;
  655. count++;
  656. /* we can get alerts while processing so keep retrying */
  657. } while (status != 0 && count < SDW_READ_INTR_CLEAR_RETRY);
  658. if (count == SDW_READ_INTR_CLEAR_RETRY)
  659. dev_warn(slave->bus->dev, "Reached MAX_RETRY on port read");
  660. return ret;
  661. }
  662. static int sdw_handle_slave_alerts(struct sdw_slave *slave)
  663. {
  664. struct sdw_slave_intr_status slave_intr;
  665. u8 clear = 0, bit, port_status[15];
  666. int port_num, stat, ret, count = 0;
  667. unsigned long port;
  668. bool slave_notify = false;
  669. u8 buf, buf2[2], _buf, _buf2[2];
  670. sdw_modify_slave_status(slave, SDW_SLAVE_ALERT);
  671. /* Read Instat 1, Instat 2 and Instat 3 registers */
  672. buf = ret = sdw_read(slave, SDW_SCP_INT1);
  673. if (ret < 0) {
  674. dev_err(slave->bus->dev,
  675. "SDW_SCP_INT1 read failed:%d", ret);
  676. return ret;
  677. }
  678. ret = sdw_nread(slave, SDW_SCP_INTSTAT2, 2, buf2);
  679. if (ret < 0) {
  680. dev_err(slave->bus->dev,
  681. "SDW_SCP_INT2/3 read failed:%d", ret);
  682. return ret;
  683. }
  684. do {
  685. /*
  686. * Check parity, bus clash and Slave (impl defined)
  687. * interrupt
  688. */
  689. if (buf & SDW_SCP_INT1_PARITY) {
  690. dev_err(&slave->dev, "Parity error detected");
  691. clear |= SDW_SCP_INT1_PARITY;
  692. }
  693. if (buf & SDW_SCP_INT1_BUS_CLASH) {
  694. dev_err(&slave->dev, "Bus clash error detected");
  695. clear |= SDW_SCP_INT1_BUS_CLASH;
  696. }
  697. /*
  698. * When bus clash or parity errors are detected, such errors
  699. * are unlikely to be recoverable errors.
  700. * TODO: In such scenario, reset bus. Make this configurable
  701. * via sysfs property with bus reset being the default.
  702. */
  703. if (buf & SDW_SCP_INT1_IMPL_DEF) {
  704. dev_dbg(&slave->dev, "Slave impl defined interrupt\n");
  705. clear |= SDW_SCP_INT1_IMPL_DEF;
  706. slave_notify = true;
  707. }
  708. /* Check port 0 - 3 interrupts */
  709. port = buf & SDW_SCP_INT1_PORT0_3;
  710. /* To get port number corresponding to bits, shift it */
  711. port = port >> SDW_REG_SHIFT(SDW_SCP_INT1_PORT0_3);
  712. for_each_set_bit(bit, &port, 8) {
  713. sdw_handle_port_interrupt(slave, bit,
  714. &port_status[bit]);
  715. }
  716. /* Check if cascade 2 interrupt is present */
  717. if (buf & SDW_SCP_INT1_SCP2_CASCADE) {
  718. port = buf2[0] & SDW_SCP_INTSTAT2_PORT4_10;
  719. for_each_set_bit(bit, &port, 8) {
  720. /* scp2 ports start from 4 */
  721. port_num = bit + 3;
  722. sdw_handle_port_interrupt(slave,
  723. port_num,
  724. &port_status[port_num]);
  725. }
  726. }
  727. /* now check last cascade */
  728. if (buf2[0] & SDW_SCP_INTSTAT2_SCP3_CASCADE) {
  729. port = buf2[1] & SDW_SCP_INTSTAT3_PORT11_14;
  730. for_each_set_bit(bit, &port, 8) {
  731. /* scp3 ports start from 11 */
  732. port_num = bit + 10;
  733. sdw_handle_port_interrupt(slave,
  734. port_num,
  735. &port_status[port_num]);
  736. }
  737. }
  738. /* Update the Slave driver */
  739. if (slave_notify && (slave->ops) &&
  740. (slave->ops->interrupt_callback)) {
  741. slave_intr.control_port = clear;
  742. memcpy(slave_intr.port, &port_status,
  743. sizeof(slave_intr.port));
  744. slave->ops->interrupt_callback(slave, &slave_intr);
  745. }
  746. /* Ack interrupt */
  747. ret = sdw_write(slave, SDW_SCP_INT1, clear);
  748. if (ret < 0) {
  749. dev_err(slave->bus->dev,
  750. "SDW_SCP_INT1 write failed:%d", ret);
  751. return ret;
  752. }
  753. /*
  754. * Read status again to ensure no new interrupts arrived
  755. * while servicing interrupts.
  756. */
  757. _buf = ret = sdw_read(slave, SDW_SCP_INT1);
  758. if (ret < 0) {
  759. dev_err(slave->bus->dev,
  760. "SDW_SCP_INT1 read failed:%d", ret);
  761. return ret;
  762. }
  763. ret = sdw_nread(slave, SDW_SCP_INTSTAT2, 2, _buf2);
  764. if (ret < 0) {
  765. dev_err(slave->bus->dev,
  766. "SDW_SCP_INT2/3 read failed:%d", ret);
  767. return ret;
  768. }
  769. /* Make sure no interrupts are pending */
  770. buf &= _buf;
  771. buf2[0] &= _buf2[0];
  772. buf2[1] &= _buf2[1];
  773. stat = buf || buf2[0] || buf2[1];
  774. /*
  775. * Exit loop if Slave is continuously in ALERT state even
  776. * after servicing the interrupt multiple times.
  777. */
  778. count++;
  779. /* we can get alerts while processing so keep retrying */
  780. } while (stat != 0 && count < SDW_READ_INTR_CLEAR_RETRY);
  781. if (count == SDW_READ_INTR_CLEAR_RETRY)
  782. dev_warn(slave->bus->dev, "Reached MAX_RETRY on alert read");
  783. return ret;
  784. }
  785. static int sdw_update_slave_status(struct sdw_slave *slave,
  786. enum sdw_slave_status status)
  787. {
  788. if ((slave->ops) && (slave->ops->update_status))
  789. return slave->ops->update_status(slave, status);
  790. return 0;
  791. }
  792. /**
  793. * sdw_handle_slave_status() - Handle Slave status
  794. * @bus: SDW bus instance
  795. * @status: Status for all Slave(s)
  796. */
  797. int sdw_handle_slave_status(struct sdw_bus *bus,
  798. enum sdw_slave_status status[])
  799. {
  800. enum sdw_slave_status prev_status;
  801. struct sdw_slave *slave;
  802. int i, ret = 0;
  803. if (status[0] == SDW_SLAVE_ATTACHED) {
  804. ret = sdw_program_device_num(bus);
  805. if (ret)
  806. dev_err(bus->dev, "Slave attach failed: %d", ret);
  807. }
  808. /* Continue to check other slave statuses */
  809. for (i = 1; i <= SDW_MAX_DEVICES; i++) {
  810. mutex_lock(&bus->bus_lock);
  811. if (test_bit(i, bus->assigned) == false) {
  812. mutex_unlock(&bus->bus_lock);
  813. continue;
  814. }
  815. mutex_unlock(&bus->bus_lock);
  816. slave = sdw_get_slave(bus, i);
  817. if (!slave)
  818. continue;
  819. switch (status[i]) {
  820. case SDW_SLAVE_UNATTACHED:
  821. if (slave->status == SDW_SLAVE_UNATTACHED)
  822. break;
  823. sdw_modify_slave_status(slave, SDW_SLAVE_UNATTACHED);
  824. break;
  825. case SDW_SLAVE_ALERT:
  826. ret = sdw_handle_slave_alerts(slave);
  827. if (ret)
  828. dev_err(bus->dev,
  829. "Slave %d alert handling failed: %d",
  830. i, ret);
  831. break;
  832. case SDW_SLAVE_ATTACHED:
  833. if (slave->status == SDW_SLAVE_ATTACHED)
  834. break;
  835. prev_status = slave->status;
  836. sdw_modify_slave_status(slave, SDW_SLAVE_ATTACHED);
  837. if (prev_status == SDW_SLAVE_ALERT)
  838. break;
  839. ret = sdw_initialize_slave(slave);
  840. if (ret)
  841. dev_err(bus->dev,
  842. "Slave %d initialization failed: %d",
  843. i, ret);
  844. break;
  845. default:
  846. dev_err(bus->dev, "Invalid slave %d status:%d",
  847. i, status[i]);
  848. break;
  849. }
  850. ret = sdw_update_slave_status(slave, status[i]);
  851. if (ret)
  852. dev_err(slave->bus->dev,
  853. "Update Slave status failed:%d", ret);
  854. }
  855. return ret;
  856. }
  857. EXPORT_SYMBOL(sdw_handle_slave_status);