qeth_core_main.c 183 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * Copyright IBM Corp. 2007, 2009
  4. * Author(s): Utz Bacher <utz.bacher@de.ibm.com>,
  5. * Frank Pavlic <fpavlic@de.ibm.com>,
  6. * Thomas Spatzier <tspat@de.ibm.com>,
  7. * Frank Blaschka <frank.blaschka@de.ibm.com>
  8. */
  9. #define KMSG_COMPONENT "qeth"
  10. #define pr_fmt(fmt) KMSG_COMPONENT ": " fmt
  11. #include <linux/compat.h>
  12. #include <linux/module.h>
  13. #include <linux/moduleparam.h>
  14. #include <linux/string.h>
  15. #include <linux/errno.h>
  16. #include <linux/kernel.h>
  17. #include <linux/log2.h>
  18. #include <linux/ip.h>
  19. #include <linux/tcp.h>
  20. #include <linux/mii.h>
  21. #include <linux/kthread.h>
  22. #include <linux/slab.h>
  23. #include <linux/if_vlan.h>
  24. #include <linux/netdevice.h>
  25. #include <linux/netdev_features.h>
  26. #include <linux/skbuff.h>
  27. #include <linux/vmalloc.h>
  28. #include <net/iucv/af_iucv.h>
  29. #include <net/dsfield.h>
  30. #include <asm/ebcdic.h>
  31. #include <asm/chpid.h>
  32. #include <asm/io.h>
  33. #include <asm/sysinfo.h>
  34. #include <asm/diag.h>
  35. #include <asm/cio.h>
  36. #include <asm/ccwdev.h>
  37. #include <asm/cpcmd.h>
  38. #include "qeth_core.h"
  39. struct qeth_dbf_info qeth_dbf[QETH_DBF_INFOS] = {
  40. /* define dbf - Name, Pages, Areas, Maxlen, Level, View, Handle */
  41. /* N P A M L V H */
  42. [QETH_DBF_SETUP] = {"qeth_setup",
  43. 8, 1, 8, 5, &debug_hex_ascii_view, NULL},
  44. [QETH_DBF_MSG] = {"qeth_msg", 8, 1, 11 * sizeof(long), 3,
  45. &debug_sprintf_view, NULL},
  46. [QETH_DBF_CTRL] = {"qeth_control",
  47. 8, 1, QETH_DBF_CTRL_LEN, 5, &debug_hex_ascii_view, NULL},
  48. };
  49. EXPORT_SYMBOL_GPL(qeth_dbf);
  50. struct qeth_card_list_struct qeth_core_card_list;
  51. EXPORT_SYMBOL_GPL(qeth_core_card_list);
  52. struct kmem_cache *qeth_core_header_cache;
  53. EXPORT_SYMBOL_GPL(qeth_core_header_cache);
  54. static struct kmem_cache *qeth_qdio_outbuf_cache;
  55. static struct device *qeth_core_root_dev;
  56. static struct lock_class_key qdio_out_skb_queue_key;
  57. static void qeth_send_control_data_cb(struct qeth_card *card,
  58. struct qeth_channel *channel,
  59. struct qeth_cmd_buffer *iob);
  60. static struct qeth_cmd_buffer *qeth_get_buffer(struct qeth_channel *);
  61. static void qeth_free_buffer_pool(struct qeth_card *);
  62. static int qeth_qdio_establish(struct qeth_card *);
  63. static void qeth_free_qdio_buffers(struct qeth_card *);
  64. static void qeth_notify_skbs(struct qeth_qdio_out_q *queue,
  65. struct qeth_qdio_out_buffer *buf,
  66. enum iucv_tx_notify notification);
  67. static void qeth_release_skbs(struct qeth_qdio_out_buffer *buf);
  68. static int qeth_init_qdio_out_buf(struct qeth_qdio_out_q *, int);
  69. struct workqueue_struct *qeth_wq;
  70. EXPORT_SYMBOL_GPL(qeth_wq);
  71. int qeth_card_hw_is_reachable(struct qeth_card *card)
  72. {
  73. return (card->state == CARD_STATE_SOFTSETUP) ||
  74. (card->state == CARD_STATE_UP);
  75. }
  76. EXPORT_SYMBOL_GPL(qeth_card_hw_is_reachable);
  77. static void qeth_close_dev_handler(struct work_struct *work)
  78. {
  79. struct qeth_card *card;
  80. card = container_of(work, struct qeth_card, close_dev_work);
  81. QETH_CARD_TEXT(card, 2, "cldevhdl");
  82. rtnl_lock();
  83. dev_close(card->dev);
  84. rtnl_unlock();
  85. ccwgroup_set_offline(card->gdev);
  86. }
  87. void qeth_close_dev(struct qeth_card *card)
  88. {
  89. QETH_CARD_TEXT(card, 2, "cldevsubm");
  90. queue_work(qeth_wq, &card->close_dev_work);
  91. }
  92. EXPORT_SYMBOL_GPL(qeth_close_dev);
  93. static const char *qeth_get_cardname(struct qeth_card *card)
  94. {
  95. if (card->info.guestlan) {
  96. switch (card->info.type) {
  97. case QETH_CARD_TYPE_OSD:
  98. return " Virtual NIC QDIO";
  99. case QETH_CARD_TYPE_IQD:
  100. return " Virtual NIC Hiper";
  101. case QETH_CARD_TYPE_OSM:
  102. return " Virtual NIC QDIO - OSM";
  103. case QETH_CARD_TYPE_OSX:
  104. return " Virtual NIC QDIO - OSX";
  105. default:
  106. return " unknown";
  107. }
  108. } else {
  109. switch (card->info.type) {
  110. case QETH_CARD_TYPE_OSD:
  111. return " OSD Express";
  112. case QETH_CARD_TYPE_IQD:
  113. return " HiperSockets";
  114. case QETH_CARD_TYPE_OSN:
  115. return " OSN QDIO";
  116. case QETH_CARD_TYPE_OSM:
  117. return " OSM QDIO";
  118. case QETH_CARD_TYPE_OSX:
  119. return " OSX QDIO";
  120. default:
  121. return " unknown";
  122. }
  123. }
  124. return " n/a";
  125. }
  126. /* max length to be returned: 14 */
  127. const char *qeth_get_cardname_short(struct qeth_card *card)
  128. {
  129. if (card->info.guestlan) {
  130. switch (card->info.type) {
  131. case QETH_CARD_TYPE_OSD:
  132. return "Virt.NIC QDIO";
  133. case QETH_CARD_TYPE_IQD:
  134. return "Virt.NIC Hiper";
  135. case QETH_CARD_TYPE_OSM:
  136. return "Virt.NIC OSM";
  137. case QETH_CARD_TYPE_OSX:
  138. return "Virt.NIC OSX";
  139. default:
  140. return "unknown";
  141. }
  142. } else {
  143. switch (card->info.type) {
  144. case QETH_CARD_TYPE_OSD:
  145. switch (card->info.link_type) {
  146. case QETH_LINK_TYPE_FAST_ETH:
  147. return "OSD_100";
  148. case QETH_LINK_TYPE_HSTR:
  149. return "HSTR";
  150. case QETH_LINK_TYPE_GBIT_ETH:
  151. return "OSD_1000";
  152. case QETH_LINK_TYPE_10GBIT_ETH:
  153. return "OSD_10GIG";
  154. case QETH_LINK_TYPE_25GBIT_ETH:
  155. return "OSD_25GIG";
  156. case QETH_LINK_TYPE_LANE_ETH100:
  157. return "OSD_FE_LANE";
  158. case QETH_LINK_TYPE_LANE_TR:
  159. return "OSD_TR_LANE";
  160. case QETH_LINK_TYPE_LANE_ETH1000:
  161. return "OSD_GbE_LANE";
  162. case QETH_LINK_TYPE_LANE:
  163. return "OSD_ATM_LANE";
  164. default:
  165. return "OSD_Express";
  166. }
  167. case QETH_CARD_TYPE_IQD:
  168. return "HiperSockets";
  169. case QETH_CARD_TYPE_OSN:
  170. return "OSN";
  171. case QETH_CARD_TYPE_OSM:
  172. return "OSM_1000";
  173. case QETH_CARD_TYPE_OSX:
  174. return "OSX_10GIG";
  175. default:
  176. return "unknown";
  177. }
  178. }
  179. return "n/a";
  180. }
  181. void qeth_set_recovery_task(struct qeth_card *card)
  182. {
  183. card->recovery_task = current;
  184. }
  185. EXPORT_SYMBOL_GPL(qeth_set_recovery_task);
  186. void qeth_clear_recovery_task(struct qeth_card *card)
  187. {
  188. card->recovery_task = NULL;
  189. }
  190. EXPORT_SYMBOL_GPL(qeth_clear_recovery_task);
  191. static bool qeth_is_recovery_task(const struct qeth_card *card)
  192. {
  193. return card->recovery_task == current;
  194. }
  195. void qeth_set_allowed_threads(struct qeth_card *card, unsigned long threads,
  196. int clear_start_mask)
  197. {
  198. unsigned long flags;
  199. spin_lock_irqsave(&card->thread_mask_lock, flags);
  200. card->thread_allowed_mask = threads;
  201. if (clear_start_mask)
  202. card->thread_start_mask &= threads;
  203. spin_unlock_irqrestore(&card->thread_mask_lock, flags);
  204. wake_up(&card->wait_q);
  205. }
  206. EXPORT_SYMBOL_GPL(qeth_set_allowed_threads);
  207. int qeth_threads_running(struct qeth_card *card, unsigned long threads)
  208. {
  209. unsigned long flags;
  210. int rc = 0;
  211. spin_lock_irqsave(&card->thread_mask_lock, flags);
  212. rc = (card->thread_running_mask & threads);
  213. spin_unlock_irqrestore(&card->thread_mask_lock, flags);
  214. return rc;
  215. }
  216. EXPORT_SYMBOL_GPL(qeth_threads_running);
  217. int qeth_wait_for_threads(struct qeth_card *card, unsigned long threads)
  218. {
  219. if (qeth_is_recovery_task(card))
  220. return 0;
  221. return wait_event_interruptible(card->wait_q,
  222. qeth_threads_running(card, threads) == 0);
  223. }
  224. EXPORT_SYMBOL_GPL(qeth_wait_for_threads);
  225. void qeth_clear_working_pool_list(struct qeth_card *card)
  226. {
  227. struct qeth_buffer_pool_entry *pool_entry, *tmp;
  228. QETH_CARD_TEXT(card, 5, "clwrklst");
  229. list_for_each_entry_safe(pool_entry, tmp,
  230. &card->qdio.in_buf_pool.entry_list, list){
  231. list_del(&pool_entry->list);
  232. }
  233. }
  234. EXPORT_SYMBOL_GPL(qeth_clear_working_pool_list);
  235. static int qeth_alloc_buffer_pool(struct qeth_card *card)
  236. {
  237. struct qeth_buffer_pool_entry *pool_entry;
  238. void *ptr;
  239. int i, j;
  240. QETH_CARD_TEXT(card, 5, "alocpool");
  241. for (i = 0; i < card->qdio.init_pool.buf_count; ++i) {
  242. pool_entry = kzalloc(sizeof(*pool_entry), GFP_KERNEL);
  243. if (!pool_entry) {
  244. qeth_free_buffer_pool(card);
  245. return -ENOMEM;
  246. }
  247. for (j = 0; j < QETH_MAX_BUFFER_ELEMENTS(card); ++j) {
  248. ptr = (void *) __get_free_page(GFP_KERNEL);
  249. if (!ptr) {
  250. while (j > 0)
  251. free_page((unsigned long)
  252. pool_entry->elements[--j]);
  253. kfree(pool_entry);
  254. qeth_free_buffer_pool(card);
  255. return -ENOMEM;
  256. }
  257. pool_entry->elements[j] = ptr;
  258. }
  259. list_add(&pool_entry->init_list,
  260. &card->qdio.init_pool.entry_list);
  261. }
  262. return 0;
  263. }
  264. int qeth_realloc_buffer_pool(struct qeth_card *card, int bufcnt)
  265. {
  266. QETH_CARD_TEXT(card, 2, "realcbp");
  267. if ((card->state != CARD_STATE_DOWN) &&
  268. (card->state != CARD_STATE_RECOVER))
  269. return -EPERM;
  270. /* TODO: steel/add buffers from/to a running card's buffer pool (?) */
  271. qeth_clear_working_pool_list(card);
  272. qeth_free_buffer_pool(card);
  273. card->qdio.in_buf_pool.buf_count = bufcnt;
  274. card->qdio.init_pool.buf_count = bufcnt;
  275. return qeth_alloc_buffer_pool(card);
  276. }
  277. EXPORT_SYMBOL_GPL(qeth_realloc_buffer_pool);
  278. static void qeth_free_qdio_queue(struct qeth_qdio_q *q)
  279. {
  280. if (!q)
  281. return;
  282. qdio_free_buffers(q->qdio_bufs, QDIO_MAX_BUFFERS_PER_Q);
  283. kfree(q);
  284. }
  285. static struct qeth_qdio_q *qeth_alloc_qdio_queue(void)
  286. {
  287. struct qeth_qdio_q *q = kzalloc(sizeof(*q), GFP_KERNEL);
  288. int i;
  289. if (!q)
  290. return NULL;
  291. if (qdio_alloc_buffers(q->qdio_bufs, QDIO_MAX_BUFFERS_PER_Q)) {
  292. kfree(q);
  293. return NULL;
  294. }
  295. for (i = 0; i < QDIO_MAX_BUFFERS_PER_Q; ++i)
  296. q->bufs[i].buffer = q->qdio_bufs[i];
  297. QETH_DBF_HEX(SETUP, 2, &q, sizeof(void *));
  298. return q;
  299. }
  300. static int qeth_cq_init(struct qeth_card *card)
  301. {
  302. int rc;
  303. if (card->options.cq == QETH_CQ_ENABLED) {
  304. QETH_DBF_TEXT(SETUP, 2, "cqinit");
  305. qdio_reset_buffers(card->qdio.c_q->qdio_bufs,
  306. QDIO_MAX_BUFFERS_PER_Q);
  307. card->qdio.c_q->next_buf_to_init = 127;
  308. rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT,
  309. card->qdio.no_in_queues - 1, 0,
  310. 127);
  311. if (rc) {
  312. QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
  313. goto out;
  314. }
  315. }
  316. rc = 0;
  317. out:
  318. return rc;
  319. }
  320. static int qeth_alloc_cq(struct qeth_card *card)
  321. {
  322. int rc;
  323. if (card->options.cq == QETH_CQ_ENABLED) {
  324. int i;
  325. struct qdio_outbuf_state *outbuf_states;
  326. QETH_DBF_TEXT(SETUP, 2, "cqon");
  327. card->qdio.c_q = qeth_alloc_qdio_queue();
  328. if (!card->qdio.c_q) {
  329. rc = -1;
  330. goto kmsg_out;
  331. }
  332. card->qdio.no_in_queues = 2;
  333. card->qdio.out_bufstates =
  334. kcalloc(card->qdio.no_out_queues *
  335. QDIO_MAX_BUFFERS_PER_Q,
  336. sizeof(struct qdio_outbuf_state),
  337. GFP_KERNEL);
  338. outbuf_states = card->qdio.out_bufstates;
  339. if (outbuf_states == NULL) {
  340. rc = -1;
  341. goto free_cq_out;
  342. }
  343. for (i = 0; i < card->qdio.no_out_queues; ++i) {
  344. card->qdio.out_qs[i]->bufstates = outbuf_states;
  345. outbuf_states += QDIO_MAX_BUFFERS_PER_Q;
  346. }
  347. } else {
  348. QETH_DBF_TEXT(SETUP, 2, "nocq");
  349. card->qdio.c_q = NULL;
  350. card->qdio.no_in_queues = 1;
  351. }
  352. QETH_DBF_TEXT_(SETUP, 2, "iqc%d", card->qdio.no_in_queues);
  353. rc = 0;
  354. out:
  355. return rc;
  356. free_cq_out:
  357. qeth_free_qdio_queue(card->qdio.c_q);
  358. card->qdio.c_q = NULL;
  359. kmsg_out:
  360. dev_err(&card->gdev->dev, "Failed to create completion queue\n");
  361. goto out;
  362. }
  363. static void qeth_free_cq(struct qeth_card *card)
  364. {
  365. if (card->qdio.c_q) {
  366. --card->qdio.no_in_queues;
  367. qeth_free_qdio_queue(card->qdio.c_q);
  368. card->qdio.c_q = NULL;
  369. }
  370. kfree(card->qdio.out_bufstates);
  371. card->qdio.out_bufstates = NULL;
  372. }
  373. static enum iucv_tx_notify qeth_compute_cq_notification(int sbalf15,
  374. int delayed)
  375. {
  376. enum iucv_tx_notify n;
  377. switch (sbalf15) {
  378. case 0:
  379. n = delayed ? TX_NOTIFY_DELAYED_OK : TX_NOTIFY_OK;
  380. break;
  381. case 4:
  382. case 16:
  383. case 17:
  384. case 18:
  385. n = delayed ? TX_NOTIFY_DELAYED_UNREACHABLE :
  386. TX_NOTIFY_UNREACHABLE;
  387. break;
  388. default:
  389. n = delayed ? TX_NOTIFY_DELAYED_GENERALERROR :
  390. TX_NOTIFY_GENERALERROR;
  391. break;
  392. }
  393. return n;
  394. }
  395. static void qeth_cleanup_handled_pending(struct qeth_qdio_out_q *q, int bidx,
  396. int forced_cleanup)
  397. {
  398. if (q->card->options.cq != QETH_CQ_ENABLED)
  399. return;
  400. if (q->bufs[bidx]->next_pending != NULL) {
  401. struct qeth_qdio_out_buffer *head = q->bufs[bidx];
  402. struct qeth_qdio_out_buffer *c = q->bufs[bidx]->next_pending;
  403. while (c) {
  404. if (forced_cleanup ||
  405. atomic_read(&c->state) ==
  406. QETH_QDIO_BUF_HANDLED_DELAYED) {
  407. struct qeth_qdio_out_buffer *f = c;
  408. QETH_CARD_TEXT(f->q->card, 5, "fp");
  409. QETH_CARD_TEXT_(f->q->card, 5, "%lx", (long) f);
  410. /* release here to avoid interleaving between
  411. outbound tasklet and inbound tasklet
  412. regarding notifications and lifecycle */
  413. qeth_release_skbs(c);
  414. c = f->next_pending;
  415. WARN_ON_ONCE(head->next_pending != f);
  416. head->next_pending = c;
  417. kmem_cache_free(qeth_qdio_outbuf_cache, f);
  418. } else {
  419. head = c;
  420. c = c->next_pending;
  421. }
  422. }
  423. }
  424. if (forced_cleanup && (atomic_read(&(q->bufs[bidx]->state)) ==
  425. QETH_QDIO_BUF_HANDLED_DELAYED)) {
  426. /* for recovery situations */
  427. qeth_init_qdio_out_buf(q, bidx);
  428. QETH_CARD_TEXT(q->card, 2, "clprecov");
  429. }
  430. }
  431. static void qeth_qdio_handle_aob(struct qeth_card *card,
  432. unsigned long phys_aob_addr)
  433. {
  434. struct qaob *aob;
  435. struct qeth_qdio_out_buffer *buffer;
  436. enum iucv_tx_notify notification;
  437. unsigned int i;
  438. aob = (struct qaob *) phys_to_virt(phys_aob_addr);
  439. QETH_CARD_TEXT(card, 5, "haob");
  440. QETH_CARD_TEXT_(card, 5, "%lx", phys_aob_addr);
  441. buffer = (struct qeth_qdio_out_buffer *) aob->user1;
  442. QETH_CARD_TEXT_(card, 5, "%lx", aob->user1);
  443. if (atomic_cmpxchg(&buffer->state, QETH_QDIO_BUF_PRIMED,
  444. QETH_QDIO_BUF_IN_CQ) == QETH_QDIO_BUF_PRIMED) {
  445. notification = TX_NOTIFY_OK;
  446. } else {
  447. WARN_ON_ONCE(atomic_read(&buffer->state) !=
  448. QETH_QDIO_BUF_PENDING);
  449. atomic_set(&buffer->state, QETH_QDIO_BUF_IN_CQ);
  450. notification = TX_NOTIFY_DELAYED_OK;
  451. }
  452. if (aob->aorc != 0) {
  453. QETH_CARD_TEXT_(card, 2, "aorc%02X", aob->aorc);
  454. notification = qeth_compute_cq_notification(aob->aorc, 1);
  455. }
  456. qeth_notify_skbs(buffer->q, buffer, notification);
  457. /* Free dangling allocations. The attached skbs are handled by
  458. * qeth_cleanup_handled_pending().
  459. */
  460. for (i = 0;
  461. i < aob->sb_count && i < QETH_MAX_BUFFER_ELEMENTS(card);
  462. i++) {
  463. if (aob->sba[i] && buffer->is_header[i])
  464. kmem_cache_free(qeth_core_header_cache,
  465. (void *) aob->sba[i]);
  466. }
  467. atomic_set(&buffer->state, QETH_QDIO_BUF_HANDLED_DELAYED);
  468. qdio_release_aob(aob);
  469. }
  470. static inline int qeth_is_cq(struct qeth_card *card, unsigned int queue)
  471. {
  472. return card->options.cq == QETH_CQ_ENABLED &&
  473. card->qdio.c_q != NULL &&
  474. queue != 0 &&
  475. queue == card->qdio.no_in_queues - 1;
  476. }
  477. static void qeth_setup_ccw(struct ccw1 *ccw, u8 cmd_code, u32 len, void *data)
  478. {
  479. ccw->cmd_code = cmd_code;
  480. ccw->flags = CCW_FLAG_SLI;
  481. ccw->count = len;
  482. ccw->cda = (__u32) __pa(data);
  483. }
  484. static int __qeth_issue_next_read(struct qeth_card *card)
  485. {
  486. struct qeth_channel *channel = &card->read;
  487. struct qeth_cmd_buffer *iob;
  488. int rc;
  489. QETH_CARD_TEXT(card, 5, "issnxrd");
  490. if (channel->state != CH_STATE_UP)
  491. return -EIO;
  492. iob = qeth_get_buffer(channel);
  493. if (!iob) {
  494. dev_warn(&card->gdev->dev, "The qeth device driver "
  495. "failed to recover an error on the device\n");
  496. QETH_DBF_MESSAGE(2, "issue_next_read on device %x failed: no iob available\n",
  497. CARD_DEVID(card));
  498. return -ENOMEM;
  499. }
  500. qeth_setup_ccw(channel->ccw, CCW_CMD_READ, QETH_BUFSIZE, iob->data);
  501. QETH_CARD_TEXT(card, 6, "noirqpnd");
  502. rc = ccw_device_start(channel->ccwdev, channel->ccw,
  503. (addr_t) iob, 0, 0);
  504. if (rc) {
  505. QETH_DBF_MESSAGE(2, "error %i on device %x when starting next read ccw!\n",
  506. rc, CARD_DEVID(card));
  507. atomic_set(&channel->irq_pending, 0);
  508. card->read_or_write_problem = 1;
  509. qeth_schedule_recovery(card);
  510. wake_up(&card->wait_q);
  511. }
  512. return rc;
  513. }
  514. static int qeth_issue_next_read(struct qeth_card *card)
  515. {
  516. int ret;
  517. spin_lock_irq(get_ccwdev_lock(CARD_RDEV(card)));
  518. ret = __qeth_issue_next_read(card);
  519. spin_unlock_irq(get_ccwdev_lock(CARD_RDEV(card)));
  520. return ret;
  521. }
  522. static struct qeth_reply *qeth_alloc_reply(struct qeth_card *card)
  523. {
  524. struct qeth_reply *reply;
  525. reply = kzalloc(sizeof(struct qeth_reply), GFP_ATOMIC);
  526. if (reply) {
  527. refcount_set(&reply->refcnt, 1);
  528. atomic_set(&reply->received, 0);
  529. }
  530. return reply;
  531. }
  532. static void qeth_get_reply(struct qeth_reply *reply)
  533. {
  534. refcount_inc(&reply->refcnt);
  535. }
  536. static void qeth_put_reply(struct qeth_reply *reply)
  537. {
  538. if (refcount_dec_and_test(&reply->refcnt))
  539. kfree(reply);
  540. }
  541. static void qeth_issue_ipa_msg(struct qeth_ipa_cmd *cmd, int rc,
  542. struct qeth_card *card)
  543. {
  544. const char *ipa_name;
  545. int com = cmd->hdr.command;
  546. ipa_name = qeth_get_ipa_cmd_name(com);
  547. if (rc)
  548. QETH_DBF_MESSAGE(2, "IPA: %s(%#x) for device %x returned %#x \"%s\"\n",
  549. ipa_name, com, CARD_DEVID(card), rc,
  550. qeth_get_ipa_msg(rc));
  551. else
  552. QETH_DBF_MESSAGE(5, "IPA: %s(%#x) for device %x succeeded\n",
  553. ipa_name, com, CARD_DEVID(card));
  554. }
  555. static struct qeth_ipa_cmd *qeth_check_ipa_data(struct qeth_card *card,
  556. struct qeth_ipa_cmd *cmd)
  557. {
  558. QETH_CARD_TEXT(card, 5, "chkipad");
  559. if (IS_IPA_REPLY(cmd)) {
  560. if (cmd->hdr.command != IPA_CMD_SETCCID &&
  561. cmd->hdr.command != IPA_CMD_DELCCID &&
  562. cmd->hdr.command != IPA_CMD_MODCCID &&
  563. cmd->hdr.command != IPA_CMD_SET_DIAG_ASS)
  564. qeth_issue_ipa_msg(cmd, cmd->hdr.return_code, card);
  565. return cmd;
  566. }
  567. /* handle unsolicited event: */
  568. switch (cmd->hdr.command) {
  569. case IPA_CMD_STOPLAN:
  570. if (cmd->hdr.return_code == IPA_RC_VEPA_TO_VEB_TRANSITION) {
  571. dev_err(&card->gdev->dev,
  572. "Interface %s is down because the adjacent port is no longer in reflective relay mode\n",
  573. QETH_CARD_IFNAME(card));
  574. qeth_close_dev(card);
  575. } else {
  576. dev_warn(&card->gdev->dev,
  577. "The link for interface %s on CHPID 0x%X failed\n",
  578. QETH_CARD_IFNAME(card), card->info.chpid);
  579. qeth_issue_ipa_msg(cmd, cmd->hdr.return_code, card);
  580. netif_carrier_off(card->dev);
  581. }
  582. return NULL;
  583. case IPA_CMD_STARTLAN:
  584. dev_info(&card->gdev->dev,
  585. "The link for %s on CHPID 0x%X has been restored\n",
  586. QETH_CARD_IFNAME(card), card->info.chpid);
  587. if (card->info.hwtrap)
  588. card->info.hwtrap = 2;
  589. qeth_schedule_recovery(card);
  590. return NULL;
  591. case IPA_CMD_SETBRIDGEPORT_IQD:
  592. case IPA_CMD_SETBRIDGEPORT_OSA:
  593. case IPA_CMD_ADDRESS_CHANGE_NOTIF:
  594. if (card->discipline->control_event_handler(card, cmd))
  595. return cmd;
  596. return NULL;
  597. case IPA_CMD_MODCCID:
  598. return cmd;
  599. case IPA_CMD_REGISTER_LOCAL_ADDR:
  600. QETH_CARD_TEXT(card, 3, "irla");
  601. return NULL;
  602. case IPA_CMD_UNREGISTER_LOCAL_ADDR:
  603. QETH_CARD_TEXT(card, 3, "urla");
  604. return NULL;
  605. default:
  606. QETH_DBF_MESSAGE(2, "Received data is IPA but not a reply!\n");
  607. return cmd;
  608. }
  609. }
  610. void qeth_clear_ipacmd_list(struct qeth_card *card)
  611. {
  612. struct qeth_reply *reply, *r;
  613. unsigned long flags;
  614. QETH_CARD_TEXT(card, 4, "clipalst");
  615. spin_lock_irqsave(&card->lock, flags);
  616. list_for_each_entry_safe(reply, r, &card->cmd_waiter_list, list) {
  617. qeth_get_reply(reply);
  618. reply->rc = -EIO;
  619. atomic_inc(&reply->received);
  620. list_del_init(&reply->list);
  621. wake_up(&reply->wait_q);
  622. qeth_put_reply(reply);
  623. }
  624. spin_unlock_irqrestore(&card->lock, flags);
  625. }
  626. EXPORT_SYMBOL_GPL(qeth_clear_ipacmd_list);
  627. static int qeth_check_idx_response(struct qeth_card *card,
  628. unsigned char *buffer)
  629. {
  630. if (!buffer)
  631. return 0;
  632. QETH_DBF_HEX(CTRL, 2, buffer, QETH_DBF_CTRL_LEN);
  633. if ((buffer[2] & 0xc0) == 0xc0) {
  634. QETH_DBF_MESSAGE(2, "received an IDX TERMINATE with cause code %#04x\n",
  635. buffer[4]);
  636. QETH_CARD_TEXT(card, 2, "ckidxres");
  637. QETH_CARD_TEXT(card, 2, " idxterm");
  638. QETH_CARD_TEXT_(card, 2, " rc%d", -EIO);
  639. if (buffer[4] == 0xf6) {
  640. dev_err(&card->gdev->dev,
  641. "The qeth device is not configured "
  642. "for the OSI layer required by z/VM\n");
  643. return -EPERM;
  644. }
  645. return -EIO;
  646. }
  647. return 0;
  648. }
  649. static struct qeth_cmd_buffer *__qeth_get_buffer(struct qeth_channel *channel)
  650. {
  651. __u8 index;
  652. index = channel->io_buf_no;
  653. do {
  654. if (channel->iob[index].state == BUF_STATE_FREE) {
  655. channel->iob[index].state = BUF_STATE_LOCKED;
  656. channel->io_buf_no = (channel->io_buf_no + 1) %
  657. QETH_CMD_BUFFER_NO;
  658. memset(channel->iob[index].data, 0, QETH_BUFSIZE);
  659. return channel->iob + index;
  660. }
  661. index = (index + 1) % QETH_CMD_BUFFER_NO;
  662. } while (index != channel->io_buf_no);
  663. return NULL;
  664. }
  665. void qeth_release_buffer(struct qeth_channel *channel,
  666. struct qeth_cmd_buffer *iob)
  667. {
  668. unsigned long flags;
  669. spin_lock_irqsave(&channel->iob_lock, flags);
  670. iob->state = BUF_STATE_FREE;
  671. iob->callback = qeth_send_control_data_cb;
  672. iob->rc = 0;
  673. spin_unlock_irqrestore(&channel->iob_lock, flags);
  674. wake_up(&channel->wait_q);
  675. }
  676. EXPORT_SYMBOL_GPL(qeth_release_buffer);
  677. static void qeth_release_buffer_cb(struct qeth_card *card,
  678. struct qeth_channel *channel,
  679. struct qeth_cmd_buffer *iob)
  680. {
  681. qeth_release_buffer(channel, iob);
  682. }
  683. static struct qeth_cmd_buffer *qeth_get_buffer(struct qeth_channel *channel)
  684. {
  685. struct qeth_cmd_buffer *buffer = NULL;
  686. unsigned long flags;
  687. spin_lock_irqsave(&channel->iob_lock, flags);
  688. buffer = __qeth_get_buffer(channel);
  689. spin_unlock_irqrestore(&channel->iob_lock, flags);
  690. return buffer;
  691. }
  692. struct qeth_cmd_buffer *qeth_wait_for_buffer(struct qeth_channel *channel)
  693. {
  694. struct qeth_cmd_buffer *buffer;
  695. wait_event(channel->wait_q,
  696. ((buffer = qeth_get_buffer(channel)) != NULL));
  697. return buffer;
  698. }
  699. EXPORT_SYMBOL_GPL(qeth_wait_for_buffer);
  700. void qeth_clear_cmd_buffers(struct qeth_channel *channel)
  701. {
  702. int cnt;
  703. for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++)
  704. qeth_release_buffer(channel, &channel->iob[cnt]);
  705. channel->io_buf_no = 0;
  706. }
  707. EXPORT_SYMBOL_GPL(qeth_clear_cmd_buffers);
  708. static void qeth_send_control_data_cb(struct qeth_card *card,
  709. struct qeth_channel *channel,
  710. struct qeth_cmd_buffer *iob)
  711. {
  712. struct qeth_ipa_cmd *cmd = NULL;
  713. struct qeth_reply *reply, *r;
  714. unsigned long flags;
  715. int keep_reply;
  716. int rc = 0;
  717. QETH_CARD_TEXT(card, 4, "sndctlcb");
  718. rc = qeth_check_idx_response(card, iob->data);
  719. switch (rc) {
  720. case 0:
  721. break;
  722. case -EIO:
  723. qeth_clear_ipacmd_list(card);
  724. qeth_schedule_recovery(card);
  725. /* fall through */
  726. default:
  727. goto out;
  728. }
  729. if (IS_IPA(iob->data)) {
  730. cmd = (struct qeth_ipa_cmd *) PDU_ENCAPSULATION(iob->data);
  731. cmd = qeth_check_ipa_data(card, cmd);
  732. if (!cmd)
  733. goto out;
  734. if (IS_OSN(card) && card->osn_info.assist_cb &&
  735. cmd->hdr.command != IPA_CMD_STARTLAN) {
  736. card->osn_info.assist_cb(card->dev, cmd);
  737. goto out;
  738. }
  739. } else {
  740. /* non-IPA commands should only flow during initialization */
  741. if (card->state != CARD_STATE_DOWN)
  742. goto out;
  743. }
  744. spin_lock_irqsave(&card->lock, flags);
  745. list_for_each_entry_safe(reply, r, &card->cmd_waiter_list, list) {
  746. if ((reply->seqno == QETH_IDX_COMMAND_SEQNO) ||
  747. ((cmd) && (reply->seqno == cmd->hdr.seqno))) {
  748. qeth_get_reply(reply);
  749. list_del_init(&reply->list);
  750. spin_unlock_irqrestore(&card->lock, flags);
  751. keep_reply = 0;
  752. if (reply->callback != NULL) {
  753. if (cmd) {
  754. reply->offset = (__u16)((char *)cmd -
  755. (char *)iob->data);
  756. keep_reply = reply->callback(card,
  757. reply,
  758. (unsigned long)cmd);
  759. } else
  760. keep_reply = reply->callback(card,
  761. reply,
  762. (unsigned long)iob);
  763. }
  764. if (cmd)
  765. reply->rc = (u16) cmd->hdr.return_code;
  766. else if (iob->rc)
  767. reply->rc = iob->rc;
  768. if (keep_reply) {
  769. spin_lock_irqsave(&card->lock, flags);
  770. list_add_tail(&reply->list,
  771. &card->cmd_waiter_list);
  772. spin_unlock_irqrestore(&card->lock, flags);
  773. } else {
  774. atomic_inc(&reply->received);
  775. wake_up(&reply->wait_q);
  776. }
  777. qeth_put_reply(reply);
  778. goto out;
  779. }
  780. }
  781. spin_unlock_irqrestore(&card->lock, flags);
  782. out:
  783. memcpy(&card->seqno.pdu_hdr_ack,
  784. QETH_PDU_HEADER_SEQ_NO(iob->data),
  785. QETH_SEQ_NO_LENGTH);
  786. qeth_release_buffer(channel, iob);
  787. }
  788. static int qeth_set_thread_start_bit(struct qeth_card *card,
  789. unsigned long thread)
  790. {
  791. unsigned long flags;
  792. spin_lock_irqsave(&card->thread_mask_lock, flags);
  793. if (!(card->thread_allowed_mask & thread) ||
  794. (card->thread_start_mask & thread)) {
  795. spin_unlock_irqrestore(&card->thread_mask_lock, flags);
  796. return -EPERM;
  797. }
  798. card->thread_start_mask |= thread;
  799. spin_unlock_irqrestore(&card->thread_mask_lock, flags);
  800. return 0;
  801. }
  802. void qeth_clear_thread_start_bit(struct qeth_card *card, unsigned long thread)
  803. {
  804. unsigned long flags;
  805. spin_lock_irqsave(&card->thread_mask_lock, flags);
  806. card->thread_start_mask &= ~thread;
  807. spin_unlock_irqrestore(&card->thread_mask_lock, flags);
  808. wake_up(&card->wait_q);
  809. }
  810. EXPORT_SYMBOL_GPL(qeth_clear_thread_start_bit);
  811. void qeth_clear_thread_running_bit(struct qeth_card *card, unsigned long thread)
  812. {
  813. unsigned long flags;
  814. spin_lock_irqsave(&card->thread_mask_lock, flags);
  815. card->thread_running_mask &= ~thread;
  816. spin_unlock_irqrestore(&card->thread_mask_lock, flags);
  817. wake_up_all(&card->wait_q);
  818. }
  819. EXPORT_SYMBOL_GPL(qeth_clear_thread_running_bit);
  820. static int __qeth_do_run_thread(struct qeth_card *card, unsigned long thread)
  821. {
  822. unsigned long flags;
  823. int rc = 0;
  824. spin_lock_irqsave(&card->thread_mask_lock, flags);
  825. if (card->thread_start_mask & thread) {
  826. if ((card->thread_allowed_mask & thread) &&
  827. !(card->thread_running_mask & thread)) {
  828. rc = 1;
  829. card->thread_start_mask &= ~thread;
  830. card->thread_running_mask |= thread;
  831. } else
  832. rc = -EPERM;
  833. }
  834. spin_unlock_irqrestore(&card->thread_mask_lock, flags);
  835. return rc;
  836. }
  837. int qeth_do_run_thread(struct qeth_card *card, unsigned long thread)
  838. {
  839. int rc = 0;
  840. wait_event(card->wait_q,
  841. (rc = __qeth_do_run_thread(card, thread)) >= 0);
  842. return rc;
  843. }
  844. EXPORT_SYMBOL_GPL(qeth_do_run_thread);
  845. void qeth_schedule_recovery(struct qeth_card *card)
  846. {
  847. QETH_CARD_TEXT(card, 2, "startrec");
  848. if (qeth_set_thread_start_bit(card, QETH_RECOVER_THREAD) == 0)
  849. schedule_work(&card->kernel_thread_starter);
  850. }
  851. EXPORT_SYMBOL_GPL(qeth_schedule_recovery);
  852. static int qeth_get_problem(struct qeth_card *card, struct ccw_device *cdev,
  853. struct irb *irb)
  854. {
  855. int dstat, cstat;
  856. char *sense;
  857. sense = (char *) irb->ecw;
  858. cstat = irb->scsw.cmd.cstat;
  859. dstat = irb->scsw.cmd.dstat;
  860. if (cstat & (SCHN_STAT_CHN_CTRL_CHK | SCHN_STAT_INTF_CTRL_CHK |
  861. SCHN_STAT_CHN_DATA_CHK | SCHN_STAT_CHAIN_CHECK |
  862. SCHN_STAT_PROT_CHECK | SCHN_STAT_PROG_CHECK)) {
  863. QETH_CARD_TEXT(card, 2, "CGENCHK");
  864. dev_warn(&cdev->dev, "The qeth device driver "
  865. "failed to recover an error on the device\n");
  866. QETH_DBF_MESSAGE(2, "check on channel %x with dstat=%#x, cstat=%#x\n",
  867. CCW_DEVID(cdev), dstat, cstat);
  868. print_hex_dump(KERN_WARNING, "qeth: irb ", DUMP_PREFIX_OFFSET,
  869. 16, 1, irb, 64, 1);
  870. return 1;
  871. }
  872. if (dstat & DEV_STAT_UNIT_CHECK) {
  873. if (sense[SENSE_RESETTING_EVENT_BYTE] &
  874. SENSE_RESETTING_EVENT_FLAG) {
  875. QETH_CARD_TEXT(card, 2, "REVIND");
  876. return 1;
  877. }
  878. if (sense[SENSE_COMMAND_REJECT_BYTE] &
  879. SENSE_COMMAND_REJECT_FLAG) {
  880. QETH_CARD_TEXT(card, 2, "CMDREJi");
  881. return 1;
  882. }
  883. if ((sense[2] == 0xaf) && (sense[3] == 0xfe)) {
  884. QETH_CARD_TEXT(card, 2, "AFFE");
  885. return 1;
  886. }
  887. if ((!sense[0]) && (!sense[1]) && (!sense[2]) && (!sense[3])) {
  888. QETH_CARD_TEXT(card, 2, "ZEROSEN");
  889. return 0;
  890. }
  891. QETH_CARD_TEXT(card, 2, "DGENCHK");
  892. return 1;
  893. }
  894. return 0;
  895. }
  896. static long qeth_check_irb_error(struct qeth_card *card,
  897. struct ccw_device *cdev, unsigned long intparm,
  898. struct irb *irb)
  899. {
  900. if (!IS_ERR(irb))
  901. return 0;
  902. switch (PTR_ERR(irb)) {
  903. case -EIO:
  904. QETH_DBF_MESSAGE(2, "i/o-error on channel %x\n",
  905. CCW_DEVID(cdev));
  906. QETH_CARD_TEXT(card, 2, "ckirberr");
  907. QETH_CARD_TEXT_(card, 2, " rc%d", -EIO);
  908. break;
  909. case -ETIMEDOUT:
  910. dev_warn(&cdev->dev, "A hardware operation timed out"
  911. " on the device\n");
  912. QETH_CARD_TEXT(card, 2, "ckirberr");
  913. QETH_CARD_TEXT_(card, 2, " rc%d", -ETIMEDOUT);
  914. if (intparm == QETH_RCD_PARM) {
  915. if (card->data.ccwdev == cdev) {
  916. card->data.state = CH_STATE_DOWN;
  917. wake_up(&card->wait_q);
  918. }
  919. }
  920. break;
  921. default:
  922. QETH_DBF_MESSAGE(2, "unknown error %ld on channel %x\n",
  923. PTR_ERR(irb), CCW_DEVID(cdev));
  924. QETH_CARD_TEXT(card, 2, "ckirberr");
  925. QETH_CARD_TEXT(card, 2, " rc???");
  926. }
  927. return PTR_ERR(irb);
  928. }
  929. static void qeth_irq(struct ccw_device *cdev, unsigned long intparm,
  930. struct irb *irb)
  931. {
  932. int rc;
  933. int cstat, dstat;
  934. struct qeth_cmd_buffer *iob = NULL;
  935. struct ccwgroup_device *gdev;
  936. struct qeth_channel *channel;
  937. struct qeth_card *card;
  938. /* while we hold the ccwdev lock, this stays valid: */
  939. gdev = dev_get_drvdata(&cdev->dev);
  940. card = dev_get_drvdata(&gdev->dev);
  941. if (!card)
  942. return;
  943. QETH_CARD_TEXT(card, 5, "irq");
  944. if (card->read.ccwdev == cdev) {
  945. channel = &card->read;
  946. QETH_CARD_TEXT(card, 5, "read");
  947. } else if (card->write.ccwdev == cdev) {
  948. channel = &card->write;
  949. QETH_CARD_TEXT(card, 5, "write");
  950. } else {
  951. channel = &card->data;
  952. QETH_CARD_TEXT(card, 5, "data");
  953. }
  954. if (qeth_intparm_is_iob(intparm))
  955. iob = (struct qeth_cmd_buffer *) __va((addr_t)intparm);
  956. if (qeth_check_irb_error(card, cdev, intparm, irb)) {
  957. /* IO was terminated, free its resources. */
  958. if (iob)
  959. qeth_release_buffer(iob->channel, iob);
  960. atomic_set(&channel->irq_pending, 0);
  961. wake_up(&card->wait_q);
  962. return;
  963. }
  964. atomic_set(&channel->irq_pending, 0);
  965. if (irb->scsw.cmd.fctl & (SCSW_FCTL_CLEAR_FUNC))
  966. channel->state = CH_STATE_STOPPED;
  967. if (irb->scsw.cmd.fctl & (SCSW_FCTL_HALT_FUNC))
  968. channel->state = CH_STATE_HALTED;
  969. /*let's wake up immediately on data channel*/
  970. if ((channel == &card->data) && (intparm != 0) &&
  971. (intparm != QETH_RCD_PARM))
  972. goto out;
  973. if (intparm == QETH_CLEAR_CHANNEL_PARM) {
  974. QETH_CARD_TEXT(card, 6, "clrchpar");
  975. /* we don't have to handle this further */
  976. intparm = 0;
  977. }
  978. if (intparm == QETH_HALT_CHANNEL_PARM) {
  979. QETH_CARD_TEXT(card, 6, "hltchpar");
  980. /* we don't have to handle this further */
  981. intparm = 0;
  982. }
  983. cstat = irb->scsw.cmd.cstat;
  984. dstat = irb->scsw.cmd.dstat;
  985. if ((dstat & DEV_STAT_UNIT_EXCEP) ||
  986. (dstat & DEV_STAT_UNIT_CHECK) ||
  987. (cstat)) {
  988. if (irb->esw.esw0.erw.cons) {
  989. dev_warn(&channel->ccwdev->dev,
  990. "The qeth device driver failed to recover "
  991. "an error on the device\n");
  992. QETH_DBF_MESSAGE(2, "sense data available on channel %x: cstat %#X dstat %#X\n",
  993. CCW_DEVID(channel->ccwdev), cstat,
  994. dstat);
  995. print_hex_dump(KERN_WARNING, "qeth: irb ",
  996. DUMP_PREFIX_OFFSET, 16, 1, irb, 32, 1);
  997. print_hex_dump(KERN_WARNING, "qeth: sense data ",
  998. DUMP_PREFIX_OFFSET, 16, 1, irb->ecw, 32, 1);
  999. }
  1000. if (intparm == QETH_RCD_PARM) {
  1001. channel->state = CH_STATE_DOWN;
  1002. goto out;
  1003. }
  1004. rc = qeth_get_problem(card, cdev, irb);
  1005. if (rc) {
  1006. card->read_or_write_problem = 1;
  1007. qeth_clear_ipacmd_list(card);
  1008. qeth_schedule_recovery(card);
  1009. goto out;
  1010. }
  1011. }
  1012. if (intparm == QETH_RCD_PARM) {
  1013. channel->state = CH_STATE_RCD_DONE;
  1014. goto out;
  1015. }
  1016. if (channel == &card->data)
  1017. return;
  1018. if (channel == &card->read &&
  1019. channel->state == CH_STATE_UP)
  1020. __qeth_issue_next_read(card);
  1021. if (iob && iob->callback)
  1022. iob->callback(card, iob->channel, iob);
  1023. out:
  1024. wake_up(&card->wait_q);
  1025. return;
  1026. }
  1027. static void qeth_notify_skbs(struct qeth_qdio_out_q *q,
  1028. struct qeth_qdio_out_buffer *buf,
  1029. enum iucv_tx_notify notification)
  1030. {
  1031. struct sk_buff *skb;
  1032. skb_queue_walk(&buf->skb_list, skb) {
  1033. QETH_CARD_TEXT_(q->card, 5, "skbn%d", notification);
  1034. QETH_CARD_TEXT_(q->card, 5, "%lx", (long) skb);
  1035. if (skb->protocol == htons(ETH_P_AF_IUCV) && skb->sk)
  1036. iucv_sk(skb->sk)->sk_txnotify(skb, notification);
  1037. }
  1038. }
  1039. static void qeth_release_skbs(struct qeth_qdio_out_buffer *buf)
  1040. {
  1041. /* release may never happen from within CQ tasklet scope */
  1042. WARN_ON_ONCE(atomic_read(&buf->state) == QETH_QDIO_BUF_IN_CQ);
  1043. if (atomic_read(&buf->state) == QETH_QDIO_BUF_PENDING)
  1044. qeth_notify_skbs(buf->q, buf, TX_NOTIFY_GENERALERROR);
  1045. __skb_queue_purge(&buf->skb_list);
  1046. }
  1047. static void qeth_clear_output_buffer(struct qeth_qdio_out_q *queue,
  1048. struct qeth_qdio_out_buffer *buf)
  1049. {
  1050. int i;
  1051. /* is PCI flag set on buffer? */
  1052. if (buf->buffer->element[0].sflags & SBAL_SFLAGS0_PCI_REQ)
  1053. atomic_dec(&queue->set_pci_flags_count);
  1054. qeth_release_skbs(buf);
  1055. for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(queue->card); ++i) {
  1056. if (buf->buffer->element[i].addr && buf->is_header[i])
  1057. kmem_cache_free(qeth_core_header_cache,
  1058. buf->buffer->element[i].addr);
  1059. buf->is_header[i] = 0;
  1060. }
  1061. qeth_scrub_qdio_buffer(buf->buffer,
  1062. QETH_MAX_BUFFER_ELEMENTS(queue->card));
  1063. buf->next_element_to_fill = 0;
  1064. atomic_set(&buf->state, QETH_QDIO_BUF_EMPTY);
  1065. }
  1066. static void qeth_clear_outq_buffers(struct qeth_qdio_out_q *q, int free)
  1067. {
  1068. int j;
  1069. for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) {
  1070. if (!q->bufs[j])
  1071. continue;
  1072. qeth_cleanup_handled_pending(q, j, 1);
  1073. qeth_clear_output_buffer(q, q->bufs[j]);
  1074. if (free) {
  1075. kmem_cache_free(qeth_qdio_outbuf_cache, q->bufs[j]);
  1076. q->bufs[j] = NULL;
  1077. }
  1078. }
  1079. }
  1080. void qeth_clear_qdio_buffers(struct qeth_card *card)
  1081. {
  1082. int i;
  1083. QETH_CARD_TEXT(card, 2, "clearqdbf");
  1084. /* clear outbound buffers to free skbs */
  1085. for (i = 0; i < card->qdio.no_out_queues; ++i) {
  1086. if (card->qdio.out_qs[i]) {
  1087. qeth_clear_outq_buffers(card->qdio.out_qs[i], 0);
  1088. }
  1089. }
  1090. }
  1091. EXPORT_SYMBOL_GPL(qeth_clear_qdio_buffers);
  1092. static void qeth_free_buffer_pool(struct qeth_card *card)
  1093. {
  1094. struct qeth_buffer_pool_entry *pool_entry, *tmp;
  1095. int i = 0;
  1096. list_for_each_entry_safe(pool_entry, tmp,
  1097. &card->qdio.init_pool.entry_list, init_list){
  1098. for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i)
  1099. free_page((unsigned long)pool_entry->elements[i]);
  1100. list_del(&pool_entry->init_list);
  1101. kfree(pool_entry);
  1102. }
  1103. }
  1104. static void qeth_clean_channel(struct qeth_channel *channel)
  1105. {
  1106. struct ccw_device *cdev = channel->ccwdev;
  1107. int cnt;
  1108. QETH_DBF_TEXT(SETUP, 2, "freech");
  1109. spin_lock_irq(get_ccwdev_lock(cdev));
  1110. cdev->handler = NULL;
  1111. spin_unlock_irq(get_ccwdev_lock(cdev));
  1112. for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++)
  1113. kfree(channel->iob[cnt].data);
  1114. kfree(channel->ccw);
  1115. }
  1116. static int qeth_setup_channel(struct qeth_channel *channel, bool alloc_buffers)
  1117. {
  1118. struct ccw_device *cdev = channel->ccwdev;
  1119. int cnt;
  1120. QETH_DBF_TEXT(SETUP, 2, "setupch");
  1121. channel->ccw = kmalloc(sizeof(struct ccw1), GFP_KERNEL | GFP_DMA);
  1122. if (!channel->ccw)
  1123. return -ENOMEM;
  1124. channel->state = CH_STATE_DOWN;
  1125. atomic_set(&channel->irq_pending, 0);
  1126. init_waitqueue_head(&channel->wait_q);
  1127. spin_lock_irq(get_ccwdev_lock(cdev));
  1128. cdev->handler = qeth_irq;
  1129. spin_unlock_irq(get_ccwdev_lock(cdev));
  1130. if (!alloc_buffers)
  1131. return 0;
  1132. for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++) {
  1133. channel->iob[cnt].data = kmalloc(QETH_BUFSIZE,
  1134. GFP_KERNEL | GFP_DMA);
  1135. if (channel->iob[cnt].data == NULL)
  1136. break;
  1137. channel->iob[cnt].state = BUF_STATE_FREE;
  1138. channel->iob[cnt].channel = channel;
  1139. channel->iob[cnt].callback = qeth_send_control_data_cb;
  1140. channel->iob[cnt].rc = 0;
  1141. }
  1142. if (cnt < QETH_CMD_BUFFER_NO) {
  1143. qeth_clean_channel(channel);
  1144. return -ENOMEM;
  1145. }
  1146. channel->io_buf_no = 0;
  1147. spin_lock_init(&channel->iob_lock);
  1148. return 0;
  1149. }
  1150. static void qeth_set_single_write_queues(struct qeth_card *card)
  1151. {
  1152. if ((atomic_read(&card->qdio.state) != QETH_QDIO_UNINITIALIZED) &&
  1153. (card->qdio.no_out_queues == 4))
  1154. qeth_free_qdio_buffers(card);
  1155. card->qdio.no_out_queues = 1;
  1156. if (card->qdio.default_out_queue != 0)
  1157. dev_info(&card->gdev->dev, "Priority Queueing not supported\n");
  1158. card->qdio.default_out_queue = 0;
  1159. }
  1160. static void qeth_set_multiple_write_queues(struct qeth_card *card)
  1161. {
  1162. if ((atomic_read(&card->qdio.state) != QETH_QDIO_UNINITIALIZED) &&
  1163. (card->qdio.no_out_queues == 1)) {
  1164. qeth_free_qdio_buffers(card);
  1165. card->qdio.default_out_queue = 2;
  1166. }
  1167. card->qdio.no_out_queues = 4;
  1168. }
  1169. static void qeth_update_from_chp_desc(struct qeth_card *card)
  1170. {
  1171. struct ccw_device *ccwdev;
  1172. struct channel_path_desc_fmt0 *chp_dsc;
  1173. QETH_DBF_TEXT(SETUP, 2, "chp_desc");
  1174. ccwdev = card->data.ccwdev;
  1175. chp_dsc = ccw_device_get_chp_desc(ccwdev, 0);
  1176. if (!chp_dsc)
  1177. goto out;
  1178. card->info.func_level = 0x4100 + chp_dsc->desc;
  1179. if (card->info.type == QETH_CARD_TYPE_IQD)
  1180. goto out;
  1181. /* CHPP field bit 6 == 1 -> single queue */
  1182. if ((chp_dsc->chpp & 0x02) == 0x02)
  1183. qeth_set_single_write_queues(card);
  1184. else
  1185. qeth_set_multiple_write_queues(card);
  1186. out:
  1187. kfree(chp_dsc);
  1188. QETH_DBF_TEXT_(SETUP, 2, "nr:%x", card->qdio.no_out_queues);
  1189. QETH_DBF_TEXT_(SETUP, 2, "lvl:%02x", card->info.func_level);
  1190. }
  1191. static void qeth_init_qdio_info(struct qeth_card *card)
  1192. {
  1193. QETH_DBF_TEXT(SETUP, 4, "intqdinf");
  1194. atomic_set(&card->qdio.state, QETH_QDIO_UNINITIALIZED);
  1195. card->qdio.do_prio_queueing = QETH_PRIOQ_DEFAULT;
  1196. card->qdio.default_out_queue = QETH_DEFAULT_QUEUE;
  1197. card->qdio.no_out_queues = QETH_MAX_QUEUES;
  1198. /* inbound */
  1199. card->qdio.no_in_queues = 1;
  1200. card->qdio.in_buf_size = QETH_IN_BUF_SIZE_DEFAULT;
  1201. if (card->info.type == QETH_CARD_TYPE_IQD)
  1202. card->qdio.init_pool.buf_count = QETH_IN_BUF_COUNT_HSDEFAULT;
  1203. else
  1204. card->qdio.init_pool.buf_count = QETH_IN_BUF_COUNT_DEFAULT;
  1205. card->qdio.in_buf_pool.buf_count = card->qdio.init_pool.buf_count;
  1206. INIT_LIST_HEAD(&card->qdio.in_buf_pool.entry_list);
  1207. INIT_LIST_HEAD(&card->qdio.init_pool.entry_list);
  1208. }
  1209. static void qeth_set_initial_options(struct qeth_card *card)
  1210. {
  1211. card->options.route4.type = NO_ROUTER;
  1212. card->options.route6.type = NO_ROUTER;
  1213. card->options.rx_sg_cb = QETH_RX_SG_CB;
  1214. card->options.isolation = ISOLATION_MODE_NONE;
  1215. card->options.cq = QETH_CQ_DISABLED;
  1216. card->options.layer = QETH_DISCIPLINE_UNDETERMINED;
  1217. }
  1218. static int qeth_do_start_thread(struct qeth_card *card, unsigned long thread)
  1219. {
  1220. unsigned long flags;
  1221. int rc = 0;
  1222. spin_lock_irqsave(&card->thread_mask_lock, flags);
  1223. QETH_CARD_TEXT_(card, 4, " %02x%02x%02x",
  1224. (u8) card->thread_start_mask,
  1225. (u8) card->thread_allowed_mask,
  1226. (u8) card->thread_running_mask);
  1227. rc = (card->thread_start_mask & thread);
  1228. spin_unlock_irqrestore(&card->thread_mask_lock, flags);
  1229. return rc;
  1230. }
  1231. static void qeth_start_kernel_thread(struct work_struct *work)
  1232. {
  1233. struct task_struct *ts;
  1234. struct qeth_card *card = container_of(work, struct qeth_card,
  1235. kernel_thread_starter);
  1236. QETH_CARD_TEXT(card , 2, "strthrd");
  1237. if (card->read.state != CH_STATE_UP &&
  1238. card->write.state != CH_STATE_UP)
  1239. return;
  1240. if (qeth_do_start_thread(card, QETH_RECOVER_THREAD)) {
  1241. ts = kthread_run(card->discipline->recover, (void *)card,
  1242. "qeth_recover");
  1243. if (IS_ERR(ts)) {
  1244. qeth_clear_thread_start_bit(card, QETH_RECOVER_THREAD);
  1245. qeth_clear_thread_running_bit(card,
  1246. QETH_RECOVER_THREAD);
  1247. }
  1248. }
  1249. }
  1250. static void qeth_buffer_reclaim_work(struct work_struct *);
  1251. static void qeth_setup_card(struct qeth_card *card)
  1252. {
  1253. QETH_DBF_TEXT(SETUP, 2, "setupcrd");
  1254. QETH_DBF_HEX(SETUP, 2, &card, sizeof(void *));
  1255. card->info.type = CARD_RDEV(card)->id.driver_info;
  1256. card->state = CARD_STATE_DOWN;
  1257. spin_lock_init(&card->mclock);
  1258. spin_lock_init(&card->lock);
  1259. spin_lock_init(&card->ip_lock);
  1260. spin_lock_init(&card->thread_mask_lock);
  1261. mutex_init(&card->conf_mutex);
  1262. mutex_init(&card->discipline_mutex);
  1263. mutex_init(&card->vid_list_mutex);
  1264. INIT_WORK(&card->kernel_thread_starter, qeth_start_kernel_thread);
  1265. INIT_LIST_HEAD(&card->cmd_waiter_list);
  1266. init_waitqueue_head(&card->wait_q);
  1267. qeth_set_initial_options(card);
  1268. /* IP address takeover */
  1269. INIT_LIST_HEAD(&card->ipato.entries);
  1270. qeth_init_qdio_info(card);
  1271. INIT_DELAYED_WORK(&card->buffer_reclaim_work, qeth_buffer_reclaim_work);
  1272. INIT_WORK(&card->close_dev_work, qeth_close_dev_handler);
  1273. }
  1274. static void qeth_core_sl_print(struct seq_file *m, struct service_level *slr)
  1275. {
  1276. struct qeth_card *card = container_of(slr, struct qeth_card,
  1277. qeth_service_level);
  1278. if (card->info.mcl_level[0])
  1279. seq_printf(m, "qeth: %s firmware level %s\n",
  1280. CARD_BUS_ID(card), card->info.mcl_level);
  1281. }
  1282. static struct qeth_card *qeth_alloc_card(struct ccwgroup_device *gdev)
  1283. {
  1284. struct qeth_card *card;
  1285. QETH_DBF_TEXT(SETUP, 2, "alloccrd");
  1286. card = kzalloc(sizeof(*card), GFP_KERNEL);
  1287. if (!card)
  1288. goto out;
  1289. QETH_DBF_HEX(SETUP, 2, &card, sizeof(void *));
  1290. card->gdev = gdev;
  1291. dev_set_drvdata(&gdev->dev, card);
  1292. CARD_RDEV(card) = gdev->cdev[0];
  1293. CARD_WDEV(card) = gdev->cdev[1];
  1294. CARD_DDEV(card) = gdev->cdev[2];
  1295. if (qeth_setup_channel(&card->read, true))
  1296. goto out_ip;
  1297. if (qeth_setup_channel(&card->write, true))
  1298. goto out_channel;
  1299. if (qeth_setup_channel(&card->data, false))
  1300. goto out_data;
  1301. card->qeth_service_level.seq_print = qeth_core_sl_print;
  1302. register_service_level(&card->qeth_service_level);
  1303. return card;
  1304. out_data:
  1305. qeth_clean_channel(&card->write);
  1306. out_channel:
  1307. qeth_clean_channel(&card->read);
  1308. out_ip:
  1309. dev_set_drvdata(&gdev->dev, NULL);
  1310. kfree(card);
  1311. out:
  1312. return NULL;
  1313. }
  1314. static int qeth_clear_channel(struct qeth_card *card,
  1315. struct qeth_channel *channel)
  1316. {
  1317. int rc;
  1318. QETH_CARD_TEXT(card, 3, "clearch");
  1319. spin_lock_irq(get_ccwdev_lock(channel->ccwdev));
  1320. rc = ccw_device_clear(channel->ccwdev, QETH_CLEAR_CHANNEL_PARM);
  1321. spin_unlock_irq(get_ccwdev_lock(channel->ccwdev));
  1322. if (rc)
  1323. return rc;
  1324. rc = wait_event_interruptible_timeout(card->wait_q,
  1325. channel->state == CH_STATE_STOPPED, QETH_TIMEOUT);
  1326. if (rc == -ERESTARTSYS)
  1327. return rc;
  1328. if (channel->state != CH_STATE_STOPPED)
  1329. return -ETIME;
  1330. channel->state = CH_STATE_DOWN;
  1331. return 0;
  1332. }
  1333. static int qeth_halt_channel(struct qeth_card *card,
  1334. struct qeth_channel *channel)
  1335. {
  1336. int rc;
  1337. QETH_CARD_TEXT(card, 3, "haltch");
  1338. spin_lock_irq(get_ccwdev_lock(channel->ccwdev));
  1339. rc = ccw_device_halt(channel->ccwdev, QETH_HALT_CHANNEL_PARM);
  1340. spin_unlock_irq(get_ccwdev_lock(channel->ccwdev));
  1341. if (rc)
  1342. return rc;
  1343. rc = wait_event_interruptible_timeout(card->wait_q,
  1344. channel->state == CH_STATE_HALTED, QETH_TIMEOUT);
  1345. if (rc == -ERESTARTSYS)
  1346. return rc;
  1347. if (channel->state != CH_STATE_HALTED)
  1348. return -ETIME;
  1349. return 0;
  1350. }
  1351. static int qeth_halt_channels(struct qeth_card *card)
  1352. {
  1353. int rc1 = 0, rc2 = 0, rc3 = 0;
  1354. QETH_CARD_TEXT(card, 3, "haltchs");
  1355. rc1 = qeth_halt_channel(card, &card->read);
  1356. rc2 = qeth_halt_channel(card, &card->write);
  1357. rc3 = qeth_halt_channel(card, &card->data);
  1358. if (rc1)
  1359. return rc1;
  1360. if (rc2)
  1361. return rc2;
  1362. return rc3;
  1363. }
  1364. static int qeth_clear_channels(struct qeth_card *card)
  1365. {
  1366. int rc1 = 0, rc2 = 0, rc3 = 0;
  1367. QETH_CARD_TEXT(card, 3, "clearchs");
  1368. rc1 = qeth_clear_channel(card, &card->read);
  1369. rc2 = qeth_clear_channel(card, &card->write);
  1370. rc3 = qeth_clear_channel(card, &card->data);
  1371. if (rc1)
  1372. return rc1;
  1373. if (rc2)
  1374. return rc2;
  1375. return rc3;
  1376. }
  1377. static int qeth_clear_halt_card(struct qeth_card *card, int halt)
  1378. {
  1379. int rc = 0;
  1380. QETH_CARD_TEXT(card, 3, "clhacrd");
  1381. if (halt)
  1382. rc = qeth_halt_channels(card);
  1383. if (rc)
  1384. return rc;
  1385. return qeth_clear_channels(card);
  1386. }
  1387. int qeth_qdio_clear_card(struct qeth_card *card, int use_halt)
  1388. {
  1389. int rc = 0;
  1390. QETH_CARD_TEXT(card, 3, "qdioclr");
  1391. switch (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_ESTABLISHED,
  1392. QETH_QDIO_CLEANING)) {
  1393. case QETH_QDIO_ESTABLISHED:
  1394. if (card->info.type == QETH_CARD_TYPE_IQD)
  1395. rc = qdio_shutdown(CARD_DDEV(card),
  1396. QDIO_FLAG_CLEANUP_USING_HALT);
  1397. else
  1398. rc = qdio_shutdown(CARD_DDEV(card),
  1399. QDIO_FLAG_CLEANUP_USING_CLEAR);
  1400. if (rc)
  1401. QETH_CARD_TEXT_(card, 3, "1err%d", rc);
  1402. atomic_set(&card->qdio.state, QETH_QDIO_ALLOCATED);
  1403. break;
  1404. case QETH_QDIO_CLEANING:
  1405. return rc;
  1406. default:
  1407. break;
  1408. }
  1409. rc = qeth_clear_halt_card(card, use_halt);
  1410. if (rc)
  1411. QETH_CARD_TEXT_(card, 3, "2err%d", rc);
  1412. card->state = CARD_STATE_DOWN;
  1413. return rc;
  1414. }
  1415. EXPORT_SYMBOL_GPL(qeth_qdio_clear_card);
  1416. static int qeth_read_conf_data(struct qeth_card *card, void **buffer,
  1417. int *length)
  1418. {
  1419. struct ciw *ciw;
  1420. char *rcd_buf;
  1421. int ret;
  1422. struct qeth_channel *channel = &card->data;
  1423. /*
  1424. * scan for RCD command in extended SenseID data
  1425. */
  1426. ciw = ccw_device_get_ciw(channel->ccwdev, CIW_TYPE_RCD);
  1427. if (!ciw || ciw->cmd == 0)
  1428. return -EOPNOTSUPP;
  1429. rcd_buf = kzalloc(ciw->count, GFP_KERNEL | GFP_DMA);
  1430. if (!rcd_buf)
  1431. return -ENOMEM;
  1432. qeth_setup_ccw(channel->ccw, ciw->cmd, ciw->count, rcd_buf);
  1433. channel->state = CH_STATE_RCD;
  1434. spin_lock_irq(get_ccwdev_lock(channel->ccwdev));
  1435. ret = ccw_device_start_timeout(channel->ccwdev, channel->ccw,
  1436. QETH_RCD_PARM, LPM_ANYPATH, 0,
  1437. QETH_RCD_TIMEOUT);
  1438. spin_unlock_irq(get_ccwdev_lock(channel->ccwdev));
  1439. if (!ret)
  1440. wait_event(card->wait_q,
  1441. (channel->state == CH_STATE_RCD_DONE ||
  1442. channel->state == CH_STATE_DOWN));
  1443. if (channel->state == CH_STATE_DOWN)
  1444. ret = -EIO;
  1445. else
  1446. channel->state = CH_STATE_DOWN;
  1447. if (ret) {
  1448. kfree(rcd_buf);
  1449. *buffer = NULL;
  1450. *length = 0;
  1451. } else {
  1452. *length = ciw->count;
  1453. *buffer = rcd_buf;
  1454. }
  1455. return ret;
  1456. }
  1457. static void qeth_configure_unitaddr(struct qeth_card *card, char *prcd)
  1458. {
  1459. QETH_DBF_TEXT(SETUP, 2, "cfgunit");
  1460. card->info.chpid = prcd[30];
  1461. card->info.unit_addr2 = prcd[31];
  1462. card->info.cula = prcd[63];
  1463. card->info.guestlan = ((prcd[0x10] == _ascebc['V']) &&
  1464. (prcd[0x11] == _ascebc['M']));
  1465. }
  1466. static enum qeth_discipline_id qeth_vm_detect_layer(struct qeth_card *card)
  1467. {
  1468. enum qeth_discipline_id disc = QETH_DISCIPLINE_UNDETERMINED;
  1469. struct diag26c_vnic_resp *response = NULL;
  1470. struct diag26c_vnic_req *request = NULL;
  1471. struct ccw_dev_id id;
  1472. char userid[80];
  1473. int rc = 0;
  1474. QETH_DBF_TEXT(SETUP, 2, "vmlayer");
  1475. cpcmd("QUERY USERID", userid, sizeof(userid), &rc);
  1476. if (rc)
  1477. goto out;
  1478. request = kzalloc(sizeof(*request), GFP_KERNEL | GFP_DMA);
  1479. response = kzalloc(sizeof(*response), GFP_KERNEL | GFP_DMA);
  1480. if (!request || !response) {
  1481. rc = -ENOMEM;
  1482. goto out;
  1483. }
  1484. ccw_device_get_id(CARD_RDEV(card), &id);
  1485. request->resp_buf_len = sizeof(*response);
  1486. request->resp_version = DIAG26C_VERSION6_VM65918;
  1487. request->req_format = DIAG26C_VNIC_INFO;
  1488. ASCEBC(userid, 8);
  1489. memcpy(&request->sys_name, userid, 8);
  1490. request->devno = id.devno;
  1491. QETH_DBF_HEX(CTRL, 2, request, sizeof(*request));
  1492. rc = diag26c(request, response, DIAG26C_PORT_VNIC);
  1493. QETH_DBF_HEX(CTRL, 2, request, sizeof(*request));
  1494. if (rc)
  1495. goto out;
  1496. QETH_DBF_HEX(CTRL, 2, response, sizeof(*response));
  1497. if (request->resp_buf_len < sizeof(*response) ||
  1498. response->version != request->resp_version) {
  1499. rc = -EIO;
  1500. goto out;
  1501. }
  1502. if (response->protocol == VNIC_INFO_PROT_L2)
  1503. disc = QETH_DISCIPLINE_LAYER2;
  1504. else if (response->protocol == VNIC_INFO_PROT_L3)
  1505. disc = QETH_DISCIPLINE_LAYER3;
  1506. out:
  1507. kfree(response);
  1508. kfree(request);
  1509. if (rc)
  1510. QETH_DBF_TEXT_(SETUP, 2, "err%x", rc);
  1511. return disc;
  1512. }
  1513. /* Determine whether the device requires a specific layer discipline */
  1514. static enum qeth_discipline_id qeth_enforce_discipline(struct qeth_card *card)
  1515. {
  1516. enum qeth_discipline_id disc = QETH_DISCIPLINE_UNDETERMINED;
  1517. if (card->info.type == QETH_CARD_TYPE_OSM ||
  1518. card->info.type == QETH_CARD_TYPE_OSN)
  1519. disc = QETH_DISCIPLINE_LAYER2;
  1520. else if (card->info.guestlan)
  1521. disc = (card->info.type == QETH_CARD_TYPE_IQD) ?
  1522. QETH_DISCIPLINE_LAYER3 :
  1523. qeth_vm_detect_layer(card);
  1524. switch (disc) {
  1525. case QETH_DISCIPLINE_LAYER2:
  1526. QETH_DBF_TEXT(SETUP, 3, "force l2");
  1527. break;
  1528. case QETH_DISCIPLINE_LAYER3:
  1529. QETH_DBF_TEXT(SETUP, 3, "force l3");
  1530. break;
  1531. default:
  1532. QETH_DBF_TEXT(SETUP, 3, "force no");
  1533. }
  1534. return disc;
  1535. }
  1536. static void qeth_configure_blkt_default(struct qeth_card *card, char *prcd)
  1537. {
  1538. QETH_DBF_TEXT(SETUP, 2, "cfgblkt");
  1539. if (prcd[74] == 0xF0 && prcd[75] == 0xF0 &&
  1540. prcd[76] >= 0xF1 && prcd[76] <= 0xF4) {
  1541. card->info.blkt.time_total = 0;
  1542. card->info.blkt.inter_packet = 0;
  1543. card->info.blkt.inter_packet_jumbo = 0;
  1544. } else {
  1545. card->info.blkt.time_total = 250;
  1546. card->info.blkt.inter_packet = 5;
  1547. card->info.blkt.inter_packet_jumbo = 15;
  1548. }
  1549. }
  1550. static void qeth_init_tokens(struct qeth_card *card)
  1551. {
  1552. card->token.issuer_rm_w = 0x00010103UL;
  1553. card->token.cm_filter_w = 0x00010108UL;
  1554. card->token.cm_connection_w = 0x0001010aUL;
  1555. card->token.ulp_filter_w = 0x0001010bUL;
  1556. card->token.ulp_connection_w = 0x0001010dUL;
  1557. }
  1558. static void qeth_init_func_level(struct qeth_card *card)
  1559. {
  1560. switch (card->info.type) {
  1561. case QETH_CARD_TYPE_IQD:
  1562. card->info.func_level = QETH_IDX_FUNC_LEVEL_IQD;
  1563. break;
  1564. case QETH_CARD_TYPE_OSD:
  1565. case QETH_CARD_TYPE_OSN:
  1566. card->info.func_level = QETH_IDX_FUNC_LEVEL_OSD;
  1567. break;
  1568. default:
  1569. break;
  1570. }
  1571. }
  1572. static int qeth_idx_activate_get_answer(struct qeth_card *card,
  1573. struct qeth_channel *channel,
  1574. void (*reply_cb)(struct qeth_card *,
  1575. struct qeth_channel *,
  1576. struct qeth_cmd_buffer *))
  1577. {
  1578. struct qeth_cmd_buffer *iob;
  1579. int rc;
  1580. QETH_DBF_TEXT(SETUP, 2, "idxanswr");
  1581. iob = qeth_get_buffer(channel);
  1582. if (!iob)
  1583. return -ENOMEM;
  1584. iob->callback = reply_cb;
  1585. qeth_setup_ccw(channel->ccw, CCW_CMD_READ, QETH_BUFSIZE, iob->data);
  1586. wait_event(card->wait_q,
  1587. atomic_cmpxchg(&channel->irq_pending, 0, 1) == 0);
  1588. QETH_DBF_TEXT(SETUP, 6, "noirqpnd");
  1589. spin_lock_irq(get_ccwdev_lock(channel->ccwdev));
  1590. rc = ccw_device_start_timeout(channel->ccwdev, channel->ccw,
  1591. (addr_t) iob, 0, 0, QETH_TIMEOUT);
  1592. spin_unlock_irq(get_ccwdev_lock(channel->ccwdev));
  1593. if (rc) {
  1594. QETH_DBF_MESSAGE(2, "Error2 in activating channel rc=%d\n", rc);
  1595. QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc);
  1596. atomic_set(&channel->irq_pending, 0);
  1597. wake_up(&card->wait_q);
  1598. return rc;
  1599. }
  1600. rc = wait_event_interruptible_timeout(card->wait_q,
  1601. channel->state == CH_STATE_UP, QETH_TIMEOUT);
  1602. if (rc == -ERESTARTSYS)
  1603. return rc;
  1604. if (channel->state != CH_STATE_UP) {
  1605. rc = -ETIME;
  1606. QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
  1607. } else
  1608. rc = 0;
  1609. return rc;
  1610. }
  1611. static int qeth_idx_activate_channel(struct qeth_card *card,
  1612. struct qeth_channel *channel,
  1613. void (*reply_cb)(struct qeth_card *,
  1614. struct qeth_channel *,
  1615. struct qeth_cmd_buffer *))
  1616. {
  1617. struct qeth_cmd_buffer *iob;
  1618. __u16 temp;
  1619. __u8 tmp;
  1620. int rc;
  1621. struct ccw_dev_id temp_devid;
  1622. QETH_DBF_TEXT(SETUP, 2, "idxactch");
  1623. iob = qeth_get_buffer(channel);
  1624. if (!iob)
  1625. return -ENOMEM;
  1626. iob->callback = reply_cb;
  1627. qeth_setup_ccw(channel->ccw, CCW_CMD_WRITE, IDX_ACTIVATE_SIZE,
  1628. iob->data);
  1629. if (channel == &card->write) {
  1630. memcpy(iob->data, IDX_ACTIVATE_WRITE, IDX_ACTIVATE_SIZE);
  1631. memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data),
  1632. &card->seqno.trans_hdr, QETH_SEQ_NO_LENGTH);
  1633. card->seqno.trans_hdr++;
  1634. } else {
  1635. memcpy(iob->data, IDX_ACTIVATE_READ, IDX_ACTIVATE_SIZE);
  1636. memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data),
  1637. &card->seqno.trans_hdr, QETH_SEQ_NO_LENGTH);
  1638. }
  1639. tmp = ((u8)card->dev->dev_port) | 0x80;
  1640. memcpy(QETH_IDX_ACT_PNO(iob->data), &tmp, 1);
  1641. memcpy(QETH_IDX_ACT_ISSUER_RM_TOKEN(iob->data),
  1642. &card->token.issuer_rm_w, QETH_MPC_TOKEN_LENGTH);
  1643. memcpy(QETH_IDX_ACT_FUNC_LEVEL(iob->data),
  1644. &card->info.func_level, sizeof(__u16));
  1645. ccw_device_get_id(CARD_DDEV(card), &temp_devid);
  1646. memcpy(QETH_IDX_ACT_QDIO_DEV_CUA(iob->data), &temp_devid.devno, 2);
  1647. temp = (card->info.cula << 8) + card->info.unit_addr2;
  1648. memcpy(QETH_IDX_ACT_QDIO_DEV_REALADDR(iob->data), &temp, 2);
  1649. wait_event(card->wait_q,
  1650. atomic_cmpxchg(&channel->irq_pending, 0, 1) == 0);
  1651. QETH_DBF_TEXT(SETUP, 6, "noirqpnd");
  1652. spin_lock_irq(get_ccwdev_lock(channel->ccwdev));
  1653. rc = ccw_device_start_timeout(channel->ccwdev, channel->ccw,
  1654. (addr_t) iob, 0, 0, QETH_TIMEOUT);
  1655. spin_unlock_irq(get_ccwdev_lock(channel->ccwdev));
  1656. if (rc) {
  1657. QETH_DBF_MESSAGE(2, "Error1 in activating channel. rc=%d\n",
  1658. rc);
  1659. QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
  1660. atomic_set(&channel->irq_pending, 0);
  1661. wake_up(&card->wait_q);
  1662. return rc;
  1663. }
  1664. rc = wait_event_interruptible_timeout(card->wait_q,
  1665. channel->state == CH_STATE_ACTIVATING, QETH_TIMEOUT);
  1666. if (rc == -ERESTARTSYS)
  1667. return rc;
  1668. if (channel->state != CH_STATE_ACTIVATING) {
  1669. dev_warn(&channel->ccwdev->dev, "The qeth device driver"
  1670. " failed to recover an error on the device\n");
  1671. QETH_DBF_MESSAGE(2, "IDX activate timed out on channel %x\n",
  1672. CCW_DEVID(channel->ccwdev));
  1673. QETH_DBF_TEXT_(SETUP, 2, "2err%d", -ETIME);
  1674. return -ETIME;
  1675. }
  1676. return qeth_idx_activate_get_answer(card, channel, reply_cb);
  1677. }
  1678. static int qeth_peer_func_level(int level)
  1679. {
  1680. if ((level & 0xff) == 8)
  1681. return (level & 0xff) + 0x400;
  1682. if (((level >> 8) & 3) == 1)
  1683. return (level & 0xff) + 0x200;
  1684. return level;
  1685. }
  1686. static void qeth_idx_write_cb(struct qeth_card *card,
  1687. struct qeth_channel *channel,
  1688. struct qeth_cmd_buffer *iob)
  1689. {
  1690. __u16 temp;
  1691. QETH_DBF_TEXT(SETUP , 2, "idxwrcb");
  1692. if (channel->state == CH_STATE_DOWN) {
  1693. channel->state = CH_STATE_ACTIVATING;
  1694. goto out;
  1695. }
  1696. if (!(QETH_IS_IDX_ACT_POS_REPLY(iob->data))) {
  1697. if (QETH_IDX_ACT_CAUSE_CODE(iob->data) == QETH_IDX_ACT_ERR_EXCL)
  1698. dev_err(&channel->ccwdev->dev,
  1699. "The adapter is used exclusively by another "
  1700. "host\n");
  1701. else
  1702. QETH_DBF_MESSAGE(2, "IDX_ACTIVATE on channel %x: negative reply\n",
  1703. CCW_DEVID(channel->ccwdev));
  1704. goto out;
  1705. }
  1706. memcpy(&temp, QETH_IDX_ACT_FUNC_LEVEL(iob->data), 2);
  1707. if ((temp & ~0x0100) != qeth_peer_func_level(card->info.func_level)) {
  1708. QETH_DBF_MESSAGE(2, "IDX_ACTIVATE on channel %x: function level mismatch (sent: %#x, received: %#x)\n",
  1709. CCW_DEVID(channel->ccwdev),
  1710. card->info.func_level, temp);
  1711. goto out;
  1712. }
  1713. channel->state = CH_STATE_UP;
  1714. out:
  1715. qeth_release_buffer(channel, iob);
  1716. }
  1717. static void qeth_idx_read_cb(struct qeth_card *card,
  1718. struct qeth_channel *channel,
  1719. struct qeth_cmd_buffer *iob)
  1720. {
  1721. __u16 temp;
  1722. QETH_DBF_TEXT(SETUP , 2, "idxrdcb");
  1723. if (channel->state == CH_STATE_DOWN) {
  1724. channel->state = CH_STATE_ACTIVATING;
  1725. goto out;
  1726. }
  1727. if (qeth_check_idx_response(card, iob->data))
  1728. goto out;
  1729. if (!(QETH_IS_IDX_ACT_POS_REPLY(iob->data))) {
  1730. switch (QETH_IDX_ACT_CAUSE_CODE(iob->data)) {
  1731. case QETH_IDX_ACT_ERR_EXCL:
  1732. dev_err(&channel->ccwdev->dev,
  1733. "The adapter is used exclusively by another "
  1734. "host\n");
  1735. break;
  1736. case QETH_IDX_ACT_ERR_AUTH:
  1737. case QETH_IDX_ACT_ERR_AUTH_USER:
  1738. dev_err(&channel->ccwdev->dev,
  1739. "Setting the device online failed because of "
  1740. "insufficient authorization\n");
  1741. break;
  1742. default:
  1743. QETH_DBF_MESSAGE(2, "IDX_ACTIVATE on channel %x: negative reply\n",
  1744. CCW_DEVID(channel->ccwdev));
  1745. }
  1746. QETH_CARD_TEXT_(card, 2, "idxread%c",
  1747. QETH_IDX_ACT_CAUSE_CODE(iob->data));
  1748. goto out;
  1749. }
  1750. memcpy(&temp, QETH_IDX_ACT_FUNC_LEVEL(iob->data), 2);
  1751. if (temp != qeth_peer_func_level(card->info.func_level)) {
  1752. QETH_DBF_MESSAGE(2, "IDX_ACTIVATE on channel %x: function level mismatch (sent: %#x, received: %#x)\n",
  1753. CCW_DEVID(channel->ccwdev),
  1754. card->info.func_level, temp);
  1755. goto out;
  1756. }
  1757. memcpy(&card->token.issuer_rm_r,
  1758. QETH_IDX_ACT_ISSUER_RM_TOKEN(iob->data),
  1759. QETH_MPC_TOKEN_LENGTH);
  1760. memcpy(&card->info.mcl_level[0],
  1761. QETH_IDX_REPLY_LEVEL(iob->data), QETH_MCL_LENGTH);
  1762. channel->state = CH_STATE_UP;
  1763. out:
  1764. qeth_release_buffer(channel, iob);
  1765. }
  1766. void qeth_prepare_control_data(struct qeth_card *card, int len,
  1767. struct qeth_cmd_buffer *iob)
  1768. {
  1769. qeth_setup_ccw(iob->channel->ccw, CCW_CMD_WRITE, len, iob->data);
  1770. iob->callback = qeth_release_buffer_cb;
  1771. memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data),
  1772. &card->seqno.trans_hdr, QETH_SEQ_NO_LENGTH);
  1773. card->seqno.trans_hdr++;
  1774. memcpy(QETH_PDU_HEADER_SEQ_NO(iob->data),
  1775. &card->seqno.pdu_hdr, QETH_SEQ_NO_LENGTH);
  1776. card->seqno.pdu_hdr++;
  1777. memcpy(QETH_PDU_HEADER_ACK_SEQ_NO(iob->data),
  1778. &card->seqno.pdu_hdr_ack, QETH_SEQ_NO_LENGTH);
  1779. QETH_DBF_HEX(CTRL, 2, iob->data, QETH_DBF_CTRL_LEN);
  1780. }
  1781. EXPORT_SYMBOL_GPL(qeth_prepare_control_data);
  1782. /**
  1783. * qeth_send_control_data() - send control command to the card
  1784. * @card: qeth_card structure pointer
  1785. * @len: size of the command buffer
  1786. * @iob: qeth_cmd_buffer pointer
  1787. * @reply_cb: callback function pointer
  1788. * @cb_card: pointer to the qeth_card structure
  1789. * @cb_reply: pointer to the qeth_reply structure
  1790. * @cb_cmd: pointer to the original iob for non-IPA
  1791. * commands, or to the qeth_ipa_cmd structure
  1792. * for the IPA commands.
  1793. * @reply_param: private pointer passed to the callback
  1794. *
  1795. * Returns the value of the `return_code' field of the response
  1796. * block returned from the hardware, or other error indication.
  1797. * Value of zero indicates successful execution of the command.
  1798. *
  1799. * Callback function gets called one or more times, with cb_cmd
  1800. * pointing to the response returned by the hardware. Callback
  1801. * function must return non-zero if more reply blocks are expected,
  1802. * and zero if the last or only reply block is received. Callback
  1803. * function can get the value of the reply_param pointer from the
  1804. * field 'param' of the structure qeth_reply.
  1805. */
  1806. int qeth_send_control_data(struct qeth_card *card, int len,
  1807. struct qeth_cmd_buffer *iob,
  1808. int (*reply_cb)(struct qeth_card *cb_card,
  1809. struct qeth_reply *cb_reply,
  1810. unsigned long cb_cmd),
  1811. void *reply_param)
  1812. {
  1813. struct qeth_channel *channel = iob->channel;
  1814. int rc;
  1815. struct qeth_reply *reply = NULL;
  1816. unsigned long timeout, event_timeout;
  1817. struct qeth_ipa_cmd *cmd = NULL;
  1818. QETH_CARD_TEXT(card, 2, "sendctl");
  1819. if (card->read_or_write_problem) {
  1820. qeth_release_buffer(channel, iob);
  1821. return -EIO;
  1822. }
  1823. reply = qeth_alloc_reply(card);
  1824. if (!reply) {
  1825. return -ENOMEM;
  1826. }
  1827. reply->callback = reply_cb;
  1828. reply->param = reply_param;
  1829. init_waitqueue_head(&reply->wait_q);
  1830. while (atomic_cmpxchg(&channel->irq_pending, 0, 1)) ;
  1831. if (IS_IPA(iob->data)) {
  1832. cmd = __ipa_cmd(iob);
  1833. cmd->hdr.seqno = card->seqno.ipa++;
  1834. reply->seqno = cmd->hdr.seqno;
  1835. event_timeout = QETH_IPA_TIMEOUT;
  1836. } else {
  1837. reply->seqno = QETH_IDX_COMMAND_SEQNO;
  1838. event_timeout = QETH_TIMEOUT;
  1839. }
  1840. qeth_prepare_control_data(card, len, iob);
  1841. spin_lock_irq(&card->lock);
  1842. list_add_tail(&reply->list, &card->cmd_waiter_list);
  1843. spin_unlock_irq(&card->lock);
  1844. timeout = jiffies + event_timeout;
  1845. QETH_CARD_TEXT(card, 6, "noirqpnd");
  1846. spin_lock_irq(get_ccwdev_lock(channel->ccwdev));
  1847. rc = ccw_device_start_timeout(channel->ccwdev, channel->ccw,
  1848. (addr_t) iob, 0, 0, event_timeout);
  1849. spin_unlock_irq(get_ccwdev_lock(channel->ccwdev));
  1850. if (rc) {
  1851. QETH_DBF_MESSAGE(2, "qeth_send_control_data on device %x: ccw_device_start rc = %i\n",
  1852. CARD_DEVID(card), rc);
  1853. QETH_CARD_TEXT_(card, 2, " err%d", rc);
  1854. spin_lock_irq(&card->lock);
  1855. list_del_init(&reply->list);
  1856. qeth_put_reply(reply);
  1857. spin_unlock_irq(&card->lock);
  1858. qeth_release_buffer(channel, iob);
  1859. atomic_set(&channel->irq_pending, 0);
  1860. wake_up(&card->wait_q);
  1861. return rc;
  1862. }
  1863. /* we have only one long running ipassist, since we can ensure
  1864. process context of this command we can sleep */
  1865. if (cmd && cmd->hdr.command == IPA_CMD_SETIP &&
  1866. cmd->hdr.prot_version == QETH_PROT_IPV4) {
  1867. if (!wait_event_timeout(reply->wait_q,
  1868. atomic_read(&reply->received), event_timeout))
  1869. goto time_err;
  1870. } else {
  1871. while (!atomic_read(&reply->received)) {
  1872. if (time_after(jiffies, timeout))
  1873. goto time_err;
  1874. cpu_relax();
  1875. }
  1876. }
  1877. rc = reply->rc;
  1878. qeth_put_reply(reply);
  1879. return rc;
  1880. time_err:
  1881. reply->rc = -ETIME;
  1882. spin_lock_irq(&card->lock);
  1883. list_del_init(&reply->list);
  1884. spin_unlock_irq(&card->lock);
  1885. atomic_inc(&reply->received);
  1886. rc = reply->rc;
  1887. qeth_put_reply(reply);
  1888. return rc;
  1889. }
  1890. EXPORT_SYMBOL_GPL(qeth_send_control_data);
  1891. static int qeth_cm_enable_cb(struct qeth_card *card, struct qeth_reply *reply,
  1892. unsigned long data)
  1893. {
  1894. struct qeth_cmd_buffer *iob;
  1895. QETH_DBF_TEXT(SETUP, 2, "cmenblcb");
  1896. iob = (struct qeth_cmd_buffer *) data;
  1897. memcpy(&card->token.cm_filter_r,
  1898. QETH_CM_ENABLE_RESP_FILTER_TOKEN(iob->data),
  1899. QETH_MPC_TOKEN_LENGTH);
  1900. return 0;
  1901. }
  1902. static int qeth_cm_enable(struct qeth_card *card)
  1903. {
  1904. int rc;
  1905. struct qeth_cmd_buffer *iob;
  1906. QETH_DBF_TEXT(SETUP, 2, "cmenable");
  1907. iob = qeth_wait_for_buffer(&card->write);
  1908. memcpy(iob->data, CM_ENABLE, CM_ENABLE_SIZE);
  1909. memcpy(QETH_CM_ENABLE_ISSUER_RM_TOKEN(iob->data),
  1910. &card->token.issuer_rm_r, QETH_MPC_TOKEN_LENGTH);
  1911. memcpy(QETH_CM_ENABLE_FILTER_TOKEN(iob->data),
  1912. &card->token.cm_filter_w, QETH_MPC_TOKEN_LENGTH);
  1913. rc = qeth_send_control_data(card, CM_ENABLE_SIZE, iob,
  1914. qeth_cm_enable_cb, NULL);
  1915. return rc;
  1916. }
  1917. static int qeth_cm_setup_cb(struct qeth_card *card, struct qeth_reply *reply,
  1918. unsigned long data)
  1919. {
  1920. struct qeth_cmd_buffer *iob;
  1921. QETH_DBF_TEXT(SETUP, 2, "cmsetpcb");
  1922. iob = (struct qeth_cmd_buffer *) data;
  1923. memcpy(&card->token.cm_connection_r,
  1924. QETH_CM_SETUP_RESP_DEST_ADDR(iob->data),
  1925. QETH_MPC_TOKEN_LENGTH);
  1926. return 0;
  1927. }
  1928. static int qeth_cm_setup(struct qeth_card *card)
  1929. {
  1930. int rc;
  1931. struct qeth_cmd_buffer *iob;
  1932. QETH_DBF_TEXT(SETUP, 2, "cmsetup");
  1933. iob = qeth_wait_for_buffer(&card->write);
  1934. memcpy(iob->data, CM_SETUP, CM_SETUP_SIZE);
  1935. memcpy(QETH_CM_SETUP_DEST_ADDR(iob->data),
  1936. &card->token.issuer_rm_r, QETH_MPC_TOKEN_LENGTH);
  1937. memcpy(QETH_CM_SETUP_CONNECTION_TOKEN(iob->data),
  1938. &card->token.cm_connection_w, QETH_MPC_TOKEN_LENGTH);
  1939. memcpy(QETH_CM_SETUP_FILTER_TOKEN(iob->data),
  1940. &card->token.cm_filter_r, QETH_MPC_TOKEN_LENGTH);
  1941. rc = qeth_send_control_data(card, CM_SETUP_SIZE, iob,
  1942. qeth_cm_setup_cb, NULL);
  1943. return rc;
  1944. }
  1945. static int qeth_update_max_mtu(struct qeth_card *card, unsigned int max_mtu)
  1946. {
  1947. struct net_device *dev = card->dev;
  1948. unsigned int new_mtu;
  1949. if (!max_mtu) {
  1950. /* IQD needs accurate max MTU to set up its RX buffers: */
  1951. if (IS_IQD(card))
  1952. return -EINVAL;
  1953. /* tolerate quirky HW: */
  1954. max_mtu = ETH_MAX_MTU;
  1955. }
  1956. rtnl_lock();
  1957. if (IS_IQD(card)) {
  1958. /* move any device with default MTU to new max MTU: */
  1959. new_mtu = (dev->mtu == dev->max_mtu) ? max_mtu : dev->mtu;
  1960. /* adjust RX buffer size to new max MTU: */
  1961. card->qdio.in_buf_size = max_mtu + 2 * PAGE_SIZE;
  1962. if (dev->max_mtu && dev->max_mtu != max_mtu)
  1963. qeth_free_qdio_buffers(card);
  1964. } else {
  1965. if (dev->mtu)
  1966. new_mtu = dev->mtu;
  1967. /* default MTUs for first setup: */
  1968. else if (IS_LAYER2(card))
  1969. new_mtu = ETH_DATA_LEN;
  1970. else
  1971. new_mtu = ETH_DATA_LEN - 8; /* allow for LLC + SNAP */
  1972. }
  1973. dev->max_mtu = max_mtu;
  1974. dev->mtu = min(new_mtu, max_mtu);
  1975. rtnl_unlock();
  1976. return 0;
  1977. }
  1978. static int qeth_get_mtu_outof_framesize(int framesize)
  1979. {
  1980. switch (framesize) {
  1981. case 0x4000:
  1982. return 8192;
  1983. case 0x6000:
  1984. return 16384;
  1985. case 0xa000:
  1986. return 32768;
  1987. case 0xffff:
  1988. return 57344;
  1989. default:
  1990. return 0;
  1991. }
  1992. }
  1993. static int qeth_ulp_enable_cb(struct qeth_card *card, struct qeth_reply *reply,
  1994. unsigned long data)
  1995. {
  1996. __u16 mtu, framesize;
  1997. __u16 len;
  1998. __u8 link_type;
  1999. struct qeth_cmd_buffer *iob;
  2000. QETH_DBF_TEXT(SETUP, 2, "ulpenacb");
  2001. iob = (struct qeth_cmd_buffer *) data;
  2002. memcpy(&card->token.ulp_filter_r,
  2003. QETH_ULP_ENABLE_RESP_FILTER_TOKEN(iob->data),
  2004. QETH_MPC_TOKEN_LENGTH);
  2005. if (card->info.type == QETH_CARD_TYPE_IQD) {
  2006. memcpy(&framesize, QETH_ULP_ENABLE_RESP_MAX_MTU(iob->data), 2);
  2007. mtu = qeth_get_mtu_outof_framesize(framesize);
  2008. } else {
  2009. mtu = *(__u16 *)QETH_ULP_ENABLE_RESP_MAX_MTU(iob->data);
  2010. }
  2011. *(u16 *)reply->param = mtu;
  2012. memcpy(&len, QETH_ULP_ENABLE_RESP_DIFINFO_LEN(iob->data), 2);
  2013. if (len >= QETH_MPC_DIFINFO_LEN_INDICATES_LINK_TYPE) {
  2014. memcpy(&link_type,
  2015. QETH_ULP_ENABLE_RESP_LINK_TYPE(iob->data), 1);
  2016. card->info.link_type = link_type;
  2017. } else
  2018. card->info.link_type = 0;
  2019. QETH_DBF_TEXT_(SETUP, 2, "link%d", card->info.link_type);
  2020. return 0;
  2021. }
  2022. static u8 qeth_mpc_select_prot_type(struct qeth_card *card)
  2023. {
  2024. if (IS_OSN(card))
  2025. return QETH_PROT_OSN2;
  2026. return IS_LAYER2(card) ? QETH_PROT_LAYER2 : QETH_PROT_TCPIP;
  2027. }
  2028. static int qeth_ulp_enable(struct qeth_card *card)
  2029. {
  2030. u8 prot_type = qeth_mpc_select_prot_type(card);
  2031. struct qeth_cmd_buffer *iob;
  2032. u16 max_mtu;
  2033. int rc;
  2034. /*FIXME: trace view callbacks*/
  2035. QETH_DBF_TEXT(SETUP, 2, "ulpenabl");
  2036. iob = qeth_wait_for_buffer(&card->write);
  2037. memcpy(iob->data, ULP_ENABLE, ULP_ENABLE_SIZE);
  2038. *(QETH_ULP_ENABLE_LINKNUM(iob->data)) = (u8) card->dev->dev_port;
  2039. memcpy(QETH_ULP_ENABLE_PROT_TYPE(iob->data), &prot_type, 1);
  2040. memcpy(QETH_ULP_ENABLE_DEST_ADDR(iob->data),
  2041. &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH);
  2042. memcpy(QETH_ULP_ENABLE_FILTER_TOKEN(iob->data),
  2043. &card->token.ulp_filter_w, QETH_MPC_TOKEN_LENGTH);
  2044. rc = qeth_send_control_data(card, ULP_ENABLE_SIZE, iob,
  2045. qeth_ulp_enable_cb, &max_mtu);
  2046. if (rc)
  2047. return rc;
  2048. return qeth_update_max_mtu(card, max_mtu);
  2049. }
  2050. static int qeth_ulp_setup_cb(struct qeth_card *card, struct qeth_reply *reply,
  2051. unsigned long data)
  2052. {
  2053. struct qeth_cmd_buffer *iob;
  2054. QETH_DBF_TEXT(SETUP, 2, "ulpstpcb");
  2055. iob = (struct qeth_cmd_buffer *) data;
  2056. memcpy(&card->token.ulp_connection_r,
  2057. QETH_ULP_SETUP_RESP_CONNECTION_TOKEN(iob->data),
  2058. QETH_MPC_TOKEN_LENGTH);
  2059. if (!strncmp("00S", QETH_ULP_SETUP_RESP_CONNECTION_TOKEN(iob->data),
  2060. 3)) {
  2061. QETH_DBF_TEXT(SETUP, 2, "olmlimit");
  2062. dev_err(&card->gdev->dev, "A connection could not be "
  2063. "established because of an OLM limit\n");
  2064. iob->rc = -EMLINK;
  2065. }
  2066. QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
  2067. return 0;
  2068. }
  2069. static int qeth_ulp_setup(struct qeth_card *card)
  2070. {
  2071. int rc;
  2072. __u16 temp;
  2073. struct qeth_cmd_buffer *iob;
  2074. struct ccw_dev_id dev_id;
  2075. QETH_DBF_TEXT(SETUP, 2, "ulpsetup");
  2076. iob = qeth_wait_for_buffer(&card->write);
  2077. memcpy(iob->data, ULP_SETUP, ULP_SETUP_SIZE);
  2078. memcpy(QETH_ULP_SETUP_DEST_ADDR(iob->data),
  2079. &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH);
  2080. memcpy(QETH_ULP_SETUP_CONNECTION_TOKEN(iob->data),
  2081. &card->token.ulp_connection_w, QETH_MPC_TOKEN_LENGTH);
  2082. memcpy(QETH_ULP_SETUP_FILTER_TOKEN(iob->data),
  2083. &card->token.ulp_filter_r, QETH_MPC_TOKEN_LENGTH);
  2084. ccw_device_get_id(CARD_DDEV(card), &dev_id);
  2085. memcpy(QETH_ULP_SETUP_CUA(iob->data), &dev_id.devno, 2);
  2086. temp = (card->info.cula << 8) + card->info.unit_addr2;
  2087. memcpy(QETH_ULP_SETUP_REAL_DEVADDR(iob->data), &temp, 2);
  2088. rc = qeth_send_control_data(card, ULP_SETUP_SIZE, iob,
  2089. qeth_ulp_setup_cb, NULL);
  2090. return rc;
  2091. }
  2092. static int qeth_init_qdio_out_buf(struct qeth_qdio_out_q *q, int bidx)
  2093. {
  2094. struct qeth_qdio_out_buffer *newbuf;
  2095. newbuf = kmem_cache_zalloc(qeth_qdio_outbuf_cache, GFP_ATOMIC);
  2096. if (!newbuf)
  2097. return -ENOMEM;
  2098. newbuf->buffer = q->qdio_bufs[bidx];
  2099. skb_queue_head_init(&newbuf->skb_list);
  2100. lockdep_set_class(&newbuf->skb_list.lock, &qdio_out_skb_queue_key);
  2101. newbuf->q = q;
  2102. newbuf->next_pending = q->bufs[bidx];
  2103. atomic_set(&newbuf->state, QETH_QDIO_BUF_EMPTY);
  2104. q->bufs[bidx] = newbuf;
  2105. return 0;
  2106. }
  2107. static void qeth_free_qdio_out_buf(struct qeth_qdio_out_q *q)
  2108. {
  2109. if (!q)
  2110. return;
  2111. qdio_free_buffers(q->qdio_bufs, QDIO_MAX_BUFFERS_PER_Q);
  2112. kfree(q);
  2113. }
  2114. static struct qeth_qdio_out_q *qeth_alloc_qdio_out_buf(void)
  2115. {
  2116. struct qeth_qdio_out_q *q = kzalloc(sizeof(*q), GFP_KERNEL);
  2117. if (!q)
  2118. return NULL;
  2119. if (qdio_alloc_buffers(q->qdio_bufs, QDIO_MAX_BUFFERS_PER_Q)) {
  2120. kfree(q);
  2121. return NULL;
  2122. }
  2123. return q;
  2124. }
  2125. static int qeth_alloc_qdio_buffers(struct qeth_card *card)
  2126. {
  2127. int i, j;
  2128. QETH_DBF_TEXT(SETUP, 2, "allcqdbf");
  2129. if (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_UNINITIALIZED,
  2130. QETH_QDIO_ALLOCATED) != QETH_QDIO_UNINITIALIZED)
  2131. return 0;
  2132. QETH_DBF_TEXT(SETUP, 2, "inq");
  2133. card->qdio.in_q = qeth_alloc_qdio_queue();
  2134. if (!card->qdio.in_q)
  2135. goto out_nomem;
  2136. /* inbound buffer pool */
  2137. if (qeth_alloc_buffer_pool(card))
  2138. goto out_freeinq;
  2139. /* outbound */
  2140. card->qdio.out_qs =
  2141. kcalloc(card->qdio.no_out_queues,
  2142. sizeof(struct qeth_qdio_out_q *),
  2143. GFP_KERNEL);
  2144. if (!card->qdio.out_qs)
  2145. goto out_freepool;
  2146. for (i = 0; i < card->qdio.no_out_queues; ++i) {
  2147. card->qdio.out_qs[i] = qeth_alloc_qdio_out_buf();
  2148. if (!card->qdio.out_qs[i])
  2149. goto out_freeoutq;
  2150. QETH_DBF_TEXT_(SETUP, 2, "outq %i", i);
  2151. QETH_DBF_HEX(SETUP, 2, &card->qdio.out_qs[i], sizeof(void *));
  2152. card->qdio.out_qs[i]->queue_no = i;
  2153. /* give outbound qeth_qdio_buffers their qdio_buffers */
  2154. for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) {
  2155. WARN_ON(card->qdio.out_qs[i]->bufs[j] != NULL);
  2156. if (qeth_init_qdio_out_buf(card->qdio.out_qs[i], j))
  2157. goto out_freeoutqbufs;
  2158. }
  2159. }
  2160. /* completion */
  2161. if (qeth_alloc_cq(card))
  2162. goto out_freeoutq;
  2163. return 0;
  2164. out_freeoutqbufs:
  2165. while (j > 0) {
  2166. --j;
  2167. kmem_cache_free(qeth_qdio_outbuf_cache,
  2168. card->qdio.out_qs[i]->bufs[j]);
  2169. card->qdio.out_qs[i]->bufs[j] = NULL;
  2170. }
  2171. out_freeoutq:
  2172. while (i > 0) {
  2173. qeth_free_qdio_out_buf(card->qdio.out_qs[--i]);
  2174. qeth_clear_outq_buffers(card->qdio.out_qs[i], 1);
  2175. }
  2176. kfree(card->qdio.out_qs);
  2177. card->qdio.out_qs = NULL;
  2178. out_freepool:
  2179. qeth_free_buffer_pool(card);
  2180. out_freeinq:
  2181. qeth_free_qdio_queue(card->qdio.in_q);
  2182. card->qdio.in_q = NULL;
  2183. out_nomem:
  2184. atomic_set(&card->qdio.state, QETH_QDIO_UNINITIALIZED);
  2185. return -ENOMEM;
  2186. }
  2187. static void qeth_free_qdio_buffers(struct qeth_card *card)
  2188. {
  2189. int i, j;
  2190. if (atomic_xchg(&card->qdio.state, QETH_QDIO_UNINITIALIZED) ==
  2191. QETH_QDIO_UNINITIALIZED)
  2192. return;
  2193. qeth_free_cq(card);
  2194. cancel_delayed_work_sync(&card->buffer_reclaim_work);
  2195. for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) {
  2196. if (card->qdio.in_q->bufs[j].rx_skb)
  2197. dev_kfree_skb_any(card->qdio.in_q->bufs[j].rx_skb);
  2198. }
  2199. qeth_free_qdio_queue(card->qdio.in_q);
  2200. card->qdio.in_q = NULL;
  2201. /* inbound buffer pool */
  2202. qeth_free_buffer_pool(card);
  2203. /* free outbound qdio_qs */
  2204. if (card->qdio.out_qs) {
  2205. for (i = 0; i < card->qdio.no_out_queues; ++i) {
  2206. qeth_clear_outq_buffers(card->qdio.out_qs[i], 1);
  2207. qeth_free_qdio_out_buf(card->qdio.out_qs[i]);
  2208. }
  2209. kfree(card->qdio.out_qs);
  2210. card->qdio.out_qs = NULL;
  2211. }
  2212. }
  2213. static void qeth_create_qib_param_field(struct qeth_card *card,
  2214. char *param_field)
  2215. {
  2216. param_field[0] = _ascebc['P'];
  2217. param_field[1] = _ascebc['C'];
  2218. param_field[2] = _ascebc['I'];
  2219. param_field[3] = _ascebc['T'];
  2220. *((unsigned int *) (&param_field[4])) = QETH_PCI_THRESHOLD_A(card);
  2221. *((unsigned int *) (&param_field[8])) = QETH_PCI_THRESHOLD_B(card);
  2222. *((unsigned int *) (&param_field[12])) = QETH_PCI_TIMER_VALUE(card);
  2223. }
  2224. static void qeth_create_qib_param_field_blkt(struct qeth_card *card,
  2225. char *param_field)
  2226. {
  2227. param_field[16] = _ascebc['B'];
  2228. param_field[17] = _ascebc['L'];
  2229. param_field[18] = _ascebc['K'];
  2230. param_field[19] = _ascebc['T'];
  2231. *((unsigned int *) (&param_field[20])) = card->info.blkt.time_total;
  2232. *((unsigned int *) (&param_field[24])) = card->info.blkt.inter_packet;
  2233. *((unsigned int *) (&param_field[28])) =
  2234. card->info.blkt.inter_packet_jumbo;
  2235. }
  2236. static int qeth_qdio_activate(struct qeth_card *card)
  2237. {
  2238. QETH_DBF_TEXT(SETUP, 3, "qdioact");
  2239. return qdio_activate(CARD_DDEV(card));
  2240. }
  2241. static int qeth_dm_act(struct qeth_card *card)
  2242. {
  2243. int rc;
  2244. struct qeth_cmd_buffer *iob;
  2245. QETH_DBF_TEXT(SETUP, 2, "dmact");
  2246. iob = qeth_wait_for_buffer(&card->write);
  2247. memcpy(iob->data, DM_ACT, DM_ACT_SIZE);
  2248. memcpy(QETH_DM_ACT_DEST_ADDR(iob->data),
  2249. &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH);
  2250. memcpy(QETH_DM_ACT_CONNECTION_TOKEN(iob->data),
  2251. &card->token.ulp_connection_r, QETH_MPC_TOKEN_LENGTH);
  2252. rc = qeth_send_control_data(card, DM_ACT_SIZE, iob, NULL, NULL);
  2253. return rc;
  2254. }
  2255. static int qeth_mpc_initialize(struct qeth_card *card)
  2256. {
  2257. int rc;
  2258. QETH_DBF_TEXT(SETUP, 2, "mpcinit");
  2259. rc = qeth_issue_next_read(card);
  2260. if (rc) {
  2261. QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
  2262. return rc;
  2263. }
  2264. rc = qeth_cm_enable(card);
  2265. if (rc) {
  2266. QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc);
  2267. goto out_qdio;
  2268. }
  2269. rc = qeth_cm_setup(card);
  2270. if (rc) {
  2271. QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
  2272. goto out_qdio;
  2273. }
  2274. rc = qeth_ulp_enable(card);
  2275. if (rc) {
  2276. QETH_DBF_TEXT_(SETUP, 2, "4err%d", rc);
  2277. goto out_qdio;
  2278. }
  2279. rc = qeth_ulp_setup(card);
  2280. if (rc) {
  2281. QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc);
  2282. goto out_qdio;
  2283. }
  2284. rc = qeth_alloc_qdio_buffers(card);
  2285. if (rc) {
  2286. QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc);
  2287. goto out_qdio;
  2288. }
  2289. rc = qeth_qdio_establish(card);
  2290. if (rc) {
  2291. QETH_DBF_TEXT_(SETUP, 2, "6err%d", rc);
  2292. qeth_free_qdio_buffers(card);
  2293. goto out_qdio;
  2294. }
  2295. rc = qeth_qdio_activate(card);
  2296. if (rc) {
  2297. QETH_DBF_TEXT_(SETUP, 2, "7err%d", rc);
  2298. goto out_qdio;
  2299. }
  2300. rc = qeth_dm_act(card);
  2301. if (rc) {
  2302. QETH_DBF_TEXT_(SETUP, 2, "8err%d", rc);
  2303. goto out_qdio;
  2304. }
  2305. return 0;
  2306. out_qdio:
  2307. qeth_qdio_clear_card(card, card->info.type != QETH_CARD_TYPE_IQD);
  2308. qdio_free(CARD_DDEV(card));
  2309. return rc;
  2310. }
  2311. void qeth_print_status_message(struct qeth_card *card)
  2312. {
  2313. switch (card->info.type) {
  2314. case QETH_CARD_TYPE_OSD:
  2315. case QETH_CARD_TYPE_OSM:
  2316. case QETH_CARD_TYPE_OSX:
  2317. /* VM will use a non-zero first character
  2318. * to indicate a HiperSockets like reporting
  2319. * of the level OSA sets the first character to zero
  2320. * */
  2321. if (!card->info.mcl_level[0]) {
  2322. sprintf(card->info.mcl_level, "%02x%02x",
  2323. card->info.mcl_level[2],
  2324. card->info.mcl_level[3]);
  2325. break;
  2326. }
  2327. /* fallthrough */
  2328. case QETH_CARD_TYPE_IQD:
  2329. if ((card->info.guestlan) ||
  2330. (card->info.mcl_level[0] & 0x80)) {
  2331. card->info.mcl_level[0] = (char) _ebcasc[(__u8)
  2332. card->info.mcl_level[0]];
  2333. card->info.mcl_level[1] = (char) _ebcasc[(__u8)
  2334. card->info.mcl_level[1]];
  2335. card->info.mcl_level[2] = (char) _ebcasc[(__u8)
  2336. card->info.mcl_level[2]];
  2337. card->info.mcl_level[3] = (char) _ebcasc[(__u8)
  2338. card->info.mcl_level[3]];
  2339. card->info.mcl_level[QETH_MCL_LENGTH] = 0;
  2340. }
  2341. break;
  2342. default:
  2343. memset(&card->info.mcl_level[0], 0, QETH_MCL_LENGTH + 1);
  2344. }
  2345. dev_info(&card->gdev->dev,
  2346. "Device is a%s card%s%s%s\nwith link type %s.\n",
  2347. qeth_get_cardname(card),
  2348. (card->info.mcl_level[0]) ? " (level: " : "",
  2349. (card->info.mcl_level[0]) ? card->info.mcl_level : "",
  2350. (card->info.mcl_level[0]) ? ")" : "",
  2351. qeth_get_cardname_short(card));
  2352. }
  2353. EXPORT_SYMBOL_GPL(qeth_print_status_message);
  2354. static void qeth_initialize_working_pool_list(struct qeth_card *card)
  2355. {
  2356. struct qeth_buffer_pool_entry *entry;
  2357. QETH_CARD_TEXT(card, 5, "inwrklst");
  2358. list_for_each_entry(entry,
  2359. &card->qdio.init_pool.entry_list, init_list) {
  2360. qeth_put_buffer_pool_entry(card, entry);
  2361. }
  2362. }
  2363. static struct qeth_buffer_pool_entry *qeth_find_free_buffer_pool_entry(
  2364. struct qeth_card *card)
  2365. {
  2366. struct list_head *plh;
  2367. struct qeth_buffer_pool_entry *entry;
  2368. int i, free;
  2369. struct page *page;
  2370. if (list_empty(&card->qdio.in_buf_pool.entry_list))
  2371. return NULL;
  2372. list_for_each(plh, &card->qdio.in_buf_pool.entry_list) {
  2373. entry = list_entry(plh, struct qeth_buffer_pool_entry, list);
  2374. free = 1;
  2375. for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) {
  2376. if (page_count(virt_to_page(entry->elements[i])) > 1) {
  2377. free = 0;
  2378. break;
  2379. }
  2380. }
  2381. if (free) {
  2382. list_del_init(&entry->list);
  2383. return entry;
  2384. }
  2385. }
  2386. /* no free buffer in pool so take first one and swap pages */
  2387. entry = list_entry(card->qdio.in_buf_pool.entry_list.next,
  2388. struct qeth_buffer_pool_entry, list);
  2389. for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) {
  2390. if (page_count(virt_to_page(entry->elements[i])) > 1) {
  2391. page = alloc_page(GFP_ATOMIC);
  2392. if (!page) {
  2393. return NULL;
  2394. } else {
  2395. free_page((unsigned long)entry->elements[i]);
  2396. entry->elements[i] = page_address(page);
  2397. if (card->options.performance_stats)
  2398. card->perf_stats.sg_alloc_page_rx++;
  2399. }
  2400. }
  2401. }
  2402. list_del_init(&entry->list);
  2403. return entry;
  2404. }
  2405. static int qeth_init_input_buffer(struct qeth_card *card,
  2406. struct qeth_qdio_buffer *buf)
  2407. {
  2408. struct qeth_buffer_pool_entry *pool_entry;
  2409. int i;
  2410. if ((card->options.cq == QETH_CQ_ENABLED) && (!buf->rx_skb)) {
  2411. buf->rx_skb = netdev_alloc_skb(card->dev,
  2412. QETH_RX_PULL_LEN + ETH_HLEN);
  2413. if (!buf->rx_skb)
  2414. return 1;
  2415. }
  2416. pool_entry = qeth_find_free_buffer_pool_entry(card);
  2417. if (!pool_entry)
  2418. return 1;
  2419. /*
  2420. * since the buffer is accessed only from the input_tasklet
  2421. * there shouldn't be a need to synchronize; also, since we use
  2422. * the QETH_IN_BUF_REQUEUE_THRESHOLD we should never run out off
  2423. * buffers
  2424. */
  2425. buf->pool_entry = pool_entry;
  2426. for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) {
  2427. buf->buffer->element[i].length = PAGE_SIZE;
  2428. buf->buffer->element[i].addr = pool_entry->elements[i];
  2429. if (i == QETH_MAX_BUFFER_ELEMENTS(card) - 1)
  2430. buf->buffer->element[i].eflags = SBAL_EFLAGS_LAST_ENTRY;
  2431. else
  2432. buf->buffer->element[i].eflags = 0;
  2433. buf->buffer->element[i].sflags = 0;
  2434. }
  2435. return 0;
  2436. }
  2437. int qeth_init_qdio_queues(struct qeth_card *card)
  2438. {
  2439. int i, j;
  2440. int rc;
  2441. QETH_DBF_TEXT(SETUP, 2, "initqdqs");
  2442. /* inbound queue */
  2443. qdio_reset_buffers(card->qdio.in_q->qdio_bufs, QDIO_MAX_BUFFERS_PER_Q);
  2444. memset(&card->rx, 0, sizeof(struct qeth_rx));
  2445. qeth_initialize_working_pool_list(card);
  2446. /*give only as many buffers to hardware as we have buffer pool entries*/
  2447. for (i = 0; i < card->qdio.in_buf_pool.buf_count - 1; ++i)
  2448. qeth_init_input_buffer(card, &card->qdio.in_q->bufs[i]);
  2449. card->qdio.in_q->next_buf_to_init =
  2450. card->qdio.in_buf_pool.buf_count - 1;
  2451. rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT, 0, 0,
  2452. card->qdio.in_buf_pool.buf_count - 1);
  2453. if (rc) {
  2454. QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
  2455. return rc;
  2456. }
  2457. /* completion */
  2458. rc = qeth_cq_init(card);
  2459. if (rc) {
  2460. return rc;
  2461. }
  2462. /* outbound queue */
  2463. for (i = 0; i < card->qdio.no_out_queues; ++i) {
  2464. qdio_reset_buffers(card->qdio.out_qs[i]->qdio_bufs,
  2465. QDIO_MAX_BUFFERS_PER_Q);
  2466. for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) {
  2467. qeth_clear_output_buffer(card->qdio.out_qs[i],
  2468. card->qdio.out_qs[i]->bufs[j]);
  2469. }
  2470. card->qdio.out_qs[i]->card = card;
  2471. card->qdio.out_qs[i]->next_buf_to_fill = 0;
  2472. card->qdio.out_qs[i]->do_pack = 0;
  2473. atomic_set(&card->qdio.out_qs[i]->used_buffers, 0);
  2474. atomic_set(&card->qdio.out_qs[i]->set_pci_flags_count, 0);
  2475. atomic_set(&card->qdio.out_qs[i]->state,
  2476. QETH_OUT_Q_UNLOCKED);
  2477. }
  2478. return 0;
  2479. }
  2480. EXPORT_SYMBOL_GPL(qeth_init_qdio_queues);
  2481. static __u8 qeth_get_ipa_adp_type(enum qeth_link_types link_type)
  2482. {
  2483. switch (link_type) {
  2484. case QETH_LINK_TYPE_HSTR:
  2485. return 2;
  2486. default:
  2487. return 1;
  2488. }
  2489. }
  2490. static void qeth_fill_ipacmd_header(struct qeth_card *card,
  2491. struct qeth_ipa_cmd *cmd,
  2492. enum qeth_ipa_cmds command,
  2493. enum qeth_prot_versions prot)
  2494. {
  2495. cmd->hdr.command = command;
  2496. cmd->hdr.initiator = IPA_CMD_INITIATOR_HOST;
  2497. /* cmd->hdr.seqno is set by qeth_send_control_data() */
  2498. cmd->hdr.adapter_type = qeth_get_ipa_adp_type(card->info.link_type);
  2499. cmd->hdr.rel_adapter_no = (u8) card->dev->dev_port;
  2500. cmd->hdr.prim_version_no = IS_LAYER2(card) ? 2 : 1;
  2501. cmd->hdr.param_count = 1;
  2502. cmd->hdr.prot_version = prot;
  2503. }
  2504. struct qeth_cmd_buffer *qeth_get_ipacmd_buffer(struct qeth_card *card,
  2505. enum qeth_ipa_cmds ipacmd, enum qeth_prot_versions prot)
  2506. {
  2507. struct qeth_cmd_buffer *iob;
  2508. iob = qeth_get_buffer(&card->write);
  2509. if (iob) {
  2510. qeth_fill_ipacmd_header(card, __ipa_cmd(iob), ipacmd, prot);
  2511. } else {
  2512. dev_warn(&card->gdev->dev,
  2513. "The qeth driver ran out of channel command buffers\n");
  2514. QETH_DBF_MESSAGE(1, "device %x ran out of channel command buffers",
  2515. CARD_DEVID(card));
  2516. }
  2517. return iob;
  2518. }
  2519. EXPORT_SYMBOL_GPL(qeth_get_ipacmd_buffer);
  2520. void qeth_prepare_ipa_cmd(struct qeth_card *card, struct qeth_cmd_buffer *iob)
  2521. {
  2522. u8 prot_type = qeth_mpc_select_prot_type(card);
  2523. memcpy(iob->data, IPA_PDU_HEADER, IPA_PDU_HEADER_SIZE);
  2524. memcpy(QETH_IPA_CMD_PROT_TYPE(iob->data), &prot_type, 1);
  2525. memcpy(QETH_IPA_CMD_DEST_ADDR(iob->data),
  2526. &card->token.ulp_connection_r, QETH_MPC_TOKEN_LENGTH);
  2527. }
  2528. EXPORT_SYMBOL_GPL(qeth_prepare_ipa_cmd);
  2529. /**
  2530. * qeth_send_ipa_cmd() - send an IPA command
  2531. *
  2532. * See qeth_send_control_data() for explanation of the arguments.
  2533. */
  2534. int qeth_send_ipa_cmd(struct qeth_card *card, struct qeth_cmd_buffer *iob,
  2535. int (*reply_cb)(struct qeth_card *, struct qeth_reply*,
  2536. unsigned long),
  2537. void *reply_param)
  2538. {
  2539. int rc;
  2540. QETH_CARD_TEXT(card, 4, "sendipa");
  2541. qeth_prepare_ipa_cmd(card, iob);
  2542. rc = qeth_send_control_data(card, IPA_CMD_LENGTH,
  2543. iob, reply_cb, reply_param);
  2544. if (rc == -ETIME) {
  2545. qeth_clear_ipacmd_list(card);
  2546. qeth_schedule_recovery(card);
  2547. }
  2548. return rc;
  2549. }
  2550. EXPORT_SYMBOL_GPL(qeth_send_ipa_cmd);
  2551. static int qeth_send_startlan(struct qeth_card *card)
  2552. {
  2553. int rc;
  2554. struct qeth_cmd_buffer *iob;
  2555. QETH_DBF_TEXT(SETUP, 2, "strtlan");
  2556. iob = qeth_get_ipacmd_buffer(card, IPA_CMD_STARTLAN, 0);
  2557. if (!iob)
  2558. return -ENOMEM;
  2559. rc = qeth_send_ipa_cmd(card, iob, NULL, NULL);
  2560. return rc;
  2561. }
  2562. static int qeth_setadpparms_inspect_rc(struct qeth_ipa_cmd *cmd)
  2563. {
  2564. if (!cmd->hdr.return_code)
  2565. cmd->hdr.return_code =
  2566. cmd->data.setadapterparms.hdr.return_code;
  2567. return cmd->hdr.return_code;
  2568. }
  2569. static int qeth_query_setadapterparms_cb(struct qeth_card *card,
  2570. struct qeth_reply *reply, unsigned long data)
  2571. {
  2572. struct qeth_ipa_cmd *cmd = (struct qeth_ipa_cmd *) data;
  2573. QETH_CARD_TEXT(card, 3, "quyadpcb");
  2574. if (qeth_setadpparms_inspect_rc(cmd))
  2575. return 0;
  2576. if (cmd->data.setadapterparms.data.query_cmds_supp.lan_type & 0x7f) {
  2577. card->info.link_type =
  2578. cmd->data.setadapterparms.data.query_cmds_supp.lan_type;
  2579. QETH_DBF_TEXT_(SETUP, 2, "lnk %d", card->info.link_type);
  2580. }
  2581. card->options.adp.supported_funcs =
  2582. cmd->data.setadapterparms.data.query_cmds_supp.supported_cmds;
  2583. return 0;
  2584. }
  2585. static struct qeth_cmd_buffer *qeth_get_adapter_cmd(struct qeth_card *card,
  2586. __u32 command, __u32 cmdlen)
  2587. {
  2588. struct qeth_cmd_buffer *iob;
  2589. struct qeth_ipa_cmd *cmd;
  2590. iob = qeth_get_ipacmd_buffer(card, IPA_CMD_SETADAPTERPARMS,
  2591. QETH_PROT_IPV4);
  2592. if (iob) {
  2593. cmd = __ipa_cmd(iob);
  2594. cmd->data.setadapterparms.hdr.cmdlength = cmdlen;
  2595. cmd->data.setadapterparms.hdr.command_code = command;
  2596. cmd->data.setadapterparms.hdr.used_total = 1;
  2597. cmd->data.setadapterparms.hdr.seq_no = 1;
  2598. }
  2599. return iob;
  2600. }
  2601. static int qeth_query_setadapterparms(struct qeth_card *card)
  2602. {
  2603. int rc;
  2604. struct qeth_cmd_buffer *iob;
  2605. QETH_CARD_TEXT(card, 3, "queryadp");
  2606. iob = qeth_get_adapter_cmd(card, IPA_SETADP_QUERY_COMMANDS_SUPPORTED,
  2607. sizeof(struct qeth_ipacmd_setadpparms));
  2608. if (!iob)
  2609. return -ENOMEM;
  2610. rc = qeth_send_ipa_cmd(card, iob, qeth_query_setadapterparms_cb, NULL);
  2611. return rc;
  2612. }
  2613. static int qeth_query_ipassists_cb(struct qeth_card *card,
  2614. struct qeth_reply *reply, unsigned long data)
  2615. {
  2616. struct qeth_ipa_cmd *cmd;
  2617. QETH_DBF_TEXT(SETUP, 2, "qipasscb");
  2618. cmd = (struct qeth_ipa_cmd *) data;
  2619. switch (cmd->hdr.return_code) {
  2620. case IPA_RC_NOTSUPP:
  2621. case IPA_RC_L2_UNSUPPORTED_CMD:
  2622. QETH_DBF_TEXT(SETUP, 2, "ipaunsup");
  2623. card->options.ipa4.supported_funcs |= IPA_SETADAPTERPARMS;
  2624. card->options.ipa6.supported_funcs |= IPA_SETADAPTERPARMS;
  2625. return 0;
  2626. default:
  2627. if (cmd->hdr.return_code) {
  2628. QETH_DBF_MESSAGE(1, "IPA_CMD_QIPASSIST on device %x: Unhandled rc=%#x\n",
  2629. CARD_DEVID(card),
  2630. cmd->hdr.return_code);
  2631. return 0;
  2632. }
  2633. }
  2634. if (cmd->hdr.prot_version == QETH_PROT_IPV4) {
  2635. card->options.ipa4.supported_funcs = cmd->hdr.ipa_supported;
  2636. card->options.ipa4.enabled_funcs = cmd->hdr.ipa_enabled;
  2637. } else if (cmd->hdr.prot_version == QETH_PROT_IPV6) {
  2638. card->options.ipa6.supported_funcs = cmd->hdr.ipa_supported;
  2639. card->options.ipa6.enabled_funcs = cmd->hdr.ipa_enabled;
  2640. } else
  2641. QETH_DBF_MESSAGE(1, "IPA_CMD_QIPASSIST on device %x: Flawed LIC detected\n",
  2642. CARD_DEVID(card));
  2643. return 0;
  2644. }
  2645. static int qeth_query_ipassists(struct qeth_card *card,
  2646. enum qeth_prot_versions prot)
  2647. {
  2648. int rc;
  2649. struct qeth_cmd_buffer *iob;
  2650. QETH_DBF_TEXT_(SETUP, 2, "qipassi%i", prot);
  2651. iob = qeth_get_ipacmd_buffer(card, IPA_CMD_QIPASSIST, prot);
  2652. if (!iob)
  2653. return -ENOMEM;
  2654. rc = qeth_send_ipa_cmd(card, iob, qeth_query_ipassists_cb, NULL);
  2655. return rc;
  2656. }
  2657. static int qeth_query_switch_attributes_cb(struct qeth_card *card,
  2658. struct qeth_reply *reply, unsigned long data)
  2659. {
  2660. struct qeth_ipa_cmd *cmd = (struct qeth_ipa_cmd *) data;
  2661. struct qeth_query_switch_attributes *attrs;
  2662. struct qeth_switch_info *sw_info;
  2663. QETH_CARD_TEXT(card, 2, "qswiatcb");
  2664. if (qeth_setadpparms_inspect_rc(cmd))
  2665. return 0;
  2666. sw_info = (struct qeth_switch_info *)reply->param;
  2667. attrs = &cmd->data.setadapterparms.data.query_switch_attributes;
  2668. sw_info->capabilities = attrs->capabilities;
  2669. sw_info->settings = attrs->settings;
  2670. QETH_CARD_TEXT_(card, 2, "%04x%04x", sw_info->capabilities,
  2671. sw_info->settings);
  2672. return 0;
  2673. }
  2674. int qeth_query_switch_attributes(struct qeth_card *card,
  2675. struct qeth_switch_info *sw_info)
  2676. {
  2677. struct qeth_cmd_buffer *iob;
  2678. QETH_CARD_TEXT(card, 2, "qswiattr");
  2679. if (!qeth_adp_supported(card, IPA_SETADP_QUERY_SWITCH_ATTRIBUTES))
  2680. return -EOPNOTSUPP;
  2681. if (!netif_carrier_ok(card->dev))
  2682. return -ENOMEDIUM;
  2683. iob = qeth_get_adapter_cmd(card, IPA_SETADP_QUERY_SWITCH_ATTRIBUTES,
  2684. sizeof(struct qeth_ipacmd_setadpparms_hdr));
  2685. if (!iob)
  2686. return -ENOMEM;
  2687. return qeth_send_ipa_cmd(card, iob,
  2688. qeth_query_switch_attributes_cb, sw_info);
  2689. }
  2690. static int qeth_query_setdiagass_cb(struct qeth_card *card,
  2691. struct qeth_reply *reply, unsigned long data)
  2692. {
  2693. struct qeth_ipa_cmd *cmd;
  2694. __u16 rc;
  2695. cmd = (struct qeth_ipa_cmd *)data;
  2696. rc = cmd->hdr.return_code;
  2697. if (rc)
  2698. QETH_CARD_TEXT_(card, 2, "diagq:%x", rc);
  2699. else
  2700. card->info.diagass_support = cmd->data.diagass.ext;
  2701. return 0;
  2702. }
  2703. static int qeth_query_setdiagass(struct qeth_card *card)
  2704. {
  2705. struct qeth_cmd_buffer *iob;
  2706. struct qeth_ipa_cmd *cmd;
  2707. QETH_DBF_TEXT(SETUP, 2, "qdiagass");
  2708. iob = qeth_get_ipacmd_buffer(card, IPA_CMD_SET_DIAG_ASS, 0);
  2709. if (!iob)
  2710. return -ENOMEM;
  2711. cmd = __ipa_cmd(iob);
  2712. cmd->data.diagass.subcmd_len = 16;
  2713. cmd->data.diagass.subcmd = QETH_DIAGS_CMD_QUERY;
  2714. return qeth_send_ipa_cmd(card, iob, qeth_query_setdiagass_cb, NULL);
  2715. }
  2716. static void qeth_get_trap_id(struct qeth_card *card, struct qeth_trap_id *tid)
  2717. {
  2718. unsigned long info = get_zeroed_page(GFP_KERNEL);
  2719. struct sysinfo_2_2_2 *info222 = (struct sysinfo_2_2_2 *)info;
  2720. struct sysinfo_3_2_2 *info322 = (struct sysinfo_3_2_2 *)info;
  2721. struct ccw_dev_id ccwid;
  2722. int level;
  2723. tid->chpid = card->info.chpid;
  2724. ccw_device_get_id(CARD_RDEV(card), &ccwid);
  2725. tid->ssid = ccwid.ssid;
  2726. tid->devno = ccwid.devno;
  2727. if (!info)
  2728. return;
  2729. level = stsi(NULL, 0, 0, 0);
  2730. if ((level >= 2) && (stsi(info222, 2, 2, 2) == 0))
  2731. tid->lparnr = info222->lpar_number;
  2732. if ((level >= 3) && (stsi(info322, 3, 2, 2) == 0)) {
  2733. EBCASC(info322->vm[0].name, sizeof(info322->vm[0].name));
  2734. memcpy(tid->vmname, info322->vm[0].name, sizeof(tid->vmname));
  2735. }
  2736. free_page(info);
  2737. return;
  2738. }
  2739. static int qeth_hw_trap_cb(struct qeth_card *card,
  2740. struct qeth_reply *reply, unsigned long data)
  2741. {
  2742. struct qeth_ipa_cmd *cmd;
  2743. __u16 rc;
  2744. cmd = (struct qeth_ipa_cmd *)data;
  2745. rc = cmd->hdr.return_code;
  2746. if (rc)
  2747. QETH_CARD_TEXT_(card, 2, "trapc:%x", rc);
  2748. return 0;
  2749. }
  2750. int qeth_hw_trap(struct qeth_card *card, enum qeth_diags_trap_action action)
  2751. {
  2752. struct qeth_cmd_buffer *iob;
  2753. struct qeth_ipa_cmd *cmd;
  2754. QETH_DBF_TEXT(SETUP, 2, "diagtrap");
  2755. iob = qeth_get_ipacmd_buffer(card, IPA_CMD_SET_DIAG_ASS, 0);
  2756. if (!iob)
  2757. return -ENOMEM;
  2758. cmd = __ipa_cmd(iob);
  2759. cmd->data.diagass.subcmd_len = 80;
  2760. cmd->data.diagass.subcmd = QETH_DIAGS_CMD_TRAP;
  2761. cmd->data.diagass.type = 1;
  2762. cmd->data.diagass.action = action;
  2763. switch (action) {
  2764. case QETH_DIAGS_TRAP_ARM:
  2765. cmd->data.diagass.options = 0x0003;
  2766. cmd->data.diagass.ext = 0x00010000 +
  2767. sizeof(struct qeth_trap_id);
  2768. qeth_get_trap_id(card,
  2769. (struct qeth_trap_id *)cmd->data.diagass.cdata);
  2770. break;
  2771. case QETH_DIAGS_TRAP_DISARM:
  2772. cmd->data.diagass.options = 0x0001;
  2773. break;
  2774. case QETH_DIAGS_TRAP_CAPTURE:
  2775. break;
  2776. }
  2777. return qeth_send_ipa_cmd(card, iob, qeth_hw_trap_cb, NULL);
  2778. }
  2779. EXPORT_SYMBOL_GPL(qeth_hw_trap);
  2780. static int qeth_check_qdio_errors(struct qeth_card *card,
  2781. struct qdio_buffer *buf,
  2782. unsigned int qdio_error,
  2783. const char *dbftext)
  2784. {
  2785. if (qdio_error) {
  2786. QETH_CARD_TEXT(card, 2, dbftext);
  2787. QETH_CARD_TEXT_(card, 2, " F15=%02X",
  2788. buf->element[15].sflags);
  2789. QETH_CARD_TEXT_(card, 2, " F14=%02X",
  2790. buf->element[14].sflags);
  2791. QETH_CARD_TEXT_(card, 2, " qerr=%X", qdio_error);
  2792. if ((buf->element[15].sflags) == 0x12) {
  2793. card->stats.rx_dropped++;
  2794. return 0;
  2795. } else
  2796. return 1;
  2797. }
  2798. return 0;
  2799. }
  2800. static void qeth_queue_input_buffer(struct qeth_card *card, int index)
  2801. {
  2802. struct qeth_qdio_q *queue = card->qdio.in_q;
  2803. struct list_head *lh;
  2804. int count;
  2805. int i;
  2806. int rc;
  2807. int newcount = 0;
  2808. count = (index < queue->next_buf_to_init)?
  2809. card->qdio.in_buf_pool.buf_count -
  2810. (queue->next_buf_to_init - index) :
  2811. card->qdio.in_buf_pool.buf_count -
  2812. (queue->next_buf_to_init + QDIO_MAX_BUFFERS_PER_Q - index);
  2813. /* only requeue at a certain threshold to avoid SIGAs */
  2814. if (count >= QETH_IN_BUF_REQUEUE_THRESHOLD(card)) {
  2815. for (i = queue->next_buf_to_init;
  2816. i < queue->next_buf_to_init + count; ++i) {
  2817. if (qeth_init_input_buffer(card,
  2818. &queue->bufs[i % QDIO_MAX_BUFFERS_PER_Q])) {
  2819. break;
  2820. } else {
  2821. newcount++;
  2822. }
  2823. }
  2824. if (newcount < count) {
  2825. /* we are in memory shortage so we switch back to
  2826. traditional skb allocation and drop packages */
  2827. atomic_set(&card->force_alloc_skb, 3);
  2828. count = newcount;
  2829. } else {
  2830. atomic_add_unless(&card->force_alloc_skb, -1, 0);
  2831. }
  2832. if (!count) {
  2833. i = 0;
  2834. list_for_each(lh, &card->qdio.in_buf_pool.entry_list)
  2835. i++;
  2836. if (i == card->qdio.in_buf_pool.buf_count) {
  2837. QETH_CARD_TEXT(card, 2, "qsarbw");
  2838. card->reclaim_index = index;
  2839. schedule_delayed_work(
  2840. &card->buffer_reclaim_work,
  2841. QETH_RECLAIM_WORK_TIME);
  2842. }
  2843. return;
  2844. }
  2845. /*
  2846. * according to old code it should be avoided to requeue all
  2847. * 128 buffers in order to benefit from PCI avoidance.
  2848. * this function keeps at least one buffer (the buffer at
  2849. * 'index') un-requeued -> this buffer is the first buffer that
  2850. * will be requeued the next time
  2851. */
  2852. if (card->options.performance_stats) {
  2853. card->perf_stats.inbound_do_qdio_cnt++;
  2854. card->perf_stats.inbound_do_qdio_start_time =
  2855. qeth_get_micros();
  2856. }
  2857. rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT, 0,
  2858. queue->next_buf_to_init, count);
  2859. if (card->options.performance_stats)
  2860. card->perf_stats.inbound_do_qdio_time +=
  2861. qeth_get_micros() -
  2862. card->perf_stats.inbound_do_qdio_start_time;
  2863. if (rc) {
  2864. QETH_CARD_TEXT(card, 2, "qinberr");
  2865. }
  2866. queue->next_buf_to_init = (queue->next_buf_to_init + count) %
  2867. QDIO_MAX_BUFFERS_PER_Q;
  2868. }
  2869. }
  2870. static void qeth_buffer_reclaim_work(struct work_struct *work)
  2871. {
  2872. struct qeth_card *card = container_of(work, struct qeth_card,
  2873. buffer_reclaim_work.work);
  2874. QETH_CARD_TEXT_(card, 2, "brw:%x", card->reclaim_index);
  2875. qeth_queue_input_buffer(card, card->reclaim_index);
  2876. }
  2877. static void qeth_handle_send_error(struct qeth_card *card,
  2878. struct qeth_qdio_out_buffer *buffer, unsigned int qdio_err)
  2879. {
  2880. int sbalf15 = buffer->buffer->element[15].sflags;
  2881. QETH_CARD_TEXT(card, 6, "hdsnderr");
  2882. if (card->info.type == QETH_CARD_TYPE_IQD) {
  2883. if (sbalf15 == 0) {
  2884. qdio_err = 0;
  2885. } else {
  2886. qdio_err = 1;
  2887. }
  2888. }
  2889. qeth_check_qdio_errors(card, buffer->buffer, qdio_err, "qouterr");
  2890. if (!qdio_err)
  2891. return;
  2892. if ((sbalf15 >= 15) && (sbalf15 <= 31))
  2893. return;
  2894. QETH_CARD_TEXT(card, 1, "lnkfail");
  2895. QETH_CARD_TEXT_(card, 1, "%04x %02x",
  2896. (u16)qdio_err, (u8)sbalf15);
  2897. }
  2898. /**
  2899. * qeth_prep_flush_pack_buffer - Prepares flushing of a packing buffer.
  2900. * @queue: queue to check for packing buffer
  2901. *
  2902. * Returns number of buffers that were prepared for flush.
  2903. */
  2904. static int qeth_prep_flush_pack_buffer(struct qeth_qdio_out_q *queue)
  2905. {
  2906. struct qeth_qdio_out_buffer *buffer;
  2907. buffer = queue->bufs[queue->next_buf_to_fill];
  2908. if ((atomic_read(&buffer->state) == QETH_QDIO_BUF_EMPTY) &&
  2909. (buffer->next_element_to_fill > 0)) {
  2910. /* it's a packing buffer */
  2911. atomic_set(&buffer->state, QETH_QDIO_BUF_PRIMED);
  2912. queue->next_buf_to_fill =
  2913. (queue->next_buf_to_fill + 1) % QDIO_MAX_BUFFERS_PER_Q;
  2914. return 1;
  2915. }
  2916. return 0;
  2917. }
  2918. /*
  2919. * Switched to packing state if the number of used buffers on a queue
  2920. * reaches a certain limit.
  2921. */
  2922. static void qeth_switch_to_packing_if_needed(struct qeth_qdio_out_q *queue)
  2923. {
  2924. if (!queue->do_pack) {
  2925. if (atomic_read(&queue->used_buffers)
  2926. >= QETH_HIGH_WATERMARK_PACK){
  2927. /* switch non-PACKING -> PACKING */
  2928. QETH_CARD_TEXT(queue->card, 6, "np->pack");
  2929. if (queue->card->options.performance_stats)
  2930. queue->card->perf_stats.sc_dp_p++;
  2931. queue->do_pack = 1;
  2932. }
  2933. }
  2934. }
  2935. /*
  2936. * Switches from packing to non-packing mode. If there is a packing
  2937. * buffer on the queue this buffer will be prepared to be flushed.
  2938. * In that case 1 is returned to inform the caller. If no buffer
  2939. * has to be flushed, zero is returned.
  2940. */
  2941. static int qeth_switch_to_nonpacking_if_needed(struct qeth_qdio_out_q *queue)
  2942. {
  2943. if (queue->do_pack) {
  2944. if (atomic_read(&queue->used_buffers)
  2945. <= QETH_LOW_WATERMARK_PACK) {
  2946. /* switch PACKING -> non-PACKING */
  2947. QETH_CARD_TEXT(queue->card, 6, "pack->np");
  2948. if (queue->card->options.performance_stats)
  2949. queue->card->perf_stats.sc_p_dp++;
  2950. queue->do_pack = 0;
  2951. return qeth_prep_flush_pack_buffer(queue);
  2952. }
  2953. }
  2954. return 0;
  2955. }
  2956. static void qeth_flush_buffers(struct qeth_qdio_out_q *queue, int index,
  2957. int count)
  2958. {
  2959. struct qeth_qdio_out_buffer *buf;
  2960. int rc;
  2961. int i;
  2962. unsigned int qdio_flags;
  2963. for (i = index; i < index + count; ++i) {
  2964. int bidx = i % QDIO_MAX_BUFFERS_PER_Q;
  2965. buf = queue->bufs[bidx];
  2966. buf->buffer->element[buf->next_element_to_fill - 1].eflags |=
  2967. SBAL_EFLAGS_LAST_ENTRY;
  2968. if (queue->bufstates)
  2969. queue->bufstates[bidx].user = buf;
  2970. if (queue->card->info.type == QETH_CARD_TYPE_IQD)
  2971. continue;
  2972. if (!queue->do_pack) {
  2973. if ((atomic_read(&queue->used_buffers) >=
  2974. (QETH_HIGH_WATERMARK_PACK -
  2975. QETH_WATERMARK_PACK_FUZZ)) &&
  2976. !atomic_read(&queue->set_pci_flags_count)) {
  2977. /* it's likely that we'll go to packing
  2978. * mode soon */
  2979. atomic_inc(&queue->set_pci_flags_count);
  2980. buf->buffer->element[0].sflags |= SBAL_SFLAGS0_PCI_REQ;
  2981. }
  2982. } else {
  2983. if (!atomic_read(&queue->set_pci_flags_count)) {
  2984. /*
  2985. * there's no outstanding PCI any more, so we
  2986. * have to request a PCI to be sure the the PCI
  2987. * will wake at some time in the future then we
  2988. * can flush packed buffers that might still be
  2989. * hanging around, which can happen if no
  2990. * further send was requested by the stack
  2991. */
  2992. atomic_inc(&queue->set_pci_flags_count);
  2993. buf->buffer->element[0].sflags |= SBAL_SFLAGS0_PCI_REQ;
  2994. }
  2995. }
  2996. }
  2997. netif_trans_update(queue->card->dev);
  2998. if (queue->card->options.performance_stats) {
  2999. queue->card->perf_stats.outbound_do_qdio_cnt++;
  3000. queue->card->perf_stats.outbound_do_qdio_start_time =
  3001. qeth_get_micros();
  3002. }
  3003. qdio_flags = QDIO_FLAG_SYNC_OUTPUT;
  3004. if (atomic_read(&queue->set_pci_flags_count))
  3005. qdio_flags |= QDIO_FLAG_PCI_OUT;
  3006. atomic_add(count, &queue->used_buffers);
  3007. rc = do_QDIO(CARD_DDEV(queue->card), qdio_flags,
  3008. queue->queue_no, index, count);
  3009. if (queue->card->options.performance_stats)
  3010. queue->card->perf_stats.outbound_do_qdio_time +=
  3011. qeth_get_micros() -
  3012. queue->card->perf_stats.outbound_do_qdio_start_time;
  3013. if (rc) {
  3014. queue->card->stats.tx_errors += count;
  3015. /* ignore temporary SIGA errors without busy condition */
  3016. if (rc == -ENOBUFS)
  3017. return;
  3018. QETH_CARD_TEXT(queue->card, 2, "flushbuf");
  3019. QETH_CARD_TEXT_(queue->card, 2, " q%d", queue->queue_no);
  3020. QETH_CARD_TEXT_(queue->card, 2, " idx%d", index);
  3021. QETH_CARD_TEXT_(queue->card, 2, " c%d", count);
  3022. QETH_CARD_TEXT_(queue->card, 2, " err%d", rc);
  3023. /* this must not happen under normal circumstances. if it
  3024. * happens something is really wrong -> recover */
  3025. qeth_schedule_recovery(queue->card);
  3026. return;
  3027. }
  3028. if (queue->card->options.performance_stats)
  3029. queue->card->perf_stats.bufs_sent += count;
  3030. }
  3031. static void qeth_check_outbound_queue(struct qeth_qdio_out_q *queue)
  3032. {
  3033. int index;
  3034. int flush_cnt = 0;
  3035. int q_was_packing = 0;
  3036. /*
  3037. * check if weed have to switch to non-packing mode or if
  3038. * we have to get a pci flag out on the queue
  3039. */
  3040. if ((atomic_read(&queue->used_buffers) <= QETH_LOW_WATERMARK_PACK) ||
  3041. !atomic_read(&queue->set_pci_flags_count)) {
  3042. if (atomic_xchg(&queue->state, QETH_OUT_Q_LOCKED_FLUSH) ==
  3043. QETH_OUT_Q_UNLOCKED) {
  3044. /*
  3045. * If we get in here, there was no action in
  3046. * do_send_packet. So, we check if there is a
  3047. * packing buffer to be flushed here.
  3048. */
  3049. netif_stop_queue(queue->card->dev);
  3050. index = queue->next_buf_to_fill;
  3051. q_was_packing = queue->do_pack;
  3052. /* queue->do_pack may change */
  3053. barrier();
  3054. flush_cnt += qeth_switch_to_nonpacking_if_needed(queue);
  3055. if (!flush_cnt &&
  3056. !atomic_read(&queue->set_pci_flags_count))
  3057. flush_cnt += qeth_prep_flush_pack_buffer(queue);
  3058. if (queue->card->options.performance_stats &&
  3059. q_was_packing)
  3060. queue->card->perf_stats.bufs_sent_pack +=
  3061. flush_cnt;
  3062. if (flush_cnt)
  3063. qeth_flush_buffers(queue, index, flush_cnt);
  3064. atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED);
  3065. }
  3066. }
  3067. }
  3068. static void qeth_qdio_start_poll(struct ccw_device *ccwdev, int queue,
  3069. unsigned long card_ptr)
  3070. {
  3071. struct qeth_card *card = (struct qeth_card *)card_ptr;
  3072. if (card->dev->flags & IFF_UP)
  3073. napi_schedule(&card->napi);
  3074. }
  3075. int qeth_configure_cq(struct qeth_card *card, enum qeth_cq cq)
  3076. {
  3077. int rc;
  3078. if (card->options.cq == QETH_CQ_NOTAVAILABLE) {
  3079. rc = -1;
  3080. goto out;
  3081. } else {
  3082. if (card->options.cq == cq) {
  3083. rc = 0;
  3084. goto out;
  3085. }
  3086. if (card->state != CARD_STATE_DOWN &&
  3087. card->state != CARD_STATE_RECOVER) {
  3088. rc = -1;
  3089. goto out;
  3090. }
  3091. qeth_free_qdio_buffers(card);
  3092. card->options.cq = cq;
  3093. rc = 0;
  3094. }
  3095. out:
  3096. return rc;
  3097. }
  3098. EXPORT_SYMBOL_GPL(qeth_configure_cq);
  3099. static void qeth_qdio_cq_handler(struct qeth_card *card, unsigned int qdio_err,
  3100. unsigned int queue, int first_element,
  3101. int count)
  3102. {
  3103. struct qeth_qdio_q *cq = card->qdio.c_q;
  3104. int i;
  3105. int rc;
  3106. if (!qeth_is_cq(card, queue))
  3107. goto out;
  3108. QETH_CARD_TEXT_(card, 5, "qcqhe%d", first_element);
  3109. QETH_CARD_TEXT_(card, 5, "qcqhc%d", count);
  3110. QETH_CARD_TEXT_(card, 5, "qcqherr%d", qdio_err);
  3111. if (qdio_err) {
  3112. netif_stop_queue(card->dev);
  3113. qeth_schedule_recovery(card);
  3114. goto out;
  3115. }
  3116. if (card->options.performance_stats) {
  3117. card->perf_stats.cq_cnt++;
  3118. card->perf_stats.cq_start_time = qeth_get_micros();
  3119. }
  3120. for (i = first_element; i < first_element + count; ++i) {
  3121. int bidx = i % QDIO_MAX_BUFFERS_PER_Q;
  3122. struct qdio_buffer *buffer = cq->qdio_bufs[bidx];
  3123. int e = 0;
  3124. while ((e < QDIO_MAX_ELEMENTS_PER_BUFFER) &&
  3125. buffer->element[e].addr) {
  3126. unsigned long phys_aob_addr;
  3127. phys_aob_addr = (unsigned long) buffer->element[e].addr;
  3128. qeth_qdio_handle_aob(card, phys_aob_addr);
  3129. ++e;
  3130. }
  3131. qeth_scrub_qdio_buffer(buffer, QDIO_MAX_ELEMENTS_PER_BUFFER);
  3132. }
  3133. rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT, queue,
  3134. card->qdio.c_q->next_buf_to_init,
  3135. count);
  3136. if (rc) {
  3137. dev_warn(&card->gdev->dev,
  3138. "QDIO reported an error, rc=%i\n", rc);
  3139. QETH_CARD_TEXT(card, 2, "qcqherr");
  3140. }
  3141. card->qdio.c_q->next_buf_to_init = (card->qdio.c_q->next_buf_to_init
  3142. + count) % QDIO_MAX_BUFFERS_PER_Q;
  3143. netif_wake_queue(card->dev);
  3144. if (card->options.performance_stats) {
  3145. int delta_t = qeth_get_micros();
  3146. delta_t -= card->perf_stats.cq_start_time;
  3147. card->perf_stats.cq_time += delta_t;
  3148. }
  3149. out:
  3150. return;
  3151. }
  3152. static void qeth_qdio_input_handler(struct ccw_device *ccwdev,
  3153. unsigned int qdio_err, int queue,
  3154. int first_elem, int count,
  3155. unsigned long card_ptr)
  3156. {
  3157. struct qeth_card *card = (struct qeth_card *)card_ptr;
  3158. QETH_CARD_TEXT_(card, 2, "qihq%d", queue);
  3159. QETH_CARD_TEXT_(card, 2, "qiec%d", qdio_err);
  3160. if (qeth_is_cq(card, queue))
  3161. qeth_qdio_cq_handler(card, qdio_err, queue, first_elem, count);
  3162. else if (qdio_err)
  3163. qeth_schedule_recovery(card);
  3164. }
  3165. static void qeth_qdio_output_handler(struct ccw_device *ccwdev,
  3166. unsigned int qdio_error, int __queue,
  3167. int first_element, int count,
  3168. unsigned long card_ptr)
  3169. {
  3170. struct qeth_card *card = (struct qeth_card *) card_ptr;
  3171. struct qeth_qdio_out_q *queue = card->qdio.out_qs[__queue];
  3172. struct qeth_qdio_out_buffer *buffer;
  3173. int i;
  3174. QETH_CARD_TEXT(card, 6, "qdouhdl");
  3175. if (qdio_error & QDIO_ERROR_FATAL) {
  3176. QETH_CARD_TEXT(card, 2, "achkcond");
  3177. netif_stop_queue(card->dev);
  3178. qeth_schedule_recovery(card);
  3179. return;
  3180. }
  3181. if (card->options.performance_stats) {
  3182. card->perf_stats.outbound_handler_cnt++;
  3183. card->perf_stats.outbound_handler_start_time =
  3184. qeth_get_micros();
  3185. }
  3186. for (i = first_element; i < (first_element + count); ++i) {
  3187. int bidx = i % QDIO_MAX_BUFFERS_PER_Q;
  3188. buffer = queue->bufs[bidx];
  3189. qeth_handle_send_error(card, buffer, qdio_error);
  3190. if (queue->bufstates &&
  3191. (queue->bufstates[bidx].flags &
  3192. QDIO_OUTBUF_STATE_FLAG_PENDING) != 0) {
  3193. WARN_ON_ONCE(card->options.cq != QETH_CQ_ENABLED);
  3194. if (atomic_cmpxchg(&buffer->state,
  3195. QETH_QDIO_BUF_PRIMED,
  3196. QETH_QDIO_BUF_PENDING) ==
  3197. QETH_QDIO_BUF_PRIMED) {
  3198. qeth_notify_skbs(queue, buffer,
  3199. TX_NOTIFY_PENDING);
  3200. }
  3201. QETH_CARD_TEXT_(queue->card, 5, "pel%d", bidx);
  3202. /* prepare the queue slot for re-use: */
  3203. qeth_scrub_qdio_buffer(buffer->buffer,
  3204. QETH_MAX_BUFFER_ELEMENTS(card));
  3205. if (qeth_init_qdio_out_buf(queue, bidx)) {
  3206. QETH_CARD_TEXT(card, 2, "outofbuf");
  3207. qeth_schedule_recovery(card);
  3208. }
  3209. } else {
  3210. if (card->options.cq == QETH_CQ_ENABLED) {
  3211. enum iucv_tx_notify n;
  3212. n = qeth_compute_cq_notification(
  3213. buffer->buffer->element[15].sflags, 0);
  3214. qeth_notify_skbs(queue, buffer, n);
  3215. }
  3216. qeth_clear_output_buffer(queue, buffer);
  3217. }
  3218. qeth_cleanup_handled_pending(queue, bidx, 0);
  3219. }
  3220. atomic_sub(count, &queue->used_buffers);
  3221. /* check if we need to do something on this outbound queue */
  3222. if (card->info.type != QETH_CARD_TYPE_IQD)
  3223. qeth_check_outbound_queue(queue);
  3224. netif_wake_queue(queue->card->dev);
  3225. if (card->options.performance_stats)
  3226. card->perf_stats.outbound_handler_time += qeth_get_micros() -
  3227. card->perf_stats.outbound_handler_start_time;
  3228. }
  3229. /* We cannot use outbound queue 3 for unicast packets on HiperSockets */
  3230. static inline int qeth_cut_iqd_prio(struct qeth_card *card, int queue_num)
  3231. {
  3232. if ((card->info.type == QETH_CARD_TYPE_IQD) && (queue_num == 3))
  3233. return 2;
  3234. return queue_num;
  3235. }
  3236. /**
  3237. * Note: Function assumes that we have 4 outbound queues.
  3238. */
  3239. int qeth_get_priority_queue(struct qeth_card *card, struct sk_buff *skb,
  3240. int ipv)
  3241. {
  3242. __be16 *tci;
  3243. u8 tos;
  3244. switch (card->qdio.do_prio_queueing) {
  3245. case QETH_PRIO_Q_ING_TOS:
  3246. case QETH_PRIO_Q_ING_PREC:
  3247. switch (ipv) {
  3248. case 4:
  3249. tos = ipv4_get_dsfield(ip_hdr(skb));
  3250. break;
  3251. case 6:
  3252. tos = ipv6_get_dsfield(ipv6_hdr(skb));
  3253. break;
  3254. default:
  3255. return card->qdio.default_out_queue;
  3256. }
  3257. if (card->qdio.do_prio_queueing == QETH_PRIO_Q_ING_PREC)
  3258. return qeth_cut_iqd_prio(card, ~tos >> 6 & 3);
  3259. if (tos & IPTOS_MINCOST)
  3260. return qeth_cut_iqd_prio(card, 3);
  3261. if (tos & IPTOS_RELIABILITY)
  3262. return 2;
  3263. if (tos & IPTOS_THROUGHPUT)
  3264. return 1;
  3265. if (tos & IPTOS_LOWDELAY)
  3266. return 0;
  3267. break;
  3268. case QETH_PRIO_Q_ING_SKB:
  3269. if (skb->priority > 5)
  3270. return 0;
  3271. return qeth_cut_iqd_prio(card, ~skb->priority >> 1 & 3);
  3272. case QETH_PRIO_Q_ING_VLAN:
  3273. tci = &((struct ethhdr *)skb->data)->h_proto;
  3274. if (be16_to_cpu(*tci) == ETH_P_8021Q)
  3275. return qeth_cut_iqd_prio(card,
  3276. ~be16_to_cpu(*(tci + 1)) >> (VLAN_PRIO_SHIFT + 1) & 3);
  3277. break;
  3278. default:
  3279. break;
  3280. }
  3281. return card->qdio.default_out_queue;
  3282. }
  3283. EXPORT_SYMBOL_GPL(qeth_get_priority_queue);
  3284. /**
  3285. * qeth_get_elements_for_frags() - find number of SBALEs for skb frags.
  3286. * @skb: SKB address
  3287. *
  3288. * Returns the number of pages, and thus QDIO buffer elements, needed to cover
  3289. * fragmented part of the SKB. Returns zero for linear SKB.
  3290. */
  3291. static int qeth_get_elements_for_frags(struct sk_buff *skb)
  3292. {
  3293. int cnt, elements = 0;
  3294. for (cnt = 0; cnt < skb_shinfo(skb)->nr_frags; cnt++) {
  3295. struct skb_frag_struct *frag = &skb_shinfo(skb)->frags[cnt];
  3296. elements += qeth_get_elements_for_range(
  3297. (addr_t)skb_frag_address(frag),
  3298. (addr_t)skb_frag_address(frag) + skb_frag_size(frag));
  3299. }
  3300. return elements;
  3301. }
  3302. /**
  3303. * qeth_count_elements() - Counts the number of QDIO buffer elements needed
  3304. * to transmit an skb.
  3305. * @skb: the skb to operate on.
  3306. * @data_offset: skip this part of the skb's linear data
  3307. *
  3308. * Returns the number of pages, and thus QDIO buffer elements, needed to map the
  3309. * skb's data (both its linear part and paged fragments).
  3310. */
  3311. unsigned int qeth_count_elements(struct sk_buff *skb, unsigned int data_offset)
  3312. {
  3313. unsigned int elements = qeth_get_elements_for_frags(skb);
  3314. addr_t end = (addr_t)skb->data + skb_headlen(skb);
  3315. addr_t start = (addr_t)skb->data + data_offset;
  3316. if (start != end)
  3317. elements += qeth_get_elements_for_range(start, end);
  3318. return elements;
  3319. }
  3320. EXPORT_SYMBOL_GPL(qeth_count_elements);
  3321. #define QETH_HDR_CACHE_OBJ_SIZE (sizeof(struct qeth_hdr_tso) + \
  3322. MAX_TCP_HEADER)
  3323. /**
  3324. * qeth_add_hw_header() - add a HW header to an skb.
  3325. * @skb: skb that the HW header should be added to.
  3326. * @hdr: double pointer to a qeth_hdr. When returning with >= 0,
  3327. * it contains a valid pointer to a qeth_hdr.
  3328. * @hdr_len: length of the HW header.
  3329. * @proto_len: length of protocol headers that need to be in same page as the
  3330. * HW header.
  3331. *
  3332. * Returns the pushed length. If the header can't be pushed on
  3333. * (eg. because it would cross a page boundary), it is allocated from
  3334. * the cache instead and 0 is returned.
  3335. * The number of needed buffer elements is returned in @elements.
  3336. * Error to create the hdr is indicated by returning with < 0.
  3337. */
  3338. int qeth_add_hw_header(struct qeth_card *card, struct sk_buff *skb,
  3339. struct qeth_hdr **hdr, unsigned int hdr_len,
  3340. unsigned int proto_len, unsigned int *elements)
  3341. {
  3342. const unsigned int max_elements = QETH_MAX_BUFFER_ELEMENTS(card);
  3343. const unsigned int contiguous = proto_len ? proto_len : 1;
  3344. unsigned int __elements;
  3345. addr_t start, end;
  3346. bool push_ok;
  3347. int rc;
  3348. check_layout:
  3349. start = (addr_t)skb->data - hdr_len;
  3350. end = (addr_t)skb->data;
  3351. if (qeth_get_elements_for_range(start, end + contiguous) == 1) {
  3352. /* Push HW header into same page as first protocol header. */
  3353. push_ok = true;
  3354. /* ... but TSO always needs a separate element for headers: */
  3355. if (skb_is_gso(skb))
  3356. __elements = 1 + qeth_count_elements(skb, proto_len);
  3357. else
  3358. __elements = qeth_count_elements(skb, 0);
  3359. } else if (!proto_len && qeth_get_elements_for_range(start, end) == 1) {
  3360. /* Push HW header into a new page. */
  3361. push_ok = true;
  3362. __elements = 1 + qeth_count_elements(skb, 0);
  3363. } else {
  3364. /* Use header cache, copy protocol headers up. */
  3365. push_ok = false;
  3366. __elements = 1 + qeth_count_elements(skb, proto_len);
  3367. }
  3368. /* Compress skb to fit into one IO buffer: */
  3369. if (__elements > max_elements) {
  3370. if (!skb_is_nonlinear(skb)) {
  3371. /* Drop it, no easy way of shrinking it further. */
  3372. QETH_DBF_MESSAGE(2, "Dropped an oversized skb (Max Elements=%u / Actual=%u / Length=%u).\n",
  3373. max_elements, __elements, skb->len);
  3374. return -E2BIG;
  3375. }
  3376. rc = skb_linearize(skb);
  3377. if (card->options.performance_stats) {
  3378. if (rc)
  3379. card->perf_stats.tx_linfail++;
  3380. else
  3381. card->perf_stats.tx_lin++;
  3382. }
  3383. if (rc)
  3384. return rc;
  3385. /* Linearization changed the layout, re-evaluate: */
  3386. goto check_layout;
  3387. }
  3388. *elements = __elements;
  3389. /* Add the header: */
  3390. if (push_ok) {
  3391. *hdr = skb_push(skb, hdr_len);
  3392. return hdr_len;
  3393. }
  3394. /* fall back */
  3395. if (hdr_len + proto_len > QETH_HDR_CACHE_OBJ_SIZE)
  3396. return -E2BIG;
  3397. *hdr = kmem_cache_alloc(qeth_core_header_cache, GFP_ATOMIC);
  3398. if (!*hdr)
  3399. return -ENOMEM;
  3400. /* Copy protocol headers behind HW header: */
  3401. skb_copy_from_linear_data(skb, ((char *)*hdr) + hdr_len, proto_len);
  3402. return 0;
  3403. }
  3404. EXPORT_SYMBOL_GPL(qeth_add_hw_header);
  3405. static void __qeth_fill_buffer(struct sk_buff *skb,
  3406. struct qeth_qdio_out_buffer *buf,
  3407. bool is_first_elem, unsigned int offset)
  3408. {
  3409. struct qdio_buffer *buffer = buf->buffer;
  3410. int element = buf->next_element_to_fill;
  3411. int length = skb_headlen(skb) - offset;
  3412. char *data = skb->data + offset;
  3413. int length_here, cnt;
  3414. /* map linear part into buffer element(s) */
  3415. while (length > 0) {
  3416. /* length_here is the remaining amount of data in this page */
  3417. length_here = PAGE_SIZE - ((unsigned long) data % PAGE_SIZE);
  3418. if (length < length_here)
  3419. length_here = length;
  3420. buffer->element[element].addr = data;
  3421. buffer->element[element].length = length_here;
  3422. length -= length_here;
  3423. if (is_first_elem) {
  3424. is_first_elem = false;
  3425. if (length || skb_is_nonlinear(skb))
  3426. /* skb needs additional elements */
  3427. buffer->element[element].eflags =
  3428. SBAL_EFLAGS_FIRST_FRAG;
  3429. else
  3430. buffer->element[element].eflags = 0;
  3431. } else {
  3432. buffer->element[element].eflags =
  3433. SBAL_EFLAGS_MIDDLE_FRAG;
  3434. }
  3435. data += length_here;
  3436. element++;
  3437. }
  3438. /* map page frags into buffer element(s) */
  3439. for (cnt = 0; cnt < skb_shinfo(skb)->nr_frags; cnt++) {
  3440. skb_frag_t *frag = &skb_shinfo(skb)->frags[cnt];
  3441. data = skb_frag_address(frag);
  3442. length = skb_frag_size(frag);
  3443. while (length > 0) {
  3444. length_here = PAGE_SIZE -
  3445. ((unsigned long) data % PAGE_SIZE);
  3446. if (length < length_here)
  3447. length_here = length;
  3448. buffer->element[element].addr = data;
  3449. buffer->element[element].length = length_here;
  3450. buffer->element[element].eflags =
  3451. SBAL_EFLAGS_MIDDLE_FRAG;
  3452. length -= length_here;
  3453. data += length_here;
  3454. element++;
  3455. }
  3456. }
  3457. if (buffer->element[element - 1].eflags)
  3458. buffer->element[element - 1].eflags = SBAL_EFLAGS_LAST_FRAG;
  3459. buf->next_element_to_fill = element;
  3460. }
  3461. /**
  3462. * qeth_fill_buffer() - map skb into an output buffer
  3463. * @queue: QDIO queue to submit the buffer on
  3464. * @buf: buffer to transport the skb
  3465. * @skb: skb to map into the buffer
  3466. * @hdr: qeth_hdr for this skb. Either at skb->data, or allocated
  3467. * from qeth_core_header_cache.
  3468. * @offset: when mapping the skb, start at skb->data + offset
  3469. * @hd_len: if > 0, build a dedicated header element of this size
  3470. */
  3471. static int qeth_fill_buffer(struct qeth_qdio_out_q *queue,
  3472. struct qeth_qdio_out_buffer *buf,
  3473. struct sk_buff *skb, struct qeth_hdr *hdr,
  3474. unsigned int offset, unsigned int hd_len)
  3475. {
  3476. struct qdio_buffer *buffer = buf->buffer;
  3477. bool is_first_elem = true;
  3478. int flush_cnt = 0;
  3479. __skb_queue_tail(&buf->skb_list, skb);
  3480. /* build dedicated header element */
  3481. if (hd_len) {
  3482. int element = buf->next_element_to_fill;
  3483. is_first_elem = false;
  3484. buffer->element[element].addr = hdr;
  3485. buffer->element[element].length = hd_len;
  3486. buffer->element[element].eflags = SBAL_EFLAGS_FIRST_FRAG;
  3487. /* remember to free cache-allocated qeth_hdr: */
  3488. buf->is_header[element] = ((void *)hdr != skb->data);
  3489. buf->next_element_to_fill++;
  3490. }
  3491. __qeth_fill_buffer(skb, buf, is_first_elem, offset);
  3492. if (!queue->do_pack) {
  3493. QETH_CARD_TEXT(queue->card, 6, "fillbfnp");
  3494. /* set state to PRIMED -> will be flushed */
  3495. atomic_set(&buf->state, QETH_QDIO_BUF_PRIMED);
  3496. flush_cnt = 1;
  3497. } else {
  3498. QETH_CARD_TEXT(queue->card, 6, "fillbfpa");
  3499. if (queue->card->options.performance_stats)
  3500. queue->card->perf_stats.skbs_sent_pack++;
  3501. if (buf->next_element_to_fill >=
  3502. QETH_MAX_BUFFER_ELEMENTS(queue->card)) {
  3503. /*
  3504. * packed buffer if full -> set state PRIMED
  3505. * -> will be flushed
  3506. */
  3507. atomic_set(&buf->state, QETH_QDIO_BUF_PRIMED);
  3508. flush_cnt = 1;
  3509. }
  3510. }
  3511. return flush_cnt;
  3512. }
  3513. int qeth_do_send_packet_fast(struct qeth_qdio_out_q *queue, struct sk_buff *skb,
  3514. struct qeth_hdr *hdr, unsigned int offset,
  3515. unsigned int hd_len)
  3516. {
  3517. int index = queue->next_buf_to_fill;
  3518. struct qeth_qdio_out_buffer *buffer = queue->bufs[index];
  3519. /*
  3520. * check if buffer is empty to make sure that we do not 'overtake'
  3521. * ourselves and try to fill a buffer that is already primed
  3522. */
  3523. if (atomic_read(&buffer->state) != QETH_QDIO_BUF_EMPTY)
  3524. return -EBUSY;
  3525. queue->next_buf_to_fill = (index + 1) % QDIO_MAX_BUFFERS_PER_Q;
  3526. qeth_fill_buffer(queue, buffer, skb, hdr, offset, hd_len);
  3527. qeth_flush_buffers(queue, index, 1);
  3528. return 0;
  3529. }
  3530. EXPORT_SYMBOL_GPL(qeth_do_send_packet_fast);
  3531. int qeth_do_send_packet(struct qeth_card *card, struct qeth_qdio_out_q *queue,
  3532. struct sk_buff *skb, struct qeth_hdr *hdr,
  3533. unsigned int offset, unsigned int hd_len,
  3534. int elements_needed)
  3535. {
  3536. struct qeth_qdio_out_buffer *buffer;
  3537. int start_index;
  3538. int flush_count = 0;
  3539. int do_pack = 0;
  3540. int tmp;
  3541. int rc = 0;
  3542. /* spin until we get the queue ... */
  3543. while (atomic_cmpxchg(&queue->state, QETH_OUT_Q_UNLOCKED,
  3544. QETH_OUT_Q_LOCKED) != QETH_OUT_Q_UNLOCKED);
  3545. start_index = queue->next_buf_to_fill;
  3546. buffer = queue->bufs[queue->next_buf_to_fill];
  3547. /*
  3548. * check if buffer is empty to make sure that we do not 'overtake'
  3549. * ourselves and try to fill a buffer that is already primed
  3550. */
  3551. if (atomic_read(&buffer->state) != QETH_QDIO_BUF_EMPTY) {
  3552. atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED);
  3553. return -EBUSY;
  3554. }
  3555. /* check if we need to switch packing state of this queue */
  3556. qeth_switch_to_packing_if_needed(queue);
  3557. if (queue->do_pack) {
  3558. do_pack = 1;
  3559. /* does packet fit in current buffer? */
  3560. if ((QETH_MAX_BUFFER_ELEMENTS(card) -
  3561. buffer->next_element_to_fill) < elements_needed) {
  3562. /* ... no -> set state PRIMED */
  3563. atomic_set(&buffer->state, QETH_QDIO_BUF_PRIMED);
  3564. flush_count++;
  3565. queue->next_buf_to_fill =
  3566. (queue->next_buf_to_fill + 1) %
  3567. QDIO_MAX_BUFFERS_PER_Q;
  3568. buffer = queue->bufs[queue->next_buf_to_fill];
  3569. /* we did a step forward, so check buffer state
  3570. * again */
  3571. if (atomic_read(&buffer->state) !=
  3572. QETH_QDIO_BUF_EMPTY) {
  3573. qeth_flush_buffers(queue, start_index,
  3574. flush_count);
  3575. atomic_set(&queue->state,
  3576. QETH_OUT_Q_UNLOCKED);
  3577. rc = -EBUSY;
  3578. goto out;
  3579. }
  3580. }
  3581. }
  3582. tmp = qeth_fill_buffer(queue, buffer, skb, hdr, offset, hd_len);
  3583. queue->next_buf_to_fill = (queue->next_buf_to_fill + tmp) %
  3584. QDIO_MAX_BUFFERS_PER_Q;
  3585. flush_count += tmp;
  3586. if (flush_count)
  3587. qeth_flush_buffers(queue, start_index, flush_count);
  3588. else if (!atomic_read(&queue->set_pci_flags_count))
  3589. atomic_xchg(&queue->state, QETH_OUT_Q_LOCKED_FLUSH);
  3590. /*
  3591. * queue->state will go from LOCKED -> UNLOCKED or from
  3592. * LOCKED_FLUSH -> LOCKED if output_handler wanted to 'notify' us
  3593. * (switch packing state or flush buffer to get another pci flag out).
  3594. * In that case we will enter this loop
  3595. */
  3596. while (atomic_dec_return(&queue->state)) {
  3597. start_index = queue->next_buf_to_fill;
  3598. /* check if we can go back to non-packing state */
  3599. tmp = qeth_switch_to_nonpacking_if_needed(queue);
  3600. /*
  3601. * check if we need to flush a packing buffer to get a pci
  3602. * flag out on the queue
  3603. */
  3604. if (!tmp && !atomic_read(&queue->set_pci_flags_count))
  3605. tmp = qeth_prep_flush_pack_buffer(queue);
  3606. if (tmp) {
  3607. qeth_flush_buffers(queue, start_index, tmp);
  3608. flush_count += tmp;
  3609. }
  3610. }
  3611. out:
  3612. /* at this point the queue is UNLOCKED again */
  3613. if (queue->card->options.performance_stats && do_pack)
  3614. queue->card->perf_stats.bufs_sent_pack += flush_count;
  3615. return rc;
  3616. }
  3617. EXPORT_SYMBOL_GPL(qeth_do_send_packet);
  3618. void qeth_fill_tso_ext(struct qeth_hdr_tso *hdr, unsigned int payload_len,
  3619. struct sk_buff *skb, unsigned int proto_len)
  3620. {
  3621. struct qeth_hdr_ext_tso *ext = &hdr->ext;
  3622. ext->hdr_tot_len = sizeof(*ext);
  3623. ext->imb_hdr_no = 1;
  3624. ext->hdr_type = 1;
  3625. ext->hdr_version = 1;
  3626. ext->hdr_len = 28;
  3627. ext->payload_len = payload_len;
  3628. ext->mss = skb_shinfo(skb)->gso_size;
  3629. ext->dg_hdr_len = proto_len;
  3630. }
  3631. EXPORT_SYMBOL_GPL(qeth_fill_tso_ext);
  3632. int qeth_xmit(struct qeth_card *card, struct sk_buff *skb,
  3633. struct qeth_qdio_out_q *queue, int ipv, int cast_type,
  3634. void (*fill_header)(struct qeth_card *card, struct qeth_hdr *hdr,
  3635. struct sk_buff *skb, int ipv, int cast_type,
  3636. unsigned int data_len))
  3637. {
  3638. unsigned int proto_len, hw_hdr_len;
  3639. unsigned int frame_len = skb->len;
  3640. bool is_tso = skb_is_gso(skb);
  3641. unsigned int data_offset = 0;
  3642. struct qeth_hdr *hdr = NULL;
  3643. unsigned int hd_len = 0;
  3644. unsigned int elements;
  3645. int push_len, rc;
  3646. bool is_sg;
  3647. if (is_tso) {
  3648. hw_hdr_len = sizeof(struct qeth_hdr_tso);
  3649. proto_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
  3650. } else {
  3651. hw_hdr_len = sizeof(struct qeth_hdr);
  3652. proto_len = IS_IQD(card) ? ETH_HLEN : 0;
  3653. }
  3654. rc = skb_cow_head(skb, hw_hdr_len);
  3655. if (rc)
  3656. return rc;
  3657. push_len = qeth_add_hw_header(card, skb, &hdr, hw_hdr_len, proto_len,
  3658. &elements);
  3659. if (push_len < 0)
  3660. return push_len;
  3661. if (is_tso || !push_len) {
  3662. /* HW header needs its own buffer element. */
  3663. hd_len = hw_hdr_len + proto_len;
  3664. data_offset = push_len + proto_len;
  3665. }
  3666. memset(hdr, 0, hw_hdr_len);
  3667. fill_header(card, hdr, skb, ipv, cast_type, frame_len);
  3668. if (is_tso)
  3669. qeth_fill_tso_ext((struct qeth_hdr_tso *) hdr,
  3670. frame_len - proto_len, skb, proto_len);
  3671. is_sg = skb_is_nonlinear(skb);
  3672. if (IS_IQD(card)) {
  3673. rc = qeth_do_send_packet_fast(queue, skb, hdr, data_offset,
  3674. hd_len);
  3675. } else {
  3676. /* TODO: drop skb_orphan() once TX completion is fast enough */
  3677. skb_orphan(skb);
  3678. rc = qeth_do_send_packet(card, queue, skb, hdr, data_offset,
  3679. hd_len, elements);
  3680. }
  3681. if (!rc) {
  3682. if (card->options.performance_stats) {
  3683. card->perf_stats.buf_elements_sent += elements;
  3684. if (is_sg)
  3685. card->perf_stats.sg_skbs_sent++;
  3686. if (is_tso) {
  3687. card->perf_stats.large_send_bytes += frame_len;
  3688. card->perf_stats.large_send_cnt++;
  3689. }
  3690. }
  3691. } else {
  3692. if (!push_len)
  3693. kmem_cache_free(qeth_core_header_cache, hdr);
  3694. if (rc == -EBUSY)
  3695. /* roll back to ETH header */
  3696. skb_pull(skb, push_len);
  3697. }
  3698. return rc;
  3699. }
  3700. EXPORT_SYMBOL_GPL(qeth_xmit);
  3701. static int qeth_setadp_promisc_mode_cb(struct qeth_card *card,
  3702. struct qeth_reply *reply, unsigned long data)
  3703. {
  3704. struct qeth_ipa_cmd *cmd = (struct qeth_ipa_cmd *) data;
  3705. struct qeth_ipacmd_setadpparms *setparms;
  3706. QETH_CARD_TEXT(card, 4, "prmadpcb");
  3707. setparms = &(cmd->data.setadapterparms);
  3708. if (qeth_setadpparms_inspect_rc(cmd)) {
  3709. QETH_CARD_TEXT_(card, 4, "prmrc%x", cmd->hdr.return_code);
  3710. setparms->data.mode = SET_PROMISC_MODE_OFF;
  3711. }
  3712. card->info.promisc_mode = setparms->data.mode;
  3713. return 0;
  3714. }
  3715. void qeth_setadp_promisc_mode(struct qeth_card *card)
  3716. {
  3717. enum qeth_ipa_promisc_modes mode;
  3718. struct net_device *dev = card->dev;
  3719. struct qeth_cmd_buffer *iob;
  3720. struct qeth_ipa_cmd *cmd;
  3721. QETH_CARD_TEXT(card, 4, "setprom");
  3722. if (((dev->flags & IFF_PROMISC) &&
  3723. (card->info.promisc_mode == SET_PROMISC_MODE_ON)) ||
  3724. (!(dev->flags & IFF_PROMISC) &&
  3725. (card->info.promisc_mode == SET_PROMISC_MODE_OFF)))
  3726. return;
  3727. mode = SET_PROMISC_MODE_OFF;
  3728. if (dev->flags & IFF_PROMISC)
  3729. mode = SET_PROMISC_MODE_ON;
  3730. QETH_CARD_TEXT_(card, 4, "mode:%x", mode);
  3731. iob = qeth_get_adapter_cmd(card, IPA_SETADP_SET_PROMISC_MODE,
  3732. sizeof(struct qeth_ipacmd_setadpparms_hdr) + 8);
  3733. if (!iob)
  3734. return;
  3735. cmd = __ipa_cmd(iob);
  3736. cmd->data.setadapterparms.data.mode = mode;
  3737. qeth_send_ipa_cmd(card, iob, qeth_setadp_promisc_mode_cb, NULL);
  3738. }
  3739. EXPORT_SYMBOL_GPL(qeth_setadp_promisc_mode);
  3740. struct net_device_stats *qeth_get_stats(struct net_device *dev)
  3741. {
  3742. struct qeth_card *card;
  3743. card = dev->ml_priv;
  3744. QETH_CARD_TEXT(card, 5, "getstat");
  3745. return &card->stats;
  3746. }
  3747. EXPORT_SYMBOL_GPL(qeth_get_stats);
  3748. static int qeth_setadpparms_change_macaddr_cb(struct qeth_card *card,
  3749. struct qeth_reply *reply, unsigned long data)
  3750. {
  3751. struct qeth_ipa_cmd *cmd = (struct qeth_ipa_cmd *) data;
  3752. QETH_CARD_TEXT(card, 4, "chgmaccb");
  3753. if (qeth_setadpparms_inspect_rc(cmd))
  3754. return 0;
  3755. if (IS_LAYER3(card) || !(card->info.mac_bits & QETH_LAYER2_MAC_READ)) {
  3756. ether_addr_copy(card->dev->dev_addr,
  3757. cmd->data.setadapterparms.data.change_addr.addr);
  3758. card->info.mac_bits |= QETH_LAYER2_MAC_READ;
  3759. }
  3760. return 0;
  3761. }
  3762. int qeth_setadpparms_change_macaddr(struct qeth_card *card)
  3763. {
  3764. int rc;
  3765. struct qeth_cmd_buffer *iob;
  3766. struct qeth_ipa_cmd *cmd;
  3767. QETH_CARD_TEXT(card, 4, "chgmac");
  3768. iob = qeth_get_adapter_cmd(card, IPA_SETADP_ALTER_MAC_ADDRESS,
  3769. sizeof(struct qeth_ipacmd_setadpparms_hdr) +
  3770. sizeof(struct qeth_change_addr));
  3771. if (!iob)
  3772. return -ENOMEM;
  3773. cmd = __ipa_cmd(iob);
  3774. cmd->data.setadapterparms.data.change_addr.cmd = CHANGE_ADDR_READ_MAC;
  3775. cmd->data.setadapterparms.data.change_addr.addr_size = ETH_ALEN;
  3776. ether_addr_copy(cmd->data.setadapterparms.data.change_addr.addr,
  3777. card->dev->dev_addr);
  3778. rc = qeth_send_ipa_cmd(card, iob, qeth_setadpparms_change_macaddr_cb,
  3779. NULL);
  3780. return rc;
  3781. }
  3782. EXPORT_SYMBOL_GPL(qeth_setadpparms_change_macaddr);
  3783. static int qeth_setadpparms_set_access_ctrl_cb(struct qeth_card *card,
  3784. struct qeth_reply *reply, unsigned long data)
  3785. {
  3786. struct qeth_ipa_cmd *cmd = (struct qeth_ipa_cmd *) data;
  3787. struct qeth_set_access_ctrl *access_ctrl_req;
  3788. int fallback = *(int *)reply->param;
  3789. QETH_CARD_TEXT(card, 4, "setaccb");
  3790. if (cmd->hdr.return_code)
  3791. return 0;
  3792. qeth_setadpparms_inspect_rc(cmd);
  3793. access_ctrl_req = &cmd->data.setadapterparms.data.set_access_ctrl;
  3794. QETH_DBF_TEXT_(SETUP, 2, "setaccb");
  3795. QETH_DBF_TEXT_(SETUP, 2, "%s", card->gdev->dev.kobj.name);
  3796. QETH_DBF_TEXT_(SETUP, 2, "rc=%d",
  3797. cmd->data.setadapterparms.hdr.return_code);
  3798. if (cmd->data.setadapterparms.hdr.return_code !=
  3799. SET_ACCESS_CTRL_RC_SUCCESS)
  3800. QETH_DBF_MESSAGE(3, "ERR:SET_ACCESS_CTRL(%#x) on device %x: %#x\n",
  3801. access_ctrl_req->subcmd_code, CARD_DEVID(card),
  3802. cmd->data.setadapterparms.hdr.return_code);
  3803. switch (cmd->data.setadapterparms.hdr.return_code) {
  3804. case SET_ACCESS_CTRL_RC_SUCCESS:
  3805. if (card->options.isolation == ISOLATION_MODE_NONE) {
  3806. dev_info(&card->gdev->dev,
  3807. "QDIO data connection isolation is deactivated\n");
  3808. } else {
  3809. dev_info(&card->gdev->dev,
  3810. "QDIO data connection isolation is activated\n");
  3811. }
  3812. break;
  3813. case SET_ACCESS_CTRL_RC_ALREADY_NOT_ISOLATED:
  3814. QETH_DBF_MESSAGE(2, "QDIO data connection isolation on device %x already deactivated\n",
  3815. CARD_DEVID(card));
  3816. if (fallback)
  3817. card->options.isolation = card->options.prev_isolation;
  3818. break;
  3819. case SET_ACCESS_CTRL_RC_ALREADY_ISOLATED:
  3820. QETH_DBF_MESSAGE(2, "QDIO data connection isolation on device %x already activated\n",
  3821. CARD_DEVID(card));
  3822. if (fallback)
  3823. card->options.isolation = card->options.prev_isolation;
  3824. break;
  3825. case SET_ACCESS_CTRL_RC_NOT_SUPPORTED:
  3826. dev_err(&card->gdev->dev, "Adapter does not "
  3827. "support QDIO data connection isolation\n");
  3828. break;
  3829. case SET_ACCESS_CTRL_RC_NONE_SHARED_ADAPTER:
  3830. dev_err(&card->gdev->dev,
  3831. "Adapter is dedicated. "
  3832. "QDIO data connection isolation not supported\n");
  3833. if (fallback)
  3834. card->options.isolation = card->options.prev_isolation;
  3835. break;
  3836. case SET_ACCESS_CTRL_RC_ACTIVE_CHECKSUM_OFF:
  3837. dev_err(&card->gdev->dev,
  3838. "TSO does not permit QDIO data connection isolation\n");
  3839. if (fallback)
  3840. card->options.isolation = card->options.prev_isolation;
  3841. break;
  3842. case SET_ACCESS_CTRL_RC_REFLREL_UNSUPPORTED:
  3843. dev_err(&card->gdev->dev, "The adjacent switch port does not "
  3844. "support reflective relay mode\n");
  3845. if (fallback)
  3846. card->options.isolation = card->options.prev_isolation;
  3847. break;
  3848. case SET_ACCESS_CTRL_RC_REFLREL_FAILED:
  3849. dev_err(&card->gdev->dev, "The reflective relay mode cannot be "
  3850. "enabled at the adjacent switch port");
  3851. if (fallback)
  3852. card->options.isolation = card->options.prev_isolation;
  3853. break;
  3854. case SET_ACCESS_CTRL_RC_REFLREL_DEACT_FAILED:
  3855. dev_warn(&card->gdev->dev, "Turning off reflective relay mode "
  3856. "at the adjacent switch failed\n");
  3857. break;
  3858. default:
  3859. /* this should never happen */
  3860. if (fallback)
  3861. card->options.isolation = card->options.prev_isolation;
  3862. break;
  3863. }
  3864. return 0;
  3865. }
  3866. static int qeth_setadpparms_set_access_ctrl(struct qeth_card *card,
  3867. enum qeth_ipa_isolation_modes isolation, int fallback)
  3868. {
  3869. int rc;
  3870. struct qeth_cmd_buffer *iob;
  3871. struct qeth_ipa_cmd *cmd;
  3872. struct qeth_set_access_ctrl *access_ctrl_req;
  3873. QETH_CARD_TEXT(card, 4, "setacctl");
  3874. QETH_DBF_TEXT_(SETUP, 2, "setacctl");
  3875. QETH_DBF_TEXT_(SETUP, 2, "%s", card->gdev->dev.kobj.name);
  3876. iob = qeth_get_adapter_cmd(card, IPA_SETADP_SET_ACCESS_CONTROL,
  3877. sizeof(struct qeth_ipacmd_setadpparms_hdr) +
  3878. sizeof(struct qeth_set_access_ctrl));
  3879. if (!iob)
  3880. return -ENOMEM;
  3881. cmd = __ipa_cmd(iob);
  3882. access_ctrl_req = &cmd->data.setadapterparms.data.set_access_ctrl;
  3883. access_ctrl_req->subcmd_code = isolation;
  3884. rc = qeth_send_ipa_cmd(card, iob, qeth_setadpparms_set_access_ctrl_cb,
  3885. &fallback);
  3886. QETH_DBF_TEXT_(SETUP, 2, "rc=%d", rc);
  3887. return rc;
  3888. }
  3889. int qeth_set_access_ctrl_online(struct qeth_card *card, int fallback)
  3890. {
  3891. int rc = 0;
  3892. QETH_CARD_TEXT(card, 4, "setactlo");
  3893. if ((card->info.type == QETH_CARD_TYPE_OSD ||
  3894. card->info.type == QETH_CARD_TYPE_OSX) &&
  3895. qeth_adp_supported(card, IPA_SETADP_SET_ACCESS_CONTROL)) {
  3896. rc = qeth_setadpparms_set_access_ctrl(card,
  3897. card->options.isolation, fallback);
  3898. if (rc) {
  3899. QETH_DBF_MESSAGE(3, "IPA(SET_ACCESS_CTRL(%d) on device %x: sent failed\n",
  3900. rc, CARD_DEVID(card));
  3901. rc = -EOPNOTSUPP;
  3902. }
  3903. } else if (card->options.isolation != ISOLATION_MODE_NONE) {
  3904. card->options.isolation = ISOLATION_MODE_NONE;
  3905. dev_err(&card->gdev->dev, "Adapter does not "
  3906. "support QDIO data connection isolation\n");
  3907. rc = -EOPNOTSUPP;
  3908. }
  3909. return rc;
  3910. }
  3911. EXPORT_SYMBOL_GPL(qeth_set_access_ctrl_online);
  3912. void qeth_tx_timeout(struct net_device *dev)
  3913. {
  3914. struct qeth_card *card;
  3915. card = dev->ml_priv;
  3916. QETH_CARD_TEXT(card, 4, "txtimeo");
  3917. card->stats.tx_errors++;
  3918. qeth_schedule_recovery(card);
  3919. }
  3920. EXPORT_SYMBOL_GPL(qeth_tx_timeout);
  3921. static int qeth_mdio_read(struct net_device *dev, int phy_id, int regnum)
  3922. {
  3923. struct qeth_card *card = dev->ml_priv;
  3924. int rc = 0;
  3925. switch (regnum) {
  3926. case MII_BMCR: /* Basic mode control register */
  3927. rc = BMCR_FULLDPLX;
  3928. if ((card->info.link_type != QETH_LINK_TYPE_GBIT_ETH) &&
  3929. (card->info.link_type != QETH_LINK_TYPE_OSN) &&
  3930. (card->info.link_type != QETH_LINK_TYPE_10GBIT_ETH) &&
  3931. (card->info.link_type != QETH_LINK_TYPE_25GBIT_ETH))
  3932. rc |= BMCR_SPEED100;
  3933. break;
  3934. case MII_BMSR: /* Basic mode status register */
  3935. rc = BMSR_ERCAP | BMSR_ANEGCOMPLETE | BMSR_LSTATUS |
  3936. BMSR_10HALF | BMSR_10FULL | BMSR_100HALF | BMSR_100FULL |
  3937. BMSR_100BASE4;
  3938. break;
  3939. case MII_PHYSID1: /* PHYS ID 1 */
  3940. rc = (dev->dev_addr[0] << 16) | (dev->dev_addr[1] << 8) |
  3941. dev->dev_addr[2];
  3942. rc = (rc >> 5) & 0xFFFF;
  3943. break;
  3944. case MII_PHYSID2: /* PHYS ID 2 */
  3945. rc = (dev->dev_addr[2] << 10) & 0xFFFF;
  3946. break;
  3947. case MII_ADVERTISE: /* Advertisement control reg */
  3948. rc = ADVERTISE_ALL;
  3949. break;
  3950. case MII_LPA: /* Link partner ability reg */
  3951. rc = LPA_10HALF | LPA_10FULL | LPA_100HALF | LPA_100FULL |
  3952. LPA_100BASE4 | LPA_LPACK;
  3953. break;
  3954. case MII_EXPANSION: /* Expansion register */
  3955. break;
  3956. case MII_DCOUNTER: /* disconnect counter */
  3957. break;
  3958. case MII_FCSCOUNTER: /* false carrier counter */
  3959. break;
  3960. case MII_NWAYTEST: /* N-way auto-neg test register */
  3961. break;
  3962. case MII_RERRCOUNTER: /* rx error counter */
  3963. rc = card->stats.rx_errors;
  3964. break;
  3965. case MII_SREVISION: /* silicon revision */
  3966. break;
  3967. case MII_RESV1: /* reserved 1 */
  3968. break;
  3969. case MII_LBRERROR: /* loopback, rx, bypass error */
  3970. break;
  3971. case MII_PHYADDR: /* physical address */
  3972. break;
  3973. case MII_RESV2: /* reserved 2 */
  3974. break;
  3975. case MII_TPISTATUS: /* TPI status for 10mbps */
  3976. break;
  3977. case MII_NCONFIG: /* network interface config */
  3978. break;
  3979. default:
  3980. break;
  3981. }
  3982. return rc;
  3983. }
  3984. static int qeth_send_ipa_snmp_cmd(struct qeth_card *card,
  3985. struct qeth_cmd_buffer *iob, int len,
  3986. int (*reply_cb)(struct qeth_card *, struct qeth_reply *,
  3987. unsigned long),
  3988. void *reply_param)
  3989. {
  3990. u16 s1, s2;
  3991. QETH_CARD_TEXT(card, 4, "sendsnmp");
  3992. memcpy(iob->data, IPA_PDU_HEADER, IPA_PDU_HEADER_SIZE);
  3993. memcpy(QETH_IPA_CMD_DEST_ADDR(iob->data),
  3994. &card->token.ulp_connection_r, QETH_MPC_TOKEN_LENGTH);
  3995. /* adjust PDU length fields in IPA_PDU_HEADER */
  3996. s1 = (u32) IPA_PDU_HEADER_SIZE + len;
  3997. s2 = (u32) len;
  3998. memcpy(QETH_IPA_PDU_LEN_TOTAL(iob->data), &s1, 2);
  3999. memcpy(QETH_IPA_PDU_LEN_PDU1(iob->data), &s2, 2);
  4000. memcpy(QETH_IPA_PDU_LEN_PDU2(iob->data), &s2, 2);
  4001. memcpy(QETH_IPA_PDU_LEN_PDU3(iob->data), &s2, 2);
  4002. return qeth_send_control_data(card, IPA_PDU_HEADER_SIZE + len, iob,
  4003. reply_cb, reply_param);
  4004. }
  4005. static int qeth_snmp_command_cb(struct qeth_card *card,
  4006. struct qeth_reply *reply, unsigned long sdata)
  4007. {
  4008. struct qeth_ipa_cmd *cmd;
  4009. struct qeth_arp_query_info *qinfo;
  4010. unsigned char *data;
  4011. void *snmp_data;
  4012. __u16 data_len;
  4013. QETH_CARD_TEXT(card, 3, "snpcmdcb");
  4014. cmd = (struct qeth_ipa_cmd *) sdata;
  4015. data = (unsigned char *)((char *)cmd - reply->offset);
  4016. qinfo = (struct qeth_arp_query_info *) reply->param;
  4017. if (cmd->hdr.return_code) {
  4018. QETH_CARD_TEXT_(card, 4, "scer1%x", cmd->hdr.return_code);
  4019. return 0;
  4020. }
  4021. if (cmd->data.setadapterparms.hdr.return_code) {
  4022. cmd->hdr.return_code =
  4023. cmd->data.setadapterparms.hdr.return_code;
  4024. QETH_CARD_TEXT_(card, 4, "scer2%x", cmd->hdr.return_code);
  4025. return 0;
  4026. }
  4027. data_len = *((__u16 *)QETH_IPA_PDU_LEN_PDU1(data));
  4028. if (cmd->data.setadapterparms.hdr.seq_no == 1) {
  4029. snmp_data = &cmd->data.setadapterparms.data.snmp;
  4030. data_len -= offsetof(struct qeth_ipa_cmd,
  4031. data.setadapterparms.data.snmp);
  4032. } else {
  4033. snmp_data = &cmd->data.setadapterparms.data.snmp.request;
  4034. data_len -= offsetof(struct qeth_ipa_cmd,
  4035. data.setadapterparms.data.snmp.request);
  4036. }
  4037. /* check if there is enough room in userspace */
  4038. if ((qinfo->udata_len - qinfo->udata_offset) < data_len) {
  4039. QETH_CARD_TEXT_(card, 4, "scer3%i", -ENOMEM);
  4040. cmd->hdr.return_code = IPA_RC_ENOMEM;
  4041. return 0;
  4042. }
  4043. QETH_CARD_TEXT_(card, 4, "snore%i",
  4044. cmd->data.setadapterparms.hdr.used_total);
  4045. QETH_CARD_TEXT_(card, 4, "sseqn%i",
  4046. cmd->data.setadapterparms.hdr.seq_no);
  4047. /*copy entries to user buffer*/
  4048. memcpy(qinfo->udata + qinfo->udata_offset, snmp_data, data_len);
  4049. qinfo->udata_offset += data_len;
  4050. /* check if all replies received ... */
  4051. QETH_CARD_TEXT_(card, 4, "srtot%i",
  4052. cmd->data.setadapterparms.hdr.used_total);
  4053. QETH_CARD_TEXT_(card, 4, "srseq%i",
  4054. cmd->data.setadapterparms.hdr.seq_no);
  4055. if (cmd->data.setadapterparms.hdr.seq_no <
  4056. cmd->data.setadapterparms.hdr.used_total)
  4057. return 1;
  4058. return 0;
  4059. }
  4060. static int qeth_snmp_command(struct qeth_card *card, char __user *udata)
  4061. {
  4062. struct qeth_cmd_buffer *iob;
  4063. struct qeth_ipa_cmd *cmd;
  4064. struct qeth_snmp_ureq *ureq;
  4065. unsigned int req_len;
  4066. struct qeth_arp_query_info qinfo = {0, };
  4067. int rc = 0;
  4068. QETH_CARD_TEXT(card, 3, "snmpcmd");
  4069. if (card->info.guestlan)
  4070. return -EOPNOTSUPP;
  4071. if ((!qeth_adp_supported(card, IPA_SETADP_SET_SNMP_CONTROL)) &&
  4072. IS_LAYER3(card))
  4073. return -EOPNOTSUPP;
  4074. /* skip 4 bytes (data_len struct member) to get req_len */
  4075. if (copy_from_user(&req_len, udata + sizeof(int), sizeof(int)))
  4076. return -EFAULT;
  4077. if (req_len > (QETH_BUFSIZE - IPA_PDU_HEADER_SIZE -
  4078. sizeof(struct qeth_ipacmd_hdr) -
  4079. sizeof(struct qeth_ipacmd_setadpparms_hdr)))
  4080. return -EINVAL;
  4081. ureq = memdup_user(udata, req_len + sizeof(struct qeth_snmp_ureq_hdr));
  4082. if (IS_ERR(ureq)) {
  4083. QETH_CARD_TEXT(card, 2, "snmpnome");
  4084. return PTR_ERR(ureq);
  4085. }
  4086. qinfo.udata_len = ureq->hdr.data_len;
  4087. qinfo.udata = kzalloc(qinfo.udata_len, GFP_KERNEL);
  4088. if (!qinfo.udata) {
  4089. kfree(ureq);
  4090. return -ENOMEM;
  4091. }
  4092. qinfo.udata_offset = sizeof(struct qeth_snmp_ureq_hdr);
  4093. iob = qeth_get_adapter_cmd(card, IPA_SETADP_SET_SNMP_CONTROL,
  4094. QETH_SNMP_SETADP_CMDLENGTH + req_len);
  4095. if (!iob) {
  4096. rc = -ENOMEM;
  4097. goto out;
  4098. }
  4099. cmd = __ipa_cmd(iob);
  4100. memcpy(&cmd->data.setadapterparms.data.snmp, &ureq->cmd, req_len);
  4101. rc = qeth_send_ipa_snmp_cmd(card, iob, QETH_SETADP_BASE_LEN + req_len,
  4102. qeth_snmp_command_cb, (void *)&qinfo);
  4103. if (rc)
  4104. QETH_DBF_MESSAGE(2, "SNMP command failed on device %x: (%#x)\n",
  4105. CARD_DEVID(card), rc);
  4106. else {
  4107. if (copy_to_user(udata, qinfo.udata, qinfo.udata_len))
  4108. rc = -EFAULT;
  4109. }
  4110. out:
  4111. kfree(ureq);
  4112. kfree(qinfo.udata);
  4113. return rc;
  4114. }
  4115. static int qeth_setadpparms_query_oat_cb(struct qeth_card *card,
  4116. struct qeth_reply *reply, unsigned long data)
  4117. {
  4118. struct qeth_ipa_cmd *cmd = (struct qeth_ipa_cmd *)data;
  4119. struct qeth_qoat_priv *priv;
  4120. char *resdata;
  4121. int resdatalen;
  4122. QETH_CARD_TEXT(card, 3, "qoatcb");
  4123. if (qeth_setadpparms_inspect_rc(cmd))
  4124. return 0;
  4125. priv = (struct qeth_qoat_priv *)reply->param;
  4126. resdatalen = cmd->data.setadapterparms.hdr.cmdlength;
  4127. resdata = (char *)data + 28;
  4128. if (resdatalen > (priv->buffer_len - priv->response_len)) {
  4129. cmd->hdr.return_code = IPA_RC_FFFF;
  4130. return 0;
  4131. }
  4132. memcpy((priv->buffer + priv->response_len), resdata,
  4133. resdatalen);
  4134. priv->response_len += resdatalen;
  4135. if (cmd->data.setadapterparms.hdr.seq_no <
  4136. cmd->data.setadapterparms.hdr.used_total)
  4137. return 1;
  4138. return 0;
  4139. }
  4140. static int qeth_query_oat_command(struct qeth_card *card, char __user *udata)
  4141. {
  4142. int rc = 0;
  4143. struct qeth_cmd_buffer *iob;
  4144. struct qeth_ipa_cmd *cmd;
  4145. struct qeth_query_oat *oat_req;
  4146. struct qeth_query_oat_data oat_data;
  4147. struct qeth_qoat_priv priv;
  4148. void __user *tmp;
  4149. QETH_CARD_TEXT(card, 3, "qoatcmd");
  4150. if (!qeth_adp_supported(card, IPA_SETADP_QUERY_OAT)) {
  4151. rc = -EOPNOTSUPP;
  4152. goto out;
  4153. }
  4154. if (copy_from_user(&oat_data, udata,
  4155. sizeof(struct qeth_query_oat_data))) {
  4156. rc = -EFAULT;
  4157. goto out;
  4158. }
  4159. priv.buffer_len = oat_data.buffer_len;
  4160. priv.response_len = 0;
  4161. priv.buffer = vzalloc(oat_data.buffer_len);
  4162. if (!priv.buffer) {
  4163. rc = -ENOMEM;
  4164. goto out;
  4165. }
  4166. iob = qeth_get_adapter_cmd(card, IPA_SETADP_QUERY_OAT,
  4167. sizeof(struct qeth_ipacmd_setadpparms_hdr) +
  4168. sizeof(struct qeth_query_oat));
  4169. if (!iob) {
  4170. rc = -ENOMEM;
  4171. goto out_free;
  4172. }
  4173. cmd = __ipa_cmd(iob);
  4174. oat_req = &cmd->data.setadapterparms.data.query_oat;
  4175. oat_req->subcmd_code = oat_data.command;
  4176. rc = qeth_send_ipa_cmd(card, iob, qeth_setadpparms_query_oat_cb,
  4177. &priv);
  4178. if (!rc) {
  4179. if (is_compat_task())
  4180. tmp = compat_ptr(oat_data.ptr);
  4181. else
  4182. tmp = (void __user *)(unsigned long)oat_data.ptr;
  4183. if (copy_to_user(tmp, priv.buffer,
  4184. priv.response_len)) {
  4185. rc = -EFAULT;
  4186. goto out_free;
  4187. }
  4188. oat_data.response_len = priv.response_len;
  4189. if (copy_to_user(udata, &oat_data,
  4190. sizeof(struct qeth_query_oat_data)))
  4191. rc = -EFAULT;
  4192. } else
  4193. if (rc == IPA_RC_FFFF)
  4194. rc = -EFAULT;
  4195. out_free:
  4196. vfree(priv.buffer);
  4197. out:
  4198. return rc;
  4199. }
  4200. static int qeth_query_card_info_cb(struct qeth_card *card,
  4201. struct qeth_reply *reply, unsigned long data)
  4202. {
  4203. struct carrier_info *carrier_info = (struct carrier_info *)reply->param;
  4204. struct qeth_ipa_cmd *cmd = (struct qeth_ipa_cmd *)data;
  4205. struct qeth_query_card_info *card_info;
  4206. QETH_CARD_TEXT(card, 2, "qcrdincb");
  4207. if (qeth_setadpparms_inspect_rc(cmd))
  4208. return 0;
  4209. card_info = &cmd->data.setadapterparms.data.card_info;
  4210. carrier_info->card_type = card_info->card_type;
  4211. carrier_info->port_mode = card_info->port_mode;
  4212. carrier_info->port_speed = card_info->port_speed;
  4213. return 0;
  4214. }
  4215. static int qeth_query_card_info(struct qeth_card *card,
  4216. struct carrier_info *carrier_info)
  4217. {
  4218. struct qeth_cmd_buffer *iob;
  4219. QETH_CARD_TEXT(card, 2, "qcrdinfo");
  4220. if (!qeth_adp_supported(card, IPA_SETADP_QUERY_CARD_INFO))
  4221. return -EOPNOTSUPP;
  4222. iob = qeth_get_adapter_cmd(card, IPA_SETADP_QUERY_CARD_INFO,
  4223. sizeof(struct qeth_ipacmd_setadpparms_hdr));
  4224. if (!iob)
  4225. return -ENOMEM;
  4226. return qeth_send_ipa_cmd(card, iob, qeth_query_card_info_cb,
  4227. (void *)carrier_info);
  4228. }
  4229. /**
  4230. * qeth_vm_request_mac() - Request a hypervisor-managed MAC address
  4231. * @card: pointer to a qeth_card
  4232. *
  4233. * Returns
  4234. * 0, if a MAC address has been set for the card's netdevice
  4235. * a return code, for various error conditions
  4236. */
  4237. int qeth_vm_request_mac(struct qeth_card *card)
  4238. {
  4239. struct diag26c_mac_resp *response;
  4240. struct diag26c_mac_req *request;
  4241. struct ccw_dev_id id;
  4242. int rc;
  4243. QETH_DBF_TEXT(SETUP, 2, "vmreqmac");
  4244. request = kzalloc(sizeof(*request), GFP_KERNEL | GFP_DMA);
  4245. response = kzalloc(sizeof(*response), GFP_KERNEL | GFP_DMA);
  4246. if (!request || !response) {
  4247. rc = -ENOMEM;
  4248. goto out;
  4249. }
  4250. ccw_device_get_id(CARD_DDEV(card), &id);
  4251. request->resp_buf_len = sizeof(*response);
  4252. request->resp_version = DIAG26C_VERSION2;
  4253. request->op_code = DIAG26C_GET_MAC;
  4254. request->devno = id.devno;
  4255. QETH_DBF_HEX(CTRL, 2, request, sizeof(*request));
  4256. rc = diag26c(request, response, DIAG26C_MAC_SERVICES);
  4257. QETH_DBF_HEX(CTRL, 2, request, sizeof(*request));
  4258. if (rc)
  4259. goto out;
  4260. QETH_DBF_HEX(CTRL, 2, response, sizeof(*response));
  4261. if (request->resp_buf_len < sizeof(*response) ||
  4262. response->version != request->resp_version) {
  4263. rc = -EIO;
  4264. QETH_DBF_TEXT(SETUP, 2, "badresp");
  4265. QETH_DBF_HEX(SETUP, 2, &request->resp_buf_len,
  4266. sizeof(request->resp_buf_len));
  4267. } else if (!is_valid_ether_addr(response->mac)) {
  4268. rc = -EINVAL;
  4269. QETH_DBF_TEXT(SETUP, 2, "badmac");
  4270. QETH_DBF_HEX(SETUP, 2, response->mac, ETH_ALEN);
  4271. } else {
  4272. ether_addr_copy(card->dev->dev_addr, response->mac);
  4273. }
  4274. out:
  4275. kfree(response);
  4276. kfree(request);
  4277. return rc;
  4278. }
  4279. EXPORT_SYMBOL_GPL(qeth_vm_request_mac);
  4280. static int qeth_get_qdio_q_format(struct qeth_card *card)
  4281. {
  4282. if (card->info.type == QETH_CARD_TYPE_IQD)
  4283. return QDIO_IQDIO_QFMT;
  4284. else
  4285. return QDIO_QETH_QFMT;
  4286. }
  4287. static void qeth_determine_capabilities(struct qeth_card *card)
  4288. {
  4289. int rc;
  4290. int length;
  4291. char *prcd;
  4292. struct ccw_device *ddev;
  4293. int ddev_offline = 0;
  4294. QETH_DBF_TEXT(SETUP, 2, "detcapab");
  4295. ddev = CARD_DDEV(card);
  4296. if (!ddev->online) {
  4297. ddev_offline = 1;
  4298. rc = ccw_device_set_online(ddev);
  4299. if (rc) {
  4300. QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
  4301. goto out;
  4302. }
  4303. }
  4304. rc = qeth_read_conf_data(card, (void **) &prcd, &length);
  4305. if (rc) {
  4306. QETH_DBF_MESSAGE(2, "qeth_read_conf_data on device %x returned %i\n",
  4307. CARD_DEVID(card), rc);
  4308. QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc);
  4309. goto out_offline;
  4310. }
  4311. qeth_configure_unitaddr(card, prcd);
  4312. if (ddev_offline)
  4313. qeth_configure_blkt_default(card, prcd);
  4314. kfree(prcd);
  4315. rc = qdio_get_ssqd_desc(ddev, &card->ssqd);
  4316. if (rc)
  4317. QETH_DBF_TEXT_(SETUP, 2, "6err%d", rc);
  4318. QETH_DBF_TEXT_(SETUP, 2, "qfmt%d", card->ssqd.qfmt);
  4319. QETH_DBF_TEXT_(SETUP, 2, "ac1:%02x", card->ssqd.qdioac1);
  4320. QETH_DBF_TEXT_(SETUP, 2, "ac2:%04x", card->ssqd.qdioac2);
  4321. QETH_DBF_TEXT_(SETUP, 2, "ac3:%04x", card->ssqd.qdioac3);
  4322. QETH_DBF_TEXT_(SETUP, 2, "icnt%d", card->ssqd.icnt);
  4323. if (!((card->ssqd.qfmt != QDIO_IQDIO_QFMT) ||
  4324. ((card->ssqd.qdioac1 & CHSC_AC1_INITIATE_INPUTQ) == 0) ||
  4325. ((card->ssqd.qdioac3 & CHSC_AC3_FORMAT2_CQ_AVAILABLE) == 0))) {
  4326. dev_info(&card->gdev->dev,
  4327. "Completion Queueing supported\n");
  4328. } else {
  4329. card->options.cq = QETH_CQ_NOTAVAILABLE;
  4330. }
  4331. out_offline:
  4332. if (ddev_offline == 1)
  4333. ccw_device_set_offline(ddev);
  4334. out:
  4335. return;
  4336. }
  4337. static void qeth_qdio_establish_cq(struct qeth_card *card,
  4338. struct qdio_buffer **in_sbal_ptrs,
  4339. void (**queue_start_poll)
  4340. (struct ccw_device *, int,
  4341. unsigned long))
  4342. {
  4343. int i;
  4344. if (card->options.cq == QETH_CQ_ENABLED) {
  4345. int offset = QDIO_MAX_BUFFERS_PER_Q *
  4346. (card->qdio.no_in_queues - 1);
  4347. for (i = 0; i < QDIO_MAX_BUFFERS_PER_Q; ++i) {
  4348. in_sbal_ptrs[offset + i] = (struct qdio_buffer *)
  4349. virt_to_phys(card->qdio.c_q->bufs[i].buffer);
  4350. }
  4351. queue_start_poll[card->qdio.no_in_queues - 1] = NULL;
  4352. }
  4353. }
  4354. static int qeth_qdio_establish(struct qeth_card *card)
  4355. {
  4356. struct qdio_initialize init_data;
  4357. char *qib_param_field;
  4358. struct qdio_buffer **in_sbal_ptrs;
  4359. void (**queue_start_poll) (struct ccw_device *, int, unsigned long);
  4360. struct qdio_buffer **out_sbal_ptrs;
  4361. int i, j, k;
  4362. int rc = 0;
  4363. QETH_DBF_TEXT(SETUP, 2, "qdioest");
  4364. qib_param_field = kzalloc(QDIO_MAX_BUFFERS_PER_Q,
  4365. GFP_KERNEL);
  4366. if (!qib_param_field) {
  4367. rc = -ENOMEM;
  4368. goto out_free_nothing;
  4369. }
  4370. qeth_create_qib_param_field(card, qib_param_field);
  4371. qeth_create_qib_param_field_blkt(card, qib_param_field);
  4372. in_sbal_ptrs = kcalloc(card->qdio.no_in_queues * QDIO_MAX_BUFFERS_PER_Q,
  4373. sizeof(void *),
  4374. GFP_KERNEL);
  4375. if (!in_sbal_ptrs) {
  4376. rc = -ENOMEM;
  4377. goto out_free_qib_param;
  4378. }
  4379. for (i = 0; i < QDIO_MAX_BUFFERS_PER_Q; ++i) {
  4380. in_sbal_ptrs[i] = (struct qdio_buffer *)
  4381. virt_to_phys(card->qdio.in_q->bufs[i].buffer);
  4382. }
  4383. queue_start_poll = kcalloc(card->qdio.no_in_queues, sizeof(void *),
  4384. GFP_KERNEL);
  4385. if (!queue_start_poll) {
  4386. rc = -ENOMEM;
  4387. goto out_free_in_sbals;
  4388. }
  4389. for (i = 0; i < card->qdio.no_in_queues; ++i)
  4390. queue_start_poll[i] = qeth_qdio_start_poll;
  4391. qeth_qdio_establish_cq(card, in_sbal_ptrs, queue_start_poll);
  4392. out_sbal_ptrs =
  4393. kcalloc(card->qdio.no_out_queues * QDIO_MAX_BUFFERS_PER_Q,
  4394. sizeof(void *),
  4395. GFP_KERNEL);
  4396. if (!out_sbal_ptrs) {
  4397. rc = -ENOMEM;
  4398. goto out_free_queue_start_poll;
  4399. }
  4400. for (i = 0, k = 0; i < card->qdio.no_out_queues; ++i)
  4401. for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j, ++k) {
  4402. out_sbal_ptrs[k] = (struct qdio_buffer *)virt_to_phys(
  4403. card->qdio.out_qs[i]->bufs[j]->buffer);
  4404. }
  4405. memset(&init_data, 0, sizeof(struct qdio_initialize));
  4406. init_data.cdev = CARD_DDEV(card);
  4407. init_data.q_format = qeth_get_qdio_q_format(card);
  4408. init_data.qib_param_field_format = 0;
  4409. init_data.qib_param_field = qib_param_field;
  4410. init_data.no_input_qs = card->qdio.no_in_queues;
  4411. init_data.no_output_qs = card->qdio.no_out_queues;
  4412. init_data.input_handler = qeth_qdio_input_handler;
  4413. init_data.output_handler = qeth_qdio_output_handler;
  4414. init_data.queue_start_poll_array = queue_start_poll;
  4415. init_data.int_parm = (unsigned long) card;
  4416. init_data.input_sbal_addr_array = (void **) in_sbal_ptrs;
  4417. init_data.output_sbal_addr_array = (void **) out_sbal_ptrs;
  4418. init_data.output_sbal_state_array = card->qdio.out_bufstates;
  4419. init_data.scan_threshold =
  4420. (card->info.type == QETH_CARD_TYPE_IQD) ? 1 : 32;
  4421. if (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_ALLOCATED,
  4422. QETH_QDIO_ESTABLISHED) == QETH_QDIO_ALLOCATED) {
  4423. rc = qdio_allocate(&init_data);
  4424. if (rc) {
  4425. atomic_set(&card->qdio.state, QETH_QDIO_ALLOCATED);
  4426. goto out;
  4427. }
  4428. rc = qdio_establish(&init_data);
  4429. if (rc) {
  4430. atomic_set(&card->qdio.state, QETH_QDIO_ALLOCATED);
  4431. qdio_free(CARD_DDEV(card));
  4432. }
  4433. }
  4434. switch (card->options.cq) {
  4435. case QETH_CQ_ENABLED:
  4436. dev_info(&card->gdev->dev, "Completion Queue support enabled");
  4437. break;
  4438. case QETH_CQ_DISABLED:
  4439. dev_info(&card->gdev->dev, "Completion Queue support disabled");
  4440. break;
  4441. default:
  4442. break;
  4443. }
  4444. out:
  4445. kfree(out_sbal_ptrs);
  4446. out_free_queue_start_poll:
  4447. kfree(queue_start_poll);
  4448. out_free_in_sbals:
  4449. kfree(in_sbal_ptrs);
  4450. out_free_qib_param:
  4451. kfree(qib_param_field);
  4452. out_free_nothing:
  4453. return rc;
  4454. }
  4455. static void qeth_core_free_card(struct qeth_card *card)
  4456. {
  4457. QETH_DBF_TEXT(SETUP, 2, "freecrd");
  4458. QETH_DBF_HEX(SETUP, 2, &card, sizeof(void *));
  4459. qeth_clean_channel(&card->read);
  4460. qeth_clean_channel(&card->write);
  4461. qeth_clean_channel(&card->data);
  4462. qeth_free_qdio_buffers(card);
  4463. unregister_service_level(&card->qeth_service_level);
  4464. dev_set_drvdata(&card->gdev->dev, NULL);
  4465. kfree(card);
  4466. }
  4467. void qeth_trace_features(struct qeth_card *card)
  4468. {
  4469. QETH_CARD_TEXT(card, 2, "features");
  4470. QETH_CARD_HEX(card, 2, &card->options.ipa4, sizeof(card->options.ipa4));
  4471. QETH_CARD_HEX(card, 2, &card->options.ipa6, sizeof(card->options.ipa6));
  4472. QETH_CARD_HEX(card, 2, &card->options.adp, sizeof(card->options.adp));
  4473. QETH_CARD_HEX(card, 2, &card->info.diagass_support,
  4474. sizeof(card->info.diagass_support));
  4475. }
  4476. EXPORT_SYMBOL_GPL(qeth_trace_features);
  4477. static struct ccw_device_id qeth_ids[] = {
  4478. {CCW_DEVICE_DEVTYPE(0x1731, 0x01, 0x1732, 0x01),
  4479. .driver_info = QETH_CARD_TYPE_OSD},
  4480. {CCW_DEVICE_DEVTYPE(0x1731, 0x05, 0x1732, 0x05),
  4481. .driver_info = QETH_CARD_TYPE_IQD},
  4482. {CCW_DEVICE_DEVTYPE(0x1731, 0x06, 0x1732, 0x06),
  4483. .driver_info = QETH_CARD_TYPE_OSN},
  4484. {CCW_DEVICE_DEVTYPE(0x1731, 0x02, 0x1732, 0x03),
  4485. .driver_info = QETH_CARD_TYPE_OSM},
  4486. {CCW_DEVICE_DEVTYPE(0x1731, 0x02, 0x1732, 0x02),
  4487. .driver_info = QETH_CARD_TYPE_OSX},
  4488. {},
  4489. };
  4490. MODULE_DEVICE_TABLE(ccw, qeth_ids);
  4491. static struct ccw_driver qeth_ccw_driver = {
  4492. .driver = {
  4493. .owner = THIS_MODULE,
  4494. .name = "qeth",
  4495. },
  4496. .ids = qeth_ids,
  4497. .probe = ccwgroup_probe_ccwdev,
  4498. .remove = ccwgroup_remove_ccwdev,
  4499. };
  4500. int qeth_core_hardsetup_card(struct qeth_card *card, bool *carrier_ok)
  4501. {
  4502. int retries = 3;
  4503. int rc;
  4504. QETH_DBF_TEXT(SETUP, 2, "hrdsetup");
  4505. atomic_set(&card->force_alloc_skb, 0);
  4506. qeth_update_from_chp_desc(card);
  4507. retry:
  4508. if (retries < 3)
  4509. QETH_DBF_MESSAGE(2, "Retrying to do IDX activates on device %x.\n",
  4510. CARD_DEVID(card));
  4511. rc = qeth_qdio_clear_card(card, card->info.type != QETH_CARD_TYPE_IQD);
  4512. ccw_device_set_offline(CARD_DDEV(card));
  4513. ccw_device_set_offline(CARD_WDEV(card));
  4514. ccw_device_set_offline(CARD_RDEV(card));
  4515. qdio_free(CARD_DDEV(card));
  4516. rc = ccw_device_set_online(CARD_RDEV(card));
  4517. if (rc)
  4518. goto retriable;
  4519. rc = ccw_device_set_online(CARD_WDEV(card));
  4520. if (rc)
  4521. goto retriable;
  4522. rc = ccw_device_set_online(CARD_DDEV(card));
  4523. if (rc)
  4524. goto retriable;
  4525. retriable:
  4526. if (rc == -ERESTARTSYS) {
  4527. QETH_DBF_TEXT(SETUP, 2, "break1");
  4528. return rc;
  4529. } else if (rc) {
  4530. QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
  4531. if (--retries < 0)
  4532. goto out;
  4533. else
  4534. goto retry;
  4535. }
  4536. qeth_determine_capabilities(card);
  4537. qeth_init_tokens(card);
  4538. qeth_init_func_level(card);
  4539. rc = qeth_idx_activate_channel(card, &card->read, qeth_idx_read_cb);
  4540. if (rc == -ERESTARTSYS) {
  4541. QETH_DBF_TEXT(SETUP, 2, "break2");
  4542. return rc;
  4543. } else if (rc) {
  4544. QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
  4545. if (--retries < 0)
  4546. goto out;
  4547. else
  4548. goto retry;
  4549. }
  4550. rc = qeth_idx_activate_channel(card, &card->write, qeth_idx_write_cb);
  4551. if (rc == -ERESTARTSYS) {
  4552. QETH_DBF_TEXT(SETUP, 2, "break3");
  4553. return rc;
  4554. } else if (rc) {
  4555. QETH_DBF_TEXT_(SETUP, 2, "4err%d", rc);
  4556. if (--retries < 0)
  4557. goto out;
  4558. else
  4559. goto retry;
  4560. }
  4561. card->read_or_write_problem = 0;
  4562. rc = qeth_mpc_initialize(card);
  4563. if (rc) {
  4564. QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc);
  4565. goto out;
  4566. }
  4567. rc = qeth_send_startlan(card);
  4568. if (rc) {
  4569. QETH_DBF_TEXT_(SETUP, 2, "6err%d", rc);
  4570. if (rc == IPA_RC_LAN_OFFLINE) {
  4571. dev_warn(&card->gdev->dev,
  4572. "The LAN is offline\n");
  4573. *carrier_ok = false;
  4574. } else {
  4575. rc = -ENODEV;
  4576. goto out;
  4577. }
  4578. } else {
  4579. *carrier_ok = true;
  4580. }
  4581. if (qeth_netdev_is_registered(card->dev)) {
  4582. if (*carrier_ok)
  4583. netif_carrier_on(card->dev);
  4584. else
  4585. netif_carrier_off(card->dev);
  4586. }
  4587. card->options.ipa4.supported_funcs = 0;
  4588. card->options.ipa6.supported_funcs = 0;
  4589. card->options.adp.supported_funcs = 0;
  4590. card->options.sbp.supported_funcs = 0;
  4591. card->info.diagass_support = 0;
  4592. rc = qeth_query_ipassists(card, QETH_PROT_IPV4);
  4593. if (rc == -ENOMEM)
  4594. goto out;
  4595. if (qeth_is_supported(card, IPA_IPV6)) {
  4596. rc = qeth_query_ipassists(card, QETH_PROT_IPV6);
  4597. if (rc == -ENOMEM)
  4598. goto out;
  4599. }
  4600. if (qeth_is_supported(card, IPA_SETADAPTERPARMS)) {
  4601. rc = qeth_query_setadapterparms(card);
  4602. if (rc < 0) {
  4603. QETH_DBF_TEXT_(SETUP, 2, "7err%d", rc);
  4604. goto out;
  4605. }
  4606. }
  4607. if (qeth_adp_supported(card, IPA_SETADP_SET_DIAG_ASSIST)) {
  4608. rc = qeth_query_setdiagass(card);
  4609. if (rc < 0) {
  4610. QETH_DBF_TEXT_(SETUP, 2, "8err%d", rc);
  4611. goto out;
  4612. }
  4613. }
  4614. return 0;
  4615. out:
  4616. dev_warn(&card->gdev->dev, "The qeth device driver failed to recover "
  4617. "an error on the device\n");
  4618. QETH_DBF_MESSAGE(2, "Initialization for device %x failed in hardsetup! rc=%d\n",
  4619. CARD_DEVID(card), rc);
  4620. return rc;
  4621. }
  4622. EXPORT_SYMBOL_GPL(qeth_core_hardsetup_card);
  4623. static void qeth_create_skb_frag(struct qdio_buffer_element *element,
  4624. struct sk_buff *skb, int offset, int data_len)
  4625. {
  4626. struct page *page = virt_to_page(element->addr);
  4627. unsigned int next_frag;
  4628. /* first fill the linear space */
  4629. if (!skb->len) {
  4630. unsigned int linear = min(data_len, skb_tailroom(skb));
  4631. skb_put_data(skb, element->addr + offset, linear);
  4632. data_len -= linear;
  4633. if (!data_len)
  4634. return;
  4635. offset += linear;
  4636. /* fall through to add page frag for remaining data */
  4637. }
  4638. next_frag = skb_shinfo(skb)->nr_frags;
  4639. get_page(page);
  4640. skb_add_rx_frag(skb, next_frag, page, offset, data_len, data_len);
  4641. }
  4642. static inline int qeth_is_last_sbale(struct qdio_buffer_element *sbale)
  4643. {
  4644. return (sbale->eflags & SBAL_EFLAGS_LAST_ENTRY);
  4645. }
  4646. struct sk_buff *qeth_core_get_next_skb(struct qeth_card *card,
  4647. struct qeth_qdio_buffer *qethbuffer,
  4648. struct qdio_buffer_element **__element, int *__offset,
  4649. struct qeth_hdr **hdr)
  4650. {
  4651. struct qdio_buffer_element *element = *__element;
  4652. struct qdio_buffer *buffer = qethbuffer->buffer;
  4653. int offset = *__offset;
  4654. struct sk_buff *skb;
  4655. int skb_len = 0;
  4656. void *data_ptr;
  4657. int data_len;
  4658. int headroom = 0;
  4659. int use_rx_sg = 0;
  4660. /* qeth_hdr must not cross element boundaries */
  4661. while (element->length < offset + sizeof(struct qeth_hdr)) {
  4662. if (qeth_is_last_sbale(element))
  4663. return NULL;
  4664. element++;
  4665. offset = 0;
  4666. }
  4667. *hdr = element->addr + offset;
  4668. offset += sizeof(struct qeth_hdr);
  4669. switch ((*hdr)->hdr.l2.id) {
  4670. case QETH_HEADER_TYPE_LAYER2:
  4671. skb_len = (*hdr)->hdr.l2.pkt_length;
  4672. break;
  4673. case QETH_HEADER_TYPE_LAYER3:
  4674. skb_len = (*hdr)->hdr.l3.length;
  4675. headroom = ETH_HLEN;
  4676. break;
  4677. case QETH_HEADER_TYPE_OSN:
  4678. skb_len = (*hdr)->hdr.osn.pdu_length;
  4679. headroom = sizeof(struct qeth_hdr);
  4680. break;
  4681. default:
  4682. break;
  4683. }
  4684. if (!skb_len)
  4685. return NULL;
  4686. if (((skb_len >= card->options.rx_sg_cb) &&
  4687. (!(card->info.type == QETH_CARD_TYPE_OSN)) &&
  4688. (!atomic_read(&card->force_alloc_skb))) ||
  4689. (card->options.cq == QETH_CQ_ENABLED))
  4690. use_rx_sg = 1;
  4691. if (use_rx_sg && qethbuffer->rx_skb) {
  4692. /* QETH_CQ_ENABLED only: */
  4693. skb = qethbuffer->rx_skb;
  4694. qethbuffer->rx_skb = NULL;
  4695. } else {
  4696. unsigned int linear = (use_rx_sg) ? QETH_RX_PULL_LEN : skb_len;
  4697. skb = napi_alloc_skb(&card->napi, linear + headroom);
  4698. }
  4699. if (!skb)
  4700. goto no_mem;
  4701. if (headroom)
  4702. skb_reserve(skb, headroom);
  4703. data_ptr = element->addr + offset;
  4704. while (skb_len) {
  4705. data_len = min(skb_len, (int)(element->length - offset));
  4706. if (data_len) {
  4707. if (use_rx_sg)
  4708. qeth_create_skb_frag(element, skb, offset,
  4709. data_len);
  4710. else
  4711. skb_put_data(skb, data_ptr, data_len);
  4712. }
  4713. skb_len -= data_len;
  4714. if (skb_len) {
  4715. if (qeth_is_last_sbale(element)) {
  4716. QETH_CARD_TEXT(card, 4, "unexeob");
  4717. QETH_CARD_HEX(card, 2, buffer, sizeof(void *));
  4718. dev_kfree_skb_any(skb);
  4719. card->stats.rx_errors++;
  4720. return NULL;
  4721. }
  4722. element++;
  4723. offset = 0;
  4724. data_ptr = element->addr;
  4725. } else {
  4726. offset += data_len;
  4727. }
  4728. }
  4729. *__element = element;
  4730. *__offset = offset;
  4731. if (use_rx_sg && card->options.performance_stats) {
  4732. card->perf_stats.sg_skbs_rx++;
  4733. card->perf_stats.sg_frags_rx += skb_shinfo(skb)->nr_frags;
  4734. }
  4735. return skb;
  4736. no_mem:
  4737. if (net_ratelimit()) {
  4738. QETH_CARD_TEXT(card, 2, "noskbmem");
  4739. }
  4740. card->stats.rx_dropped++;
  4741. return NULL;
  4742. }
  4743. EXPORT_SYMBOL_GPL(qeth_core_get_next_skb);
  4744. int qeth_poll(struct napi_struct *napi, int budget)
  4745. {
  4746. struct qeth_card *card = container_of(napi, struct qeth_card, napi);
  4747. int work_done = 0;
  4748. struct qeth_qdio_buffer *buffer;
  4749. int done;
  4750. int new_budget = budget;
  4751. if (card->options.performance_stats) {
  4752. card->perf_stats.inbound_cnt++;
  4753. card->perf_stats.inbound_start_time = qeth_get_micros();
  4754. }
  4755. while (1) {
  4756. if (!card->rx.b_count) {
  4757. card->rx.qdio_err = 0;
  4758. card->rx.b_count = qdio_get_next_buffers(
  4759. card->data.ccwdev, 0, &card->rx.b_index,
  4760. &card->rx.qdio_err);
  4761. if (card->rx.b_count <= 0) {
  4762. card->rx.b_count = 0;
  4763. break;
  4764. }
  4765. card->rx.b_element =
  4766. &card->qdio.in_q->bufs[card->rx.b_index]
  4767. .buffer->element[0];
  4768. card->rx.e_offset = 0;
  4769. }
  4770. while (card->rx.b_count) {
  4771. buffer = &card->qdio.in_q->bufs[card->rx.b_index];
  4772. if (!(card->rx.qdio_err &&
  4773. qeth_check_qdio_errors(card, buffer->buffer,
  4774. card->rx.qdio_err, "qinerr")))
  4775. work_done +=
  4776. card->discipline->process_rx_buffer(
  4777. card, new_budget, &done);
  4778. else
  4779. done = 1;
  4780. if (done) {
  4781. if (card->options.performance_stats)
  4782. card->perf_stats.bufs_rec++;
  4783. qeth_put_buffer_pool_entry(card,
  4784. buffer->pool_entry);
  4785. qeth_queue_input_buffer(card, card->rx.b_index);
  4786. card->rx.b_count--;
  4787. if (card->rx.b_count) {
  4788. card->rx.b_index =
  4789. (card->rx.b_index + 1) %
  4790. QDIO_MAX_BUFFERS_PER_Q;
  4791. card->rx.b_element =
  4792. &card->qdio.in_q
  4793. ->bufs[card->rx.b_index]
  4794. .buffer->element[0];
  4795. card->rx.e_offset = 0;
  4796. }
  4797. }
  4798. if (work_done >= budget)
  4799. goto out;
  4800. else
  4801. new_budget = budget - work_done;
  4802. }
  4803. }
  4804. napi_complete_done(napi, work_done);
  4805. if (qdio_start_irq(card->data.ccwdev, 0))
  4806. napi_schedule(&card->napi);
  4807. out:
  4808. if (card->options.performance_stats)
  4809. card->perf_stats.inbound_time += qeth_get_micros() -
  4810. card->perf_stats.inbound_start_time;
  4811. return work_done;
  4812. }
  4813. EXPORT_SYMBOL_GPL(qeth_poll);
  4814. static int qeth_setassparms_inspect_rc(struct qeth_ipa_cmd *cmd)
  4815. {
  4816. if (!cmd->hdr.return_code)
  4817. cmd->hdr.return_code = cmd->data.setassparms.hdr.return_code;
  4818. return cmd->hdr.return_code;
  4819. }
  4820. static int qeth_setassparms_get_caps_cb(struct qeth_card *card,
  4821. struct qeth_reply *reply,
  4822. unsigned long data)
  4823. {
  4824. struct qeth_ipa_cmd *cmd = (struct qeth_ipa_cmd *) data;
  4825. struct qeth_ipa_caps *caps = reply->param;
  4826. if (qeth_setassparms_inspect_rc(cmd))
  4827. return 0;
  4828. caps->supported = cmd->data.setassparms.data.caps.supported;
  4829. caps->enabled = cmd->data.setassparms.data.caps.enabled;
  4830. return 0;
  4831. }
  4832. int qeth_setassparms_cb(struct qeth_card *card,
  4833. struct qeth_reply *reply, unsigned long data)
  4834. {
  4835. struct qeth_ipa_cmd *cmd;
  4836. QETH_CARD_TEXT(card, 4, "defadpcb");
  4837. cmd = (struct qeth_ipa_cmd *) data;
  4838. if (cmd->hdr.return_code == 0) {
  4839. cmd->hdr.return_code = cmd->data.setassparms.hdr.return_code;
  4840. if (cmd->hdr.prot_version == QETH_PROT_IPV4)
  4841. card->options.ipa4.enabled_funcs = cmd->hdr.ipa_enabled;
  4842. if (cmd->hdr.prot_version == QETH_PROT_IPV6)
  4843. card->options.ipa6.enabled_funcs = cmd->hdr.ipa_enabled;
  4844. }
  4845. return 0;
  4846. }
  4847. EXPORT_SYMBOL_GPL(qeth_setassparms_cb);
  4848. struct qeth_cmd_buffer *qeth_get_setassparms_cmd(struct qeth_card *card,
  4849. enum qeth_ipa_funcs ipa_func,
  4850. __u16 cmd_code, __u16 len,
  4851. enum qeth_prot_versions prot)
  4852. {
  4853. struct qeth_cmd_buffer *iob;
  4854. struct qeth_ipa_cmd *cmd;
  4855. QETH_CARD_TEXT(card, 4, "getasscm");
  4856. iob = qeth_get_ipacmd_buffer(card, IPA_CMD_SETASSPARMS, prot);
  4857. if (iob) {
  4858. cmd = __ipa_cmd(iob);
  4859. cmd->data.setassparms.hdr.assist_no = ipa_func;
  4860. cmd->data.setassparms.hdr.length = 8 + len;
  4861. cmd->data.setassparms.hdr.command_code = cmd_code;
  4862. }
  4863. return iob;
  4864. }
  4865. EXPORT_SYMBOL_GPL(qeth_get_setassparms_cmd);
  4866. static int qeth_send_setassparms(struct qeth_card *card,
  4867. struct qeth_cmd_buffer *iob, u16 len,
  4868. long data, int (*reply_cb)(struct qeth_card *,
  4869. struct qeth_reply *,
  4870. unsigned long),
  4871. void *reply_param)
  4872. {
  4873. int rc;
  4874. struct qeth_ipa_cmd *cmd;
  4875. QETH_CARD_TEXT(card, 4, "sendassp");
  4876. cmd = __ipa_cmd(iob);
  4877. if (len <= sizeof(__u32))
  4878. cmd->data.setassparms.data.flags_32bit = (__u32) data;
  4879. else /* (len > sizeof(__u32)) */
  4880. memcpy(&cmd->data.setassparms.data, (void *) data, len);
  4881. rc = qeth_send_ipa_cmd(card, iob, reply_cb, reply_param);
  4882. return rc;
  4883. }
  4884. int qeth_send_simple_setassparms_prot(struct qeth_card *card,
  4885. enum qeth_ipa_funcs ipa_func,
  4886. u16 cmd_code, long data,
  4887. enum qeth_prot_versions prot)
  4888. {
  4889. int rc;
  4890. int length = 0;
  4891. struct qeth_cmd_buffer *iob;
  4892. QETH_CARD_TEXT_(card, 4, "simassp%i", prot);
  4893. if (data)
  4894. length = sizeof(__u32);
  4895. iob = qeth_get_setassparms_cmd(card, ipa_func, cmd_code, length, prot);
  4896. if (!iob)
  4897. return -ENOMEM;
  4898. rc = qeth_send_setassparms(card, iob, length, data,
  4899. qeth_setassparms_cb, NULL);
  4900. return rc;
  4901. }
  4902. EXPORT_SYMBOL_GPL(qeth_send_simple_setassparms_prot);
  4903. static void qeth_unregister_dbf_views(void)
  4904. {
  4905. int x;
  4906. for (x = 0; x < QETH_DBF_INFOS; x++) {
  4907. debug_unregister(qeth_dbf[x].id);
  4908. qeth_dbf[x].id = NULL;
  4909. }
  4910. }
  4911. void qeth_dbf_longtext(debug_info_t *id, int level, char *fmt, ...)
  4912. {
  4913. char dbf_txt_buf[32];
  4914. va_list args;
  4915. if (!debug_level_enabled(id, level))
  4916. return;
  4917. va_start(args, fmt);
  4918. vsnprintf(dbf_txt_buf, sizeof(dbf_txt_buf), fmt, args);
  4919. va_end(args);
  4920. debug_text_event(id, level, dbf_txt_buf);
  4921. }
  4922. EXPORT_SYMBOL_GPL(qeth_dbf_longtext);
  4923. static int qeth_register_dbf_views(void)
  4924. {
  4925. int ret;
  4926. int x;
  4927. for (x = 0; x < QETH_DBF_INFOS; x++) {
  4928. /* register the areas */
  4929. qeth_dbf[x].id = debug_register(qeth_dbf[x].name,
  4930. qeth_dbf[x].pages,
  4931. qeth_dbf[x].areas,
  4932. qeth_dbf[x].len);
  4933. if (qeth_dbf[x].id == NULL) {
  4934. qeth_unregister_dbf_views();
  4935. return -ENOMEM;
  4936. }
  4937. /* register a view */
  4938. ret = debug_register_view(qeth_dbf[x].id, qeth_dbf[x].view);
  4939. if (ret) {
  4940. qeth_unregister_dbf_views();
  4941. return ret;
  4942. }
  4943. /* set a passing level */
  4944. debug_set_level(qeth_dbf[x].id, qeth_dbf[x].level);
  4945. }
  4946. return 0;
  4947. }
  4948. static DEFINE_MUTEX(qeth_mod_mutex); /* for synchronized module loading */
  4949. int qeth_core_load_discipline(struct qeth_card *card,
  4950. enum qeth_discipline_id discipline)
  4951. {
  4952. mutex_lock(&qeth_mod_mutex);
  4953. switch (discipline) {
  4954. case QETH_DISCIPLINE_LAYER3:
  4955. card->discipline = try_then_request_module(
  4956. symbol_get(qeth_l3_discipline), "qeth_l3");
  4957. break;
  4958. case QETH_DISCIPLINE_LAYER2:
  4959. card->discipline = try_then_request_module(
  4960. symbol_get(qeth_l2_discipline), "qeth_l2");
  4961. break;
  4962. default:
  4963. break;
  4964. }
  4965. mutex_unlock(&qeth_mod_mutex);
  4966. if (!card->discipline) {
  4967. dev_err(&card->gdev->dev, "There is no kernel module to "
  4968. "support discipline %d\n", discipline);
  4969. return -EINVAL;
  4970. }
  4971. card->options.layer = discipline;
  4972. return 0;
  4973. }
  4974. void qeth_core_free_discipline(struct qeth_card *card)
  4975. {
  4976. if (IS_LAYER2(card))
  4977. symbol_put(qeth_l2_discipline);
  4978. else
  4979. symbol_put(qeth_l3_discipline);
  4980. card->options.layer = QETH_DISCIPLINE_UNDETERMINED;
  4981. card->discipline = NULL;
  4982. }
  4983. const struct device_type qeth_generic_devtype = {
  4984. .name = "qeth_generic",
  4985. .groups = qeth_generic_attr_groups,
  4986. };
  4987. EXPORT_SYMBOL_GPL(qeth_generic_devtype);
  4988. static const struct device_type qeth_osn_devtype = {
  4989. .name = "qeth_osn",
  4990. .groups = qeth_osn_attr_groups,
  4991. };
  4992. #define DBF_NAME_LEN 20
  4993. struct qeth_dbf_entry {
  4994. char dbf_name[DBF_NAME_LEN];
  4995. debug_info_t *dbf_info;
  4996. struct list_head dbf_list;
  4997. };
  4998. static LIST_HEAD(qeth_dbf_list);
  4999. static DEFINE_MUTEX(qeth_dbf_list_mutex);
  5000. static debug_info_t *qeth_get_dbf_entry(char *name)
  5001. {
  5002. struct qeth_dbf_entry *entry;
  5003. debug_info_t *rc = NULL;
  5004. mutex_lock(&qeth_dbf_list_mutex);
  5005. list_for_each_entry(entry, &qeth_dbf_list, dbf_list) {
  5006. if (strcmp(entry->dbf_name, name) == 0) {
  5007. rc = entry->dbf_info;
  5008. break;
  5009. }
  5010. }
  5011. mutex_unlock(&qeth_dbf_list_mutex);
  5012. return rc;
  5013. }
  5014. static int qeth_add_dbf_entry(struct qeth_card *card, char *name)
  5015. {
  5016. struct qeth_dbf_entry *new_entry;
  5017. card->debug = debug_register(name, 2, 1, 8);
  5018. if (!card->debug) {
  5019. QETH_DBF_TEXT_(SETUP, 2, "%s", "qcdbf");
  5020. goto err;
  5021. }
  5022. if (debug_register_view(card->debug, &debug_hex_ascii_view))
  5023. goto err_dbg;
  5024. new_entry = kzalloc(sizeof(struct qeth_dbf_entry), GFP_KERNEL);
  5025. if (!new_entry)
  5026. goto err_dbg;
  5027. strncpy(new_entry->dbf_name, name, DBF_NAME_LEN);
  5028. new_entry->dbf_info = card->debug;
  5029. mutex_lock(&qeth_dbf_list_mutex);
  5030. list_add(&new_entry->dbf_list, &qeth_dbf_list);
  5031. mutex_unlock(&qeth_dbf_list_mutex);
  5032. return 0;
  5033. err_dbg:
  5034. debug_unregister(card->debug);
  5035. err:
  5036. return -ENOMEM;
  5037. }
  5038. static void qeth_clear_dbf_list(void)
  5039. {
  5040. struct qeth_dbf_entry *entry, *tmp;
  5041. mutex_lock(&qeth_dbf_list_mutex);
  5042. list_for_each_entry_safe(entry, tmp, &qeth_dbf_list, dbf_list) {
  5043. list_del(&entry->dbf_list);
  5044. debug_unregister(entry->dbf_info);
  5045. kfree(entry);
  5046. }
  5047. mutex_unlock(&qeth_dbf_list_mutex);
  5048. }
  5049. static struct net_device *qeth_alloc_netdev(struct qeth_card *card)
  5050. {
  5051. struct net_device *dev;
  5052. switch (card->info.type) {
  5053. case QETH_CARD_TYPE_IQD:
  5054. dev = alloc_netdev(0, "hsi%d", NET_NAME_UNKNOWN, ether_setup);
  5055. break;
  5056. case QETH_CARD_TYPE_OSN:
  5057. dev = alloc_netdev(0, "osn%d", NET_NAME_UNKNOWN, ether_setup);
  5058. break;
  5059. default:
  5060. dev = alloc_etherdev(0);
  5061. }
  5062. if (!dev)
  5063. return NULL;
  5064. dev->ml_priv = card;
  5065. dev->watchdog_timeo = QETH_TX_TIMEOUT;
  5066. dev->min_mtu = IS_OSN(card) ? 64 : 576;
  5067. /* initialized when device first goes online: */
  5068. dev->max_mtu = 0;
  5069. dev->mtu = 0;
  5070. SET_NETDEV_DEV(dev, &card->gdev->dev);
  5071. netif_carrier_off(dev);
  5072. if (!IS_OSN(card)) {
  5073. dev->priv_flags &= ~IFF_TX_SKB_SHARING;
  5074. dev->hw_features |= NETIF_F_SG;
  5075. dev->vlan_features |= NETIF_F_SG;
  5076. if (IS_IQD(card))
  5077. dev->features |= NETIF_F_SG;
  5078. }
  5079. return dev;
  5080. }
  5081. struct net_device *qeth_clone_netdev(struct net_device *orig)
  5082. {
  5083. struct net_device *clone = qeth_alloc_netdev(orig->ml_priv);
  5084. if (!clone)
  5085. return NULL;
  5086. clone->dev_port = orig->dev_port;
  5087. return clone;
  5088. }
  5089. static int qeth_core_probe_device(struct ccwgroup_device *gdev)
  5090. {
  5091. struct qeth_card *card;
  5092. struct device *dev;
  5093. int rc;
  5094. enum qeth_discipline_id enforced_disc;
  5095. char dbf_name[DBF_NAME_LEN];
  5096. QETH_DBF_TEXT(SETUP, 2, "probedev");
  5097. dev = &gdev->dev;
  5098. if (!get_device(dev))
  5099. return -ENODEV;
  5100. QETH_DBF_TEXT_(SETUP, 2, "%s", dev_name(&gdev->dev));
  5101. card = qeth_alloc_card(gdev);
  5102. if (!card) {
  5103. QETH_DBF_TEXT_(SETUP, 2, "1err%d", -ENOMEM);
  5104. rc = -ENOMEM;
  5105. goto err_dev;
  5106. }
  5107. snprintf(dbf_name, sizeof(dbf_name), "qeth_card_%s",
  5108. dev_name(&gdev->dev));
  5109. card->debug = qeth_get_dbf_entry(dbf_name);
  5110. if (!card->debug) {
  5111. rc = qeth_add_dbf_entry(card, dbf_name);
  5112. if (rc)
  5113. goto err_card;
  5114. }
  5115. qeth_setup_card(card);
  5116. qeth_update_from_chp_desc(card);
  5117. card->dev = qeth_alloc_netdev(card);
  5118. if (!card->dev) {
  5119. rc = -ENOMEM;
  5120. goto err_card;
  5121. }
  5122. qeth_determine_capabilities(card);
  5123. enforced_disc = qeth_enforce_discipline(card);
  5124. switch (enforced_disc) {
  5125. case QETH_DISCIPLINE_UNDETERMINED:
  5126. gdev->dev.type = &qeth_generic_devtype;
  5127. break;
  5128. default:
  5129. card->info.layer_enforced = true;
  5130. rc = qeth_core_load_discipline(card, enforced_disc);
  5131. if (rc)
  5132. goto err_load;
  5133. gdev->dev.type = (card->info.type != QETH_CARD_TYPE_OSN)
  5134. ? card->discipline->devtype
  5135. : &qeth_osn_devtype;
  5136. rc = card->discipline->setup(card->gdev);
  5137. if (rc)
  5138. goto err_disc;
  5139. break;
  5140. }
  5141. write_lock_irq(&qeth_core_card_list.rwlock);
  5142. list_add_tail(&card->list, &qeth_core_card_list.list);
  5143. write_unlock_irq(&qeth_core_card_list.rwlock);
  5144. return 0;
  5145. err_disc:
  5146. qeth_core_free_discipline(card);
  5147. err_load:
  5148. free_netdev(card->dev);
  5149. err_card:
  5150. qeth_core_free_card(card);
  5151. err_dev:
  5152. put_device(dev);
  5153. return rc;
  5154. }
  5155. static void qeth_core_remove_device(struct ccwgroup_device *gdev)
  5156. {
  5157. struct qeth_card *card = dev_get_drvdata(&gdev->dev);
  5158. QETH_DBF_TEXT(SETUP, 2, "removedv");
  5159. if (card->discipline) {
  5160. card->discipline->remove(gdev);
  5161. qeth_core_free_discipline(card);
  5162. }
  5163. write_lock_irq(&qeth_core_card_list.rwlock);
  5164. list_del(&card->list);
  5165. write_unlock_irq(&qeth_core_card_list.rwlock);
  5166. free_netdev(card->dev);
  5167. qeth_core_free_card(card);
  5168. put_device(&gdev->dev);
  5169. }
  5170. static int qeth_core_set_online(struct ccwgroup_device *gdev)
  5171. {
  5172. struct qeth_card *card = dev_get_drvdata(&gdev->dev);
  5173. int rc = 0;
  5174. enum qeth_discipline_id def_discipline;
  5175. if (!card->discipline) {
  5176. if (card->info.type == QETH_CARD_TYPE_IQD)
  5177. def_discipline = QETH_DISCIPLINE_LAYER3;
  5178. else
  5179. def_discipline = QETH_DISCIPLINE_LAYER2;
  5180. rc = qeth_core_load_discipline(card, def_discipline);
  5181. if (rc)
  5182. goto err;
  5183. rc = card->discipline->setup(card->gdev);
  5184. if (rc) {
  5185. qeth_core_free_discipline(card);
  5186. goto err;
  5187. }
  5188. }
  5189. rc = card->discipline->set_online(gdev);
  5190. err:
  5191. return rc;
  5192. }
  5193. static int qeth_core_set_offline(struct ccwgroup_device *gdev)
  5194. {
  5195. struct qeth_card *card = dev_get_drvdata(&gdev->dev);
  5196. return card->discipline->set_offline(gdev);
  5197. }
  5198. static void qeth_core_shutdown(struct ccwgroup_device *gdev)
  5199. {
  5200. struct qeth_card *card = dev_get_drvdata(&gdev->dev);
  5201. qeth_set_allowed_threads(card, 0, 1);
  5202. if ((gdev->state == CCWGROUP_ONLINE) && card->info.hwtrap)
  5203. qeth_hw_trap(card, QETH_DIAGS_TRAP_DISARM);
  5204. qeth_qdio_clear_card(card, 0);
  5205. qeth_clear_qdio_buffers(card);
  5206. qdio_free(CARD_DDEV(card));
  5207. }
  5208. static int qeth_core_freeze(struct ccwgroup_device *gdev)
  5209. {
  5210. struct qeth_card *card = dev_get_drvdata(&gdev->dev);
  5211. if (card->discipline && card->discipline->freeze)
  5212. return card->discipline->freeze(gdev);
  5213. return 0;
  5214. }
  5215. static int qeth_core_thaw(struct ccwgroup_device *gdev)
  5216. {
  5217. struct qeth_card *card = dev_get_drvdata(&gdev->dev);
  5218. if (card->discipline && card->discipline->thaw)
  5219. return card->discipline->thaw(gdev);
  5220. return 0;
  5221. }
  5222. static int qeth_core_restore(struct ccwgroup_device *gdev)
  5223. {
  5224. struct qeth_card *card = dev_get_drvdata(&gdev->dev);
  5225. if (card->discipline && card->discipline->restore)
  5226. return card->discipline->restore(gdev);
  5227. return 0;
  5228. }
  5229. static ssize_t group_store(struct device_driver *ddrv, const char *buf,
  5230. size_t count)
  5231. {
  5232. int err;
  5233. err = ccwgroup_create_dev(qeth_core_root_dev, to_ccwgroupdrv(ddrv), 3,
  5234. buf);
  5235. return err ? err : count;
  5236. }
  5237. static DRIVER_ATTR_WO(group);
  5238. static struct attribute *qeth_drv_attrs[] = {
  5239. &driver_attr_group.attr,
  5240. NULL,
  5241. };
  5242. static struct attribute_group qeth_drv_attr_group = {
  5243. .attrs = qeth_drv_attrs,
  5244. };
  5245. static const struct attribute_group *qeth_drv_attr_groups[] = {
  5246. &qeth_drv_attr_group,
  5247. NULL,
  5248. };
  5249. static struct ccwgroup_driver qeth_core_ccwgroup_driver = {
  5250. .driver = {
  5251. .groups = qeth_drv_attr_groups,
  5252. .owner = THIS_MODULE,
  5253. .name = "qeth",
  5254. },
  5255. .ccw_driver = &qeth_ccw_driver,
  5256. .setup = qeth_core_probe_device,
  5257. .remove = qeth_core_remove_device,
  5258. .set_online = qeth_core_set_online,
  5259. .set_offline = qeth_core_set_offline,
  5260. .shutdown = qeth_core_shutdown,
  5261. .prepare = NULL,
  5262. .complete = NULL,
  5263. .freeze = qeth_core_freeze,
  5264. .thaw = qeth_core_thaw,
  5265. .restore = qeth_core_restore,
  5266. };
  5267. int qeth_do_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
  5268. {
  5269. struct qeth_card *card = dev->ml_priv;
  5270. struct mii_ioctl_data *mii_data;
  5271. int rc = 0;
  5272. if (!card)
  5273. return -ENODEV;
  5274. if (!qeth_card_hw_is_reachable(card))
  5275. return -ENODEV;
  5276. if (card->info.type == QETH_CARD_TYPE_OSN)
  5277. return -EPERM;
  5278. switch (cmd) {
  5279. case SIOC_QETH_ADP_SET_SNMP_CONTROL:
  5280. rc = qeth_snmp_command(card, rq->ifr_ifru.ifru_data);
  5281. break;
  5282. case SIOC_QETH_GET_CARD_TYPE:
  5283. if ((card->info.type == QETH_CARD_TYPE_OSD ||
  5284. card->info.type == QETH_CARD_TYPE_OSM ||
  5285. card->info.type == QETH_CARD_TYPE_OSX) &&
  5286. !card->info.guestlan)
  5287. return 1;
  5288. else
  5289. return 0;
  5290. case SIOCGMIIPHY:
  5291. mii_data = if_mii(rq);
  5292. mii_data->phy_id = 0;
  5293. break;
  5294. case SIOCGMIIREG:
  5295. mii_data = if_mii(rq);
  5296. if (mii_data->phy_id != 0)
  5297. rc = -EINVAL;
  5298. else
  5299. mii_data->val_out = qeth_mdio_read(dev,
  5300. mii_data->phy_id, mii_data->reg_num);
  5301. break;
  5302. case SIOC_QETH_QUERY_OAT:
  5303. rc = qeth_query_oat_command(card, rq->ifr_ifru.ifru_data);
  5304. break;
  5305. default:
  5306. if (card->discipline->do_ioctl)
  5307. rc = card->discipline->do_ioctl(dev, rq, cmd);
  5308. else
  5309. rc = -EOPNOTSUPP;
  5310. }
  5311. if (rc)
  5312. QETH_CARD_TEXT_(card, 2, "ioce%x", rc);
  5313. return rc;
  5314. }
  5315. EXPORT_SYMBOL_GPL(qeth_do_ioctl);
  5316. static struct {
  5317. const char str[ETH_GSTRING_LEN];
  5318. } qeth_ethtool_stats_keys[] = {
  5319. /* 0 */{"rx skbs"},
  5320. {"rx buffers"},
  5321. {"tx skbs"},
  5322. {"tx buffers"},
  5323. {"tx skbs no packing"},
  5324. {"tx buffers no packing"},
  5325. {"tx skbs packing"},
  5326. {"tx buffers packing"},
  5327. {"tx sg skbs"},
  5328. {"tx buffer elements"},
  5329. /* 10 */{"rx sg skbs"},
  5330. {"rx sg frags"},
  5331. {"rx sg page allocs"},
  5332. {"tx large kbytes"},
  5333. {"tx large count"},
  5334. {"tx pk state ch n->p"},
  5335. {"tx pk state ch p->n"},
  5336. {"tx pk watermark low"},
  5337. {"tx pk watermark high"},
  5338. {"queue 0 buffer usage"},
  5339. /* 20 */{"queue 1 buffer usage"},
  5340. {"queue 2 buffer usage"},
  5341. {"queue 3 buffer usage"},
  5342. {"rx poll time"},
  5343. {"rx poll count"},
  5344. {"rx do_QDIO time"},
  5345. {"rx do_QDIO count"},
  5346. {"tx handler time"},
  5347. {"tx handler count"},
  5348. {"tx time"},
  5349. /* 30 */{"tx count"},
  5350. {"tx do_QDIO time"},
  5351. {"tx do_QDIO count"},
  5352. {"tx csum"},
  5353. {"tx lin"},
  5354. {"tx linfail"},
  5355. {"cq handler count"},
  5356. {"cq handler time"},
  5357. {"rx csum"}
  5358. };
  5359. int qeth_core_get_sset_count(struct net_device *dev, int stringset)
  5360. {
  5361. switch (stringset) {
  5362. case ETH_SS_STATS:
  5363. return (sizeof(qeth_ethtool_stats_keys) / ETH_GSTRING_LEN);
  5364. default:
  5365. return -EINVAL;
  5366. }
  5367. }
  5368. EXPORT_SYMBOL_GPL(qeth_core_get_sset_count);
  5369. void qeth_core_get_ethtool_stats(struct net_device *dev,
  5370. struct ethtool_stats *stats, u64 *data)
  5371. {
  5372. struct qeth_card *card = dev->ml_priv;
  5373. data[0] = card->stats.rx_packets -
  5374. card->perf_stats.initial_rx_packets;
  5375. data[1] = card->perf_stats.bufs_rec;
  5376. data[2] = card->stats.tx_packets -
  5377. card->perf_stats.initial_tx_packets;
  5378. data[3] = card->perf_stats.bufs_sent;
  5379. data[4] = card->stats.tx_packets - card->perf_stats.initial_tx_packets
  5380. - card->perf_stats.skbs_sent_pack;
  5381. data[5] = card->perf_stats.bufs_sent - card->perf_stats.bufs_sent_pack;
  5382. data[6] = card->perf_stats.skbs_sent_pack;
  5383. data[7] = card->perf_stats.bufs_sent_pack;
  5384. data[8] = card->perf_stats.sg_skbs_sent;
  5385. data[9] = card->perf_stats.buf_elements_sent;
  5386. data[10] = card->perf_stats.sg_skbs_rx;
  5387. data[11] = card->perf_stats.sg_frags_rx;
  5388. data[12] = card->perf_stats.sg_alloc_page_rx;
  5389. data[13] = (card->perf_stats.large_send_bytes >> 10);
  5390. data[14] = card->perf_stats.large_send_cnt;
  5391. data[15] = card->perf_stats.sc_dp_p;
  5392. data[16] = card->perf_stats.sc_p_dp;
  5393. data[17] = QETH_LOW_WATERMARK_PACK;
  5394. data[18] = QETH_HIGH_WATERMARK_PACK;
  5395. data[19] = atomic_read(&card->qdio.out_qs[0]->used_buffers);
  5396. data[20] = (card->qdio.no_out_queues > 1) ?
  5397. atomic_read(&card->qdio.out_qs[1]->used_buffers) : 0;
  5398. data[21] = (card->qdio.no_out_queues > 2) ?
  5399. atomic_read(&card->qdio.out_qs[2]->used_buffers) : 0;
  5400. data[22] = (card->qdio.no_out_queues > 3) ?
  5401. atomic_read(&card->qdio.out_qs[3]->used_buffers) : 0;
  5402. data[23] = card->perf_stats.inbound_time;
  5403. data[24] = card->perf_stats.inbound_cnt;
  5404. data[25] = card->perf_stats.inbound_do_qdio_time;
  5405. data[26] = card->perf_stats.inbound_do_qdio_cnt;
  5406. data[27] = card->perf_stats.outbound_handler_time;
  5407. data[28] = card->perf_stats.outbound_handler_cnt;
  5408. data[29] = card->perf_stats.outbound_time;
  5409. data[30] = card->perf_stats.outbound_cnt;
  5410. data[31] = card->perf_stats.outbound_do_qdio_time;
  5411. data[32] = card->perf_stats.outbound_do_qdio_cnt;
  5412. data[33] = card->perf_stats.tx_csum;
  5413. data[34] = card->perf_stats.tx_lin;
  5414. data[35] = card->perf_stats.tx_linfail;
  5415. data[36] = card->perf_stats.cq_cnt;
  5416. data[37] = card->perf_stats.cq_time;
  5417. data[38] = card->perf_stats.rx_csum;
  5418. }
  5419. EXPORT_SYMBOL_GPL(qeth_core_get_ethtool_stats);
  5420. void qeth_core_get_strings(struct net_device *dev, u32 stringset, u8 *data)
  5421. {
  5422. switch (stringset) {
  5423. case ETH_SS_STATS:
  5424. memcpy(data, &qeth_ethtool_stats_keys,
  5425. sizeof(qeth_ethtool_stats_keys));
  5426. break;
  5427. default:
  5428. WARN_ON(1);
  5429. break;
  5430. }
  5431. }
  5432. EXPORT_SYMBOL_GPL(qeth_core_get_strings);
  5433. void qeth_core_get_drvinfo(struct net_device *dev,
  5434. struct ethtool_drvinfo *info)
  5435. {
  5436. struct qeth_card *card = dev->ml_priv;
  5437. strlcpy(info->driver, IS_LAYER2(card) ? "qeth_l2" : "qeth_l3",
  5438. sizeof(info->driver));
  5439. strlcpy(info->version, "1.0", sizeof(info->version));
  5440. strlcpy(info->fw_version, card->info.mcl_level,
  5441. sizeof(info->fw_version));
  5442. snprintf(info->bus_info, sizeof(info->bus_info), "%s/%s/%s",
  5443. CARD_RDEV_ID(card), CARD_WDEV_ID(card), CARD_DDEV_ID(card));
  5444. }
  5445. EXPORT_SYMBOL_GPL(qeth_core_get_drvinfo);
  5446. /* Helper function to fill 'advertising' and 'supported' which are the same. */
  5447. /* Autoneg and full-duplex are supported and advertised unconditionally. */
  5448. /* Always advertise and support all speeds up to specified, and only one */
  5449. /* specified port type. */
  5450. static void qeth_set_cmd_adv_sup(struct ethtool_link_ksettings *cmd,
  5451. int maxspeed, int porttype)
  5452. {
  5453. ethtool_link_ksettings_zero_link_mode(cmd, supported);
  5454. ethtool_link_ksettings_zero_link_mode(cmd, advertising);
  5455. ethtool_link_ksettings_zero_link_mode(cmd, lp_advertising);
  5456. ethtool_link_ksettings_add_link_mode(cmd, supported, Autoneg);
  5457. ethtool_link_ksettings_add_link_mode(cmd, advertising, Autoneg);
  5458. switch (porttype) {
  5459. case PORT_TP:
  5460. ethtool_link_ksettings_add_link_mode(cmd, supported, TP);
  5461. ethtool_link_ksettings_add_link_mode(cmd, advertising, TP);
  5462. break;
  5463. case PORT_FIBRE:
  5464. ethtool_link_ksettings_add_link_mode(cmd, supported, FIBRE);
  5465. ethtool_link_ksettings_add_link_mode(cmd, advertising, FIBRE);
  5466. break;
  5467. default:
  5468. ethtool_link_ksettings_add_link_mode(cmd, supported, TP);
  5469. ethtool_link_ksettings_add_link_mode(cmd, advertising, TP);
  5470. WARN_ON_ONCE(1);
  5471. }
  5472. /* partially does fall through, to also select lower speeds */
  5473. switch (maxspeed) {
  5474. case SPEED_25000:
  5475. ethtool_link_ksettings_add_link_mode(cmd, supported,
  5476. 25000baseSR_Full);
  5477. ethtool_link_ksettings_add_link_mode(cmd, advertising,
  5478. 25000baseSR_Full);
  5479. break;
  5480. case SPEED_10000:
  5481. ethtool_link_ksettings_add_link_mode(cmd, supported,
  5482. 10000baseT_Full);
  5483. ethtool_link_ksettings_add_link_mode(cmd, advertising,
  5484. 10000baseT_Full);
  5485. case SPEED_1000:
  5486. ethtool_link_ksettings_add_link_mode(cmd, supported,
  5487. 1000baseT_Full);
  5488. ethtool_link_ksettings_add_link_mode(cmd, advertising,
  5489. 1000baseT_Full);
  5490. ethtool_link_ksettings_add_link_mode(cmd, supported,
  5491. 1000baseT_Half);
  5492. ethtool_link_ksettings_add_link_mode(cmd, advertising,
  5493. 1000baseT_Half);
  5494. case SPEED_100:
  5495. ethtool_link_ksettings_add_link_mode(cmd, supported,
  5496. 100baseT_Full);
  5497. ethtool_link_ksettings_add_link_mode(cmd, advertising,
  5498. 100baseT_Full);
  5499. ethtool_link_ksettings_add_link_mode(cmd, supported,
  5500. 100baseT_Half);
  5501. ethtool_link_ksettings_add_link_mode(cmd, advertising,
  5502. 100baseT_Half);
  5503. case SPEED_10:
  5504. ethtool_link_ksettings_add_link_mode(cmd, supported,
  5505. 10baseT_Full);
  5506. ethtool_link_ksettings_add_link_mode(cmd, advertising,
  5507. 10baseT_Full);
  5508. ethtool_link_ksettings_add_link_mode(cmd, supported,
  5509. 10baseT_Half);
  5510. ethtool_link_ksettings_add_link_mode(cmd, advertising,
  5511. 10baseT_Half);
  5512. /* end fallthrough */
  5513. break;
  5514. default:
  5515. ethtool_link_ksettings_add_link_mode(cmd, supported,
  5516. 10baseT_Full);
  5517. ethtool_link_ksettings_add_link_mode(cmd, advertising,
  5518. 10baseT_Full);
  5519. ethtool_link_ksettings_add_link_mode(cmd, supported,
  5520. 10baseT_Half);
  5521. ethtool_link_ksettings_add_link_mode(cmd, advertising,
  5522. 10baseT_Half);
  5523. WARN_ON_ONCE(1);
  5524. }
  5525. }
  5526. int qeth_core_ethtool_get_link_ksettings(struct net_device *netdev,
  5527. struct ethtool_link_ksettings *cmd)
  5528. {
  5529. struct qeth_card *card = netdev->ml_priv;
  5530. enum qeth_link_types link_type;
  5531. struct carrier_info carrier_info;
  5532. int rc;
  5533. if ((card->info.type == QETH_CARD_TYPE_IQD) || (card->info.guestlan))
  5534. link_type = QETH_LINK_TYPE_10GBIT_ETH;
  5535. else
  5536. link_type = card->info.link_type;
  5537. cmd->base.duplex = DUPLEX_FULL;
  5538. cmd->base.autoneg = AUTONEG_ENABLE;
  5539. cmd->base.phy_address = 0;
  5540. cmd->base.mdio_support = 0;
  5541. cmd->base.eth_tp_mdix = ETH_TP_MDI_INVALID;
  5542. cmd->base.eth_tp_mdix_ctrl = ETH_TP_MDI_INVALID;
  5543. switch (link_type) {
  5544. case QETH_LINK_TYPE_FAST_ETH:
  5545. case QETH_LINK_TYPE_LANE_ETH100:
  5546. cmd->base.speed = SPEED_100;
  5547. cmd->base.port = PORT_TP;
  5548. break;
  5549. case QETH_LINK_TYPE_GBIT_ETH:
  5550. case QETH_LINK_TYPE_LANE_ETH1000:
  5551. cmd->base.speed = SPEED_1000;
  5552. cmd->base.port = PORT_FIBRE;
  5553. break;
  5554. case QETH_LINK_TYPE_10GBIT_ETH:
  5555. cmd->base.speed = SPEED_10000;
  5556. cmd->base.port = PORT_FIBRE;
  5557. break;
  5558. case QETH_LINK_TYPE_25GBIT_ETH:
  5559. cmd->base.speed = SPEED_25000;
  5560. cmd->base.port = PORT_FIBRE;
  5561. break;
  5562. default:
  5563. cmd->base.speed = SPEED_10;
  5564. cmd->base.port = PORT_TP;
  5565. }
  5566. qeth_set_cmd_adv_sup(cmd, cmd->base.speed, cmd->base.port);
  5567. /* Check if we can obtain more accurate information. */
  5568. /* If QUERY_CARD_INFO command is not supported or fails, */
  5569. /* just return the heuristics that was filled above. */
  5570. if (!qeth_card_hw_is_reachable(card))
  5571. return -ENODEV;
  5572. rc = qeth_query_card_info(card, &carrier_info);
  5573. if (rc == -EOPNOTSUPP) /* for old hardware, return heuristic */
  5574. return 0;
  5575. if (rc) /* report error from the hardware operation */
  5576. return rc;
  5577. /* on success, fill in the information got from the hardware */
  5578. netdev_dbg(netdev,
  5579. "card info: card_type=0x%02x, port_mode=0x%04x, port_speed=0x%08x\n",
  5580. carrier_info.card_type,
  5581. carrier_info.port_mode,
  5582. carrier_info.port_speed);
  5583. /* Update attributes for which we've obtained more authoritative */
  5584. /* information, leave the rest the way they where filled above. */
  5585. switch (carrier_info.card_type) {
  5586. case CARD_INFO_TYPE_1G_COPPER_A:
  5587. case CARD_INFO_TYPE_1G_COPPER_B:
  5588. cmd->base.port = PORT_TP;
  5589. qeth_set_cmd_adv_sup(cmd, SPEED_1000, cmd->base.port);
  5590. break;
  5591. case CARD_INFO_TYPE_1G_FIBRE_A:
  5592. case CARD_INFO_TYPE_1G_FIBRE_B:
  5593. cmd->base.port = PORT_FIBRE;
  5594. qeth_set_cmd_adv_sup(cmd, SPEED_1000, cmd->base.port);
  5595. break;
  5596. case CARD_INFO_TYPE_10G_FIBRE_A:
  5597. case CARD_INFO_TYPE_10G_FIBRE_B:
  5598. cmd->base.port = PORT_FIBRE;
  5599. qeth_set_cmd_adv_sup(cmd, SPEED_10000, cmd->base.port);
  5600. break;
  5601. }
  5602. switch (carrier_info.port_mode) {
  5603. case CARD_INFO_PORTM_FULLDUPLEX:
  5604. cmd->base.duplex = DUPLEX_FULL;
  5605. break;
  5606. case CARD_INFO_PORTM_HALFDUPLEX:
  5607. cmd->base.duplex = DUPLEX_HALF;
  5608. break;
  5609. }
  5610. switch (carrier_info.port_speed) {
  5611. case CARD_INFO_PORTS_10M:
  5612. cmd->base.speed = SPEED_10;
  5613. break;
  5614. case CARD_INFO_PORTS_100M:
  5615. cmd->base.speed = SPEED_100;
  5616. break;
  5617. case CARD_INFO_PORTS_1G:
  5618. cmd->base.speed = SPEED_1000;
  5619. break;
  5620. case CARD_INFO_PORTS_10G:
  5621. cmd->base.speed = SPEED_10000;
  5622. break;
  5623. case CARD_INFO_PORTS_25G:
  5624. cmd->base.speed = SPEED_25000;
  5625. break;
  5626. }
  5627. return 0;
  5628. }
  5629. EXPORT_SYMBOL_GPL(qeth_core_ethtool_get_link_ksettings);
  5630. /* Callback to handle checksum offload command reply from OSA card.
  5631. * Verify that required features have been enabled on the card.
  5632. * Return error in hdr->return_code as this value is checked by caller.
  5633. *
  5634. * Always returns zero to indicate no further messages from the OSA card.
  5635. */
  5636. static int qeth_ipa_checksum_run_cmd_cb(struct qeth_card *card,
  5637. struct qeth_reply *reply,
  5638. unsigned long data)
  5639. {
  5640. struct qeth_ipa_cmd *cmd = (struct qeth_ipa_cmd *) data;
  5641. struct qeth_checksum_cmd *chksum_cb =
  5642. (struct qeth_checksum_cmd *)reply->param;
  5643. QETH_CARD_TEXT(card, 4, "chkdoccb");
  5644. if (qeth_setassparms_inspect_rc(cmd))
  5645. return 0;
  5646. memset(chksum_cb, 0, sizeof(*chksum_cb));
  5647. if (cmd->data.setassparms.hdr.command_code == IPA_CMD_ASS_START) {
  5648. chksum_cb->supported =
  5649. cmd->data.setassparms.data.chksum.supported;
  5650. QETH_CARD_TEXT_(card, 3, "strt:%x", chksum_cb->supported);
  5651. }
  5652. if (cmd->data.setassparms.hdr.command_code == IPA_CMD_ASS_ENABLE) {
  5653. chksum_cb->supported =
  5654. cmd->data.setassparms.data.chksum.supported;
  5655. chksum_cb->enabled =
  5656. cmd->data.setassparms.data.chksum.enabled;
  5657. QETH_CARD_TEXT_(card, 3, "supp:%x", chksum_cb->supported);
  5658. QETH_CARD_TEXT_(card, 3, "enab:%x", chksum_cb->enabled);
  5659. }
  5660. return 0;
  5661. }
  5662. /* Send command to OSA card and check results. */
  5663. static int qeth_ipa_checksum_run_cmd(struct qeth_card *card,
  5664. enum qeth_ipa_funcs ipa_func,
  5665. __u16 cmd_code, long data,
  5666. struct qeth_checksum_cmd *chksum_cb,
  5667. enum qeth_prot_versions prot)
  5668. {
  5669. struct qeth_cmd_buffer *iob;
  5670. int rc = -ENOMEM;
  5671. QETH_CARD_TEXT(card, 4, "chkdocmd");
  5672. iob = qeth_get_setassparms_cmd(card, ipa_func, cmd_code,
  5673. sizeof(__u32), prot);
  5674. if (iob)
  5675. rc = qeth_send_setassparms(card, iob, sizeof(__u32), data,
  5676. qeth_ipa_checksum_run_cmd_cb,
  5677. chksum_cb);
  5678. return rc;
  5679. }
  5680. static int qeth_send_checksum_on(struct qeth_card *card, int cstype,
  5681. enum qeth_prot_versions prot)
  5682. {
  5683. u32 required_features = QETH_IPA_CHECKSUM_UDP | QETH_IPA_CHECKSUM_TCP;
  5684. struct qeth_checksum_cmd chksum_cb;
  5685. int rc;
  5686. if (prot == QETH_PROT_IPV4)
  5687. required_features |= QETH_IPA_CHECKSUM_IP_HDR;
  5688. rc = qeth_ipa_checksum_run_cmd(card, cstype, IPA_CMD_ASS_START, 0,
  5689. &chksum_cb, prot);
  5690. if (!rc) {
  5691. if ((required_features & chksum_cb.supported) !=
  5692. required_features)
  5693. rc = -EIO;
  5694. else if (!(QETH_IPA_CHECKSUM_LP2LP & chksum_cb.supported) &&
  5695. cstype == IPA_INBOUND_CHECKSUM)
  5696. dev_warn(&card->gdev->dev,
  5697. "Hardware checksumming is performed only if %s and its peer use different OSA Express 3 ports\n",
  5698. QETH_CARD_IFNAME(card));
  5699. }
  5700. if (rc) {
  5701. qeth_send_simple_setassparms_prot(card, cstype,
  5702. IPA_CMD_ASS_STOP, 0, prot);
  5703. dev_warn(&card->gdev->dev,
  5704. "Starting HW IPv%d checksumming for %s failed, using SW checksumming\n",
  5705. prot, QETH_CARD_IFNAME(card));
  5706. return rc;
  5707. }
  5708. rc = qeth_ipa_checksum_run_cmd(card, cstype, IPA_CMD_ASS_ENABLE,
  5709. chksum_cb.supported, &chksum_cb,
  5710. prot);
  5711. if (!rc) {
  5712. if ((required_features & chksum_cb.enabled) !=
  5713. required_features)
  5714. rc = -EIO;
  5715. }
  5716. if (rc) {
  5717. qeth_send_simple_setassparms_prot(card, cstype,
  5718. IPA_CMD_ASS_STOP, 0, prot);
  5719. dev_warn(&card->gdev->dev,
  5720. "Enabling HW IPv%d checksumming for %s failed, using SW checksumming\n",
  5721. prot, QETH_CARD_IFNAME(card));
  5722. return rc;
  5723. }
  5724. dev_info(&card->gdev->dev, "HW Checksumming (%sbound IPv%d) enabled\n",
  5725. cstype == IPA_INBOUND_CHECKSUM ? "in" : "out", prot);
  5726. return 0;
  5727. }
  5728. static int qeth_set_ipa_csum(struct qeth_card *card, bool on, int cstype,
  5729. enum qeth_prot_versions prot)
  5730. {
  5731. int rc = (on) ? qeth_send_checksum_on(card, cstype, prot)
  5732. : qeth_send_simple_setassparms_prot(card, cstype,
  5733. IPA_CMD_ASS_STOP, 0,
  5734. prot);
  5735. return rc ? -EIO : 0;
  5736. }
  5737. static int qeth_start_tso_cb(struct qeth_card *card, struct qeth_reply *reply,
  5738. unsigned long data)
  5739. {
  5740. struct qeth_ipa_cmd *cmd = (struct qeth_ipa_cmd *) data;
  5741. struct qeth_tso_start_data *tso_data = reply->param;
  5742. if (qeth_setassparms_inspect_rc(cmd))
  5743. return 0;
  5744. tso_data->mss = cmd->data.setassparms.data.tso.mss;
  5745. tso_data->supported = cmd->data.setassparms.data.tso.supported;
  5746. return 0;
  5747. }
  5748. static int qeth_set_tso_off(struct qeth_card *card,
  5749. enum qeth_prot_versions prot)
  5750. {
  5751. return qeth_send_simple_setassparms_prot(card, IPA_OUTBOUND_TSO,
  5752. IPA_CMD_ASS_STOP, 0, prot);
  5753. }
  5754. static int qeth_set_tso_on(struct qeth_card *card,
  5755. enum qeth_prot_versions prot)
  5756. {
  5757. struct qeth_tso_start_data tso_data;
  5758. struct qeth_cmd_buffer *iob;
  5759. struct qeth_ipa_caps caps;
  5760. int rc;
  5761. iob = qeth_get_setassparms_cmd(card, IPA_OUTBOUND_TSO,
  5762. IPA_CMD_ASS_START, 0, prot);
  5763. if (!iob)
  5764. return -ENOMEM;
  5765. rc = qeth_send_setassparms(card, iob, 0, 0 /* unused */,
  5766. qeth_start_tso_cb, &tso_data);
  5767. if (rc)
  5768. return rc;
  5769. if (!tso_data.mss || !(tso_data.supported & QETH_IPA_LARGE_SEND_TCP)) {
  5770. qeth_set_tso_off(card, prot);
  5771. return -EOPNOTSUPP;
  5772. }
  5773. iob = qeth_get_setassparms_cmd(card, IPA_OUTBOUND_TSO,
  5774. IPA_CMD_ASS_ENABLE, sizeof(caps), prot);
  5775. if (!iob) {
  5776. qeth_set_tso_off(card, prot);
  5777. return -ENOMEM;
  5778. }
  5779. /* enable TSO capability */
  5780. caps.supported = 0;
  5781. caps.enabled = QETH_IPA_LARGE_SEND_TCP;
  5782. rc = qeth_send_setassparms(card, iob, sizeof(caps), (long) &caps,
  5783. qeth_setassparms_get_caps_cb, &caps);
  5784. if (rc) {
  5785. qeth_set_tso_off(card, prot);
  5786. return rc;
  5787. }
  5788. if (!qeth_ipa_caps_supported(&caps, QETH_IPA_LARGE_SEND_TCP) ||
  5789. !qeth_ipa_caps_enabled(&caps, QETH_IPA_LARGE_SEND_TCP)) {
  5790. qeth_set_tso_off(card, prot);
  5791. return -EOPNOTSUPP;
  5792. }
  5793. dev_info(&card->gdev->dev, "TSOv%u enabled (MSS: %u)\n", prot,
  5794. tso_data.mss);
  5795. return 0;
  5796. }
  5797. static int qeth_set_ipa_tso(struct qeth_card *card, bool on,
  5798. enum qeth_prot_versions prot)
  5799. {
  5800. int rc = on ? qeth_set_tso_on(card, prot) :
  5801. qeth_set_tso_off(card, prot);
  5802. return rc ? -EIO : 0;
  5803. }
  5804. static int qeth_set_ipa_rx_csum(struct qeth_card *card, bool on)
  5805. {
  5806. int rc_ipv4 = (on) ? -EOPNOTSUPP : 0;
  5807. int rc_ipv6;
  5808. if (qeth_is_supported(card, IPA_INBOUND_CHECKSUM))
  5809. rc_ipv4 = qeth_set_ipa_csum(card, on, IPA_INBOUND_CHECKSUM,
  5810. QETH_PROT_IPV4);
  5811. if (!qeth_is_supported6(card, IPA_INBOUND_CHECKSUM_V6))
  5812. /* no/one Offload Assist available, so the rc is trivial */
  5813. return rc_ipv4;
  5814. rc_ipv6 = qeth_set_ipa_csum(card, on, IPA_INBOUND_CHECKSUM,
  5815. QETH_PROT_IPV6);
  5816. if (on)
  5817. /* enable: success if any Assist is active */
  5818. return (rc_ipv6) ? rc_ipv4 : 0;
  5819. /* disable: failure if any Assist is still active */
  5820. return (rc_ipv6) ? rc_ipv6 : rc_ipv4;
  5821. }
  5822. #define QETH_HW_FEATURES (NETIF_F_RXCSUM | NETIF_F_IP_CSUM | NETIF_F_TSO | \
  5823. NETIF_F_IPV6_CSUM | NETIF_F_TSO6)
  5824. /**
  5825. * qeth_enable_hw_features() - (Re-)Enable HW functions for device features
  5826. * @dev: a net_device
  5827. */
  5828. void qeth_enable_hw_features(struct net_device *dev)
  5829. {
  5830. struct qeth_card *card = dev->ml_priv;
  5831. netdev_features_t features;
  5832. rtnl_lock();
  5833. features = dev->features;
  5834. /* force-off any feature that needs an IPA sequence.
  5835. * netdev_update_features() will restart them.
  5836. */
  5837. dev->features &= ~QETH_HW_FEATURES;
  5838. netdev_update_features(dev);
  5839. if (features != dev->features)
  5840. dev_warn(&card->gdev->dev,
  5841. "Device recovery failed to restore all offload features\n");
  5842. rtnl_unlock();
  5843. }
  5844. EXPORT_SYMBOL_GPL(qeth_enable_hw_features);
  5845. int qeth_set_features(struct net_device *dev, netdev_features_t features)
  5846. {
  5847. struct qeth_card *card = dev->ml_priv;
  5848. netdev_features_t changed = dev->features ^ features;
  5849. int rc = 0;
  5850. QETH_DBF_TEXT(SETUP, 2, "setfeat");
  5851. QETH_DBF_HEX(SETUP, 2, &features, sizeof(features));
  5852. if ((changed & NETIF_F_IP_CSUM)) {
  5853. rc = qeth_set_ipa_csum(card, features & NETIF_F_IP_CSUM,
  5854. IPA_OUTBOUND_CHECKSUM, QETH_PROT_IPV4);
  5855. if (rc)
  5856. changed ^= NETIF_F_IP_CSUM;
  5857. }
  5858. if (changed & NETIF_F_IPV6_CSUM) {
  5859. rc = qeth_set_ipa_csum(card, features & NETIF_F_IPV6_CSUM,
  5860. IPA_OUTBOUND_CHECKSUM, QETH_PROT_IPV6);
  5861. if (rc)
  5862. changed ^= NETIF_F_IPV6_CSUM;
  5863. }
  5864. if (changed & NETIF_F_RXCSUM) {
  5865. rc = qeth_set_ipa_rx_csum(card, features & NETIF_F_RXCSUM);
  5866. if (rc)
  5867. changed ^= NETIF_F_RXCSUM;
  5868. }
  5869. if (changed & NETIF_F_TSO) {
  5870. rc = qeth_set_ipa_tso(card, features & NETIF_F_TSO,
  5871. QETH_PROT_IPV4);
  5872. if (rc)
  5873. changed ^= NETIF_F_TSO;
  5874. }
  5875. if (changed & NETIF_F_TSO6) {
  5876. rc = qeth_set_ipa_tso(card, features & NETIF_F_TSO6,
  5877. QETH_PROT_IPV6);
  5878. if (rc)
  5879. changed ^= NETIF_F_TSO6;
  5880. }
  5881. /* everything changed successfully? */
  5882. if ((dev->features ^ features) == changed)
  5883. return 0;
  5884. /* something went wrong. save changed features and return error */
  5885. dev->features ^= changed;
  5886. return -EIO;
  5887. }
  5888. EXPORT_SYMBOL_GPL(qeth_set_features);
  5889. netdev_features_t qeth_fix_features(struct net_device *dev,
  5890. netdev_features_t features)
  5891. {
  5892. struct qeth_card *card = dev->ml_priv;
  5893. QETH_DBF_TEXT(SETUP, 2, "fixfeat");
  5894. if (!qeth_is_supported(card, IPA_OUTBOUND_CHECKSUM))
  5895. features &= ~NETIF_F_IP_CSUM;
  5896. if (!qeth_is_supported6(card, IPA_OUTBOUND_CHECKSUM_V6))
  5897. features &= ~NETIF_F_IPV6_CSUM;
  5898. if (!qeth_is_supported(card, IPA_INBOUND_CHECKSUM) &&
  5899. !qeth_is_supported6(card, IPA_INBOUND_CHECKSUM_V6))
  5900. features &= ~NETIF_F_RXCSUM;
  5901. if (!qeth_is_supported(card, IPA_OUTBOUND_TSO))
  5902. features &= ~NETIF_F_TSO;
  5903. if (!qeth_is_supported6(card, IPA_OUTBOUND_TSO))
  5904. features &= ~NETIF_F_TSO6;
  5905. /* if the card isn't up, remove features that require hw changes */
  5906. if (card->state == CARD_STATE_DOWN ||
  5907. card->state == CARD_STATE_RECOVER)
  5908. features &= ~QETH_HW_FEATURES;
  5909. QETH_DBF_HEX(SETUP, 2, &features, sizeof(features));
  5910. return features;
  5911. }
  5912. EXPORT_SYMBOL_GPL(qeth_fix_features);
  5913. netdev_features_t qeth_features_check(struct sk_buff *skb,
  5914. struct net_device *dev,
  5915. netdev_features_t features)
  5916. {
  5917. /* GSO segmentation builds skbs with
  5918. * a (small) linear part for the headers, and
  5919. * page frags for the data.
  5920. * Compared to a linear skb, the header-only part consumes an
  5921. * additional buffer element. This reduces buffer utilization, and
  5922. * hurts throughput. So compress small segments into one element.
  5923. */
  5924. if (netif_needs_gso(skb, features)) {
  5925. /* match skb_segment(): */
  5926. unsigned int doffset = skb->data - skb_mac_header(skb);
  5927. unsigned int hsize = skb_shinfo(skb)->gso_size;
  5928. unsigned int hroom = skb_headroom(skb);
  5929. /* linearize only if resulting skb allocations are order-0: */
  5930. if (SKB_DATA_ALIGN(hroom + doffset + hsize) <= SKB_MAX_HEAD(0))
  5931. features &= ~NETIF_F_SG;
  5932. }
  5933. return vlan_features_check(skb, features);
  5934. }
  5935. EXPORT_SYMBOL_GPL(qeth_features_check);
  5936. static int __init qeth_core_init(void)
  5937. {
  5938. int rc;
  5939. pr_info("loading core functions\n");
  5940. INIT_LIST_HEAD(&qeth_core_card_list.list);
  5941. rwlock_init(&qeth_core_card_list.rwlock);
  5942. qeth_wq = create_singlethread_workqueue("qeth_wq");
  5943. if (!qeth_wq) {
  5944. rc = -ENOMEM;
  5945. goto out_err;
  5946. }
  5947. rc = qeth_register_dbf_views();
  5948. if (rc)
  5949. goto dbf_err;
  5950. qeth_core_root_dev = root_device_register("qeth");
  5951. rc = PTR_ERR_OR_ZERO(qeth_core_root_dev);
  5952. if (rc)
  5953. goto register_err;
  5954. qeth_core_header_cache =
  5955. kmem_cache_create("qeth_hdr", QETH_HDR_CACHE_OBJ_SIZE,
  5956. roundup_pow_of_two(QETH_HDR_CACHE_OBJ_SIZE),
  5957. 0, NULL);
  5958. if (!qeth_core_header_cache) {
  5959. rc = -ENOMEM;
  5960. goto slab_err;
  5961. }
  5962. qeth_qdio_outbuf_cache = kmem_cache_create("qeth_buf",
  5963. sizeof(struct qeth_qdio_out_buffer), 0, 0, NULL);
  5964. if (!qeth_qdio_outbuf_cache) {
  5965. rc = -ENOMEM;
  5966. goto cqslab_err;
  5967. }
  5968. rc = ccw_driver_register(&qeth_ccw_driver);
  5969. if (rc)
  5970. goto ccw_err;
  5971. rc = ccwgroup_driver_register(&qeth_core_ccwgroup_driver);
  5972. if (rc)
  5973. goto ccwgroup_err;
  5974. return 0;
  5975. ccwgroup_err:
  5976. ccw_driver_unregister(&qeth_ccw_driver);
  5977. ccw_err:
  5978. kmem_cache_destroy(qeth_qdio_outbuf_cache);
  5979. cqslab_err:
  5980. kmem_cache_destroy(qeth_core_header_cache);
  5981. slab_err:
  5982. root_device_unregister(qeth_core_root_dev);
  5983. register_err:
  5984. qeth_unregister_dbf_views();
  5985. dbf_err:
  5986. destroy_workqueue(qeth_wq);
  5987. out_err:
  5988. pr_err("Initializing the qeth device driver failed\n");
  5989. return rc;
  5990. }
  5991. static void __exit qeth_core_exit(void)
  5992. {
  5993. qeth_clear_dbf_list();
  5994. destroy_workqueue(qeth_wq);
  5995. ccwgroup_driver_unregister(&qeth_core_ccwgroup_driver);
  5996. ccw_driver_unregister(&qeth_ccw_driver);
  5997. kmem_cache_destroy(qeth_qdio_outbuf_cache);
  5998. kmem_cache_destroy(qeth_core_header_cache);
  5999. root_device_unregister(qeth_core_root_dev);
  6000. qeth_unregister_dbf_views();
  6001. pr_info("core functions removed\n");
  6002. }
  6003. module_init(qeth_core_init);
  6004. module_exit(qeth_core_exit);
  6005. MODULE_AUTHOR("Frank Blaschka <frank.blaschka@de.ibm.com>");
  6006. MODULE_DESCRIPTION("qeth core functions");
  6007. MODULE_LICENSE("GPL");