qdio_main.c 45 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * Linux for s390 qdio support, buffer handling, qdio API and module support.
  4. *
  5. * Copyright IBM Corp. 2000, 2008
  6. * Author(s): Utz Bacher <utz.bacher@de.ibm.com>
  7. * Jan Glauber <jang@linux.vnet.ibm.com>
  8. * 2.6 cio integration by Cornelia Huck <cornelia.huck@de.ibm.com>
  9. */
  10. #include <linux/module.h>
  11. #include <linux/init.h>
  12. #include <linux/kernel.h>
  13. #include <linux/timer.h>
  14. #include <linux/delay.h>
  15. #include <linux/gfp.h>
  16. #include <linux/io.h>
  17. #include <linux/atomic.h>
  18. #include <asm/debug.h>
  19. #include <asm/qdio.h>
  20. #include <asm/ipl.h>
  21. #include "cio.h"
  22. #include "css.h"
  23. #include "device.h"
  24. #include "qdio.h"
  25. #include "qdio_debug.h"
  26. MODULE_AUTHOR("Utz Bacher <utz.bacher@de.ibm.com>,"\
  27. "Jan Glauber <jang@linux.vnet.ibm.com>");
  28. MODULE_DESCRIPTION("QDIO base support");
  29. MODULE_LICENSE("GPL");
  30. static inline int do_siga_sync(unsigned long schid,
  31. unsigned int out_mask, unsigned int in_mask,
  32. unsigned int fc)
  33. {
  34. register unsigned long __fc asm ("0") = fc;
  35. register unsigned long __schid asm ("1") = schid;
  36. register unsigned long out asm ("2") = out_mask;
  37. register unsigned long in asm ("3") = in_mask;
  38. int cc;
  39. asm volatile(
  40. " siga 0\n"
  41. " ipm %0\n"
  42. " srl %0,28\n"
  43. : "=d" (cc)
  44. : "d" (__fc), "d" (__schid), "d" (out), "d" (in) : "cc");
  45. return cc;
  46. }
  47. static inline int do_siga_input(unsigned long schid, unsigned int mask,
  48. unsigned int fc)
  49. {
  50. register unsigned long __fc asm ("0") = fc;
  51. register unsigned long __schid asm ("1") = schid;
  52. register unsigned long __mask asm ("2") = mask;
  53. int cc;
  54. asm volatile(
  55. " siga 0\n"
  56. " ipm %0\n"
  57. " srl %0,28\n"
  58. : "=d" (cc)
  59. : "d" (__fc), "d" (__schid), "d" (__mask) : "cc");
  60. return cc;
  61. }
  62. /**
  63. * do_siga_output - perform SIGA-w/wt function
  64. * @schid: subchannel id or in case of QEBSM the subchannel token
  65. * @mask: which output queues to process
  66. * @bb: busy bit indicator, set only if SIGA-w/wt could not access a buffer
  67. * @fc: function code to perform
  68. * @aob: asynchronous operation block
  69. *
  70. * Returns condition code.
  71. * Note: For IQDC unicast queues only the highest priority queue is processed.
  72. */
  73. static inline int do_siga_output(unsigned long schid, unsigned long mask,
  74. unsigned int *bb, unsigned int fc,
  75. unsigned long aob)
  76. {
  77. register unsigned long __fc asm("0") = fc;
  78. register unsigned long __schid asm("1") = schid;
  79. register unsigned long __mask asm("2") = mask;
  80. register unsigned long __aob asm("3") = aob;
  81. int cc;
  82. asm volatile(
  83. " siga 0\n"
  84. " ipm %0\n"
  85. " srl %0,28\n"
  86. : "=d" (cc), "+d" (__fc), "+d" (__aob)
  87. : "d" (__schid), "d" (__mask)
  88. : "cc");
  89. *bb = __fc >> 31;
  90. return cc;
  91. }
  92. /**
  93. * qdio_do_eqbs - extract buffer states for QEBSM
  94. * @q: queue to manipulate
  95. * @state: state of the extracted buffers
  96. * @start: buffer number to start at
  97. * @count: count of buffers to examine
  98. * @auto_ack: automatically acknowledge buffers
  99. *
  100. * Returns the number of successfully extracted equal buffer states.
  101. * Stops processing if a state is different from the last buffers state.
  102. */
  103. static int qdio_do_eqbs(struct qdio_q *q, unsigned char *state,
  104. int start, int count, int auto_ack)
  105. {
  106. int tmp_count = count, tmp_start = start, nr = q->nr;
  107. unsigned int ccq = 0;
  108. qperf_inc(q, eqbs);
  109. if (!q->is_input_q)
  110. nr += q->irq_ptr->nr_input_qs;
  111. again:
  112. ccq = do_eqbs(q->irq_ptr->sch_token, state, nr, &tmp_start, &tmp_count,
  113. auto_ack);
  114. switch (ccq) {
  115. case 0:
  116. case 32:
  117. /* all done, or next buffer state different */
  118. return count - tmp_count;
  119. case 96:
  120. /* not all buffers processed */
  121. qperf_inc(q, eqbs_partial);
  122. DBF_DEV_EVENT(DBF_WARN, q->irq_ptr, "EQBS part:%02x",
  123. tmp_count);
  124. return count - tmp_count;
  125. case 97:
  126. /* no buffer processed */
  127. DBF_DEV_EVENT(DBF_WARN, q->irq_ptr, "EQBS again:%2d", ccq);
  128. goto again;
  129. default:
  130. DBF_ERROR("%4x ccq:%3d", SCH_NO(q), ccq);
  131. DBF_ERROR("%4x EQBS ERROR", SCH_NO(q));
  132. DBF_ERROR("%3d%3d%2d", count, tmp_count, nr);
  133. q->handler(q->irq_ptr->cdev, QDIO_ERROR_GET_BUF_STATE, q->nr,
  134. q->first_to_kick, count, q->irq_ptr->int_parm);
  135. return 0;
  136. }
  137. }
  138. /**
  139. * qdio_do_sqbs - set buffer states for QEBSM
  140. * @q: queue to manipulate
  141. * @state: new state of the buffers
  142. * @start: first buffer number to change
  143. * @count: how many buffers to change
  144. *
  145. * Returns the number of successfully changed buffers.
  146. * Does retrying until the specified count of buffer states is set or an
  147. * error occurs.
  148. */
  149. static int qdio_do_sqbs(struct qdio_q *q, unsigned char state, int start,
  150. int count)
  151. {
  152. unsigned int ccq = 0;
  153. int tmp_count = count, tmp_start = start;
  154. int nr = q->nr;
  155. if (!count)
  156. return 0;
  157. qperf_inc(q, sqbs);
  158. if (!q->is_input_q)
  159. nr += q->irq_ptr->nr_input_qs;
  160. again:
  161. ccq = do_sqbs(q->irq_ptr->sch_token, state, nr, &tmp_start, &tmp_count);
  162. switch (ccq) {
  163. case 0:
  164. case 32:
  165. /* all done, or active buffer adapter-owned */
  166. WARN_ON_ONCE(tmp_count);
  167. return count - tmp_count;
  168. case 96:
  169. /* not all buffers processed */
  170. DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "SQBS again:%2d", ccq);
  171. qperf_inc(q, sqbs_partial);
  172. goto again;
  173. default:
  174. DBF_ERROR("%4x ccq:%3d", SCH_NO(q), ccq);
  175. DBF_ERROR("%4x SQBS ERROR", SCH_NO(q));
  176. DBF_ERROR("%3d%3d%2d", count, tmp_count, nr);
  177. q->handler(q->irq_ptr->cdev, QDIO_ERROR_SET_BUF_STATE, q->nr,
  178. q->first_to_kick, count, q->irq_ptr->int_parm);
  179. return 0;
  180. }
  181. }
  182. /*
  183. * Returns number of examined buffers and their common state in *state.
  184. * Requested number of buffers-to-examine must be > 0.
  185. */
  186. static inline int get_buf_states(struct qdio_q *q, unsigned int bufnr,
  187. unsigned char *state, unsigned int count,
  188. int auto_ack, int merge_pending)
  189. {
  190. unsigned char __state = 0;
  191. int i;
  192. if (is_qebsm(q))
  193. return qdio_do_eqbs(q, state, bufnr, count, auto_ack);
  194. /* get initial state: */
  195. __state = q->slsb.val[bufnr];
  196. if (merge_pending && __state == SLSB_P_OUTPUT_PENDING)
  197. __state = SLSB_P_OUTPUT_EMPTY;
  198. for (i = 1; i < count; i++) {
  199. bufnr = next_buf(bufnr);
  200. /* merge PENDING into EMPTY: */
  201. if (merge_pending &&
  202. q->slsb.val[bufnr] == SLSB_P_OUTPUT_PENDING &&
  203. __state == SLSB_P_OUTPUT_EMPTY)
  204. continue;
  205. /* stop if next state differs from initial state: */
  206. if (q->slsb.val[bufnr] != __state)
  207. break;
  208. }
  209. *state = __state;
  210. return i;
  211. }
  212. static inline int get_buf_state(struct qdio_q *q, unsigned int bufnr,
  213. unsigned char *state, int auto_ack)
  214. {
  215. return get_buf_states(q, bufnr, state, 1, auto_ack, 0);
  216. }
  217. /* wrap-around safe setting of slsb states, returns number of changed buffers */
  218. static inline int set_buf_states(struct qdio_q *q, int bufnr,
  219. unsigned char state, int count)
  220. {
  221. int i;
  222. if (is_qebsm(q))
  223. return qdio_do_sqbs(q, state, bufnr, count);
  224. for (i = 0; i < count; i++) {
  225. xchg(&q->slsb.val[bufnr], state);
  226. bufnr = next_buf(bufnr);
  227. }
  228. return count;
  229. }
  230. static inline int set_buf_state(struct qdio_q *q, int bufnr,
  231. unsigned char state)
  232. {
  233. return set_buf_states(q, bufnr, state, 1);
  234. }
  235. /* set slsb states to initial state */
  236. static void qdio_init_buf_states(struct qdio_irq *irq_ptr)
  237. {
  238. struct qdio_q *q;
  239. int i;
  240. for_each_input_queue(irq_ptr, q, i)
  241. set_buf_states(q, 0, SLSB_P_INPUT_NOT_INIT,
  242. QDIO_MAX_BUFFERS_PER_Q);
  243. for_each_output_queue(irq_ptr, q, i)
  244. set_buf_states(q, 0, SLSB_P_OUTPUT_NOT_INIT,
  245. QDIO_MAX_BUFFERS_PER_Q);
  246. }
  247. static inline int qdio_siga_sync(struct qdio_q *q, unsigned int output,
  248. unsigned int input)
  249. {
  250. unsigned long schid = *((u32 *) &q->irq_ptr->schid);
  251. unsigned int fc = QDIO_SIGA_SYNC;
  252. int cc;
  253. DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "siga-s:%1d", q->nr);
  254. qperf_inc(q, siga_sync);
  255. if (is_qebsm(q)) {
  256. schid = q->irq_ptr->sch_token;
  257. fc |= QDIO_SIGA_QEBSM_FLAG;
  258. }
  259. cc = do_siga_sync(schid, output, input, fc);
  260. if (unlikely(cc))
  261. DBF_ERROR("%4x SIGA-S:%2d", SCH_NO(q), cc);
  262. return (cc) ? -EIO : 0;
  263. }
  264. static inline int qdio_siga_sync_q(struct qdio_q *q)
  265. {
  266. if (q->is_input_q)
  267. return qdio_siga_sync(q, 0, q->mask);
  268. else
  269. return qdio_siga_sync(q, q->mask, 0);
  270. }
  271. static int qdio_siga_output(struct qdio_q *q, unsigned int *busy_bit,
  272. unsigned long aob)
  273. {
  274. unsigned long schid = *((u32 *) &q->irq_ptr->schid);
  275. unsigned int fc = QDIO_SIGA_WRITE;
  276. u64 start_time = 0;
  277. int retries = 0, cc;
  278. unsigned long laob = 0;
  279. WARN_ON_ONCE(aob && ((queue_type(q) != QDIO_IQDIO_QFMT) ||
  280. !q->u.out.use_cq));
  281. if (q->u.out.use_cq && aob != 0) {
  282. fc = QDIO_SIGA_WRITEQ;
  283. laob = aob;
  284. }
  285. if (is_qebsm(q)) {
  286. schid = q->irq_ptr->sch_token;
  287. fc |= QDIO_SIGA_QEBSM_FLAG;
  288. }
  289. again:
  290. cc = do_siga_output(schid, q->mask, busy_bit, fc, laob);
  291. /* hipersocket busy condition */
  292. if (unlikely(*busy_bit)) {
  293. retries++;
  294. if (!start_time) {
  295. start_time = get_tod_clock_fast();
  296. goto again;
  297. }
  298. if (get_tod_clock_fast() - start_time < QDIO_BUSY_BIT_PATIENCE)
  299. goto again;
  300. }
  301. if (retries) {
  302. DBF_DEV_EVENT(DBF_WARN, q->irq_ptr,
  303. "%4x cc2 BB1:%1d", SCH_NO(q), q->nr);
  304. DBF_DEV_EVENT(DBF_WARN, q->irq_ptr, "count:%u", retries);
  305. }
  306. return cc;
  307. }
  308. static inline int qdio_siga_input(struct qdio_q *q)
  309. {
  310. unsigned long schid = *((u32 *) &q->irq_ptr->schid);
  311. unsigned int fc = QDIO_SIGA_READ;
  312. int cc;
  313. DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "siga-r:%1d", q->nr);
  314. qperf_inc(q, siga_read);
  315. if (is_qebsm(q)) {
  316. schid = q->irq_ptr->sch_token;
  317. fc |= QDIO_SIGA_QEBSM_FLAG;
  318. }
  319. cc = do_siga_input(schid, q->mask, fc);
  320. if (unlikely(cc))
  321. DBF_ERROR("%4x SIGA-R:%2d", SCH_NO(q), cc);
  322. return (cc) ? -EIO : 0;
  323. }
  324. #define qdio_siga_sync_out(q) qdio_siga_sync(q, ~0U, 0)
  325. #define qdio_siga_sync_all(q) qdio_siga_sync(q, ~0U, ~0U)
  326. static inline void qdio_sync_queues(struct qdio_q *q)
  327. {
  328. /* PCI capable outbound queues will also be scanned so sync them too */
  329. if (pci_out_supported(q))
  330. qdio_siga_sync_all(q);
  331. else
  332. qdio_siga_sync_q(q);
  333. }
  334. int debug_get_buf_state(struct qdio_q *q, unsigned int bufnr,
  335. unsigned char *state)
  336. {
  337. if (need_siga_sync(q))
  338. qdio_siga_sync_q(q);
  339. return get_buf_states(q, bufnr, state, 1, 0, 0);
  340. }
  341. static inline void qdio_stop_polling(struct qdio_q *q)
  342. {
  343. if (!q->u.in.polling)
  344. return;
  345. q->u.in.polling = 0;
  346. qperf_inc(q, stop_polling);
  347. /* show the card that we are not polling anymore */
  348. if (is_qebsm(q)) {
  349. set_buf_states(q, q->u.in.ack_start, SLSB_P_INPUT_NOT_INIT,
  350. q->u.in.ack_count);
  351. q->u.in.ack_count = 0;
  352. } else
  353. set_buf_state(q, q->u.in.ack_start, SLSB_P_INPUT_NOT_INIT);
  354. }
  355. static inline void account_sbals(struct qdio_q *q, unsigned int count)
  356. {
  357. int pos;
  358. q->q_stats.nr_sbal_total += count;
  359. if (count == QDIO_MAX_BUFFERS_MASK) {
  360. q->q_stats.nr_sbals[7]++;
  361. return;
  362. }
  363. pos = ilog2(count);
  364. q->q_stats.nr_sbals[pos]++;
  365. }
  366. static void process_buffer_error(struct qdio_q *q, int count)
  367. {
  368. unsigned char state = (q->is_input_q) ? SLSB_P_INPUT_NOT_INIT :
  369. SLSB_P_OUTPUT_NOT_INIT;
  370. q->qdio_error = QDIO_ERROR_SLSB_STATE;
  371. /* special handling for no target buffer empty */
  372. if (queue_type(q) == QDIO_IQDIO_QFMT && !q->is_input_q &&
  373. q->sbal[q->first_to_check]->element[15].sflags == 0x10) {
  374. qperf_inc(q, target_full);
  375. DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "OUTFULL FTC:%02x",
  376. q->first_to_check);
  377. goto set;
  378. }
  379. DBF_ERROR("%4x BUF ERROR", SCH_NO(q));
  380. DBF_ERROR((q->is_input_q) ? "IN:%2d" : "OUT:%2d", q->nr);
  381. DBF_ERROR("FTC:%3d C:%3d", q->first_to_check, count);
  382. DBF_ERROR("F14:%2x F15:%2x",
  383. q->sbal[q->first_to_check]->element[14].sflags,
  384. q->sbal[q->first_to_check]->element[15].sflags);
  385. set:
  386. /*
  387. * Interrupts may be avoided as long as the error is present
  388. * so change the buffer state immediately to avoid starvation.
  389. */
  390. set_buf_states(q, q->first_to_check, state, count);
  391. }
  392. static inline void inbound_primed(struct qdio_q *q, int count)
  393. {
  394. int new;
  395. DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "in prim:%1d %02x", q->nr, count);
  396. /* for QEBSM the ACK was already set by EQBS */
  397. if (is_qebsm(q)) {
  398. if (!q->u.in.polling) {
  399. q->u.in.polling = 1;
  400. q->u.in.ack_count = count;
  401. q->u.in.ack_start = q->first_to_check;
  402. return;
  403. }
  404. /* delete the previous ACK's */
  405. set_buf_states(q, q->u.in.ack_start, SLSB_P_INPUT_NOT_INIT,
  406. q->u.in.ack_count);
  407. q->u.in.ack_count = count;
  408. q->u.in.ack_start = q->first_to_check;
  409. return;
  410. }
  411. /*
  412. * ACK the newest buffer. The ACK will be removed in qdio_stop_polling
  413. * or by the next inbound run.
  414. */
  415. new = add_buf(q->first_to_check, count - 1);
  416. if (q->u.in.polling) {
  417. /* reset the previous ACK but first set the new one */
  418. set_buf_state(q, new, SLSB_P_INPUT_ACK);
  419. set_buf_state(q, q->u.in.ack_start, SLSB_P_INPUT_NOT_INIT);
  420. } else {
  421. q->u.in.polling = 1;
  422. set_buf_state(q, new, SLSB_P_INPUT_ACK);
  423. }
  424. q->u.in.ack_start = new;
  425. count--;
  426. if (!count)
  427. return;
  428. /* need to change ALL buffers to get more interrupts */
  429. set_buf_states(q, q->first_to_check, SLSB_P_INPUT_NOT_INIT, count);
  430. }
  431. static int get_inbound_buffer_frontier(struct qdio_q *q)
  432. {
  433. unsigned char state = 0;
  434. int count;
  435. q->timestamp = get_tod_clock_fast();
  436. /*
  437. * Don't check 128 buffers, as otherwise qdio_inbound_q_moved
  438. * would return 0.
  439. */
  440. count = min(atomic_read(&q->nr_buf_used), QDIO_MAX_BUFFERS_MASK);
  441. if (!count)
  442. goto out;
  443. /*
  444. * No siga sync here, as a PCI or we after a thin interrupt
  445. * already sync'ed the queues.
  446. */
  447. count = get_buf_states(q, q->first_to_check, &state, count, 1, 0);
  448. if (!count)
  449. goto out;
  450. switch (state) {
  451. case SLSB_P_INPUT_PRIMED:
  452. inbound_primed(q, count);
  453. q->first_to_check = add_buf(q->first_to_check, count);
  454. if (atomic_sub_return(count, &q->nr_buf_used) == 0)
  455. qperf_inc(q, inbound_queue_full);
  456. if (q->irq_ptr->perf_stat_enabled)
  457. account_sbals(q, count);
  458. break;
  459. case SLSB_P_INPUT_ERROR:
  460. process_buffer_error(q, count);
  461. q->first_to_check = add_buf(q->first_to_check, count);
  462. if (atomic_sub_return(count, &q->nr_buf_used) == 0)
  463. qperf_inc(q, inbound_queue_full);
  464. if (q->irq_ptr->perf_stat_enabled)
  465. account_sbals_error(q, count);
  466. break;
  467. case SLSB_CU_INPUT_EMPTY:
  468. case SLSB_P_INPUT_NOT_INIT:
  469. case SLSB_P_INPUT_ACK:
  470. if (q->irq_ptr->perf_stat_enabled)
  471. q->q_stats.nr_sbal_nop++;
  472. DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "in nop:%1d %#02x",
  473. q->nr, q->first_to_check);
  474. break;
  475. default:
  476. WARN_ON_ONCE(1);
  477. }
  478. out:
  479. return q->first_to_check;
  480. }
  481. static int qdio_inbound_q_moved(struct qdio_q *q)
  482. {
  483. int bufnr;
  484. bufnr = get_inbound_buffer_frontier(q);
  485. if (bufnr != q->last_move) {
  486. q->last_move = bufnr;
  487. if (!is_thinint_irq(q->irq_ptr) && MACHINE_IS_LPAR)
  488. q->u.in.timestamp = get_tod_clock();
  489. return 1;
  490. } else
  491. return 0;
  492. }
  493. static inline int qdio_inbound_q_done(struct qdio_q *q)
  494. {
  495. unsigned char state = 0;
  496. if (!atomic_read(&q->nr_buf_used))
  497. return 1;
  498. if (need_siga_sync(q))
  499. qdio_siga_sync_q(q);
  500. get_buf_state(q, q->first_to_check, &state, 0);
  501. if (state == SLSB_P_INPUT_PRIMED || state == SLSB_P_INPUT_ERROR)
  502. /* more work coming */
  503. return 0;
  504. if (is_thinint_irq(q->irq_ptr))
  505. return 1;
  506. /* don't poll under z/VM */
  507. if (MACHINE_IS_VM)
  508. return 1;
  509. /*
  510. * At this point we know, that inbound first_to_check
  511. * has (probably) not moved (see qdio_inbound_processing).
  512. */
  513. if (get_tod_clock_fast() > q->u.in.timestamp + QDIO_INPUT_THRESHOLD) {
  514. DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "in done:%02x",
  515. q->first_to_check);
  516. return 1;
  517. } else
  518. return 0;
  519. }
  520. static inline void qdio_handle_aobs(struct qdio_q *q, int start, int count)
  521. {
  522. unsigned char state = 0;
  523. int j, b = start;
  524. for (j = 0; j < count; ++j) {
  525. get_buf_state(q, b, &state, 0);
  526. if (state == SLSB_P_OUTPUT_PENDING) {
  527. struct qaob *aob = q->u.out.aobs[b];
  528. if (aob == NULL)
  529. continue;
  530. q->u.out.sbal_state[b].flags |=
  531. QDIO_OUTBUF_STATE_FLAG_PENDING;
  532. q->u.out.aobs[b] = NULL;
  533. }
  534. b = next_buf(b);
  535. }
  536. }
  537. static inline unsigned long qdio_aob_for_buffer(struct qdio_output_q *q,
  538. int bufnr)
  539. {
  540. unsigned long phys_aob = 0;
  541. if (!q->use_cq)
  542. return 0;
  543. if (!q->aobs[bufnr]) {
  544. struct qaob *aob = qdio_allocate_aob();
  545. q->aobs[bufnr] = aob;
  546. }
  547. if (q->aobs[bufnr]) {
  548. q->aobs[bufnr]->user1 = (u64) q->sbal_state[bufnr].user;
  549. phys_aob = virt_to_phys(q->aobs[bufnr]);
  550. WARN_ON_ONCE(phys_aob & 0xFF);
  551. }
  552. q->sbal_state[bufnr].flags = 0;
  553. return phys_aob;
  554. }
  555. static void qdio_kick_handler(struct qdio_q *q)
  556. {
  557. int start = q->first_to_kick;
  558. int end = q->first_to_check;
  559. int count;
  560. if (unlikely(q->irq_ptr->state != QDIO_IRQ_STATE_ACTIVE))
  561. return;
  562. count = sub_buf(end, start);
  563. if (q->is_input_q) {
  564. qperf_inc(q, inbound_handler);
  565. DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "kih s:%02x c:%02x", start, count);
  566. } else {
  567. qperf_inc(q, outbound_handler);
  568. DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "koh: s:%02x c:%02x",
  569. start, count);
  570. if (q->u.out.use_cq)
  571. qdio_handle_aobs(q, start, count);
  572. }
  573. q->handler(q->irq_ptr->cdev, q->qdio_error, q->nr, start, count,
  574. q->irq_ptr->int_parm);
  575. /* for the next time */
  576. q->first_to_kick = end;
  577. q->qdio_error = 0;
  578. }
  579. static inline int qdio_tasklet_schedule(struct qdio_q *q)
  580. {
  581. if (likely(q->irq_ptr->state == QDIO_IRQ_STATE_ACTIVE)) {
  582. tasklet_schedule(&q->tasklet);
  583. return 0;
  584. }
  585. return -EPERM;
  586. }
  587. static void __qdio_inbound_processing(struct qdio_q *q)
  588. {
  589. qperf_inc(q, tasklet_inbound);
  590. if (!qdio_inbound_q_moved(q))
  591. return;
  592. qdio_kick_handler(q);
  593. if (!qdio_inbound_q_done(q)) {
  594. /* means poll time is not yet over */
  595. qperf_inc(q, tasklet_inbound_resched);
  596. if (!qdio_tasklet_schedule(q))
  597. return;
  598. }
  599. qdio_stop_polling(q);
  600. /*
  601. * We need to check again to not lose initiative after
  602. * resetting the ACK state.
  603. */
  604. if (!qdio_inbound_q_done(q)) {
  605. qperf_inc(q, tasklet_inbound_resched2);
  606. qdio_tasklet_schedule(q);
  607. }
  608. }
  609. void qdio_inbound_processing(unsigned long data)
  610. {
  611. struct qdio_q *q = (struct qdio_q *)data;
  612. __qdio_inbound_processing(q);
  613. }
  614. static int get_outbound_buffer_frontier(struct qdio_q *q)
  615. {
  616. unsigned char state = 0;
  617. int count;
  618. q->timestamp = get_tod_clock_fast();
  619. if (need_siga_sync(q))
  620. if (((queue_type(q) != QDIO_IQDIO_QFMT) &&
  621. !pci_out_supported(q)) ||
  622. (queue_type(q) == QDIO_IQDIO_QFMT &&
  623. multicast_outbound(q)))
  624. qdio_siga_sync_q(q);
  625. /*
  626. * Don't check 128 buffers, as otherwise qdio_inbound_q_moved
  627. * would return 0.
  628. */
  629. count = min(atomic_read(&q->nr_buf_used), QDIO_MAX_BUFFERS_MASK);
  630. if (!count)
  631. goto out;
  632. count = get_buf_states(q, q->first_to_check, &state, count, 0,
  633. q->u.out.use_cq);
  634. if (!count)
  635. goto out;
  636. switch (state) {
  637. case SLSB_P_OUTPUT_EMPTY:
  638. /* the adapter got it */
  639. DBF_DEV_EVENT(DBF_INFO, q->irq_ptr,
  640. "out empty:%1d %02x", q->nr, count);
  641. atomic_sub(count, &q->nr_buf_used);
  642. q->first_to_check = add_buf(q->first_to_check, count);
  643. if (q->irq_ptr->perf_stat_enabled)
  644. account_sbals(q, count);
  645. break;
  646. case SLSB_P_OUTPUT_ERROR:
  647. process_buffer_error(q, count);
  648. q->first_to_check = add_buf(q->first_to_check, count);
  649. atomic_sub(count, &q->nr_buf_used);
  650. if (q->irq_ptr->perf_stat_enabled)
  651. account_sbals_error(q, count);
  652. break;
  653. case SLSB_CU_OUTPUT_PRIMED:
  654. /* the adapter has not fetched the output yet */
  655. if (q->irq_ptr->perf_stat_enabled)
  656. q->q_stats.nr_sbal_nop++;
  657. DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "out primed:%1d",
  658. q->nr);
  659. break;
  660. case SLSB_P_OUTPUT_NOT_INIT:
  661. case SLSB_P_OUTPUT_HALTED:
  662. break;
  663. default:
  664. WARN_ON_ONCE(1);
  665. }
  666. out:
  667. return q->first_to_check;
  668. }
  669. /* all buffers processed? */
  670. static inline int qdio_outbound_q_done(struct qdio_q *q)
  671. {
  672. return atomic_read(&q->nr_buf_used) == 0;
  673. }
  674. static inline int qdio_outbound_q_moved(struct qdio_q *q)
  675. {
  676. int bufnr;
  677. bufnr = get_outbound_buffer_frontier(q);
  678. if (bufnr != q->last_move) {
  679. q->last_move = bufnr;
  680. DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "out moved:%1d", q->nr);
  681. return 1;
  682. } else
  683. return 0;
  684. }
  685. static int qdio_kick_outbound_q(struct qdio_q *q, unsigned long aob)
  686. {
  687. int retries = 0, cc;
  688. unsigned int busy_bit;
  689. if (!need_siga_out(q))
  690. return 0;
  691. DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "siga-w:%1d", q->nr);
  692. retry:
  693. qperf_inc(q, siga_write);
  694. cc = qdio_siga_output(q, &busy_bit, aob);
  695. switch (cc) {
  696. case 0:
  697. break;
  698. case 2:
  699. if (busy_bit) {
  700. while (++retries < QDIO_BUSY_BIT_RETRIES) {
  701. mdelay(QDIO_BUSY_BIT_RETRY_DELAY);
  702. goto retry;
  703. }
  704. DBF_ERROR("%4x cc2 BBC:%1d", SCH_NO(q), q->nr);
  705. cc = -EBUSY;
  706. } else {
  707. DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "siga-w cc2:%1d", q->nr);
  708. cc = -ENOBUFS;
  709. }
  710. break;
  711. case 1:
  712. case 3:
  713. DBF_ERROR("%4x SIGA-W:%1d", SCH_NO(q), cc);
  714. cc = -EIO;
  715. break;
  716. }
  717. if (retries) {
  718. DBF_ERROR("%4x cc2 BB2:%1d", SCH_NO(q), q->nr);
  719. DBF_ERROR("count:%u", retries);
  720. }
  721. return cc;
  722. }
  723. static void __qdio_outbound_processing(struct qdio_q *q)
  724. {
  725. qperf_inc(q, tasklet_outbound);
  726. WARN_ON_ONCE(atomic_read(&q->nr_buf_used) < 0);
  727. if (qdio_outbound_q_moved(q))
  728. qdio_kick_handler(q);
  729. if (queue_type(q) == QDIO_ZFCP_QFMT)
  730. if (!pci_out_supported(q) && !qdio_outbound_q_done(q))
  731. goto sched;
  732. if (q->u.out.pci_out_enabled)
  733. return;
  734. /*
  735. * Now we know that queue type is either qeth without pci enabled
  736. * or HiperSockets. Make sure buffer switch from PRIMED to EMPTY
  737. * is noticed and outbound_handler is called after some time.
  738. */
  739. if (qdio_outbound_q_done(q))
  740. del_timer_sync(&q->u.out.timer);
  741. else
  742. if (!timer_pending(&q->u.out.timer) &&
  743. likely(q->irq_ptr->state == QDIO_IRQ_STATE_ACTIVE))
  744. mod_timer(&q->u.out.timer, jiffies + 10 * HZ);
  745. return;
  746. sched:
  747. qdio_tasklet_schedule(q);
  748. }
  749. /* outbound tasklet */
  750. void qdio_outbound_processing(unsigned long data)
  751. {
  752. struct qdio_q *q = (struct qdio_q *)data;
  753. __qdio_outbound_processing(q);
  754. }
  755. void qdio_outbound_timer(struct timer_list *t)
  756. {
  757. struct qdio_q *q = from_timer(q, t, u.out.timer);
  758. qdio_tasklet_schedule(q);
  759. }
  760. static inline void qdio_check_outbound_after_thinint(struct qdio_q *q)
  761. {
  762. struct qdio_q *out;
  763. int i;
  764. if (!pci_out_supported(q))
  765. return;
  766. for_each_output_queue(q->irq_ptr, out, i)
  767. if (!qdio_outbound_q_done(out))
  768. qdio_tasklet_schedule(out);
  769. }
  770. static void __tiqdio_inbound_processing(struct qdio_q *q)
  771. {
  772. qperf_inc(q, tasklet_inbound);
  773. if (need_siga_sync(q) && need_siga_sync_after_ai(q))
  774. qdio_sync_queues(q);
  775. /*
  776. * The interrupt could be caused by a PCI request. Check the
  777. * PCI capable outbound queues.
  778. */
  779. qdio_check_outbound_after_thinint(q);
  780. if (!qdio_inbound_q_moved(q))
  781. return;
  782. qdio_kick_handler(q);
  783. if (!qdio_inbound_q_done(q)) {
  784. qperf_inc(q, tasklet_inbound_resched);
  785. if (!qdio_tasklet_schedule(q))
  786. return;
  787. }
  788. qdio_stop_polling(q);
  789. /*
  790. * We need to check again to not lose initiative after
  791. * resetting the ACK state.
  792. */
  793. if (!qdio_inbound_q_done(q)) {
  794. qperf_inc(q, tasklet_inbound_resched2);
  795. qdio_tasklet_schedule(q);
  796. }
  797. }
  798. void tiqdio_inbound_processing(unsigned long data)
  799. {
  800. struct qdio_q *q = (struct qdio_q *)data;
  801. __tiqdio_inbound_processing(q);
  802. }
  803. static inline void qdio_set_state(struct qdio_irq *irq_ptr,
  804. enum qdio_irq_states state)
  805. {
  806. DBF_DEV_EVENT(DBF_INFO, irq_ptr, "newstate: %1d", state);
  807. irq_ptr->state = state;
  808. mb();
  809. }
  810. static void qdio_irq_check_sense(struct qdio_irq *irq_ptr, struct irb *irb)
  811. {
  812. if (irb->esw.esw0.erw.cons) {
  813. DBF_ERROR("%4x sense:", irq_ptr->schid.sch_no);
  814. DBF_ERROR_HEX(irb, 64);
  815. DBF_ERROR_HEX(irb->ecw, 64);
  816. }
  817. }
  818. /* PCI interrupt handler */
  819. static void qdio_int_handler_pci(struct qdio_irq *irq_ptr)
  820. {
  821. int i;
  822. struct qdio_q *q;
  823. if (unlikely(irq_ptr->state != QDIO_IRQ_STATE_ACTIVE))
  824. return;
  825. for_each_input_queue(irq_ptr, q, i) {
  826. if (q->u.in.queue_start_poll) {
  827. /* skip if polling is enabled or already in work */
  828. if (test_and_set_bit(QDIO_QUEUE_IRQS_DISABLED,
  829. &q->u.in.queue_irq_state)) {
  830. qperf_inc(q, int_discarded);
  831. continue;
  832. }
  833. q->u.in.queue_start_poll(q->irq_ptr->cdev, q->nr,
  834. q->irq_ptr->int_parm);
  835. } else {
  836. tasklet_schedule(&q->tasklet);
  837. }
  838. }
  839. if (!(irq_ptr->qib.ac & QIB_AC_OUTBOUND_PCI_SUPPORTED))
  840. return;
  841. for_each_output_queue(irq_ptr, q, i) {
  842. if (qdio_outbound_q_done(q))
  843. continue;
  844. if (need_siga_sync(q) && need_siga_sync_out_after_pci(q))
  845. qdio_siga_sync_q(q);
  846. qdio_tasklet_schedule(q);
  847. }
  848. }
  849. static void qdio_handle_activate_check(struct ccw_device *cdev,
  850. unsigned long intparm, int cstat, int dstat)
  851. {
  852. struct qdio_irq *irq_ptr = cdev->private->qdio_data;
  853. struct qdio_q *q;
  854. int count;
  855. DBF_ERROR("%4x ACT CHECK", irq_ptr->schid.sch_no);
  856. DBF_ERROR("intp :%lx", intparm);
  857. DBF_ERROR("ds: %2x cs:%2x", dstat, cstat);
  858. if (irq_ptr->nr_input_qs) {
  859. q = irq_ptr->input_qs[0];
  860. } else if (irq_ptr->nr_output_qs) {
  861. q = irq_ptr->output_qs[0];
  862. } else {
  863. dump_stack();
  864. goto no_handler;
  865. }
  866. count = sub_buf(q->first_to_check, q->first_to_kick);
  867. q->handler(q->irq_ptr->cdev, QDIO_ERROR_ACTIVATE,
  868. q->nr, q->first_to_kick, count, irq_ptr->int_parm);
  869. no_handler:
  870. qdio_set_state(irq_ptr, QDIO_IRQ_STATE_STOPPED);
  871. /*
  872. * In case of z/VM LGR (Live Guest Migration) QDIO recovery will happen.
  873. * Therefore we call the LGR detection function here.
  874. */
  875. lgr_info_log();
  876. }
  877. static void qdio_establish_handle_irq(struct ccw_device *cdev, int cstat,
  878. int dstat)
  879. {
  880. struct qdio_irq *irq_ptr = cdev->private->qdio_data;
  881. DBF_DEV_EVENT(DBF_INFO, irq_ptr, "qest irq");
  882. if (cstat)
  883. goto error;
  884. if (dstat & ~(DEV_STAT_DEV_END | DEV_STAT_CHN_END))
  885. goto error;
  886. if (!(dstat & DEV_STAT_DEV_END))
  887. goto error;
  888. qdio_set_state(irq_ptr, QDIO_IRQ_STATE_ESTABLISHED);
  889. return;
  890. error:
  891. DBF_ERROR("%4x EQ:error", irq_ptr->schid.sch_no);
  892. DBF_ERROR("ds: %2x cs:%2x", dstat, cstat);
  893. qdio_set_state(irq_ptr, QDIO_IRQ_STATE_ERR);
  894. }
  895. /* qdio interrupt handler */
  896. void qdio_int_handler(struct ccw_device *cdev, unsigned long intparm,
  897. struct irb *irb)
  898. {
  899. struct qdio_irq *irq_ptr = cdev->private->qdio_data;
  900. struct subchannel_id schid;
  901. int cstat, dstat;
  902. if (!intparm || !irq_ptr) {
  903. ccw_device_get_schid(cdev, &schid);
  904. DBF_ERROR("qint:%4x", schid.sch_no);
  905. return;
  906. }
  907. if (irq_ptr->perf_stat_enabled)
  908. irq_ptr->perf_stat.qdio_int++;
  909. if (IS_ERR(irb)) {
  910. DBF_ERROR("%4x IO error", irq_ptr->schid.sch_no);
  911. qdio_set_state(irq_ptr, QDIO_IRQ_STATE_ERR);
  912. wake_up(&cdev->private->wait_q);
  913. return;
  914. }
  915. qdio_irq_check_sense(irq_ptr, irb);
  916. cstat = irb->scsw.cmd.cstat;
  917. dstat = irb->scsw.cmd.dstat;
  918. switch (irq_ptr->state) {
  919. case QDIO_IRQ_STATE_INACTIVE:
  920. qdio_establish_handle_irq(cdev, cstat, dstat);
  921. break;
  922. case QDIO_IRQ_STATE_CLEANUP:
  923. qdio_set_state(irq_ptr, QDIO_IRQ_STATE_INACTIVE);
  924. break;
  925. case QDIO_IRQ_STATE_ESTABLISHED:
  926. case QDIO_IRQ_STATE_ACTIVE:
  927. if (cstat & SCHN_STAT_PCI) {
  928. qdio_int_handler_pci(irq_ptr);
  929. return;
  930. }
  931. if (cstat || dstat)
  932. qdio_handle_activate_check(cdev, intparm, cstat,
  933. dstat);
  934. break;
  935. case QDIO_IRQ_STATE_STOPPED:
  936. break;
  937. default:
  938. WARN_ON_ONCE(1);
  939. }
  940. wake_up(&cdev->private->wait_q);
  941. }
  942. /**
  943. * qdio_get_ssqd_desc - get qdio subchannel description
  944. * @cdev: ccw device to get description for
  945. * @data: where to store the ssqd
  946. *
  947. * Returns 0 or an error code. The results of the chsc are stored in the
  948. * specified structure.
  949. */
  950. int qdio_get_ssqd_desc(struct ccw_device *cdev,
  951. struct qdio_ssqd_desc *data)
  952. {
  953. struct subchannel_id schid;
  954. if (!cdev || !cdev->private)
  955. return -EINVAL;
  956. ccw_device_get_schid(cdev, &schid);
  957. DBF_EVENT("get ssqd:%4x", schid.sch_no);
  958. return qdio_setup_get_ssqd(NULL, &schid, data);
  959. }
  960. EXPORT_SYMBOL_GPL(qdio_get_ssqd_desc);
  961. static void qdio_shutdown_queues(struct ccw_device *cdev)
  962. {
  963. struct qdio_irq *irq_ptr = cdev->private->qdio_data;
  964. struct qdio_q *q;
  965. int i;
  966. for_each_input_queue(irq_ptr, q, i)
  967. tasklet_kill(&q->tasklet);
  968. for_each_output_queue(irq_ptr, q, i) {
  969. del_timer_sync(&q->u.out.timer);
  970. tasklet_kill(&q->tasklet);
  971. }
  972. }
  973. /**
  974. * qdio_shutdown - shut down a qdio subchannel
  975. * @cdev: associated ccw device
  976. * @how: use halt or clear to shutdown
  977. */
  978. int qdio_shutdown(struct ccw_device *cdev, int how)
  979. {
  980. struct qdio_irq *irq_ptr = cdev->private->qdio_data;
  981. struct subchannel_id schid;
  982. int rc;
  983. if (!irq_ptr)
  984. return -ENODEV;
  985. WARN_ON_ONCE(irqs_disabled());
  986. ccw_device_get_schid(cdev, &schid);
  987. DBF_EVENT("qshutdown:%4x", schid.sch_no);
  988. mutex_lock(&irq_ptr->setup_mutex);
  989. /*
  990. * Subchannel was already shot down. We cannot prevent being called
  991. * twice since cio may trigger a shutdown asynchronously.
  992. */
  993. if (irq_ptr->state == QDIO_IRQ_STATE_INACTIVE) {
  994. mutex_unlock(&irq_ptr->setup_mutex);
  995. return 0;
  996. }
  997. /*
  998. * Indicate that the device is going down. Scheduling the queue
  999. * tasklets is forbidden from here on.
  1000. */
  1001. qdio_set_state(irq_ptr, QDIO_IRQ_STATE_STOPPED);
  1002. tiqdio_remove_input_queues(irq_ptr);
  1003. qdio_shutdown_queues(cdev);
  1004. qdio_shutdown_debug_entries(irq_ptr);
  1005. /* cleanup subchannel */
  1006. spin_lock_irq(get_ccwdev_lock(cdev));
  1007. if (how & QDIO_FLAG_CLEANUP_USING_CLEAR)
  1008. rc = ccw_device_clear(cdev, QDIO_DOING_CLEANUP);
  1009. else
  1010. /* default behaviour is halt */
  1011. rc = ccw_device_halt(cdev, QDIO_DOING_CLEANUP);
  1012. if (rc) {
  1013. DBF_ERROR("%4x SHUTD ERR", irq_ptr->schid.sch_no);
  1014. DBF_ERROR("rc:%4d", rc);
  1015. goto no_cleanup;
  1016. }
  1017. qdio_set_state(irq_ptr, QDIO_IRQ_STATE_CLEANUP);
  1018. spin_unlock_irq(get_ccwdev_lock(cdev));
  1019. wait_event_interruptible_timeout(cdev->private->wait_q,
  1020. irq_ptr->state == QDIO_IRQ_STATE_INACTIVE ||
  1021. irq_ptr->state == QDIO_IRQ_STATE_ERR,
  1022. 10 * HZ);
  1023. spin_lock_irq(get_ccwdev_lock(cdev));
  1024. no_cleanup:
  1025. qdio_shutdown_thinint(irq_ptr);
  1026. /* restore interrupt handler */
  1027. if ((void *)cdev->handler == (void *)qdio_int_handler) {
  1028. cdev->handler = irq_ptr->orig_handler;
  1029. cdev->private->intparm = 0;
  1030. }
  1031. spin_unlock_irq(get_ccwdev_lock(cdev));
  1032. qdio_set_state(irq_ptr, QDIO_IRQ_STATE_INACTIVE);
  1033. mutex_unlock(&irq_ptr->setup_mutex);
  1034. if (rc)
  1035. return rc;
  1036. return 0;
  1037. }
  1038. EXPORT_SYMBOL_GPL(qdio_shutdown);
  1039. /**
  1040. * qdio_free - free data structures for a qdio subchannel
  1041. * @cdev: associated ccw device
  1042. */
  1043. int qdio_free(struct ccw_device *cdev)
  1044. {
  1045. struct qdio_irq *irq_ptr = cdev->private->qdio_data;
  1046. struct subchannel_id schid;
  1047. if (!irq_ptr)
  1048. return -ENODEV;
  1049. ccw_device_get_schid(cdev, &schid);
  1050. DBF_EVENT("qfree:%4x", schid.sch_no);
  1051. DBF_DEV_EVENT(DBF_ERR, irq_ptr, "dbf abandoned");
  1052. mutex_lock(&irq_ptr->setup_mutex);
  1053. irq_ptr->debug_area = NULL;
  1054. cdev->private->qdio_data = NULL;
  1055. mutex_unlock(&irq_ptr->setup_mutex);
  1056. qdio_release_memory(irq_ptr);
  1057. return 0;
  1058. }
  1059. EXPORT_SYMBOL_GPL(qdio_free);
  1060. /**
  1061. * qdio_allocate - allocate qdio queues and associated data
  1062. * @init_data: initialization data
  1063. */
  1064. int qdio_allocate(struct qdio_initialize *init_data)
  1065. {
  1066. struct subchannel_id schid;
  1067. struct qdio_irq *irq_ptr;
  1068. ccw_device_get_schid(init_data->cdev, &schid);
  1069. DBF_EVENT("qallocate:%4x", schid.sch_no);
  1070. if ((init_data->no_input_qs && !init_data->input_handler) ||
  1071. (init_data->no_output_qs && !init_data->output_handler))
  1072. return -EINVAL;
  1073. if ((init_data->no_input_qs > QDIO_MAX_QUEUES_PER_IRQ) ||
  1074. (init_data->no_output_qs > QDIO_MAX_QUEUES_PER_IRQ))
  1075. return -EINVAL;
  1076. if ((!init_data->input_sbal_addr_array) ||
  1077. (!init_data->output_sbal_addr_array))
  1078. return -EINVAL;
  1079. /* irq_ptr must be in GFP_DMA since it contains ccw1.cda */
  1080. irq_ptr = (void *) get_zeroed_page(GFP_KERNEL | GFP_DMA);
  1081. if (!irq_ptr)
  1082. goto out_err;
  1083. mutex_init(&irq_ptr->setup_mutex);
  1084. if (qdio_allocate_dbf(init_data, irq_ptr))
  1085. goto out_rel;
  1086. /*
  1087. * Allocate a page for the chsc calls in qdio_establish.
  1088. * Must be pre-allocated since a zfcp recovery will call
  1089. * qdio_establish. In case of low memory and swap on a zfcp disk
  1090. * we may not be able to allocate memory otherwise.
  1091. */
  1092. irq_ptr->chsc_page = get_zeroed_page(GFP_KERNEL);
  1093. if (!irq_ptr->chsc_page)
  1094. goto out_rel;
  1095. /* qdr is used in ccw1.cda which is u32 */
  1096. irq_ptr->qdr = (struct qdr *) get_zeroed_page(GFP_KERNEL | GFP_DMA);
  1097. if (!irq_ptr->qdr)
  1098. goto out_rel;
  1099. if (qdio_allocate_qs(irq_ptr, init_data->no_input_qs,
  1100. init_data->no_output_qs))
  1101. goto out_rel;
  1102. init_data->cdev->private->qdio_data = irq_ptr;
  1103. qdio_set_state(irq_ptr, QDIO_IRQ_STATE_INACTIVE);
  1104. return 0;
  1105. out_rel:
  1106. qdio_release_memory(irq_ptr);
  1107. out_err:
  1108. return -ENOMEM;
  1109. }
  1110. EXPORT_SYMBOL_GPL(qdio_allocate);
  1111. static void qdio_detect_hsicq(struct qdio_irq *irq_ptr)
  1112. {
  1113. struct qdio_q *q = irq_ptr->input_qs[0];
  1114. int i, use_cq = 0;
  1115. if (irq_ptr->nr_input_qs > 1 && queue_type(q) == QDIO_IQDIO_QFMT)
  1116. use_cq = 1;
  1117. for_each_output_queue(irq_ptr, q, i) {
  1118. if (use_cq) {
  1119. if (qdio_enable_async_operation(&q->u.out) < 0) {
  1120. use_cq = 0;
  1121. continue;
  1122. }
  1123. } else
  1124. qdio_disable_async_operation(&q->u.out);
  1125. }
  1126. DBF_EVENT("use_cq:%d", use_cq);
  1127. }
  1128. /**
  1129. * qdio_establish - establish queues on a qdio subchannel
  1130. * @init_data: initialization data
  1131. */
  1132. int qdio_establish(struct qdio_initialize *init_data)
  1133. {
  1134. struct ccw_device *cdev = init_data->cdev;
  1135. struct subchannel_id schid;
  1136. struct qdio_irq *irq_ptr;
  1137. int rc;
  1138. ccw_device_get_schid(cdev, &schid);
  1139. DBF_EVENT("qestablish:%4x", schid.sch_no);
  1140. irq_ptr = cdev->private->qdio_data;
  1141. if (!irq_ptr)
  1142. return -ENODEV;
  1143. mutex_lock(&irq_ptr->setup_mutex);
  1144. qdio_setup_irq(init_data);
  1145. rc = qdio_establish_thinint(irq_ptr);
  1146. if (rc) {
  1147. mutex_unlock(&irq_ptr->setup_mutex);
  1148. qdio_shutdown(cdev, QDIO_FLAG_CLEANUP_USING_CLEAR);
  1149. return rc;
  1150. }
  1151. /* establish q */
  1152. irq_ptr->ccw.cmd_code = irq_ptr->equeue.cmd;
  1153. irq_ptr->ccw.flags = CCW_FLAG_SLI;
  1154. irq_ptr->ccw.count = irq_ptr->equeue.count;
  1155. irq_ptr->ccw.cda = (u32)((addr_t)irq_ptr->qdr);
  1156. spin_lock_irq(get_ccwdev_lock(cdev));
  1157. ccw_device_set_options_mask(cdev, 0);
  1158. rc = ccw_device_start(cdev, &irq_ptr->ccw, QDIO_DOING_ESTABLISH, 0, 0);
  1159. spin_unlock_irq(get_ccwdev_lock(cdev));
  1160. if (rc) {
  1161. DBF_ERROR("%4x est IO ERR", irq_ptr->schid.sch_no);
  1162. DBF_ERROR("rc:%4x", rc);
  1163. mutex_unlock(&irq_ptr->setup_mutex);
  1164. qdio_shutdown(cdev, QDIO_FLAG_CLEANUP_USING_CLEAR);
  1165. return rc;
  1166. }
  1167. wait_event_interruptible_timeout(cdev->private->wait_q,
  1168. irq_ptr->state == QDIO_IRQ_STATE_ESTABLISHED ||
  1169. irq_ptr->state == QDIO_IRQ_STATE_ERR, HZ);
  1170. if (irq_ptr->state != QDIO_IRQ_STATE_ESTABLISHED) {
  1171. mutex_unlock(&irq_ptr->setup_mutex);
  1172. qdio_shutdown(cdev, QDIO_FLAG_CLEANUP_USING_CLEAR);
  1173. return -EIO;
  1174. }
  1175. qdio_setup_ssqd_info(irq_ptr);
  1176. qdio_detect_hsicq(irq_ptr);
  1177. /* qebsm is now setup if available, initialize buffer states */
  1178. qdio_init_buf_states(irq_ptr);
  1179. mutex_unlock(&irq_ptr->setup_mutex);
  1180. qdio_print_subchannel_info(irq_ptr, cdev);
  1181. qdio_setup_debug_entries(irq_ptr, cdev);
  1182. return 0;
  1183. }
  1184. EXPORT_SYMBOL_GPL(qdio_establish);
  1185. /**
  1186. * qdio_activate - activate queues on a qdio subchannel
  1187. * @cdev: associated cdev
  1188. */
  1189. int qdio_activate(struct ccw_device *cdev)
  1190. {
  1191. struct subchannel_id schid;
  1192. struct qdio_irq *irq_ptr;
  1193. int rc;
  1194. ccw_device_get_schid(cdev, &schid);
  1195. DBF_EVENT("qactivate:%4x", schid.sch_no);
  1196. irq_ptr = cdev->private->qdio_data;
  1197. if (!irq_ptr)
  1198. return -ENODEV;
  1199. mutex_lock(&irq_ptr->setup_mutex);
  1200. if (irq_ptr->state == QDIO_IRQ_STATE_INACTIVE) {
  1201. rc = -EBUSY;
  1202. goto out;
  1203. }
  1204. irq_ptr->ccw.cmd_code = irq_ptr->aqueue.cmd;
  1205. irq_ptr->ccw.flags = CCW_FLAG_SLI;
  1206. irq_ptr->ccw.count = irq_ptr->aqueue.count;
  1207. irq_ptr->ccw.cda = 0;
  1208. spin_lock_irq(get_ccwdev_lock(cdev));
  1209. ccw_device_set_options(cdev, CCWDEV_REPORT_ALL);
  1210. rc = ccw_device_start(cdev, &irq_ptr->ccw, QDIO_DOING_ACTIVATE,
  1211. 0, DOIO_DENY_PREFETCH);
  1212. spin_unlock_irq(get_ccwdev_lock(cdev));
  1213. if (rc) {
  1214. DBF_ERROR("%4x act IO ERR", irq_ptr->schid.sch_no);
  1215. DBF_ERROR("rc:%4x", rc);
  1216. goto out;
  1217. }
  1218. if (is_thinint_irq(irq_ptr))
  1219. tiqdio_add_input_queues(irq_ptr);
  1220. /* wait for subchannel to become active */
  1221. msleep(5);
  1222. switch (irq_ptr->state) {
  1223. case QDIO_IRQ_STATE_STOPPED:
  1224. case QDIO_IRQ_STATE_ERR:
  1225. rc = -EIO;
  1226. break;
  1227. default:
  1228. qdio_set_state(irq_ptr, QDIO_IRQ_STATE_ACTIVE);
  1229. rc = 0;
  1230. }
  1231. out:
  1232. mutex_unlock(&irq_ptr->setup_mutex);
  1233. return rc;
  1234. }
  1235. EXPORT_SYMBOL_GPL(qdio_activate);
  1236. static inline int buf_in_between(int bufnr, int start, int count)
  1237. {
  1238. int end = add_buf(start, count);
  1239. if (end > start) {
  1240. if (bufnr >= start && bufnr < end)
  1241. return 1;
  1242. else
  1243. return 0;
  1244. }
  1245. /* wrap-around case */
  1246. if ((bufnr >= start && bufnr <= QDIO_MAX_BUFFERS_PER_Q) ||
  1247. (bufnr < end))
  1248. return 1;
  1249. else
  1250. return 0;
  1251. }
  1252. /**
  1253. * handle_inbound - reset processed input buffers
  1254. * @q: queue containing the buffers
  1255. * @callflags: flags
  1256. * @bufnr: first buffer to process
  1257. * @count: how many buffers are emptied
  1258. */
  1259. static int handle_inbound(struct qdio_q *q, unsigned int callflags,
  1260. int bufnr, int count)
  1261. {
  1262. int diff;
  1263. qperf_inc(q, inbound_call);
  1264. if (!q->u.in.polling)
  1265. goto set;
  1266. /* protect against stop polling setting an ACK for an emptied slsb */
  1267. if (count == QDIO_MAX_BUFFERS_PER_Q) {
  1268. /* overwriting everything, just delete polling status */
  1269. q->u.in.polling = 0;
  1270. q->u.in.ack_count = 0;
  1271. goto set;
  1272. } else if (buf_in_between(q->u.in.ack_start, bufnr, count)) {
  1273. if (is_qebsm(q)) {
  1274. /* partial overwrite, just update ack_start */
  1275. diff = add_buf(bufnr, count);
  1276. diff = sub_buf(diff, q->u.in.ack_start);
  1277. q->u.in.ack_count -= diff;
  1278. if (q->u.in.ack_count <= 0) {
  1279. q->u.in.polling = 0;
  1280. q->u.in.ack_count = 0;
  1281. goto set;
  1282. }
  1283. q->u.in.ack_start = add_buf(q->u.in.ack_start, diff);
  1284. }
  1285. else
  1286. /* the only ACK will be deleted, so stop polling */
  1287. q->u.in.polling = 0;
  1288. }
  1289. set:
  1290. count = set_buf_states(q, bufnr, SLSB_CU_INPUT_EMPTY, count);
  1291. atomic_add(count, &q->nr_buf_used);
  1292. if (need_siga_in(q))
  1293. return qdio_siga_input(q);
  1294. return 0;
  1295. }
  1296. /**
  1297. * handle_outbound - process filled outbound buffers
  1298. * @q: queue containing the buffers
  1299. * @callflags: flags
  1300. * @bufnr: first buffer to process
  1301. * @count: how many buffers are filled
  1302. */
  1303. static int handle_outbound(struct qdio_q *q, unsigned int callflags,
  1304. int bufnr, int count)
  1305. {
  1306. unsigned char state = 0;
  1307. int used, rc = 0;
  1308. qperf_inc(q, outbound_call);
  1309. count = set_buf_states(q, bufnr, SLSB_CU_OUTPUT_PRIMED, count);
  1310. used = atomic_add_return(count, &q->nr_buf_used);
  1311. if (used == QDIO_MAX_BUFFERS_PER_Q)
  1312. qperf_inc(q, outbound_queue_full);
  1313. if (callflags & QDIO_FLAG_PCI_OUT) {
  1314. q->u.out.pci_out_enabled = 1;
  1315. qperf_inc(q, pci_request_int);
  1316. } else
  1317. q->u.out.pci_out_enabled = 0;
  1318. if (queue_type(q) == QDIO_IQDIO_QFMT) {
  1319. unsigned long phys_aob = 0;
  1320. /* One SIGA-W per buffer required for unicast HSI */
  1321. WARN_ON_ONCE(count > 1 && !multicast_outbound(q));
  1322. phys_aob = qdio_aob_for_buffer(&q->u.out, bufnr);
  1323. rc = qdio_kick_outbound_q(q, phys_aob);
  1324. } else if (need_siga_sync(q)) {
  1325. rc = qdio_siga_sync_q(q);
  1326. } else {
  1327. /* try to fast requeue buffers */
  1328. get_buf_state(q, prev_buf(bufnr), &state, 0);
  1329. if (state != SLSB_CU_OUTPUT_PRIMED)
  1330. rc = qdio_kick_outbound_q(q, 0);
  1331. else
  1332. qperf_inc(q, fast_requeue);
  1333. }
  1334. /* in case of SIGA errors we must process the error immediately */
  1335. if (used >= q->u.out.scan_threshold || rc)
  1336. qdio_tasklet_schedule(q);
  1337. else
  1338. /* free the SBALs in case of no further traffic */
  1339. if (!timer_pending(&q->u.out.timer) &&
  1340. likely(q->irq_ptr->state == QDIO_IRQ_STATE_ACTIVE))
  1341. mod_timer(&q->u.out.timer, jiffies + HZ);
  1342. return rc;
  1343. }
  1344. /**
  1345. * do_QDIO - process input or output buffers
  1346. * @cdev: associated ccw_device for the qdio subchannel
  1347. * @callflags: input or output and special flags from the program
  1348. * @q_nr: queue number
  1349. * @bufnr: buffer number
  1350. * @count: how many buffers to process
  1351. */
  1352. int do_QDIO(struct ccw_device *cdev, unsigned int callflags,
  1353. int q_nr, unsigned int bufnr, unsigned int count)
  1354. {
  1355. struct qdio_irq *irq_ptr;
  1356. if (bufnr >= QDIO_MAX_BUFFERS_PER_Q || count > QDIO_MAX_BUFFERS_PER_Q)
  1357. return -EINVAL;
  1358. irq_ptr = cdev->private->qdio_data;
  1359. if (!irq_ptr)
  1360. return -ENODEV;
  1361. DBF_DEV_EVENT(DBF_INFO, irq_ptr,
  1362. "do%02x b:%02x c:%02x", callflags, bufnr, count);
  1363. if (irq_ptr->state != QDIO_IRQ_STATE_ACTIVE)
  1364. return -EIO;
  1365. if (!count)
  1366. return 0;
  1367. if (callflags & QDIO_FLAG_SYNC_INPUT)
  1368. return handle_inbound(irq_ptr->input_qs[q_nr],
  1369. callflags, bufnr, count);
  1370. else if (callflags & QDIO_FLAG_SYNC_OUTPUT)
  1371. return handle_outbound(irq_ptr->output_qs[q_nr],
  1372. callflags, bufnr, count);
  1373. return -EINVAL;
  1374. }
  1375. EXPORT_SYMBOL_GPL(do_QDIO);
  1376. /**
  1377. * qdio_start_irq - process input buffers
  1378. * @cdev: associated ccw_device for the qdio subchannel
  1379. * @nr: input queue number
  1380. *
  1381. * Return codes
  1382. * 0 - success
  1383. * 1 - irqs not started since new data is available
  1384. */
  1385. int qdio_start_irq(struct ccw_device *cdev, int nr)
  1386. {
  1387. struct qdio_q *q;
  1388. struct qdio_irq *irq_ptr = cdev->private->qdio_data;
  1389. if (!irq_ptr)
  1390. return -ENODEV;
  1391. q = irq_ptr->input_qs[nr];
  1392. clear_nonshared_ind(irq_ptr);
  1393. qdio_stop_polling(q);
  1394. clear_bit(QDIO_QUEUE_IRQS_DISABLED, &q->u.in.queue_irq_state);
  1395. /*
  1396. * We need to check again to not lose initiative after
  1397. * resetting the ACK state.
  1398. */
  1399. if (test_nonshared_ind(irq_ptr))
  1400. goto rescan;
  1401. if (!qdio_inbound_q_done(q))
  1402. goto rescan;
  1403. return 0;
  1404. rescan:
  1405. if (test_and_set_bit(QDIO_QUEUE_IRQS_DISABLED,
  1406. &q->u.in.queue_irq_state))
  1407. return 0;
  1408. else
  1409. return 1;
  1410. }
  1411. EXPORT_SYMBOL(qdio_start_irq);
  1412. /**
  1413. * qdio_get_next_buffers - process input buffers
  1414. * @cdev: associated ccw_device for the qdio subchannel
  1415. * @nr: input queue number
  1416. * @bufnr: first filled buffer number
  1417. * @error: buffers are in error state
  1418. *
  1419. * Return codes
  1420. * < 0 - error
  1421. * = 0 - no new buffers found
  1422. * > 0 - number of processed buffers
  1423. */
  1424. int qdio_get_next_buffers(struct ccw_device *cdev, int nr, int *bufnr,
  1425. int *error)
  1426. {
  1427. struct qdio_q *q;
  1428. int start, end;
  1429. struct qdio_irq *irq_ptr = cdev->private->qdio_data;
  1430. if (!irq_ptr)
  1431. return -ENODEV;
  1432. q = irq_ptr->input_qs[nr];
  1433. /*
  1434. * Cannot rely on automatic sync after interrupt since queues may
  1435. * also be examined without interrupt.
  1436. */
  1437. if (need_siga_sync(q))
  1438. qdio_sync_queues(q);
  1439. /* check the PCI capable outbound queues. */
  1440. qdio_check_outbound_after_thinint(q);
  1441. if (!qdio_inbound_q_moved(q))
  1442. return 0;
  1443. /* Note: upper-layer MUST stop processing immediately here ... */
  1444. if (unlikely(q->irq_ptr->state != QDIO_IRQ_STATE_ACTIVE))
  1445. return -EIO;
  1446. start = q->first_to_kick;
  1447. end = q->first_to_check;
  1448. *bufnr = start;
  1449. *error = q->qdio_error;
  1450. /* for the next time */
  1451. q->first_to_kick = end;
  1452. q->qdio_error = 0;
  1453. return sub_buf(end, start);
  1454. }
  1455. EXPORT_SYMBOL(qdio_get_next_buffers);
  1456. /**
  1457. * qdio_stop_irq - disable interrupt processing for the device
  1458. * @cdev: associated ccw_device for the qdio subchannel
  1459. * @nr: input queue number
  1460. *
  1461. * Return codes
  1462. * 0 - interrupts were already disabled
  1463. * 1 - interrupts successfully disabled
  1464. */
  1465. int qdio_stop_irq(struct ccw_device *cdev, int nr)
  1466. {
  1467. struct qdio_q *q;
  1468. struct qdio_irq *irq_ptr = cdev->private->qdio_data;
  1469. if (!irq_ptr)
  1470. return -ENODEV;
  1471. q = irq_ptr->input_qs[nr];
  1472. if (test_and_set_bit(QDIO_QUEUE_IRQS_DISABLED,
  1473. &q->u.in.queue_irq_state))
  1474. return 0;
  1475. else
  1476. return 1;
  1477. }
  1478. EXPORT_SYMBOL(qdio_stop_irq);
  1479. /**
  1480. * qdio_pnso_brinfo() - perform network subchannel op #0 - bridge info.
  1481. * @schid: Subchannel ID.
  1482. * @cnc: Boolean Change-Notification Control
  1483. * @response: Response code will be stored at this address
  1484. * @cb: Callback function will be executed for each element
  1485. * of the address list
  1486. * @priv: Pointer to pass to the callback function.
  1487. *
  1488. * Performs "Store-network-bridging-information list" operation and calls
  1489. * the callback function for every entry in the list. If "change-
  1490. * notification-control" is set, further changes in the address list
  1491. * will be reported via the IPA command.
  1492. */
  1493. int qdio_pnso_brinfo(struct subchannel_id schid,
  1494. int cnc, u16 *response,
  1495. void (*cb)(void *priv, enum qdio_brinfo_entry_type type,
  1496. void *entry),
  1497. void *priv)
  1498. {
  1499. struct chsc_pnso_area *rr;
  1500. int rc;
  1501. u32 prev_instance = 0;
  1502. int isfirstblock = 1;
  1503. int i, size, elems;
  1504. rr = (struct chsc_pnso_area *)get_zeroed_page(GFP_KERNEL);
  1505. if (rr == NULL)
  1506. return -ENOMEM;
  1507. do {
  1508. /* on the first iteration, naihdr.resume_token will be zero */
  1509. rc = chsc_pnso_brinfo(schid, rr, rr->naihdr.resume_token, cnc);
  1510. if (rc != 0 && rc != -EBUSY)
  1511. goto out;
  1512. if (rr->response.code != 1) {
  1513. rc = -EIO;
  1514. continue;
  1515. } else
  1516. rc = 0;
  1517. if (cb == NULL)
  1518. continue;
  1519. size = rr->naihdr.naids;
  1520. elems = (rr->response.length -
  1521. sizeof(struct chsc_header) -
  1522. sizeof(struct chsc_brinfo_naihdr)) /
  1523. size;
  1524. if (!isfirstblock && (rr->naihdr.instance != prev_instance)) {
  1525. /* Inform the caller that they need to scrap */
  1526. /* the data that was already reported via cb */
  1527. rc = -EAGAIN;
  1528. break;
  1529. }
  1530. isfirstblock = 0;
  1531. prev_instance = rr->naihdr.instance;
  1532. for (i = 0; i < elems; i++)
  1533. switch (size) {
  1534. case sizeof(struct qdio_brinfo_entry_l3_ipv6):
  1535. (*cb)(priv, l3_ipv6_addr,
  1536. &rr->entries.l3_ipv6[i]);
  1537. break;
  1538. case sizeof(struct qdio_brinfo_entry_l3_ipv4):
  1539. (*cb)(priv, l3_ipv4_addr,
  1540. &rr->entries.l3_ipv4[i]);
  1541. break;
  1542. case sizeof(struct qdio_brinfo_entry_l2):
  1543. (*cb)(priv, l2_addr_lnid,
  1544. &rr->entries.l2[i]);
  1545. break;
  1546. default:
  1547. WARN_ON_ONCE(1);
  1548. rc = -EIO;
  1549. goto out;
  1550. }
  1551. } while (rr->response.code == 0x0107 || /* channel busy */
  1552. (rr->response.code == 1 && /* list stored */
  1553. /* resume token is non-zero => list incomplete */
  1554. (rr->naihdr.resume_token.t1 || rr->naihdr.resume_token.t2)));
  1555. (*response) = rr->response.code;
  1556. out:
  1557. free_page((unsigned long)rr);
  1558. return rc;
  1559. }
  1560. EXPORT_SYMBOL_GPL(qdio_pnso_brinfo);
  1561. static int __init init_QDIO(void)
  1562. {
  1563. int rc;
  1564. rc = qdio_debug_init();
  1565. if (rc)
  1566. return rc;
  1567. rc = qdio_setup_init();
  1568. if (rc)
  1569. goto out_debug;
  1570. rc = tiqdio_allocate_memory();
  1571. if (rc)
  1572. goto out_cache;
  1573. rc = tiqdio_register_thinints();
  1574. if (rc)
  1575. goto out_ti;
  1576. return 0;
  1577. out_ti:
  1578. tiqdio_free_memory();
  1579. out_cache:
  1580. qdio_setup_exit();
  1581. out_debug:
  1582. qdio_debug_exit();
  1583. return rc;
  1584. }
  1585. static void __exit exit_QDIO(void)
  1586. {
  1587. tiqdio_unregister_thinints();
  1588. tiqdio_free_memory();
  1589. qdio_setup_exit();
  1590. qdio_debug_exit();
  1591. }
  1592. module_init(init_QDIO);
  1593. module_exit(exit_QDIO);