rtc-pcf85363.c 9.4 KB

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  1. /*
  2. * drivers/rtc/rtc-pcf85363.c
  3. *
  4. * Driver for NXP PCF85363 real-time clock.
  5. *
  6. * Copyright (C) 2017 Eric Nelson
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License version 2 as
  10. * published by the Free Software Foundation.
  11. *
  12. * Based loosely on rtc-8583 by Russell King, Wolfram Sang and Juergen Beisert
  13. */
  14. #include <linux/module.h>
  15. #include <linux/i2c.h>
  16. #include <linux/slab.h>
  17. #include <linux/rtc.h>
  18. #include <linux/init.h>
  19. #include <linux/err.h>
  20. #include <linux/errno.h>
  21. #include <linux/bcd.h>
  22. #include <linux/of.h>
  23. #include <linux/of_device.h>
  24. #include <linux/regmap.h>
  25. /*
  26. * Date/Time registers
  27. */
  28. #define DT_100THS 0x00
  29. #define DT_SECS 0x01
  30. #define DT_MINUTES 0x02
  31. #define DT_HOURS 0x03
  32. #define DT_DAYS 0x04
  33. #define DT_WEEKDAYS 0x05
  34. #define DT_MONTHS 0x06
  35. #define DT_YEARS 0x07
  36. /*
  37. * Alarm registers
  38. */
  39. #define DT_SECOND_ALM1 0x08
  40. #define DT_MINUTE_ALM1 0x09
  41. #define DT_HOUR_ALM1 0x0a
  42. #define DT_DAY_ALM1 0x0b
  43. #define DT_MONTH_ALM1 0x0c
  44. #define DT_MINUTE_ALM2 0x0d
  45. #define DT_HOUR_ALM2 0x0e
  46. #define DT_WEEKDAY_ALM2 0x0f
  47. #define DT_ALARM_EN 0x10
  48. /*
  49. * Time stamp registers
  50. */
  51. #define DT_TIMESTAMP1 0x11
  52. #define DT_TIMESTAMP2 0x17
  53. #define DT_TIMESTAMP3 0x1d
  54. #define DT_TS_MODE 0x23
  55. /*
  56. * control registers
  57. */
  58. #define CTRL_OFFSET 0x24
  59. #define CTRL_OSCILLATOR 0x25
  60. #define CTRL_BATTERY 0x26
  61. #define CTRL_PIN_IO 0x27
  62. #define CTRL_FUNCTION 0x28
  63. #define CTRL_INTA_EN 0x29
  64. #define CTRL_INTB_EN 0x2a
  65. #define CTRL_FLAGS 0x2b
  66. #define CTRL_RAMBYTE 0x2c
  67. #define CTRL_WDOG 0x2d
  68. #define CTRL_STOP_EN 0x2e
  69. #define CTRL_RESETS 0x2f
  70. #define CTRL_RAM 0x40
  71. #define ALRM_SEC_A1E BIT(0)
  72. #define ALRM_MIN_A1E BIT(1)
  73. #define ALRM_HR_A1E BIT(2)
  74. #define ALRM_DAY_A1E BIT(3)
  75. #define ALRM_MON_A1E BIT(4)
  76. #define ALRM_MIN_A2E BIT(5)
  77. #define ALRM_HR_A2E BIT(6)
  78. #define ALRM_DAY_A2E BIT(7)
  79. #define INT_WDIE BIT(0)
  80. #define INT_BSIE BIT(1)
  81. #define INT_TSRIE BIT(2)
  82. #define INT_A2IE BIT(3)
  83. #define INT_A1IE BIT(4)
  84. #define INT_OIE BIT(5)
  85. #define INT_PIE BIT(6)
  86. #define INT_ILP BIT(7)
  87. #define FLAGS_TSR1F BIT(0)
  88. #define FLAGS_TSR2F BIT(1)
  89. #define FLAGS_TSR3F BIT(2)
  90. #define FLAGS_BSF BIT(3)
  91. #define FLAGS_WDF BIT(4)
  92. #define FLAGS_A1F BIT(5)
  93. #define FLAGS_A2F BIT(6)
  94. #define FLAGS_PIF BIT(7)
  95. #define PIN_IO_INTAPM GENMASK(1, 0)
  96. #define PIN_IO_INTA_CLK 0
  97. #define PIN_IO_INTA_BAT 1
  98. #define PIN_IO_INTA_OUT 2
  99. #define PIN_IO_INTA_HIZ 3
  100. #define STOP_EN_STOP BIT(0)
  101. #define RESET_CPR 0xa4
  102. #define NVRAM_SIZE 0x40
  103. static struct i2c_driver pcf85363_driver;
  104. struct pcf85363 {
  105. struct device *dev;
  106. struct rtc_device *rtc;
  107. struct regmap *regmap;
  108. };
  109. static int pcf85363_rtc_read_time(struct device *dev, struct rtc_time *tm)
  110. {
  111. struct pcf85363 *pcf85363 = dev_get_drvdata(dev);
  112. unsigned char buf[DT_YEARS + 1];
  113. int ret, len = sizeof(buf);
  114. /* read the RTC date and time registers all at once */
  115. ret = regmap_bulk_read(pcf85363->regmap, DT_100THS, buf, len);
  116. if (ret) {
  117. dev_err(dev, "%s: error %d\n", __func__, ret);
  118. return ret;
  119. }
  120. tm->tm_year = bcd2bin(buf[DT_YEARS]);
  121. /* adjust for 1900 base of rtc_time */
  122. tm->tm_year += 100;
  123. tm->tm_wday = buf[DT_WEEKDAYS] & 7;
  124. buf[DT_SECS] &= 0x7F;
  125. tm->tm_sec = bcd2bin(buf[DT_SECS]);
  126. buf[DT_MINUTES] &= 0x7F;
  127. tm->tm_min = bcd2bin(buf[DT_MINUTES]);
  128. tm->tm_hour = bcd2bin(buf[DT_HOURS]);
  129. tm->tm_mday = bcd2bin(buf[DT_DAYS]);
  130. tm->tm_mon = bcd2bin(buf[DT_MONTHS]) - 1;
  131. return 0;
  132. }
  133. static int pcf85363_rtc_set_time(struct device *dev, struct rtc_time *tm)
  134. {
  135. struct pcf85363 *pcf85363 = dev_get_drvdata(dev);
  136. unsigned char tmp[11];
  137. unsigned char *buf = &tmp[2];
  138. int ret;
  139. tmp[0] = STOP_EN_STOP;
  140. tmp[1] = RESET_CPR;
  141. buf[DT_100THS] = 0;
  142. buf[DT_SECS] = bin2bcd(tm->tm_sec);
  143. buf[DT_MINUTES] = bin2bcd(tm->tm_min);
  144. buf[DT_HOURS] = bin2bcd(tm->tm_hour);
  145. buf[DT_DAYS] = bin2bcd(tm->tm_mday);
  146. buf[DT_WEEKDAYS] = tm->tm_wday;
  147. buf[DT_MONTHS] = bin2bcd(tm->tm_mon + 1);
  148. buf[DT_YEARS] = bin2bcd(tm->tm_year % 100);
  149. ret = regmap_bulk_write(pcf85363->regmap, CTRL_STOP_EN,
  150. tmp, sizeof(tmp));
  151. if (ret)
  152. return ret;
  153. return regmap_write(pcf85363->regmap, CTRL_STOP_EN, 0);
  154. }
  155. static int pcf85363_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alrm)
  156. {
  157. struct pcf85363 *pcf85363 = dev_get_drvdata(dev);
  158. unsigned char buf[DT_MONTH_ALM1 - DT_SECOND_ALM1 + 1];
  159. unsigned int val;
  160. int ret;
  161. ret = regmap_bulk_read(pcf85363->regmap, DT_SECOND_ALM1, buf,
  162. sizeof(buf));
  163. if (ret)
  164. return ret;
  165. alrm->time.tm_sec = bcd2bin(buf[0]);
  166. alrm->time.tm_min = bcd2bin(buf[1]);
  167. alrm->time.tm_hour = bcd2bin(buf[2]);
  168. alrm->time.tm_mday = bcd2bin(buf[3]);
  169. alrm->time.tm_mon = bcd2bin(buf[4]) - 1;
  170. ret = regmap_read(pcf85363->regmap, CTRL_INTA_EN, &val);
  171. if (ret)
  172. return ret;
  173. alrm->enabled = !!(val & INT_A1IE);
  174. return 0;
  175. }
  176. static int _pcf85363_rtc_alarm_irq_enable(struct pcf85363 *pcf85363, unsigned
  177. int enabled)
  178. {
  179. unsigned int alarm_flags = ALRM_SEC_A1E | ALRM_MIN_A1E | ALRM_HR_A1E |
  180. ALRM_DAY_A1E | ALRM_MON_A1E;
  181. int ret;
  182. ret = regmap_update_bits(pcf85363->regmap, DT_ALARM_EN, alarm_flags,
  183. enabled ? alarm_flags : 0);
  184. if (ret)
  185. return ret;
  186. ret = regmap_update_bits(pcf85363->regmap, CTRL_INTA_EN,
  187. INT_A1IE, enabled ? INT_A1IE : 0);
  188. if (ret || enabled)
  189. return ret;
  190. /* clear current flags */
  191. return regmap_update_bits(pcf85363->regmap, CTRL_FLAGS, FLAGS_A1F, 0);
  192. }
  193. static int pcf85363_rtc_alarm_irq_enable(struct device *dev,
  194. unsigned int enabled)
  195. {
  196. struct pcf85363 *pcf85363 = dev_get_drvdata(dev);
  197. return _pcf85363_rtc_alarm_irq_enable(pcf85363, enabled);
  198. }
  199. static int pcf85363_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alrm)
  200. {
  201. struct pcf85363 *pcf85363 = dev_get_drvdata(dev);
  202. unsigned char buf[DT_MONTH_ALM1 - DT_SECOND_ALM1 + 1];
  203. int ret;
  204. buf[0] = bin2bcd(alrm->time.tm_sec);
  205. buf[1] = bin2bcd(alrm->time.tm_min);
  206. buf[2] = bin2bcd(alrm->time.tm_hour);
  207. buf[3] = bin2bcd(alrm->time.tm_mday);
  208. buf[4] = bin2bcd(alrm->time.tm_mon + 1);
  209. /*
  210. * Disable the alarm interrupt before changing the value to avoid
  211. * spurious interrupts
  212. */
  213. ret = _pcf85363_rtc_alarm_irq_enable(pcf85363, 0);
  214. if (ret)
  215. return ret;
  216. ret = regmap_bulk_write(pcf85363->regmap, DT_SECOND_ALM1, buf,
  217. sizeof(buf));
  218. if (ret)
  219. return ret;
  220. return _pcf85363_rtc_alarm_irq_enable(pcf85363, alrm->enabled);
  221. }
  222. static irqreturn_t pcf85363_rtc_handle_irq(int irq, void *dev_id)
  223. {
  224. struct pcf85363 *pcf85363 = i2c_get_clientdata(dev_id);
  225. unsigned int flags;
  226. int err;
  227. err = regmap_read(pcf85363->regmap, CTRL_FLAGS, &flags);
  228. if (err)
  229. return IRQ_NONE;
  230. if (flags & FLAGS_A1F) {
  231. rtc_update_irq(pcf85363->rtc, 1, RTC_IRQF | RTC_AF);
  232. regmap_update_bits(pcf85363->regmap, CTRL_FLAGS, FLAGS_A1F, 0);
  233. return IRQ_HANDLED;
  234. }
  235. return IRQ_NONE;
  236. }
  237. static const struct rtc_class_ops rtc_ops = {
  238. .read_time = pcf85363_rtc_read_time,
  239. .set_time = pcf85363_rtc_set_time,
  240. };
  241. static const struct rtc_class_ops rtc_ops_alarm = {
  242. .read_time = pcf85363_rtc_read_time,
  243. .set_time = pcf85363_rtc_set_time,
  244. .read_alarm = pcf85363_rtc_read_alarm,
  245. .set_alarm = pcf85363_rtc_set_alarm,
  246. .alarm_irq_enable = pcf85363_rtc_alarm_irq_enable,
  247. };
  248. static int pcf85363_nvram_read(void *priv, unsigned int offset, void *val,
  249. size_t bytes)
  250. {
  251. struct pcf85363 *pcf85363 = priv;
  252. return regmap_bulk_read(pcf85363->regmap, CTRL_RAM + offset,
  253. val, bytes);
  254. }
  255. static int pcf85363_nvram_write(void *priv, unsigned int offset, void *val,
  256. size_t bytes)
  257. {
  258. struct pcf85363 *pcf85363 = priv;
  259. return regmap_bulk_write(pcf85363->regmap, CTRL_RAM + offset,
  260. val, bytes);
  261. }
  262. static const struct regmap_config regmap_config = {
  263. .reg_bits = 8,
  264. .val_bits = 8,
  265. .max_register = 0x7f,
  266. };
  267. static int pcf85363_probe(struct i2c_client *client,
  268. const struct i2c_device_id *id)
  269. {
  270. struct pcf85363 *pcf85363;
  271. struct nvmem_config nvmem_cfg = {
  272. .name = "pcf85363-",
  273. .word_size = 1,
  274. .stride = 1,
  275. .size = NVRAM_SIZE,
  276. .reg_read = pcf85363_nvram_read,
  277. .reg_write = pcf85363_nvram_write,
  278. };
  279. int ret;
  280. if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C))
  281. return -ENODEV;
  282. pcf85363 = devm_kzalloc(&client->dev, sizeof(struct pcf85363),
  283. GFP_KERNEL);
  284. if (!pcf85363)
  285. return -ENOMEM;
  286. pcf85363->regmap = devm_regmap_init_i2c(client, &regmap_config);
  287. if (IS_ERR(pcf85363->regmap)) {
  288. dev_err(&client->dev, "regmap allocation failed\n");
  289. return PTR_ERR(pcf85363->regmap);
  290. }
  291. pcf85363->dev = &client->dev;
  292. i2c_set_clientdata(client, pcf85363);
  293. pcf85363->rtc = devm_rtc_allocate_device(pcf85363->dev);
  294. if (IS_ERR(pcf85363->rtc))
  295. return PTR_ERR(pcf85363->rtc);
  296. pcf85363->rtc->ops = &rtc_ops;
  297. if (client->irq > 0) {
  298. regmap_write(pcf85363->regmap, CTRL_FLAGS, 0);
  299. regmap_update_bits(pcf85363->regmap, CTRL_PIN_IO,
  300. PIN_IO_INTA_OUT, PIN_IO_INTAPM);
  301. ret = devm_request_threaded_irq(pcf85363->dev, client->irq,
  302. NULL, pcf85363_rtc_handle_irq,
  303. IRQF_TRIGGER_LOW | IRQF_ONESHOT,
  304. "pcf85363", client);
  305. if (ret)
  306. dev_warn(&client->dev, "unable to request IRQ, alarms disabled\n");
  307. else
  308. pcf85363->rtc->ops = &rtc_ops_alarm;
  309. }
  310. ret = rtc_register_device(pcf85363->rtc);
  311. nvmem_cfg.priv = pcf85363;
  312. rtc_nvmem_register(pcf85363->rtc, &nvmem_cfg);
  313. return ret;
  314. }
  315. static const struct of_device_id dev_ids[] = {
  316. { .compatible = "nxp,pcf85363" },
  317. {}
  318. };
  319. MODULE_DEVICE_TABLE(of, dev_ids);
  320. static struct i2c_driver pcf85363_driver = {
  321. .driver = {
  322. .name = "pcf85363",
  323. .of_match_table = of_match_ptr(dev_ids),
  324. },
  325. .probe = pcf85363_probe,
  326. };
  327. module_i2c_driver(pcf85363_driver);
  328. MODULE_AUTHOR("Eric Nelson");
  329. MODULE_DESCRIPTION("pcf85363 I2C RTC driver");
  330. MODULE_LICENSE("GPL");