reset-qcom-pdc.c 3.2 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * Copyright (C) 2018 The Linux Foundation. All rights reserved.
  4. */
  5. #include <linux/module.h>
  6. #include <linux/of_device.h>
  7. #include <linux/platform_device.h>
  8. #include <linux/regmap.h>
  9. #include <linux/reset-controller.h>
  10. #include <dt-bindings/reset/qcom,sdm845-pdc.h>
  11. #define RPMH_PDC_SYNC_RESET 0x100
  12. struct qcom_pdc_reset_map {
  13. u8 bit;
  14. };
  15. struct qcom_pdc_reset_data {
  16. struct reset_controller_dev rcdev;
  17. struct regmap *regmap;
  18. };
  19. static const struct regmap_config sdm845_pdc_regmap_config = {
  20. .name = "pdc-reset",
  21. .reg_bits = 32,
  22. .reg_stride = 4,
  23. .val_bits = 32,
  24. .max_register = 0x20000,
  25. .fast_io = true,
  26. };
  27. static const struct qcom_pdc_reset_map sdm845_pdc_resets[] = {
  28. [PDC_APPS_SYNC_RESET] = {0},
  29. [PDC_SP_SYNC_RESET] = {1},
  30. [PDC_AUDIO_SYNC_RESET] = {2},
  31. [PDC_SENSORS_SYNC_RESET] = {3},
  32. [PDC_AOP_SYNC_RESET] = {4},
  33. [PDC_DEBUG_SYNC_RESET] = {5},
  34. [PDC_GPU_SYNC_RESET] = {6},
  35. [PDC_DISPLAY_SYNC_RESET] = {7},
  36. [PDC_COMPUTE_SYNC_RESET] = {8},
  37. [PDC_MODEM_SYNC_RESET] = {9},
  38. };
  39. static inline struct qcom_pdc_reset_data *to_qcom_pdc_reset_data(
  40. struct reset_controller_dev *rcdev)
  41. {
  42. return container_of(rcdev, struct qcom_pdc_reset_data, rcdev);
  43. }
  44. static int qcom_pdc_control_assert(struct reset_controller_dev *rcdev,
  45. unsigned long idx)
  46. {
  47. struct qcom_pdc_reset_data *data = to_qcom_pdc_reset_data(rcdev);
  48. return regmap_update_bits(data->regmap, RPMH_PDC_SYNC_RESET,
  49. BIT(sdm845_pdc_resets[idx].bit),
  50. BIT(sdm845_pdc_resets[idx].bit));
  51. }
  52. static int qcom_pdc_control_deassert(struct reset_controller_dev *rcdev,
  53. unsigned long idx)
  54. {
  55. struct qcom_pdc_reset_data *data = to_qcom_pdc_reset_data(rcdev);
  56. return regmap_update_bits(data->regmap, RPMH_PDC_SYNC_RESET,
  57. BIT(sdm845_pdc_resets[idx].bit), 0);
  58. }
  59. static const struct reset_control_ops qcom_pdc_reset_ops = {
  60. .assert = qcom_pdc_control_assert,
  61. .deassert = qcom_pdc_control_deassert,
  62. };
  63. static int qcom_pdc_reset_probe(struct platform_device *pdev)
  64. {
  65. struct qcom_pdc_reset_data *data;
  66. struct device *dev = &pdev->dev;
  67. void __iomem *base;
  68. struct resource *res;
  69. data = devm_kzalloc(dev, sizeof(*data), GFP_KERNEL);
  70. if (!data)
  71. return -ENOMEM;
  72. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  73. base = devm_ioremap_resource(dev, res);
  74. if (IS_ERR(base))
  75. return PTR_ERR(base);
  76. data->regmap = devm_regmap_init_mmio(dev, base,
  77. &sdm845_pdc_regmap_config);
  78. if (IS_ERR(data->regmap)) {
  79. dev_err(dev, "Unable to initialize regmap\n");
  80. return PTR_ERR(data->regmap);
  81. }
  82. data->rcdev.owner = THIS_MODULE;
  83. data->rcdev.ops = &qcom_pdc_reset_ops;
  84. data->rcdev.nr_resets = ARRAY_SIZE(sdm845_pdc_resets);
  85. data->rcdev.of_node = dev->of_node;
  86. return devm_reset_controller_register(dev, &data->rcdev);
  87. }
  88. static const struct of_device_id qcom_pdc_reset_of_match[] = {
  89. { .compatible = "qcom,sdm845-pdc-global" },
  90. {}
  91. };
  92. MODULE_DEVICE_TABLE(of, qcom_pdc_reset_of_match);
  93. static struct platform_driver qcom_pdc_reset_driver = {
  94. .probe = qcom_pdc_reset_probe,
  95. .driver = {
  96. .name = "qcom_pdc_reset",
  97. .of_match_table = qcom_pdc_reset_of_match,
  98. },
  99. };
  100. module_platform_driver(qcom_pdc_reset_driver);
  101. MODULE_DESCRIPTION("Qualcomm PDC Reset Driver");
  102. MODULE_LICENSE("GPL v2");