qcom_smd-regulator.c 29 KB

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  1. /*
  2. * Copyright (c) 2015, Sony Mobile Communications AB.
  3. * Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
  4. *
  5. * This program is free software; you can redistribute it and/or modify
  6. * it under the terms of the GNU General Public License version 2 and
  7. * only version 2 as published by the Free Software Foundation.
  8. *
  9. * This program is distributed in the hope that it will be useful,
  10. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  12. * GNU General Public License for more details.
  13. */
  14. #include <linux/module.h>
  15. #include <linux/of.h>
  16. #include <linux/of_device.h>
  17. #include <linux/platform_device.h>
  18. #include <linux/regulator/driver.h>
  19. #include <linux/soc/qcom/smd-rpm.h>
  20. struct qcom_rpm_reg {
  21. struct device *dev;
  22. struct qcom_smd_rpm *rpm;
  23. u32 type;
  24. u32 id;
  25. struct regulator_desc desc;
  26. int is_enabled;
  27. int uV;
  28. };
  29. struct rpm_regulator_req {
  30. __le32 key;
  31. __le32 nbytes;
  32. __le32 value;
  33. };
  34. #define RPM_KEY_SWEN 0x6e657773 /* "swen" */
  35. #define RPM_KEY_UV 0x00007675 /* "uv" */
  36. #define RPM_KEY_MA 0x0000616d /* "ma" */
  37. static int rpm_reg_write_active(struct qcom_rpm_reg *vreg,
  38. struct rpm_regulator_req *req,
  39. size_t size)
  40. {
  41. return qcom_rpm_smd_write(vreg->rpm,
  42. QCOM_SMD_RPM_ACTIVE_STATE,
  43. vreg->type,
  44. vreg->id,
  45. req, size);
  46. }
  47. static int rpm_reg_enable(struct regulator_dev *rdev)
  48. {
  49. struct qcom_rpm_reg *vreg = rdev_get_drvdata(rdev);
  50. struct rpm_regulator_req req;
  51. int ret;
  52. req.key = cpu_to_le32(RPM_KEY_SWEN);
  53. req.nbytes = cpu_to_le32(sizeof(u32));
  54. req.value = cpu_to_le32(1);
  55. ret = rpm_reg_write_active(vreg, &req, sizeof(req));
  56. if (!ret)
  57. vreg->is_enabled = 1;
  58. return ret;
  59. }
  60. static int rpm_reg_is_enabled(struct regulator_dev *rdev)
  61. {
  62. struct qcom_rpm_reg *vreg = rdev_get_drvdata(rdev);
  63. return vreg->is_enabled;
  64. }
  65. static int rpm_reg_disable(struct regulator_dev *rdev)
  66. {
  67. struct qcom_rpm_reg *vreg = rdev_get_drvdata(rdev);
  68. struct rpm_regulator_req req;
  69. int ret;
  70. req.key = cpu_to_le32(RPM_KEY_SWEN);
  71. req.nbytes = cpu_to_le32(sizeof(u32));
  72. req.value = 0;
  73. ret = rpm_reg_write_active(vreg, &req, sizeof(req));
  74. if (!ret)
  75. vreg->is_enabled = 0;
  76. return ret;
  77. }
  78. static int rpm_reg_get_voltage(struct regulator_dev *rdev)
  79. {
  80. struct qcom_rpm_reg *vreg = rdev_get_drvdata(rdev);
  81. return vreg->uV;
  82. }
  83. static int rpm_reg_set_voltage(struct regulator_dev *rdev,
  84. int min_uV,
  85. int max_uV,
  86. unsigned *selector)
  87. {
  88. struct qcom_rpm_reg *vreg = rdev_get_drvdata(rdev);
  89. struct rpm_regulator_req req;
  90. int ret = 0;
  91. req.key = cpu_to_le32(RPM_KEY_UV);
  92. req.nbytes = cpu_to_le32(sizeof(u32));
  93. req.value = cpu_to_le32(min_uV);
  94. ret = rpm_reg_write_active(vreg, &req, sizeof(req));
  95. if (!ret)
  96. vreg->uV = min_uV;
  97. return ret;
  98. }
  99. static int rpm_reg_set_load(struct regulator_dev *rdev, int load_uA)
  100. {
  101. struct qcom_rpm_reg *vreg = rdev_get_drvdata(rdev);
  102. struct rpm_regulator_req req;
  103. req.key = cpu_to_le32(RPM_KEY_MA);
  104. req.nbytes = cpu_to_le32(sizeof(u32));
  105. req.value = cpu_to_le32(load_uA / 1000);
  106. return rpm_reg_write_active(vreg, &req, sizeof(req));
  107. }
  108. static const struct regulator_ops rpm_smps_ldo_ops = {
  109. .enable = rpm_reg_enable,
  110. .disable = rpm_reg_disable,
  111. .is_enabled = rpm_reg_is_enabled,
  112. .list_voltage = regulator_list_voltage_linear_range,
  113. .get_voltage = rpm_reg_get_voltage,
  114. .set_voltage = rpm_reg_set_voltage,
  115. .set_load = rpm_reg_set_load,
  116. };
  117. static const struct regulator_ops rpm_smps_ldo_ops_fixed = {
  118. .enable = rpm_reg_enable,
  119. .disable = rpm_reg_disable,
  120. .is_enabled = rpm_reg_is_enabled,
  121. .get_voltage = rpm_reg_get_voltage,
  122. .set_voltage = rpm_reg_set_voltage,
  123. .set_load = rpm_reg_set_load,
  124. };
  125. static const struct regulator_ops rpm_switch_ops = {
  126. .enable = rpm_reg_enable,
  127. .disable = rpm_reg_disable,
  128. .is_enabled = rpm_reg_is_enabled,
  129. };
  130. static const struct regulator_ops rpm_bob_ops = {
  131. .enable = rpm_reg_enable,
  132. .disable = rpm_reg_disable,
  133. .is_enabled = rpm_reg_is_enabled,
  134. .get_voltage = rpm_reg_get_voltage,
  135. .set_voltage = rpm_reg_set_voltage,
  136. };
  137. static const struct regulator_desc pma8084_hfsmps = {
  138. .linear_ranges = (struct regulator_linear_range[]) {
  139. REGULATOR_LINEAR_RANGE(375000, 0, 95, 12500),
  140. REGULATOR_LINEAR_RANGE(1550000, 96, 158, 25000),
  141. },
  142. .n_linear_ranges = 2,
  143. .n_voltages = 159,
  144. .ops = &rpm_smps_ldo_ops,
  145. };
  146. static const struct regulator_desc pma8084_ftsmps = {
  147. .linear_ranges = (struct regulator_linear_range[]) {
  148. REGULATOR_LINEAR_RANGE(350000, 0, 184, 5000),
  149. REGULATOR_LINEAR_RANGE(1280000, 185, 261, 10000),
  150. },
  151. .n_linear_ranges = 2,
  152. .n_voltages = 262,
  153. .ops = &rpm_smps_ldo_ops,
  154. };
  155. static const struct regulator_desc pma8084_pldo = {
  156. .linear_ranges = (struct regulator_linear_range[]) {
  157. REGULATOR_LINEAR_RANGE( 750000, 0, 63, 12500),
  158. REGULATOR_LINEAR_RANGE(1550000, 64, 126, 25000),
  159. REGULATOR_LINEAR_RANGE(3100000, 127, 163, 50000),
  160. },
  161. .n_linear_ranges = 3,
  162. .n_voltages = 164,
  163. .ops = &rpm_smps_ldo_ops,
  164. };
  165. static const struct regulator_desc pma8084_nldo = {
  166. .linear_ranges = (struct regulator_linear_range[]) {
  167. REGULATOR_LINEAR_RANGE(750000, 0, 63, 12500),
  168. },
  169. .n_linear_ranges = 1,
  170. .n_voltages = 64,
  171. .ops = &rpm_smps_ldo_ops,
  172. };
  173. static const struct regulator_desc pma8084_switch = {
  174. .ops = &rpm_switch_ops,
  175. };
  176. static const struct regulator_desc pm8x41_hfsmps = {
  177. .linear_ranges = (struct regulator_linear_range[]) {
  178. REGULATOR_LINEAR_RANGE( 375000, 0, 95, 12500),
  179. REGULATOR_LINEAR_RANGE(1575000, 96, 158, 25000),
  180. },
  181. .n_linear_ranges = 2,
  182. .n_voltages = 159,
  183. .ops = &rpm_smps_ldo_ops,
  184. };
  185. static const struct regulator_desc pm8841_ftsmps = {
  186. .linear_ranges = (struct regulator_linear_range[]) {
  187. REGULATOR_LINEAR_RANGE(350000, 0, 184, 5000),
  188. REGULATOR_LINEAR_RANGE(1280000, 185, 261, 10000),
  189. },
  190. .n_linear_ranges = 2,
  191. .n_voltages = 262,
  192. .ops = &rpm_smps_ldo_ops,
  193. };
  194. static const struct regulator_desc pm8941_boost = {
  195. .linear_ranges = (struct regulator_linear_range[]) {
  196. REGULATOR_LINEAR_RANGE(4000000, 0, 30, 50000),
  197. },
  198. .n_linear_ranges = 1,
  199. .n_voltages = 31,
  200. .ops = &rpm_smps_ldo_ops,
  201. };
  202. static const struct regulator_desc pm8941_pldo = {
  203. .linear_ranges = (struct regulator_linear_range[]) {
  204. REGULATOR_LINEAR_RANGE( 750000, 0, 63, 12500),
  205. REGULATOR_LINEAR_RANGE(1550000, 64, 126, 25000),
  206. REGULATOR_LINEAR_RANGE(3100000, 127, 163, 50000),
  207. },
  208. .n_linear_ranges = 3,
  209. .n_voltages = 164,
  210. .ops = &rpm_smps_ldo_ops,
  211. };
  212. static const struct regulator_desc pm8941_nldo = {
  213. .linear_ranges = (struct regulator_linear_range[]) {
  214. REGULATOR_LINEAR_RANGE(750000, 0, 63, 12500),
  215. },
  216. .n_linear_ranges = 1,
  217. .n_voltages = 64,
  218. .ops = &rpm_smps_ldo_ops,
  219. };
  220. static const struct regulator_desc pm8941_lnldo = {
  221. .fixed_uV = 1740000,
  222. .n_voltages = 1,
  223. .ops = &rpm_smps_ldo_ops_fixed,
  224. };
  225. static const struct regulator_desc pm8941_switch = {
  226. .ops = &rpm_switch_ops,
  227. };
  228. static const struct regulator_desc pm8916_pldo = {
  229. .linear_ranges = (struct regulator_linear_range[]) {
  230. REGULATOR_LINEAR_RANGE(750000, 0, 208, 12500),
  231. },
  232. .n_linear_ranges = 1,
  233. .n_voltages = 209,
  234. .ops = &rpm_smps_ldo_ops,
  235. };
  236. static const struct regulator_desc pm8916_nldo = {
  237. .linear_ranges = (struct regulator_linear_range[]) {
  238. REGULATOR_LINEAR_RANGE(375000, 0, 93, 12500),
  239. },
  240. .n_linear_ranges = 1,
  241. .n_voltages = 94,
  242. .ops = &rpm_smps_ldo_ops,
  243. };
  244. static const struct regulator_desc pm8916_buck_lvo_smps = {
  245. .linear_ranges = (struct regulator_linear_range[]) {
  246. REGULATOR_LINEAR_RANGE(375000, 0, 95, 12500),
  247. REGULATOR_LINEAR_RANGE(750000, 96, 127, 25000),
  248. },
  249. .n_linear_ranges = 2,
  250. .n_voltages = 128,
  251. .ops = &rpm_smps_ldo_ops,
  252. };
  253. static const struct regulator_desc pm8916_buck_hvo_smps = {
  254. .linear_ranges = (struct regulator_linear_range[]) {
  255. REGULATOR_LINEAR_RANGE(1550000, 0, 31, 25000),
  256. },
  257. .n_linear_ranges = 1,
  258. .n_voltages = 32,
  259. .ops = &rpm_smps_ldo_ops,
  260. };
  261. static const struct regulator_desc pm8994_hfsmps = {
  262. .linear_ranges = (struct regulator_linear_range[]) {
  263. REGULATOR_LINEAR_RANGE( 375000, 0, 95, 12500),
  264. REGULATOR_LINEAR_RANGE(1550000, 96, 158, 25000),
  265. },
  266. .n_linear_ranges = 2,
  267. .n_voltages = 159,
  268. .ops = &rpm_smps_ldo_ops,
  269. };
  270. static const struct regulator_desc pm8994_ftsmps = {
  271. .linear_ranges = (struct regulator_linear_range[]) {
  272. REGULATOR_LINEAR_RANGE(350000, 0, 199, 5000),
  273. REGULATOR_LINEAR_RANGE(700000, 200, 349, 10000),
  274. },
  275. .n_linear_ranges = 2,
  276. .n_voltages = 350,
  277. .ops = &rpm_smps_ldo_ops,
  278. };
  279. static const struct regulator_desc pm8994_nldo = {
  280. .linear_ranges = (struct regulator_linear_range[]) {
  281. REGULATOR_LINEAR_RANGE(750000, 0, 63, 12500),
  282. },
  283. .n_linear_ranges = 1,
  284. .n_voltages = 64,
  285. .ops = &rpm_smps_ldo_ops,
  286. };
  287. static const struct regulator_desc pm8994_pldo = {
  288. .linear_ranges = (struct regulator_linear_range[]) {
  289. REGULATOR_LINEAR_RANGE( 750000, 0, 63, 12500),
  290. REGULATOR_LINEAR_RANGE(1550000, 64, 126, 25000),
  291. REGULATOR_LINEAR_RANGE(3100000, 127, 163, 50000),
  292. },
  293. .n_linear_ranges = 3,
  294. .n_voltages = 164,
  295. .ops = &rpm_smps_ldo_ops,
  296. };
  297. static const struct regulator_desc pm8994_switch = {
  298. .ops = &rpm_switch_ops,
  299. };
  300. static const struct regulator_desc pm8994_lnldo = {
  301. .fixed_uV = 1740000,
  302. .n_voltages = 1,
  303. .ops = &rpm_smps_ldo_ops_fixed,
  304. };
  305. static const struct regulator_desc pm8998_ftsmps = {
  306. .linear_ranges = (struct regulator_linear_range[]) {
  307. REGULATOR_LINEAR_RANGE(320000, 0, 258, 4000),
  308. },
  309. .n_linear_ranges = 1,
  310. .n_voltages = 259,
  311. .ops = &rpm_smps_ldo_ops,
  312. };
  313. static const struct regulator_desc pm8998_hfsmps = {
  314. .linear_ranges = (struct regulator_linear_range[]) {
  315. REGULATOR_LINEAR_RANGE(320000, 0, 215, 8000),
  316. },
  317. .n_linear_ranges = 1,
  318. .n_voltages = 216,
  319. .ops = &rpm_smps_ldo_ops,
  320. };
  321. static const struct regulator_desc pm8998_nldo = {
  322. .linear_ranges = (struct regulator_linear_range[]) {
  323. REGULATOR_LINEAR_RANGE(312000, 0, 127, 8000),
  324. },
  325. .n_linear_ranges = 1,
  326. .n_voltages = 128,
  327. .ops = &rpm_smps_ldo_ops,
  328. };
  329. static const struct regulator_desc pm8998_pldo = {
  330. .linear_ranges = (struct regulator_linear_range[]) {
  331. REGULATOR_LINEAR_RANGE(1664000, 0, 255, 8000),
  332. },
  333. .n_linear_ranges = 1,
  334. .n_voltages = 256,
  335. .ops = &rpm_smps_ldo_ops,
  336. };
  337. static const struct regulator_desc pm8998_pldo_lv = {
  338. .linear_ranges = (struct regulator_linear_range[]) {
  339. REGULATOR_LINEAR_RANGE(1256000, 0, 127, 8000),
  340. },
  341. .n_linear_ranges = 1,
  342. .n_voltages = 128,
  343. .ops = &rpm_smps_ldo_ops,
  344. };
  345. static const struct regulator_desc pm8998_switch = {
  346. .ops = &rpm_switch_ops,
  347. };
  348. static const struct regulator_desc pmi8998_bob = {
  349. .linear_ranges = (struct regulator_linear_range[]) {
  350. REGULATOR_LINEAR_RANGE(1824000, 0, 83, 32000),
  351. },
  352. .n_linear_ranges = 1,
  353. .n_voltages = 84,
  354. .ops = &rpm_bob_ops,
  355. };
  356. static const struct regulator_desc pms405_hfsmps3 = {
  357. .linear_ranges = (struct regulator_linear_range[]) {
  358. REGULATOR_LINEAR_RANGE(320000, 0, 215, 8000),
  359. },
  360. .n_linear_ranges = 1,
  361. .n_voltages = 216,
  362. .ops = &rpm_smps_ldo_ops,
  363. };
  364. static const struct regulator_desc pms405_nldo300 = {
  365. .linear_ranges = (struct regulator_linear_range[]) {
  366. REGULATOR_LINEAR_RANGE(312000, 0, 127, 8000),
  367. },
  368. .n_linear_ranges = 1,
  369. .n_voltages = 128,
  370. .ops = &rpm_smps_ldo_ops,
  371. };
  372. static const struct regulator_desc pms405_nldo1200 = {
  373. .linear_ranges = (struct regulator_linear_range[]) {
  374. REGULATOR_LINEAR_RANGE(312000, 0, 127, 8000),
  375. },
  376. .n_linear_ranges = 1,
  377. .n_voltages = 128,
  378. .ops = &rpm_smps_ldo_ops,
  379. };
  380. static const struct regulator_desc pms405_pldo50 = {
  381. .linear_ranges = (struct regulator_linear_range[]) {
  382. REGULATOR_LINEAR_RANGE(1664000, 0, 128, 16000),
  383. },
  384. .n_linear_ranges = 1,
  385. .n_voltages = 129,
  386. .ops = &rpm_smps_ldo_ops,
  387. };
  388. static const struct regulator_desc pms405_pldo150 = {
  389. .linear_ranges = (struct regulator_linear_range[]) {
  390. REGULATOR_LINEAR_RANGE(1664000, 0, 128, 16000),
  391. },
  392. .n_linear_ranges = 1,
  393. .n_voltages = 129,
  394. .ops = &rpm_smps_ldo_ops,
  395. };
  396. static const struct regulator_desc pms405_pldo600 = {
  397. .linear_ranges = (struct regulator_linear_range[]) {
  398. REGULATOR_LINEAR_RANGE(1256000, 0, 98, 8000),
  399. },
  400. .n_linear_ranges = 1,
  401. .n_voltages = 99,
  402. .ops = &rpm_smps_ldo_ops,
  403. };
  404. struct rpm_regulator_data {
  405. const char *name;
  406. u32 type;
  407. u32 id;
  408. const struct regulator_desc *desc;
  409. const char *supply;
  410. };
  411. static const struct rpm_regulator_data rpm_pm8841_regulators[] = {
  412. { "s1", QCOM_SMD_RPM_SMPB, 1, &pm8x41_hfsmps, "vdd_s1" },
  413. { "s2", QCOM_SMD_RPM_SMPB, 2, &pm8841_ftsmps, "vdd_s2" },
  414. { "s3", QCOM_SMD_RPM_SMPB, 3, &pm8x41_hfsmps, "vdd_s3" },
  415. { "s4", QCOM_SMD_RPM_SMPB, 4, &pm8841_ftsmps, "vdd_s4" },
  416. { "s5", QCOM_SMD_RPM_SMPB, 5, &pm8841_ftsmps, "vdd_s5" },
  417. { "s6", QCOM_SMD_RPM_SMPB, 6, &pm8841_ftsmps, "vdd_s6" },
  418. { "s7", QCOM_SMD_RPM_SMPB, 7, &pm8841_ftsmps, "vdd_s7" },
  419. { "s8", QCOM_SMD_RPM_SMPB, 8, &pm8841_ftsmps, "vdd_s8" },
  420. {}
  421. };
  422. static const struct rpm_regulator_data rpm_pm8916_regulators[] = {
  423. { "s1", QCOM_SMD_RPM_SMPA, 1, &pm8916_buck_lvo_smps, "vdd_s1" },
  424. { "s2", QCOM_SMD_RPM_SMPA, 2, &pm8916_buck_lvo_smps, "vdd_s2" },
  425. { "s3", QCOM_SMD_RPM_SMPA, 3, &pm8916_buck_lvo_smps, "vdd_s3" },
  426. { "s4", QCOM_SMD_RPM_SMPA, 4, &pm8916_buck_hvo_smps, "vdd_s4" },
  427. { "l1", QCOM_SMD_RPM_LDOA, 1, &pm8916_nldo, "vdd_l1_l2_l3" },
  428. { "l2", QCOM_SMD_RPM_LDOA, 2, &pm8916_nldo, "vdd_l1_l2_l3" },
  429. { "l3", QCOM_SMD_RPM_LDOA, 3, &pm8916_nldo, "vdd_l1_l2_l3" },
  430. { "l4", QCOM_SMD_RPM_LDOA, 4, &pm8916_pldo, "vdd_l4_l5_l6" },
  431. { "l5", QCOM_SMD_RPM_LDOA, 5, &pm8916_pldo, "vdd_l4_l5_l6" },
  432. { "l6", QCOM_SMD_RPM_LDOA, 6, &pm8916_pldo, "vdd_l4_l5_l6" },
  433. { "l7", QCOM_SMD_RPM_LDOA, 7, &pm8916_pldo, "vdd_l7" },
  434. { "l8", QCOM_SMD_RPM_LDOA, 8, &pm8916_pldo, "vdd_l8_l9_l10_l11_l12_l13_l14_l15_l16_l17_l18" },
  435. { "l9", QCOM_SMD_RPM_LDOA, 9, &pm8916_pldo, "vdd_l8_l9_l10_l11_l12_l13_l14_l15_l16_l17_l18" },
  436. { "l10", QCOM_SMD_RPM_LDOA, 10, &pm8916_pldo, "vdd_l8_l9_l10_l11_l12_l13_l14_l15_l16_l17_l18"},
  437. { "l11", QCOM_SMD_RPM_LDOA, 11, &pm8916_pldo, "vdd_l8_l9_l10_l11_l12_l13_l14_l15_l16_l17_l18"},
  438. { "l12", QCOM_SMD_RPM_LDOA, 12, &pm8916_pldo, "vdd_l8_l9_l10_l11_l12_l13_l14_l15_l16_l17_l18"},
  439. { "l13", QCOM_SMD_RPM_LDOA, 13, &pm8916_pldo, "vdd_l8_l9_l10_l11_l12_l13_l14_l15_l16_l17_l18"},
  440. { "l14", QCOM_SMD_RPM_LDOA, 14, &pm8916_pldo, "vdd_l8_l9_l10_l11_l12_l13_l14_l15_l16_l17_l18"},
  441. { "l15", QCOM_SMD_RPM_LDOA, 15, &pm8916_pldo, "vdd_l8_l9_l10_l11_l12_l13_l14_l15_l16_l17_l18"},
  442. { "l16", QCOM_SMD_RPM_LDOA, 16, &pm8916_pldo, "vdd_l8_l9_l10_l11_l12_l13_l14_l15_l16_l17_l18"},
  443. { "l17", QCOM_SMD_RPM_LDOA, 17, &pm8916_pldo, "vdd_l8_l9_l10_l11_l12_l13_l14_l15_l16_l17_l18"},
  444. { "l18", QCOM_SMD_RPM_LDOA, 18, &pm8916_pldo, "vdd_l8_l9_l10_l11_l12_l13_l14_l15_l16_l17_l18"},
  445. {}
  446. };
  447. static const struct rpm_regulator_data rpm_pm8941_regulators[] = {
  448. { "s1", QCOM_SMD_RPM_SMPA, 1, &pm8x41_hfsmps, "vdd_s1" },
  449. { "s2", QCOM_SMD_RPM_SMPA, 2, &pm8x41_hfsmps, "vdd_s2" },
  450. { "s3", QCOM_SMD_RPM_SMPA, 3, &pm8x41_hfsmps, "vdd_s3" },
  451. { "s4", QCOM_SMD_RPM_BOOST, 1, &pm8941_boost },
  452. { "l1", QCOM_SMD_RPM_LDOA, 1, &pm8941_nldo, "vdd_l1_l3" },
  453. { "l2", QCOM_SMD_RPM_LDOA, 2, &pm8941_nldo, "vdd_l2_lvs1_2_3" },
  454. { "l3", QCOM_SMD_RPM_LDOA, 3, &pm8941_nldo, "vdd_l1_l3" },
  455. { "l4", QCOM_SMD_RPM_LDOA, 4, &pm8941_nldo, "vdd_l4_l11" },
  456. { "l5", QCOM_SMD_RPM_LDOA, 5, &pm8941_lnldo, "vdd_l5_l7" },
  457. { "l6", QCOM_SMD_RPM_LDOA, 6, &pm8941_pldo, "vdd_l6_l12_l14_l15" },
  458. { "l7", QCOM_SMD_RPM_LDOA, 7, &pm8941_lnldo, "vdd_l5_l7" },
  459. { "l8", QCOM_SMD_RPM_LDOA, 8, &pm8941_pldo, "vdd_l8_l16_l18_l19" },
  460. { "l9", QCOM_SMD_RPM_LDOA, 9, &pm8941_pldo, "vdd_l9_l10_l17_l22" },
  461. { "l10", QCOM_SMD_RPM_LDOA, 10, &pm8941_pldo, "vdd_l9_l10_l17_l22" },
  462. { "l11", QCOM_SMD_RPM_LDOA, 11, &pm8941_nldo, "vdd_l4_l11" },
  463. { "l12", QCOM_SMD_RPM_LDOA, 12, &pm8941_pldo, "vdd_l6_l12_l14_l15" },
  464. { "l13", QCOM_SMD_RPM_LDOA, 13, &pm8941_pldo, "vdd_l13_l20_l23_l24" },
  465. { "l14", QCOM_SMD_RPM_LDOA, 14, &pm8941_pldo, "vdd_l6_l12_l14_l15" },
  466. { "l15", QCOM_SMD_RPM_LDOA, 15, &pm8941_pldo, "vdd_l6_l12_l14_l15" },
  467. { "l16", QCOM_SMD_RPM_LDOA, 16, &pm8941_pldo, "vdd_l8_l16_l18_l19" },
  468. { "l17", QCOM_SMD_RPM_LDOA, 17, &pm8941_pldo, "vdd_l9_l10_l17_l22" },
  469. { "l18", QCOM_SMD_RPM_LDOA, 18, &pm8941_pldo, "vdd_l8_l16_l18_l19" },
  470. { "l19", QCOM_SMD_RPM_LDOA, 19, &pm8941_pldo, "vdd_l8_l16_l18_l19" },
  471. { "l20", QCOM_SMD_RPM_LDOA, 20, &pm8941_pldo, "vdd_l13_l20_l23_l24" },
  472. { "l21", QCOM_SMD_RPM_LDOA, 21, &pm8941_pldo, "vdd_l21" },
  473. { "l22", QCOM_SMD_RPM_LDOA, 22, &pm8941_pldo, "vdd_l9_l10_l17_l22" },
  474. { "l23", QCOM_SMD_RPM_LDOA, 23, &pm8941_pldo, "vdd_l13_l20_l23_l24" },
  475. { "l24", QCOM_SMD_RPM_LDOA, 24, &pm8941_pldo, "vdd_l13_l20_l23_l24" },
  476. { "lvs1", QCOM_SMD_RPM_VSA, 1, &pm8941_switch, "vdd_l2_lvs1_2_3" },
  477. { "lvs2", QCOM_SMD_RPM_VSA, 2, &pm8941_switch, "vdd_l2_lvs1_2_3" },
  478. { "lvs3", QCOM_SMD_RPM_VSA, 3, &pm8941_switch, "vdd_l2_lvs1_2_3" },
  479. { "5vs1", QCOM_SMD_RPM_VSA, 4, &pm8941_switch, "vin_5vs" },
  480. { "5vs2", QCOM_SMD_RPM_VSA, 5, &pm8941_switch, "vin_5vs" },
  481. {}
  482. };
  483. static const struct rpm_regulator_data rpm_pma8084_regulators[] = {
  484. { "s1", QCOM_SMD_RPM_SMPA, 1, &pma8084_ftsmps, "vdd_s1" },
  485. { "s2", QCOM_SMD_RPM_SMPA, 2, &pma8084_ftsmps, "vdd_s2" },
  486. { "s3", QCOM_SMD_RPM_SMPA, 3, &pma8084_hfsmps, "vdd_s3" },
  487. { "s4", QCOM_SMD_RPM_SMPA, 4, &pma8084_hfsmps, "vdd_s4" },
  488. { "s5", QCOM_SMD_RPM_SMPA, 5, &pma8084_hfsmps, "vdd_s5" },
  489. { "s6", QCOM_SMD_RPM_SMPA, 6, &pma8084_ftsmps, "vdd_s6" },
  490. { "s7", QCOM_SMD_RPM_SMPA, 7, &pma8084_ftsmps, "vdd_s7" },
  491. { "s8", QCOM_SMD_RPM_SMPA, 8, &pma8084_ftsmps, "vdd_s8" },
  492. { "s9", QCOM_SMD_RPM_SMPA, 9, &pma8084_ftsmps, "vdd_s9" },
  493. { "s10", QCOM_SMD_RPM_SMPA, 10, &pma8084_ftsmps, "vdd_s10" },
  494. { "s11", QCOM_SMD_RPM_SMPA, 11, &pma8084_ftsmps, "vdd_s11" },
  495. { "s12", QCOM_SMD_RPM_SMPA, 12, &pma8084_ftsmps, "vdd_s12" },
  496. { "l1", QCOM_SMD_RPM_LDOA, 1, &pma8084_nldo, "vdd_l1_l11" },
  497. { "l2", QCOM_SMD_RPM_LDOA, 2, &pma8084_nldo, "vdd_l2_l3_l4_l27" },
  498. { "l3", QCOM_SMD_RPM_LDOA, 3, &pma8084_nldo, "vdd_l2_l3_l4_l27" },
  499. { "l4", QCOM_SMD_RPM_LDOA, 4, &pma8084_nldo, "vdd_l2_l3_l4_l27" },
  500. { "l5", QCOM_SMD_RPM_LDOA, 5, &pma8084_pldo, "vdd_l5_l7" },
  501. { "l6", QCOM_SMD_RPM_LDOA, 6, &pma8084_pldo, "vdd_l6_l12_l14_l15_l26" },
  502. { "l7", QCOM_SMD_RPM_LDOA, 7, &pma8084_pldo, "vdd_l5_l7" },
  503. { "l8", QCOM_SMD_RPM_LDOA, 8, &pma8084_pldo, "vdd_l8" },
  504. { "l9", QCOM_SMD_RPM_LDOA, 9, &pma8084_pldo, "vdd_l9_l10_l13_l20_l23_l24" },
  505. { "l10", QCOM_SMD_RPM_LDOA, 10, &pma8084_pldo, "vdd_l9_l10_l13_l20_l23_l24" },
  506. { "l11", QCOM_SMD_RPM_LDOA, 11, &pma8084_nldo, "vdd_l1_l11" },
  507. { "l12", QCOM_SMD_RPM_LDOA, 12, &pma8084_pldo, "vdd_l6_l12_l14_l15_l26" },
  508. { "l13", QCOM_SMD_RPM_LDOA, 13, &pma8084_pldo, "vdd_l9_l10_l13_l20_l23_l24" },
  509. { "l14", QCOM_SMD_RPM_LDOA, 14, &pma8084_pldo, "vdd_l6_l12_l14_l15_l26" },
  510. { "l15", QCOM_SMD_RPM_LDOA, 15, &pma8084_pldo, "vdd_l6_l12_l14_l15_l26" },
  511. { "l16", QCOM_SMD_RPM_LDOA, 16, &pma8084_pldo, "vdd_l16_l25" },
  512. { "l17", QCOM_SMD_RPM_LDOA, 17, &pma8084_pldo, "vdd_l17" },
  513. { "l18", QCOM_SMD_RPM_LDOA, 18, &pma8084_pldo, "vdd_l18" },
  514. { "l19", QCOM_SMD_RPM_LDOA, 19, &pma8084_pldo, "vdd_l19" },
  515. { "l20", QCOM_SMD_RPM_LDOA, 20, &pma8084_pldo, "vdd_l9_l10_l13_l20_l23_l24" },
  516. { "l21", QCOM_SMD_RPM_LDOA, 21, &pma8084_pldo, "vdd_l21" },
  517. { "l22", QCOM_SMD_RPM_LDOA, 22, &pma8084_pldo, "vdd_l22" },
  518. { "l23", QCOM_SMD_RPM_LDOA, 23, &pma8084_pldo, "vdd_l9_l10_l13_l20_l23_l24" },
  519. { "l24", QCOM_SMD_RPM_LDOA, 24, &pma8084_pldo, "vdd_l9_l10_l13_l20_l23_l24" },
  520. { "l25", QCOM_SMD_RPM_LDOA, 25, &pma8084_pldo, "vdd_l16_l25" },
  521. { "l26", QCOM_SMD_RPM_LDOA, 26, &pma8084_pldo, "vdd_l6_l12_l14_l15_l26" },
  522. { "l27", QCOM_SMD_RPM_LDOA, 27, &pma8084_nldo, "vdd_l2_l3_l4_l27" },
  523. { "lvs1", QCOM_SMD_RPM_VSA, 1, &pma8084_switch },
  524. { "lvs2", QCOM_SMD_RPM_VSA, 2, &pma8084_switch },
  525. { "lvs3", QCOM_SMD_RPM_VSA, 3, &pma8084_switch },
  526. { "lvs4", QCOM_SMD_RPM_VSA, 4, &pma8084_switch },
  527. { "5vs1", QCOM_SMD_RPM_VSA, 5, &pma8084_switch },
  528. {}
  529. };
  530. static const struct rpm_regulator_data rpm_pm8994_regulators[] = {
  531. { "s1", QCOM_SMD_RPM_SMPA, 1, &pm8994_ftsmps, "vdd_s1" },
  532. { "s2", QCOM_SMD_RPM_SMPA, 2, &pm8994_ftsmps, "vdd_s2" },
  533. { "s3", QCOM_SMD_RPM_SMPA, 3, &pm8994_hfsmps, "vdd_s3" },
  534. { "s4", QCOM_SMD_RPM_SMPA, 4, &pm8994_hfsmps, "vdd_s4" },
  535. { "s5", QCOM_SMD_RPM_SMPA, 5, &pm8994_hfsmps, "vdd_s5" },
  536. { "s6", QCOM_SMD_RPM_SMPA, 6, &pm8994_ftsmps, "vdd_s6" },
  537. { "s7", QCOM_SMD_RPM_SMPA, 7, &pm8994_hfsmps, "vdd_s7" },
  538. { "s8", QCOM_SMD_RPM_SMPA, 8, &pm8994_ftsmps, "vdd_s8" },
  539. { "s9", QCOM_SMD_RPM_SMPA, 9, &pm8994_ftsmps, "vdd_s9" },
  540. { "s10", QCOM_SMD_RPM_SMPA, 10, &pm8994_ftsmps, "vdd_s10" },
  541. { "s11", QCOM_SMD_RPM_SMPA, 11, &pm8994_ftsmps, "vdd_s11" },
  542. { "s12", QCOM_SMD_RPM_SMPA, 12, &pm8994_ftsmps, "vdd_s12" },
  543. { "l1", QCOM_SMD_RPM_LDOA, 1, &pm8994_nldo, "vdd_l1" },
  544. { "l2", QCOM_SMD_RPM_LDOA, 2, &pm8994_nldo, "vdd_l2_l26_l28" },
  545. { "l3", QCOM_SMD_RPM_LDOA, 3, &pm8994_nldo, "vdd_l3_l11" },
  546. { "l4", QCOM_SMD_RPM_LDOA, 4, &pm8994_nldo, "vdd_l4_l27_l31" },
  547. { "l5", QCOM_SMD_RPM_LDOA, 5, &pm8994_lnldo, "vdd_l5_l7" },
  548. { "l6", QCOM_SMD_RPM_LDOA, 6, &pm8994_pldo, "vdd_l6_l12_l32" },
  549. { "l7", QCOM_SMD_RPM_LDOA, 7, &pm8994_lnldo, "vdd_l5_l7" },
  550. { "l8", QCOM_SMD_RPM_LDOA, 8, &pm8994_pldo, "vdd_l8_l16_l30" },
  551. { "l9", QCOM_SMD_RPM_LDOA, 9, &pm8994_pldo, "vdd_l9_l10_l18_l22" },
  552. { "l10", QCOM_SMD_RPM_LDOA, 10, &pm8994_pldo, "vdd_l9_l10_l18_l22" },
  553. { "l11", QCOM_SMD_RPM_LDOA, 11, &pm8994_nldo, "vdd_l3_l11" },
  554. { "l12", QCOM_SMD_RPM_LDOA, 12, &pm8994_pldo, "vdd_l6_l12_l32" },
  555. { "l13", QCOM_SMD_RPM_LDOA, 13, &pm8994_pldo, "vdd_l13_l19_l23_l24" },
  556. { "l14", QCOM_SMD_RPM_LDOA, 14, &pm8994_pldo, "vdd_l14_l15" },
  557. { "l15", QCOM_SMD_RPM_LDOA, 15, &pm8994_pldo, "vdd_l14_l15" },
  558. { "l16", QCOM_SMD_RPM_LDOA, 16, &pm8994_pldo, "vdd_l8_l16_l30" },
  559. { "l17", QCOM_SMD_RPM_LDOA, 17, &pm8994_pldo, "vdd_l17_l29" },
  560. { "l18", QCOM_SMD_RPM_LDOA, 18, &pm8994_pldo, "vdd_l9_l10_l18_l22" },
  561. { "l19", QCOM_SMD_RPM_LDOA, 19, &pm8994_pldo, "vdd_l13_l19_l23_l24" },
  562. { "l20", QCOM_SMD_RPM_LDOA, 20, &pm8994_pldo, "vdd_l20_l21" },
  563. { "l21", QCOM_SMD_RPM_LDOA, 21, &pm8994_pldo, "vdd_l20_l21" },
  564. { "l22", QCOM_SMD_RPM_LDOA, 22, &pm8994_pldo, "vdd_l9_l10_l18_l22" },
  565. { "l23", QCOM_SMD_RPM_LDOA, 23, &pm8994_pldo, "vdd_l13_l19_l23_l24" },
  566. { "l24", QCOM_SMD_RPM_LDOA, 24, &pm8994_pldo, "vdd_l13_l19_l23_l24" },
  567. { "l25", QCOM_SMD_RPM_LDOA, 25, &pm8994_pldo, "vdd_l25" },
  568. { "l26", QCOM_SMD_RPM_LDOA, 26, &pm8994_nldo, "vdd_l2_l26_l28" },
  569. { "l27", QCOM_SMD_RPM_LDOA, 27, &pm8994_nldo, "vdd_l4_l27_l31" },
  570. { "l28", QCOM_SMD_RPM_LDOA, 28, &pm8994_nldo, "vdd_l2_l26_l28" },
  571. { "l29", QCOM_SMD_RPM_LDOA, 29, &pm8994_pldo, "vdd_l17_l29" },
  572. { "l30", QCOM_SMD_RPM_LDOA, 30, &pm8994_pldo, "vdd_l8_l16_l30" },
  573. { "l31", QCOM_SMD_RPM_LDOA, 31, &pm8994_nldo, "vdd_l4_l27_l31" },
  574. { "l32", QCOM_SMD_RPM_LDOA, 32, &pm8994_pldo, "vdd_l6_l12_l32" },
  575. { "lvs1", QCOM_SMD_RPM_VSA, 1, &pm8994_switch, "vdd_lvs1_2" },
  576. { "lvs2", QCOM_SMD_RPM_VSA, 2, &pm8994_switch, "vdd_lvs1_2" },
  577. {}
  578. };
  579. static const struct rpm_regulator_data rpm_pm8998_regulators[] = {
  580. { "s1", QCOM_SMD_RPM_SMPA, 1, &pm8998_ftsmps, "vdd_s1" },
  581. { "s2", QCOM_SMD_RPM_SMPA, 2, &pm8998_ftsmps, "vdd_s2" },
  582. { "s3", QCOM_SMD_RPM_SMPA, 3, &pm8998_hfsmps, "vdd_s3" },
  583. { "s4", QCOM_SMD_RPM_SMPA, 4, &pm8998_hfsmps, "vdd_s4" },
  584. { "s5", QCOM_SMD_RPM_SMPA, 5, &pm8998_hfsmps, "vdd_s5" },
  585. { "s6", QCOM_SMD_RPM_SMPA, 6, &pm8998_ftsmps, "vdd_s6" },
  586. { "s7", QCOM_SMD_RPM_SMPA, 7, &pm8998_ftsmps, "vdd_s7" },
  587. { "s8", QCOM_SMD_RPM_SMPA, 8, &pm8998_ftsmps, "vdd_s8" },
  588. { "s9", QCOM_SMD_RPM_SMPA, 9, &pm8998_ftsmps, "vdd_s9" },
  589. { "s10", QCOM_SMD_RPM_SMPA, 10, &pm8998_ftsmps, "vdd_s10" },
  590. { "s11", QCOM_SMD_RPM_SMPA, 11, &pm8998_ftsmps, "vdd_s11" },
  591. { "s12", QCOM_SMD_RPM_SMPA, 12, &pm8998_ftsmps, "vdd_s12" },
  592. { "s13", QCOM_SMD_RPM_SMPA, 13, &pm8998_ftsmps, "vdd_s13" },
  593. { "l1", QCOM_SMD_RPM_LDOA, 1, &pm8998_nldo, "vdd_l1_l27" },
  594. { "l2", QCOM_SMD_RPM_LDOA, 2, &pm8998_nldo, "vdd_l2_l8_l17" },
  595. { "l3", QCOM_SMD_RPM_LDOA, 3, &pm8998_nldo, "vdd_l3_l11" },
  596. { "l4", QCOM_SMD_RPM_LDOA, 4, &pm8998_nldo, "vdd_l4_l5" },
  597. { "l5", QCOM_SMD_RPM_LDOA, 5, &pm8998_nldo, "vdd_l4_l5" },
  598. { "l6", QCOM_SMD_RPM_LDOA, 6, &pm8998_pldo, "vdd_l6" },
  599. { "l7", QCOM_SMD_RPM_LDOA, 7, &pm8998_pldo_lv, "vdd_l7_l12_l14_l15" },
  600. { "l8", QCOM_SMD_RPM_LDOA, 8, &pm8998_nldo, "vdd_l2_l8_l17" },
  601. { "l9", QCOM_SMD_RPM_LDOA, 9, &pm8998_pldo, "vdd_l9" },
  602. { "l10", QCOM_SMD_RPM_LDOA, 10, &pm8998_pldo, "vdd_l10_l23_l25" },
  603. { "l11", QCOM_SMD_RPM_LDOA, 11, &pm8998_nldo, "vdd_l3_l11" },
  604. { "l12", QCOM_SMD_RPM_LDOA, 12, &pm8998_pldo_lv, "vdd_l7_l12_l14_l15" },
  605. { "l13", QCOM_SMD_RPM_LDOA, 13, &pm8998_pldo, "vdd_l13_l19_l21" },
  606. { "l14", QCOM_SMD_RPM_LDOA, 14, &pm8998_pldo_lv, "vdd_l7_l12_l14_l15" },
  607. { "l15", QCOM_SMD_RPM_LDOA, 15, &pm8998_pldo_lv, "vdd_l7_l12_l14_l15" },
  608. { "l16", QCOM_SMD_RPM_LDOA, 16, &pm8998_pldo, "vdd_l16_l28" },
  609. { "l17", QCOM_SMD_RPM_LDOA, 17, &pm8998_nldo, "vdd_l2_l8_l17" },
  610. { "l18", QCOM_SMD_RPM_LDOA, 18, &pm8998_pldo, "vdd_l18_l22" },
  611. { "l19", QCOM_SMD_RPM_LDOA, 19, &pm8998_pldo, "vdd_l13_l19_l21" },
  612. { "l20", QCOM_SMD_RPM_LDOA, 20, &pm8998_pldo, "vdd_l20_l24" },
  613. { "l21", QCOM_SMD_RPM_LDOA, 21, &pm8998_pldo, "vdd_l13_l19_l21" },
  614. { "l22", QCOM_SMD_RPM_LDOA, 22, &pm8998_pldo, "vdd_l18_l22" },
  615. { "l23", QCOM_SMD_RPM_LDOA, 23, &pm8998_pldo, "vdd_l10_l23_l25" },
  616. { "l24", QCOM_SMD_RPM_LDOA, 24, &pm8998_pldo, "vdd_l20_l24" },
  617. { "l25", QCOM_SMD_RPM_LDOA, 25, &pm8998_pldo, "vdd_l10_l23_l25" },
  618. { "l26", QCOM_SMD_RPM_LDOA, 26, &pm8998_nldo, "vdd_l26" },
  619. { "l27", QCOM_SMD_RPM_LDOA, 27, &pm8998_nldo, "vdd_l1_l27" },
  620. { "l28", QCOM_SMD_RPM_LDOA, 28, &pm8998_pldo, "vdd_l16_l28" },
  621. { "lvs1", QCOM_SMD_RPM_VSA, 1, &pm8998_switch, "vdd_lvs1_lvs2" },
  622. { "lvs2", QCOM_SMD_RPM_VSA, 2, &pm8998_switch, "vdd_lvs1_lvs2" },
  623. {}
  624. };
  625. static const struct rpm_regulator_data rpm_pmi8998_regulators[] = {
  626. { "bob", QCOM_SMD_RPM_BOBB, 1, &pmi8998_bob, "vdd_bob" },
  627. {}
  628. };
  629. static const struct rpm_regulator_data rpm_pms405_regulators[] = {
  630. { "s1", QCOM_SMD_RPM_SMPA, 1, &pms405_hfsmps3, "vdd_s1" },
  631. { "s2", QCOM_SMD_RPM_SMPA, 2, &pms405_hfsmps3, "vdd_s2" },
  632. { "s3", QCOM_SMD_RPM_SMPA, 3, &pms405_hfsmps3, "vdd_s3" },
  633. { "s4", QCOM_SMD_RPM_SMPA, 4, &pms405_hfsmps3, "vdd_s4" },
  634. { "s5", QCOM_SMD_RPM_SMPA, 5, &pms405_hfsmps3, "vdd_s5" },
  635. { "l1", QCOM_SMD_RPM_LDOA, 1, &pms405_nldo1200, "vdd_l1_l2" },
  636. { "l2", QCOM_SMD_RPM_LDOA, 2, &pms405_nldo1200, "vdd_l1_l2" },
  637. { "l3", QCOM_SMD_RPM_LDOA, 3, &pms405_nldo1200, "vdd_l3_l8" },
  638. { "l4", QCOM_SMD_RPM_LDOA, 4, &pms405_nldo300, "vdd_l4" },
  639. { "l5", QCOM_SMD_RPM_LDOA, 5, &pms405_pldo600, "vdd_l5_l6" },
  640. { "l6", QCOM_SMD_RPM_LDOA, 6, &pms405_pldo600, "vdd_l5_l6" },
  641. { "l7", QCOM_SMD_RPM_LDOA, 7, &pms405_pldo150, "vdd_l7" },
  642. { "l8", QCOM_SMD_RPM_LDOA, 8, &pms405_nldo1200, "vdd_l3_l8" },
  643. { "l9", QCOM_SMD_RPM_LDOA, 9, &pms405_nldo1200, "vdd_l9" },
  644. { "l10", QCOM_SMD_RPM_LDOA, 10, &pms405_pldo50, "vdd_l10_l11_l12_l13" },
  645. { "l11", QCOM_SMD_RPM_LDOA, 11, &pms405_pldo150, "vdd_l10_l11_l12_l13" },
  646. { "l12", QCOM_SMD_RPM_LDOA, 12, &pms405_pldo150, "vdd_l10_l11_l12_l13" },
  647. { "l13", QCOM_SMD_RPM_LDOA, 13, &pms405_pldo150, "vdd_l10_l11_l12_l13" },
  648. {}
  649. };
  650. static const struct of_device_id rpm_of_match[] = {
  651. { .compatible = "qcom,rpm-pm8841-regulators", .data = &rpm_pm8841_regulators },
  652. { .compatible = "qcom,rpm-pm8916-regulators", .data = &rpm_pm8916_regulators },
  653. { .compatible = "qcom,rpm-pm8941-regulators", .data = &rpm_pm8941_regulators },
  654. { .compatible = "qcom,rpm-pm8994-regulators", .data = &rpm_pm8994_regulators },
  655. { .compatible = "qcom,rpm-pm8998-regulators", .data = &rpm_pm8998_regulators },
  656. { .compatible = "qcom,rpm-pma8084-regulators", .data = &rpm_pma8084_regulators },
  657. { .compatible = "qcom,rpm-pmi8998-regulators", .data = &rpm_pmi8998_regulators },
  658. { .compatible = "qcom,rpm-pms405-regulators", .data = &rpm_pms405_regulators },
  659. {}
  660. };
  661. MODULE_DEVICE_TABLE(of, rpm_of_match);
  662. static int rpm_reg_probe(struct platform_device *pdev)
  663. {
  664. const struct rpm_regulator_data *reg;
  665. const struct of_device_id *match;
  666. struct regulator_config config = { };
  667. struct regulator_dev *rdev;
  668. struct qcom_rpm_reg *vreg;
  669. struct qcom_smd_rpm *rpm;
  670. rpm = dev_get_drvdata(pdev->dev.parent);
  671. if (!rpm) {
  672. dev_err(&pdev->dev, "unable to retrieve handle to rpm\n");
  673. return -ENODEV;
  674. }
  675. match = of_match_device(rpm_of_match, &pdev->dev);
  676. if (!match) {
  677. dev_err(&pdev->dev, "failed to match device\n");
  678. return -ENODEV;
  679. }
  680. for (reg = match->data; reg->name; reg++) {
  681. vreg = devm_kzalloc(&pdev->dev, sizeof(*vreg), GFP_KERNEL);
  682. if (!vreg)
  683. return -ENOMEM;
  684. vreg->dev = &pdev->dev;
  685. vreg->type = reg->type;
  686. vreg->id = reg->id;
  687. vreg->rpm = rpm;
  688. memcpy(&vreg->desc, reg->desc, sizeof(vreg->desc));
  689. vreg->desc.id = -1;
  690. vreg->desc.owner = THIS_MODULE;
  691. vreg->desc.type = REGULATOR_VOLTAGE;
  692. vreg->desc.name = reg->name;
  693. vreg->desc.supply_name = reg->supply;
  694. vreg->desc.of_match = reg->name;
  695. config.dev = &pdev->dev;
  696. config.driver_data = vreg;
  697. rdev = devm_regulator_register(&pdev->dev, &vreg->desc, &config);
  698. if (IS_ERR(rdev)) {
  699. dev_err(&pdev->dev, "failed to register %s\n", reg->name);
  700. return PTR_ERR(rdev);
  701. }
  702. }
  703. return 0;
  704. }
  705. static struct platform_driver rpm_reg_driver = {
  706. .probe = rpm_reg_probe,
  707. .driver = {
  708. .name = "qcom_rpm_smd_regulator",
  709. .of_match_table = rpm_of_match,
  710. },
  711. };
  712. static int __init rpm_reg_init(void)
  713. {
  714. return platform_driver_register(&rpm_reg_driver);
  715. }
  716. subsys_initcall(rpm_reg_init);
  717. static void __exit rpm_reg_exit(void)
  718. {
  719. platform_driver_unregister(&rpm_reg_driver);
  720. }
  721. module_exit(rpm_reg_exit)
  722. MODULE_DESCRIPTION("Qualcomm RPM regulator driver");
  723. MODULE_LICENSE("GPL v2");