pinctrl-meson-gxbb.c 24 KB

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  1. /*
  2. * Pin controller and GPIO driver for Amlogic Meson GXBB.
  3. *
  4. * Copyright (C) 2016 Endless Mobile, Inc.
  5. * Author: Carlo Caione <carlo@endlessm.com>
  6. *
  7. * This program is free software; you can redistribute it and/or
  8. * modify it under the terms of the GNU General Public License
  9. * version 2 as published by the Free Software Foundation.
  10. *
  11. * You should have received a copy of the GNU General Public License
  12. * along with this program. If not, see <http://www.gnu.org/licenses/>.
  13. */
  14. #include <dt-bindings/gpio/meson-gxbb-gpio.h>
  15. #include "pinctrl-meson.h"
  16. #include "pinctrl-meson8-pmx.h"
  17. static const struct pinctrl_pin_desc meson_gxbb_periphs_pins[] = {
  18. MESON_PIN(GPIOZ_0),
  19. MESON_PIN(GPIOZ_1),
  20. MESON_PIN(GPIOZ_2),
  21. MESON_PIN(GPIOZ_3),
  22. MESON_PIN(GPIOZ_4),
  23. MESON_PIN(GPIOZ_5),
  24. MESON_PIN(GPIOZ_6),
  25. MESON_PIN(GPIOZ_7),
  26. MESON_PIN(GPIOZ_8),
  27. MESON_PIN(GPIOZ_9),
  28. MESON_PIN(GPIOZ_10),
  29. MESON_PIN(GPIOZ_11),
  30. MESON_PIN(GPIOZ_12),
  31. MESON_PIN(GPIOZ_13),
  32. MESON_PIN(GPIOZ_14),
  33. MESON_PIN(GPIOZ_15),
  34. MESON_PIN(GPIOH_0),
  35. MESON_PIN(GPIOH_1),
  36. MESON_PIN(GPIOH_2),
  37. MESON_PIN(GPIOH_3),
  38. MESON_PIN(BOOT_0),
  39. MESON_PIN(BOOT_1),
  40. MESON_PIN(BOOT_2),
  41. MESON_PIN(BOOT_3),
  42. MESON_PIN(BOOT_4),
  43. MESON_PIN(BOOT_5),
  44. MESON_PIN(BOOT_6),
  45. MESON_PIN(BOOT_7),
  46. MESON_PIN(BOOT_8),
  47. MESON_PIN(BOOT_9),
  48. MESON_PIN(BOOT_10),
  49. MESON_PIN(BOOT_11),
  50. MESON_PIN(BOOT_12),
  51. MESON_PIN(BOOT_13),
  52. MESON_PIN(BOOT_14),
  53. MESON_PIN(BOOT_15),
  54. MESON_PIN(BOOT_16),
  55. MESON_PIN(BOOT_17),
  56. MESON_PIN(CARD_0),
  57. MESON_PIN(CARD_1),
  58. MESON_PIN(CARD_2),
  59. MESON_PIN(CARD_3),
  60. MESON_PIN(CARD_4),
  61. MESON_PIN(CARD_5),
  62. MESON_PIN(CARD_6),
  63. MESON_PIN(GPIODV_0),
  64. MESON_PIN(GPIODV_1),
  65. MESON_PIN(GPIODV_2),
  66. MESON_PIN(GPIODV_3),
  67. MESON_PIN(GPIODV_4),
  68. MESON_PIN(GPIODV_5),
  69. MESON_PIN(GPIODV_6),
  70. MESON_PIN(GPIODV_7),
  71. MESON_PIN(GPIODV_8),
  72. MESON_PIN(GPIODV_9),
  73. MESON_PIN(GPIODV_10),
  74. MESON_PIN(GPIODV_11),
  75. MESON_PIN(GPIODV_12),
  76. MESON_PIN(GPIODV_13),
  77. MESON_PIN(GPIODV_14),
  78. MESON_PIN(GPIODV_15),
  79. MESON_PIN(GPIODV_16),
  80. MESON_PIN(GPIODV_17),
  81. MESON_PIN(GPIODV_18),
  82. MESON_PIN(GPIODV_19),
  83. MESON_PIN(GPIODV_20),
  84. MESON_PIN(GPIODV_21),
  85. MESON_PIN(GPIODV_22),
  86. MESON_PIN(GPIODV_23),
  87. MESON_PIN(GPIODV_24),
  88. MESON_PIN(GPIODV_25),
  89. MESON_PIN(GPIODV_26),
  90. MESON_PIN(GPIODV_27),
  91. MESON_PIN(GPIODV_28),
  92. MESON_PIN(GPIODV_29),
  93. MESON_PIN(GPIOY_0),
  94. MESON_PIN(GPIOY_1),
  95. MESON_PIN(GPIOY_2),
  96. MESON_PIN(GPIOY_3),
  97. MESON_PIN(GPIOY_4),
  98. MESON_PIN(GPIOY_5),
  99. MESON_PIN(GPIOY_6),
  100. MESON_PIN(GPIOY_7),
  101. MESON_PIN(GPIOY_8),
  102. MESON_PIN(GPIOY_9),
  103. MESON_PIN(GPIOY_10),
  104. MESON_PIN(GPIOY_11),
  105. MESON_PIN(GPIOY_12),
  106. MESON_PIN(GPIOY_13),
  107. MESON_PIN(GPIOY_14),
  108. MESON_PIN(GPIOY_15),
  109. MESON_PIN(GPIOY_16),
  110. MESON_PIN(GPIOX_0),
  111. MESON_PIN(GPIOX_1),
  112. MESON_PIN(GPIOX_2),
  113. MESON_PIN(GPIOX_3),
  114. MESON_PIN(GPIOX_4),
  115. MESON_PIN(GPIOX_5),
  116. MESON_PIN(GPIOX_6),
  117. MESON_PIN(GPIOX_7),
  118. MESON_PIN(GPIOX_8),
  119. MESON_PIN(GPIOX_9),
  120. MESON_PIN(GPIOX_10),
  121. MESON_PIN(GPIOX_11),
  122. MESON_PIN(GPIOX_12),
  123. MESON_PIN(GPIOX_13),
  124. MESON_PIN(GPIOX_14),
  125. MESON_PIN(GPIOX_15),
  126. MESON_PIN(GPIOX_16),
  127. MESON_PIN(GPIOX_17),
  128. MESON_PIN(GPIOX_18),
  129. MESON_PIN(GPIOX_19),
  130. MESON_PIN(GPIOX_20),
  131. MESON_PIN(GPIOX_21),
  132. MESON_PIN(GPIOX_22),
  133. MESON_PIN(GPIOCLK_0),
  134. MESON_PIN(GPIOCLK_1),
  135. MESON_PIN(GPIOCLK_2),
  136. MESON_PIN(GPIOCLK_3),
  137. };
  138. static const unsigned int emmc_nand_d07_pins[] = {
  139. BOOT_0, BOOT_1, BOOT_2, BOOT_3, BOOT_4, BOOT_5, BOOT_6, BOOT_7,
  140. };
  141. static const unsigned int emmc_clk_pins[] = { BOOT_8 };
  142. static const unsigned int emmc_cmd_pins[] = { BOOT_10 };
  143. static const unsigned int emmc_ds_pins[] = { BOOT_15 };
  144. static const unsigned int nor_d_pins[] = { BOOT_11 };
  145. static const unsigned int nor_q_pins[] = { BOOT_12 };
  146. static const unsigned int nor_c_pins[] = { BOOT_13 };
  147. static const unsigned int nor_cs_pins[] = { BOOT_15 };
  148. static const unsigned int spi_sclk_pins[] = { GPIOZ_6 };
  149. static const unsigned int spi_ss0_pins[] = { GPIOZ_7 };
  150. static const unsigned int spi_miso_pins[] = { GPIOZ_12 };
  151. static const unsigned int spi_mosi_pins[] = { GPIOZ_13 };
  152. static const unsigned int sdcard_d0_pins[] = { CARD_1 };
  153. static const unsigned int sdcard_d1_pins[] = { CARD_0 };
  154. static const unsigned int sdcard_d2_pins[] = { CARD_5 };
  155. static const unsigned int sdcard_d3_pins[] = { CARD_4 };
  156. static const unsigned int sdcard_cmd_pins[] = { CARD_3 };
  157. static const unsigned int sdcard_clk_pins[] = { CARD_2 };
  158. static const unsigned int sdio_d0_pins[] = { GPIOX_0 };
  159. static const unsigned int sdio_d1_pins[] = { GPIOX_1 };
  160. static const unsigned int sdio_d2_pins[] = { GPIOX_2 };
  161. static const unsigned int sdio_d3_pins[] = { GPIOX_3 };
  162. static const unsigned int sdio_cmd_pins[] = { GPIOX_4 };
  163. static const unsigned int sdio_clk_pins[] = { GPIOX_5 };
  164. static const unsigned int sdio_irq_pins[] = { GPIOX_7 };
  165. static const unsigned int nand_ce0_pins[] = { BOOT_8 };
  166. static const unsigned int nand_ce1_pins[] = { BOOT_9 };
  167. static const unsigned int nand_rb0_pins[] = { BOOT_10 };
  168. static const unsigned int nand_ale_pins[] = { BOOT_11 };
  169. static const unsigned int nand_cle_pins[] = { BOOT_12 };
  170. static const unsigned int nand_wen_clk_pins[] = { BOOT_13 };
  171. static const unsigned int nand_ren_wr_pins[] = { BOOT_14 };
  172. static const unsigned int nand_dqs_pins[] = { BOOT_15 };
  173. static const unsigned int uart_tx_a_pins[] = { GPIOX_12 };
  174. static const unsigned int uart_rx_a_pins[] = { GPIOX_13 };
  175. static const unsigned int uart_cts_a_pins[] = { GPIOX_14 };
  176. static const unsigned int uart_rts_a_pins[] = { GPIOX_15 };
  177. static const unsigned int uart_tx_b_pins[] = { GPIODV_24 };
  178. static const unsigned int uart_rx_b_pins[] = { GPIODV_25 };
  179. static const unsigned int uart_cts_b_pins[] = { GPIODV_26 };
  180. static const unsigned int uart_rts_b_pins[] = { GPIODV_27 };
  181. static const unsigned int uart_tx_c_pins[] = { GPIOY_13 };
  182. static const unsigned int uart_rx_c_pins[] = { GPIOY_14 };
  183. static const unsigned int uart_cts_c_pins[] = { GPIOX_11 };
  184. static const unsigned int uart_rts_c_pins[] = { GPIOX_12 };
  185. static const unsigned int i2c_sck_a_pins[] = { GPIODV_25 };
  186. static const unsigned int i2c_sda_a_pins[] = { GPIODV_24 };
  187. static const unsigned int i2c_sck_b_pins[] = { GPIODV_27 };
  188. static const unsigned int i2c_sda_b_pins[] = { GPIODV_26 };
  189. static const unsigned int i2c_sck_c_pins[] = { GPIODV_29 };
  190. static const unsigned int i2c_sda_c_pins[] = { GPIODV_28 };
  191. static const unsigned int eth_mdio_pins[] = { GPIOZ_0 };
  192. static const unsigned int eth_mdc_pins[] = { GPIOZ_1 };
  193. static const unsigned int eth_clk_rx_clk_pins[] = { GPIOZ_2 };
  194. static const unsigned int eth_rx_dv_pins[] = { GPIOZ_3 };
  195. static const unsigned int eth_rxd0_pins[] = { GPIOZ_4 };
  196. static const unsigned int eth_rxd1_pins[] = { GPIOZ_5 };
  197. static const unsigned int eth_rxd2_pins[] = { GPIOZ_6 };
  198. static const unsigned int eth_rxd3_pins[] = { GPIOZ_7 };
  199. static const unsigned int eth_rgmii_tx_clk_pins[] = { GPIOZ_8 };
  200. static const unsigned int eth_tx_en_pins[] = { GPIOZ_9 };
  201. static const unsigned int eth_txd0_pins[] = { GPIOZ_10 };
  202. static const unsigned int eth_txd1_pins[] = { GPIOZ_11 };
  203. static const unsigned int eth_txd2_pins[] = { GPIOZ_12 };
  204. static const unsigned int eth_txd3_pins[] = { GPIOZ_13 };
  205. static const unsigned int pwm_a_x_pins[] = { GPIOX_6 };
  206. static const unsigned int pwm_a_y_pins[] = { GPIOY_16 };
  207. static const unsigned int pwm_b_pins[] = { GPIODV_29 };
  208. static const unsigned int pwm_d_pins[] = { GPIODV_28 };
  209. static const unsigned int pwm_e_pins[] = { GPIOX_19 };
  210. static const unsigned int pwm_f_x_pins[] = { GPIOX_7 };
  211. static const unsigned int pwm_f_y_pins[] = { GPIOY_15 };
  212. static const unsigned int hdmi_hpd_pins[] = { GPIOH_0 };
  213. static const unsigned int hdmi_sda_pins[] = { GPIOH_1 };
  214. static const unsigned int hdmi_scl_pins[] = { GPIOH_2 };
  215. static const unsigned int i2s_out_ch23_y_pins[] = { GPIOY_8 };
  216. static const unsigned int i2s_out_ch45_y_pins[] = { GPIOY_9 };
  217. static const unsigned int i2s_out_ch67_y_pins[] = { GPIOY_10 };
  218. static const unsigned int spdif_out_y_pins[] = { GPIOY_12 };
  219. static const unsigned int gen_clk_out_pins[] = { GPIOY_15 };
  220. static const struct pinctrl_pin_desc meson_gxbb_aobus_pins[] = {
  221. MESON_PIN(GPIOAO_0),
  222. MESON_PIN(GPIOAO_1),
  223. MESON_PIN(GPIOAO_2),
  224. MESON_PIN(GPIOAO_3),
  225. MESON_PIN(GPIOAO_4),
  226. MESON_PIN(GPIOAO_5),
  227. MESON_PIN(GPIOAO_6),
  228. MESON_PIN(GPIOAO_7),
  229. MESON_PIN(GPIOAO_8),
  230. MESON_PIN(GPIOAO_9),
  231. MESON_PIN(GPIOAO_10),
  232. MESON_PIN(GPIOAO_11),
  233. MESON_PIN(GPIOAO_12),
  234. MESON_PIN(GPIOAO_13),
  235. MESON_PIN(GPIO_TEST_N),
  236. };
  237. static const unsigned int uart_tx_ao_a_pins[] = { GPIOAO_0 };
  238. static const unsigned int uart_rx_ao_a_pins[] = { GPIOAO_1 };
  239. static const unsigned int uart_cts_ao_a_pins[] = { GPIOAO_2 };
  240. static const unsigned int uart_rts_ao_a_pins[] = { GPIOAO_3 };
  241. static const unsigned int uart_tx_ao_b_pins[] = { GPIOAO_4 };
  242. static const unsigned int uart_rx_ao_b_pins[] = { GPIOAO_5 };
  243. static const unsigned int uart_cts_ao_b_pins[] = { GPIOAO_2 };
  244. static const unsigned int uart_rts_ao_b_pins[] = { GPIOAO_3 };
  245. static const unsigned int i2c_sck_ao_pins[] = { GPIOAO_4 };
  246. static const unsigned int i2c_sda_ao_pins[] = { GPIOAO_5 };
  247. static const unsigned int i2c_slave_sck_ao_pins[] = {GPIOAO_4 };
  248. static const unsigned int i2c_slave_sda_ao_pins[] = {GPIOAO_5 };
  249. static const unsigned int remote_input_ao_pins[] = { GPIOAO_7 };
  250. static const unsigned int pwm_ao_a_3_pins[] = { GPIOAO_3 };
  251. static const unsigned int pwm_ao_a_6_pins[] = { GPIOAO_6 };
  252. static const unsigned int pwm_ao_a_12_pins[] = { GPIOAO_12 };
  253. static const unsigned int pwm_ao_b_pins[] = { GPIOAO_13 };
  254. static const unsigned int i2s_am_clk_pins[] = { GPIOAO_8 };
  255. static const unsigned int i2s_out_ao_clk_pins[] = { GPIOAO_9 };
  256. static const unsigned int i2s_out_lr_clk_pins[] = { GPIOAO_10 };
  257. static const unsigned int i2s_out_ch01_ao_pins[] = { GPIOAO_11 };
  258. static const unsigned int i2s_out_ch23_ao_pins[] = { GPIOAO_12 };
  259. static const unsigned int i2s_out_ch45_ao_pins[] = { GPIOAO_13 };
  260. static const unsigned int i2s_out_ch67_ao_pins[] = { GPIO_TEST_N };
  261. static const unsigned int spdif_out_ao_6_pins[] = { GPIOAO_6 };
  262. static const unsigned int spdif_out_ao_13_pins[] = { GPIOAO_13 };
  263. static const unsigned int ao_cec_pins[] = { GPIOAO_12 };
  264. static const unsigned int ee_cec_pins[] = { GPIOAO_12 };
  265. static struct meson_pmx_group meson_gxbb_periphs_groups[] = {
  266. GPIO_GROUP(GPIOZ_0),
  267. GPIO_GROUP(GPIOZ_1),
  268. GPIO_GROUP(GPIOZ_2),
  269. GPIO_GROUP(GPIOZ_3),
  270. GPIO_GROUP(GPIOZ_4),
  271. GPIO_GROUP(GPIOZ_5),
  272. GPIO_GROUP(GPIOZ_6),
  273. GPIO_GROUP(GPIOZ_7),
  274. GPIO_GROUP(GPIOZ_8),
  275. GPIO_GROUP(GPIOZ_9),
  276. GPIO_GROUP(GPIOZ_10),
  277. GPIO_GROUP(GPIOZ_11),
  278. GPIO_GROUP(GPIOZ_12),
  279. GPIO_GROUP(GPIOZ_13),
  280. GPIO_GROUP(GPIOZ_14),
  281. GPIO_GROUP(GPIOZ_15),
  282. GPIO_GROUP(GPIOH_0),
  283. GPIO_GROUP(GPIOH_1),
  284. GPIO_GROUP(GPIOH_2),
  285. GPIO_GROUP(GPIOH_3),
  286. GPIO_GROUP(BOOT_0),
  287. GPIO_GROUP(BOOT_1),
  288. GPIO_GROUP(BOOT_2),
  289. GPIO_GROUP(BOOT_3),
  290. GPIO_GROUP(BOOT_4),
  291. GPIO_GROUP(BOOT_5),
  292. GPIO_GROUP(BOOT_6),
  293. GPIO_GROUP(BOOT_7),
  294. GPIO_GROUP(BOOT_8),
  295. GPIO_GROUP(BOOT_9),
  296. GPIO_GROUP(BOOT_10),
  297. GPIO_GROUP(BOOT_11),
  298. GPIO_GROUP(BOOT_12),
  299. GPIO_GROUP(BOOT_13),
  300. GPIO_GROUP(BOOT_14),
  301. GPIO_GROUP(BOOT_15),
  302. GPIO_GROUP(BOOT_16),
  303. GPIO_GROUP(BOOT_17),
  304. GPIO_GROUP(CARD_0),
  305. GPIO_GROUP(CARD_1),
  306. GPIO_GROUP(CARD_2),
  307. GPIO_GROUP(CARD_3),
  308. GPIO_GROUP(CARD_4),
  309. GPIO_GROUP(CARD_5),
  310. GPIO_GROUP(CARD_6),
  311. GPIO_GROUP(GPIODV_0),
  312. GPIO_GROUP(GPIODV_1),
  313. GPIO_GROUP(GPIODV_2),
  314. GPIO_GROUP(GPIODV_3),
  315. GPIO_GROUP(GPIODV_4),
  316. GPIO_GROUP(GPIODV_5),
  317. GPIO_GROUP(GPIODV_6),
  318. GPIO_GROUP(GPIODV_7),
  319. GPIO_GROUP(GPIODV_8),
  320. GPIO_GROUP(GPIODV_9),
  321. GPIO_GROUP(GPIODV_10),
  322. GPIO_GROUP(GPIODV_11),
  323. GPIO_GROUP(GPIODV_12),
  324. GPIO_GROUP(GPIODV_13),
  325. GPIO_GROUP(GPIODV_14),
  326. GPIO_GROUP(GPIODV_15),
  327. GPIO_GROUP(GPIODV_16),
  328. GPIO_GROUP(GPIODV_17),
  329. GPIO_GROUP(GPIODV_19),
  330. GPIO_GROUP(GPIODV_20),
  331. GPIO_GROUP(GPIODV_21),
  332. GPIO_GROUP(GPIODV_22),
  333. GPIO_GROUP(GPIODV_23),
  334. GPIO_GROUP(GPIODV_24),
  335. GPIO_GROUP(GPIODV_25),
  336. GPIO_GROUP(GPIODV_26),
  337. GPIO_GROUP(GPIODV_27),
  338. GPIO_GROUP(GPIODV_28),
  339. GPIO_GROUP(GPIODV_29),
  340. GPIO_GROUP(GPIOY_0),
  341. GPIO_GROUP(GPIOY_1),
  342. GPIO_GROUP(GPIOY_2),
  343. GPIO_GROUP(GPIOY_3),
  344. GPIO_GROUP(GPIOY_4),
  345. GPIO_GROUP(GPIOY_5),
  346. GPIO_GROUP(GPIOY_6),
  347. GPIO_GROUP(GPIOY_7),
  348. GPIO_GROUP(GPIOY_8),
  349. GPIO_GROUP(GPIOY_9),
  350. GPIO_GROUP(GPIOY_10),
  351. GPIO_GROUP(GPIOY_11),
  352. GPIO_GROUP(GPIOY_12),
  353. GPIO_GROUP(GPIOY_13),
  354. GPIO_GROUP(GPIOY_14),
  355. GPIO_GROUP(GPIOY_15),
  356. GPIO_GROUP(GPIOY_16),
  357. GPIO_GROUP(GPIOX_0),
  358. GPIO_GROUP(GPIOX_1),
  359. GPIO_GROUP(GPIOX_2),
  360. GPIO_GROUP(GPIOX_3),
  361. GPIO_GROUP(GPIOX_4),
  362. GPIO_GROUP(GPIOX_5),
  363. GPIO_GROUP(GPIOX_6),
  364. GPIO_GROUP(GPIOX_7),
  365. GPIO_GROUP(GPIOX_8),
  366. GPIO_GROUP(GPIOX_9),
  367. GPIO_GROUP(GPIOX_10),
  368. GPIO_GROUP(GPIOX_11),
  369. GPIO_GROUP(GPIOX_12),
  370. GPIO_GROUP(GPIOX_13),
  371. GPIO_GROUP(GPIOX_14),
  372. GPIO_GROUP(GPIOX_15),
  373. GPIO_GROUP(GPIOX_16),
  374. GPIO_GROUP(GPIOX_17),
  375. GPIO_GROUP(GPIOX_18),
  376. GPIO_GROUP(GPIOX_19),
  377. GPIO_GROUP(GPIOX_20),
  378. GPIO_GROUP(GPIOX_21),
  379. GPIO_GROUP(GPIOX_22),
  380. GPIO_GROUP(GPIOCLK_0),
  381. GPIO_GROUP(GPIOCLK_1),
  382. GPIO_GROUP(GPIOCLK_2),
  383. GPIO_GROUP(GPIOCLK_3),
  384. GPIO_GROUP(GPIO_TEST_N),
  385. /* Bank X */
  386. GROUP(sdio_d0, 8, 5),
  387. GROUP(sdio_d1, 8, 4),
  388. GROUP(sdio_d2, 8, 3),
  389. GROUP(sdio_d3, 8, 2),
  390. GROUP(sdio_cmd, 8, 1),
  391. GROUP(sdio_clk, 8, 0),
  392. GROUP(sdio_irq, 8, 11),
  393. GROUP(uart_tx_a, 4, 13),
  394. GROUP(uart_rx_a, 4, 12),
  395. GROUP(uart_cts_a, 4, 11),
  396. GROUP(uart_rts_a, 4, 10),
  397. GROUP(pwm_a_x, 3, 17),
  398. GROUP(pwm_e, 2, 30),
  399. GROUP(pwm_f_x, 3, 18),
  400. /* Bank Y */
  401. GROUP(uart_cts_c, 1, 19),
  402. GROUP(uart_rts_c, 1, 18),
  403. GROUP(uart_tx_c, 1, 17),
  404. GROUP(uart_rx_c, 1, 16),
  405. GROUP(pwm_a_y, 1, 21),
  406. GROUP(pwm_f_y, 1, 20),
  407. GROUP(i2s_out_ch23_y, 1, 5),
  408. GROUP(i2s_out_ch45_y, 1, 6),
  409. GROUP(i2s_out_ch67_y, 1, 7),
  410. GROUP(spdif_out_y, 1, 9),
  411. GROUP(gen_clk_out, 6, 15),
  412. /* Bank Z */
  413. GROUP(eth_mdio, 6, 1),
  414. GROUP(eth_mdc, 6, 0),
  415. GROUP(eth_clk_rx_clk, 6, 13),
  416. GROUP(eth_rx_dv, 6, 12),
  417. GROUP(eth_rxd0, 6, 11),
  418. GROUP(eth_rxd1, 6, 10),
  419. GROUP(eth_rxd2, 6, 9),
  420. GROUP(eth_rxd3, 6, 8),
  421. GROUP(eth_rgmii_tx_clk, 6, 7),
  422. GROUP(eth_tx_en, 6, 6),
  423. GROUP(eth_txd0, 6, 5),
  424. GROUP(eth_txd1, 6, 4),
  425. GROUP(eth_txd2, 6, 3),
  426. GROUP(eth_txd3, 6, 2),
  427. GROUP(spi_ss0, 5, 26),
  428. GROUP(spi_sclk, 5, 27),
  429. GROUP(spi_miso, 5, 28),
  430. GROUP(spi_mosi, 5, 29),
  431. /* Bank H */
  432. GROUP(hdmi_hpd, 1, 26),
  433. GROUP(hdmi_sda, 1, 25),
  434. GROUP(hdmi_scl, 1, 24),
  435. /* Bank DV */
  436. GROUP(uart_tx_b, 2, 29),
  437. GROUP(uart_rx_b, 2, 28),
  438. GROUP(uart_cts_b, 2, 27),
  439. GROUP(uart_rts_b, 2, 26),
  440. GROUP(pwm_b, 3, 21),
  441. GROUP(pwm_d, 3, 20),
  442. GROUP(i2c_sck_a, 7, 27),
  443. GROUP(i2c_sda_a, 7, 26),
  444. GROUP(i2c_sck_b, 7, 25),
  445. GROUP(i2c_sda_b, 7, 24),
  446. GROUP(i2c_sck_c, 7, 23),
  447. GROUP(i2c_sda_c, 7, 22),
  448. /* Bank BOOT */
  449. GROUP(emmc_nand_d07, 4, 30),
  450. GROUP(emmc_clk, 4, 18),
  451. GROUP(emmc_cmd, 4, 19),
  452. GROUP(emmc_ds, 4, 31),
  453. GROUP(nor_d, 5, 1),
  454. GROUP(nor_q, 5, 3),
  455. GROUP(nor_c, 5, 2),
  456. GROUP(nor_cs, 5, 0),
  457. GROUP(nand_ce0, 4, 26),
  458. GROUP(nand_ce1, 4, 27),
  459. GROUP(nand_rb0, 4, 25),
  460. GROUP(nand_ale, 4, 24),
  461. GROUP(nand_cle, 4, 23),
  462. GROUP(nand_wen_clk, 4, 22),
  463. GROUP(nand_ren_wr, 4, 21),
  464. GROUP(nand_dqs, 4, 20),
  465. /* Bank CARD */
  466. GROUP(sdcard_d1, 2, 14),
  467. GROUP(sdcard_d0, 2, 15),
  468. GROUP(sdcard_d3, 2, 12),
  469. GROUP(sdcard_d2, 2, 13),
  470. GROUP(sdcard_cmd, 2, 10),
  471. GROUP(sdcard_clk, 2, 11),
  472. };
  473. static struct meson_pmx_group meson_gxbb_aobus_groups[] = {
  474. GPIO_GROUP(GPIOAO_0),
  475. GPIO_GROUP(GPIOAO_1),
  476. GPIO_GROUP(GPIOAO_2),
  477. GPIO_GROUP(GPIOAO_3),
  478. GPIO_GROUP(GPIOAO_4),
  479. GPIO_GROUP(GPIOAO_5),
  480. GPIO_GROUP(GPIOAO_6),
  481. GPIO_GROUP(GPIOAO_7),
  482. GPIO_GROUP(GPIOAO_8),
  483. GPIO_GROUP(GPIOAO_9),
  484. GPIO_GROUP(GPIOAO_10),
  485. GPIO_GROUP(GPIOAO_11),
  486. GPIO_GROUP(GPIOAO_12),
  487. GPIO_GROUP(GPIOAO_13),
  488. /* bank AO */
  489. GROUP(uart_tx_ao_b, 0, 24),
  490. GROUP(uart_rx_ao_b, 0, 25),
  491. GROUP(uart_tx_ao_a, 0, 12),
  492. GROUP(uart_rx_ao_a, 0, 11),
  493. GROUP(uart_cts_ao_a, 0, 10),
  494. GROUP(uart_rts_ao_a, 0, 9),
  495. GROUP(uart_cts_ao_b, 0, 8),
  496. GROUP(uart_rts_ao_b, 0, 7),
  497. GROUP(i2c_sck_ao, 0, 6),
  498. GROUP(i2c_sda_ao, 0, 5),
  499. GROUP(i2c_slave_sck_ao, 0, 2),
  500. GROUP(i2c_slave_sda_ao, 0, 1),
  501. GROUP(remote_input_ao, 0, 0),
  502. GROUP(pwm_ao_a_3, 0, 22),
  503. GROUP(pwm_ao_a_6, 0, 18),
  504. GROUP(pwm_ao_a_12, 0, 17),
  505. GROUP(pwm_ao_b, 0, 3),
  506. GROUP(i2s_am_clk, 0, 30),
  507. GROUP(i2s_out_ao_clk, 0, 29),
  508. GROUP(i2s_out_lr_clk, 0, 28),
  509. GROUP(i2s_out_ch01_ao, 0, 27),
  510. GROUP(i2s_out_ch23_ao, 1, 0),
  511. GROUP(i2s_out_ch45_ao, 1, 1),
  512. GROUP(spdif_out_ao_6, 0, 16),
  513. GROUP(spdif_out_ao_13, 0, 4),
  514. GROUP(ao_cec, 0, 15),
  515. GROUP(ee_cec, 0, 14),
  516. /* test n pin */
  517. GROUP(i2s_out_ch67_ao, 1, 2),
  518. };
  519. static const char * const gpio_periphs_groups[] = {
  520. "GPIOZ_0", "GPIOZ_1", "GPIOZ_2", "GPIOZ_3", "GPIOZ_4",
  521. "GPIOZ_5", "GPIOZ_6", "GPIOZ_7", "GPIOZ_8", "GPIOZ_9",
  522. "GPIOZ_10", "GPIOZ_11", "GPIOZ_12", "GPIOZ_13", "GPIOZ_14",
  523. "GPIOZ_15",
  524. "GPIOH_0", "GPIOH_1", "GPIOH_2", "GPIOH_3",
  525. "BOOT_0", "BOOT_1", "BOOT_2", "BOOT_3", "BOOT_4",
  526. "BOOT_5", "BOOT_6", "BOOT_7", "BOOT_8", "BOOT_9",
  527. "BOOT_10", "BOOT_11", "BOOT_12", "BOOT_13", "BOOT_14",
  528. "BOOT_15", "BOOT_16", "BOOT_17",
  529. "CARD_0", "CARD_1", "CARD_2", "CARD_3", "CARD_4",
  530. "CARD_5", "CARD_6",
  531. "GPIODV_0", "GPIODV_1", "GPIODV_2", "GPIODV_3", "GPIODV_4",
  532. "GPIODV_5", "GPIODV_6", "GPIODV_7", "GPIODV_8", "GPIODV_9",
  533. "GPIODV_10", "GPIODV_11", "GPIODV_12", "GPIODV_13", "GPIODV_14",
  534. "GPIODV_15", "GPIODV_16", "GPIODV_17", "GPIODV_18", "GPIODV_19",
  535. "GPIODV_20", "GPIODV_21", "GPIODV_22", "GPIODV_23", "GPIODV_24",
  536. "GPIODV_25", "GPIODV_26", "GPIODV_27", "GPIODV_28", "GPIODV_29",
  537. "GPIOY_0", "GPIOY_1", "GPIOY_2", "GPIOY_3", "GPIOY_4",
  538. "GPIOY_5", "GPIOY_6", "GPIOY_7", "GPIOY_8", "GPIOY_9",
  539. "GPIOY_10", "GPIOY_11", "GPIOY_12", "GPIOY_13", "GPIOY_14",
  540. "GPIOY_15", "GPIOY_16",
  541. "GPIOX_0", "GPIOX_1", "GPIOX_2", "GPIOX_3", "GPIOX_4",
  542. "GPIOX_5", "GPIOX_6", "GPIOX_7", "GPIOX_8", "GPIOX_9",
  543. "GPIOX_10", "GPIOX_11", "GPIOX_12", "GPIOX_13", "GPIOX_14",
  544. "GPIOX_15", "GPIOX_16", "GPIOX_17", "GPIOX_18", "GPIOX_19",
  545. "GPIOX_20", "GPIOX_21", "GPIOX_22",
  546. };
  547. static const char * const emmc_groups[] = {
  548. "emmc_nand_d07", "emmc_clk", "emmc_cmd", "emmc_ds",
  549. };
  550. static const char * const nor_groups[] = {
  551. "nor_d", "nor_q", "nor_c", "nor_cs",
  552. };
  553. static const char * const spi_groups[] = {
  554. "spi_mosi", "spi_miso", "spi_ss0", "spi_sclk",
  555. };
  556. static const char * const sdcard_groups[] = {
  557. "sdcard_d0", "sdcard_d1", "sdcard_d2", "sdcard_d3",
  558. "sdcard_cmd", "sdcard_clk",
  559. };
  560. static const char * const sdio_groups[] = {
  561. "sdio_d0", "sdio_d1", "sdio_d2", "sdio_d3",
  562. "sdio_cmd", "sdio_clk", "sdio_irq",
  563. };
  564. static const char * const nand_groups[] = {
  565. "emmc_nand_d07", "nand_ce0", "nand_ce1", "nand_rb0", "nand_ale",
  566. "nand_cle", "nand_wen_clk", "nand_ren_wr", "nand_dqs",
  567. };
  568. static const char * const uart_a_groups[] = {
  569. "uart_tx_a", "uart_rx_a", "uart_cts_a", "uart_rts_a",
  570. };
  571. static const char * const uart_b_groups[] = {
  572. "uart_tx_b", "uart_rx_b", "uart_cts_b", "uart_rts_b",
  573. };
  574. static const char * const uart_c_groups[] = {
  575. "uart_tx_c", "uart_rx_c", "uart_cts_c", "uart_rts_c",
  576. };
  577. static const char * const i2c_a_groups[] = {
  578. "i2c_sck_a", "i2c_sda_a",
  579. };
  580. static const char * const i2c_b_groups[] = {
  581. "i2c_sck_b", "i2c_sda_b",
  582. };
  583. static const char * const i2c_c_groups[] = {
  584. "i2c_sck_c", "i2c_sda_c",
  585. };
  586. static const char * const eth_groups[] = {
  587. "eth_mdio", "eth_mdc", "eth_clk_rx_clk", "eth_rx_dv",
  588. "eth_rxd0", "eth_rxd1", "eth_rxd2", "eth_rxd3",
  589. "eth_rgmii_tx_clk", "eth_tx_en",
  590. "eth_txd0", "eth_txd1", "eth_txd2", "eth_txd3",
  591. };
  592. static const char * const pwm_a_x_groups[] = {
  593. "pwm_a_x",
  594. };
  595. static const char * const pwm_a_y_groups[] = {
  596. "pwm_a_y",
  597. };
  598. static const char * const pwm_b_groups[] = {
  599. "pwm_b",
  600. };
  601. static const char * const pwm_d_groups[] = {
  602. "pwm_d",
  603. };
  604. static const char * const pwm_e_groups[] = {
  605. "pwm_e",
  606. };
  607. static const char * const pwm_f_x_groups[] = {
  608. "pwm_f_x",
  609. };
  610. static const char * const pwm_f_y_groups[] = {
  611. "pwm_f_y",
  612. };
  613. static const char * const hdmi_hpd_groups[] = {
  614. "hdmi_hpd",
  615. };
  616. static const char * const hdmi_i2c_groups[] = {
  617. "hdmi_sda", "hdmi_scl",
  618. };
  619. static const char * const i2s_out_groups[] = {
  620. "i2s_out_ch23_y", "i2s_out_ch45_y", "i2s_out_ch67_y",
  621. };
  622. static const char * const spdif_out_groups[] = {
  623. "spdif_out_y",
  624. };
  625. static const char * const gen_clk_out_groups[] = {
  626. "gen_clk_out",
  627. };
  628. static const char * const gpio_aobus_groups[] = {
  629. "GPIOAO_0", "GPIOAO_1", "GPIOAO_2", "GPIOAO_3", "GPIOAO_4",
  630. "GPIOAO_5", "GPIOAO_6", "GPIOAO_7", "GPIOAO_8", "GPIOAO_9",
  631. "GPIOAO_10", "GPIOAO_11", "GPIOAO_12", "GPIOAO_13",
  632. "GPIO_TEST_N",
  633. };
  634. static const char * const uart_ao_groups[] = {
  635. "uart_tx_ao_a", "uart_rx_ao_a", "uart_cts_ao_a", "uart_rts_ao_a",
  636. };
  637. static const char * const uart_ao_b_groups[] = {
  638. "uart_tx_ao_b", "uart_rx_ao_b", "uart_cts_ao_b", "uart_rts_ao_b",
  639. };
  640. static const char * const i2c_ao_groups[] = {
  641. "i2c_sck_ao", "i2c_sda_ao",
  642. };
  643. static const char * const i2c_slave_ao_groups[] = {
  644. "i2c_slave_sck_ao", "i2c_slave_sda_ao",
  645. };
  646. static const char * const remote_input_ao_groups[] = {
  647. "remote_input_ao",
  648. };
  649. static const char * const pwm_ao_a_3_groups[] = {
  650. "pwm_ao_a_3",
  651. };
  652. static const char * const pwm_ao_a_6_groups[] = {
  653. "pwm_ao_a_6",
  654. };
  655. static const char * const pwm_ao_a_12_groups[] = {
  656. "pwm_ao_a_12",
  657. };
  658. static const char * const pwm_ao_b_groups[] = {
  659. "pwm_ao_b",
  660. };
  661. static const char * const i2s_out_ao_groups[] = {
  662. "i2s_am_clk", "i2s_out_ao_clk", "i2s_out_lr_clk",
  663. "i2s_out_ch01_ao", "i2s_out_ch23_ao", "i2s_out_ch45_ao",
  664. "i2s_out_ch67_ao",
  665. };
  666. static const char * const spdif_out_ao_groups[] = {
  667. "spdif_out_ao_6", "spdif_out_ao_13",
  668. };
  669. static const char * const cec_ao_groups[] = {
  670. "ao_cec", "ee_cec",
  671. };
  672. static struct meson_pmx_func meson_gxbb_periphs_functions[] = {
  673. FUNCTION(gpio_periphs),
  674. FUNCTION(emmc),
  675. FUNCTION(nor),
  676. FUNCTION(spi),
  677. FUNCTION(sdcard),
  678. FUNCTION(sdio),
  679. FUNCTION(nand),
  680. FUNCTION(uart_a),
  681. FUNCTION(uart_b),
  682. FUNCTION(uart_c),
  683. FUNCTION(i2c_a),
  684. FUNCTION(i2c_b),
  685. FUNCTION(i2c_c),
  686. FUNCTION(eth),
  687. FUNCTION(pwm_a_x),
  688. FUNCTION(pwm_a_y),
  689. FUNCTION(pwm_b),
  690. FUNCTION(pwm_d),
  691. FUNCTION(pwm_e),
  692. FUNCTION(pwm_f_x),
  693. FUNCTION(pwm_f_y),
  694. FUNCTION(hdmi_hpd),
  695. FUNCTION(hdmi_i2c),
  696. FUNCTION(i2s_out),
  697. FUNCTION(spdif_out),
  698. FUNCTION(gen_clk_out),
  699. };
  700. static struct meson_pmx_func meson_gxbb_aobus_functions[] = {
  701. FUNCTION(gpio_aobus),
  702. FUNCTION(uart_ao),
  703. FUNCTION(uart_ao_b),
  704. FUNCTION(i2c_ao),
  705. FUNCTION(i2c_slave_ao),
  706. FUNCTION(remote_input_ao),
  707. FUNCTION(pwm_ao_a_3),
  708. FUNCTION(pwm_ao_a_6),
  709. FUNCTION(pwm_ao_a_12),
  710. FUNCTION(pwm_ao_b),
  711. FUNCTION(i2s_out_ao),
  712. FUNCTION(spdif_out_ao),
  713. FUNCTION(cec_ao),
  714. };
  715. static struct meson_bank meson_gxbb_periphs_banks[] = {
  716. /* name first last irq pullen pull dir out in */
  717. BANK("X", GPIOX_0, GPIOX_22, 106, 128, 4, 0, 4, 0, 12, 0, 13, 0, 14, 0),
  718. BANK("Y", GPIOY_0, GPIOY_16, 89, 105, 1, 0, 1, 0, 3, 0, 4, 0, 5, 0),
  719. BANK("DV", GPIODV_0, GPIODV_29, 59, 88, 0, 0, 0, 0, 0, 0, 1, 0, 2, 0),
  720. BANK("H", GPIOH_0, GPIOH_3, 30, 33, 1, 20, 1, 20, 3, 20, 4, 20, 5, 20),
  721. BANK("Z", GPIOZ_0, GPIOZ_15, 14, 29, 3, 0, 3, 0, 9, 0, 10, 0, 11, 0),
  722. BANK("CARD", CARD_0, CARD_6, 52, 58, 2, 20, 2, 20, 6, 20, 7, 20, 8, 20),
  723. BANK("BOOT", BOOT_0, BOOT_17, 34, 51, 2, 0, 2, 0, 6, 0, 7, 0, 8, 0),
  724. BANK("CLK", GPIOCLK_0, GPIOCLK_3, 129, 132, 3, 28, 3, 28, 9, 28, 10, 28, 11, 28),
  725. };
  726. static struct meson_bank meson_gxbb_aobus_banks[] = {
  727. /* name first last irq pullen pull dir out in */
  728. BANK("AO", GPIOAO_0, GPIOAO_13, 0, 13, 0, 16, 0, 0, 0, 0, 0, 16, 1, 0),
  729. };
  730. static struct meson_pinctrl_data meson_gxbb_periphs_pinctrl_data = {
  731. .name = "periphs-banks",
  732. .pins = meson_gxbb_periphs_pins,
  733. .groups = meson_gxbb_periphs_groups,
  734. .funcs = meson_gxbb_periphs_functions,
  735. .banks = meson_gxbb_periphs_banks,
  736. .num_pins = ARRAY_SIZE(meson_gxbb_periphs_pins),
  737. .num_groups = ARRAY_SIZE(meson_gxbb_periphs_groups),
  738. .num_funcs = ARRAY_SIZE(meson_gxbb_periphs_functions),
  739. .num_banks = ARRAY_SIZE(meson_gxbb_periphs_banks),
  740. .pmx_ops = &meson8_pmx_ops,
  741. };
  742. static struct meson_pinctrl_data meson_gxbb_aobus_pinctrl_data = {
  743. .name = "aobus-banks",
  744. .pins = meson_gxbb_aobus_pins,
  745. .groups = meson_gxbb_aobus_groups,
  746. .funcs = meson_gxbb_aobus_functions,
  747. .banks = meson_gxbb_aobus_banks,
  748. .num_pins = ARRAY_SIZE(meson_gxbb_aobus_pins),
  749. .num_groups = ARRAY_SIZE(meson_gxbb_aobus_groups),
  750. .num_funcs = ARRAY_SIZE(meson_gxbb_aobus_functions),
  751. .num_banks = ARRAY_SIZE(meson_gxbb_aobus_banks),
  752. .pmx_ops = &meson8_pmx_ops,
  753. };
  754. static const struct of_device_id meson_gxbb_pinctrl_dt_match[] = {
  755. {
  756. .compatible = "amlogic,meson-gxbb-periphs-pinctrl",
  757. .data = &meson_gxbb_periphs_pinctrl_data,
  758. },
  759. {
  760. .compatible = "amlogic,meson-gxbb-aobus-pinctrl",
  761. .data = &meson_gxbb_aobus_pinctrl_data,
  762. },
  763. { },
  764. };
  765. static struct platform_driver meson_gxbb_pinctrl_driver = {
  766. .probe = meson_pinctrl_probe,
  767. .driver = {
  768. .name = "meson-gxbb-pinctrl",
  769. .of_match_table = meson_gxbb_pinctrl_dt_match,
  770. },
  771. };
  772. builtin_platform_driver(meson_gxbb_pinctrl_driver);