pinctrl-meson-axg.c 31 KB

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  1. /*
  2. * Pin controller and GPIO driver for Amlogic Meson AXG SoC.
  3. *
  4. * Copyright (c) 2017 Amlogic, Inc. All rights reserved.
  5. * Author: Xingyu Chen <xingyu.chen@amlogic.com>
  6. *
  7. * SPDX-License-Identifier: (GPL-2.0+ or MIT)
  8. */
  9. #include <dt-bindings/gpio/meson-axg-gpio.h>
  10. #include "pinctrl-meson.h"
  11. #include "pinctrl-meson-axg-pmx.h"
  12. static const struct pinctrl_pin_desc meson_axg_periphs_pins[] = {
  13. MESON_PIN(GPIOZ_0),
  14. MESON_PIN(GPIOZ_1),
  15. MESON_PIN(GPIOZ_2),
  16. MESON_PIN(GPIOZ_3),
  17. MESON_PIN(GPIOZ_4),
  18. MESON_PIN(GPIOZ_5),
  19. MESON_PIN(GPIOZ_6),
  20. MESON_PIN(GPIOZ_7),
  21. MESON_PIN(GPIOZ_8),
  22. MESON_PIN(GPIOZ_9),
  23. MESON_PIN(GPIOZ_10),
  24. MESON_PIN(BOOT_0),
  25. MESON_PIN(BOOT_1),
  26. MESON_PIN(BOOT_2),
  27. MESON_PIN(BOOT_3),
  28. MESON_PIN(BOOT_4),
  29. MESON_PIN(BOOT_5),
  30. MESON_PIN(BOOT_6),
  31. MESON_PIN(BOOT_7),
  32. MESON_PIN(BOOT_8),
  33. MESON_PIN(BOOT_9),
  34. MESON_PIN(BOOT_10),
  35. MESON_PIN(BOOT_11),
  36. MESON_PIN(BOOT_12),
  37. MESON_PIN(BOOT_13),
  38. MESON_PIN(BOOT_14),
  39. MESON_PIN(GPIOA_0),
  40. MESON_PIN(GPIOA_1),
  41. MESON_PIN(GPIOA_2),
  42. MESON_PIN(GPIOA_3),
  43. MESON_PIN(GPIOA_4),
  44. MESON_PIN(GPIOA_5),
  45. MESON_PIN(GPIOA_6),
  46. MESON_PIN(GPIOA_7),
  47. MESON_PIN(GPIOA_8),
  48. MESON_PIN(GPIOA_9),
  49. MESON_PIN(GPIOA_10),
  50. MESON_PIN(GPIOA_11),
  51. MESON_PIN(GPIOA_12),
  52. MESON_PIN(GPIOA_13),
  53. MESON_PIN(GPIOA_14),
  54. MESON_PIN(GPIOA_15),
  55. MESON_PIN(GPIOA_16),
  56. MESON_PIN(GPIOA_17),
  57. MESON_PIN(GPIOA_18),
  58. MESON_PIN(GPIOA_19),
  59. MESON_PIN(GPIOA_20),
  60. MESON_PIN(GPIOX_0),
  61. MESON_PIN(GPIOX_1),
  62. MESON_PIN(GPIOX_2),
  63. MESON_PIN(GPIOX_3),
  64. MESON_PIN(GPIOX_4),
  65. MESON_PIN(GPIOX_5),
  66. MESON_PIN(GPIOX_6),
  67. MESON_PIN(GPIOX_7),
  68. MESON_PIN(GPIOX_8),
  69. MESON_PIN(GPIOX_9),
  70. MESON_PIN(GPIOX_10),
  71. MESON_PIN(GPIOX_11),
  72. MESON_PIN(GPIOX_12),
  73. MESON_PIN(GPIOX_13),
  74. MESON_PIN(GPIOX_14),
  75. MESON_PIN(GPIOX_15),
  76. MESON_PIN(GPIOX_16),
  77. MESON_PIN(GPIOX_17),
  78. MESON_PIN(GPIOX_18),
  79. MESON_PIN(GPIOX_19),
  80. MESON_PIN(GPIOX_20),
  81. MESON_PIN(GPIOX_21),
  82. MESON_PIN(GPIOX_22),
  83. MESON_PIN(GPIOY_0),
  84. MESON_PIN(GPIOY_1),
  85. MESON_PIN(GPIOY_2),
  86. MESON_PIN(GPIOY_3),
  87. MESON_PIN(GPIOY_4),
  88. MESON_PIN(GPIOY_5),
  89. MESON_PIN(GPIOY_6),
  90. MESON_PIN(GPIOY_7),
  91. MESON_PIN(GPIOY_8),
  92. MESON_PIN(GPIOY_9),
  93. MESON_PIN(GPIOY_10),
  94. MESON_PIN(GPIOY_11),
  95. MESON_PIN(GPIOY_12),
  96. MESON_PIN(GPIOY_13),
  97. MESON_PIN(GPIOY_14),
  98. MESON_PIN(GPIOY_15),
  99. };
  100. static const struct pinctrl_pin_desc meson_axg_aobus_pins[] = {
  101. MESON_PIN(GPIOAO_0),
  102. MESON_PIN(GPIOAO_1),
  103. MESON_PIN(GPIOAO_2),
  104. MESON_PIN(GPIOAO_3),
  105. MESON_PIN(GPIOAO_4),
  106. MESON_PIN(GPIOAO_5),
  107. MESON_PIN(GPIOAO_6),
  108. MESON_PIN(GPIOAO_7),
  109. MESON_PIN(GPIOAO_8),
  110. MESON_PIN(GPIOAO_9),
  111. MESON_PIN(GPIOAO_10),
  112. MESON_PIN(GPIOAO_11),
  113. MESON_PIN(GPIOAO_12),
  114. MESON_PIN(GPIOAO_13),
  115. MESON_PIN(GPIO_TEST_N),
  116. };
  117. /* emmc */
  118. static const unsigned int emmc_nand_d0_pins[] = {BOOT_0};
  119. static const unsigned int emmc_nand_d1_pins[] = {BOOT_1};
  120. static const unsigned int emmc_nand_d2_pins[] = {BOOT_2};
  121. static const unsigned int emmc_nand_d3_pins[] = {BOOT_3};
  122. static const unsigned int emmc_nand_d4_pins[] = {BOOT_4};
  123. static const unsigned int emmc_nand_d5_pins[] = {BOOT_5};
  124. static const unsigned int emmc_nand_d6_pins[] = {BOOT_6};
  125. static const unsigned int emmc_nand_d7_pins[] = {BOOT_7};
  126. static const unsigned int emmc_clk_pins[] = {BOOT_8};
  127. static const unsigned int emmc_cmd_pins[] = {BOOT_10};
  128. static const unsigned int emmc_ds_pins[] = {BOOT_13};
  129. /* nand */
  130. static const unsigned int nand_ce0_pins[] = {BOOT_8};
  131. static const unsigned int nand_ale_pins[] = {BOOT_9};
  132. static const unsigned int nand_cle_pins[] = {BOOT_10};
  133. static const unsigned int nand_wen_clk_pins[] = {BOOT_11};
  134. static const unsigned int nand_ren_wr_pins[] = {BOOT_12};
  135. static const unsigned int nand_rb0_pins[] = {BOOT_13};
  136. /* nor */
  137. static const unsigned int nor_hold_pins[] = {BOOT_3};
  138. static const unsigned int nor_d_pins[] = {BOOT_4};
  139. static const unsigned int nor_q_pins[] = {BOOT_5};
  140. static const unsigned int nor_c_pins[] = {BOOT_6};
  141. static const unsigned int nor_wp_pins[] = {BOOT_9};
  142. static const unsigned int nor_cs_pins[] = {BOOT_14};
  143. /* sdio */
  144. static const unsigned int sdio_d0_pins[] = {GPIOX_0};
  145. static const unsigned int sdio_d1_pins[] = {GPIOX_1};
  146. static const unsigned int sdio_d2_pins[] = {GPIOX_2};
  147. static const unsigned int sdio_d3_pins[] = {GPIOX_3};
  148. static const unsigned int sdio_clk_pins[] = {GPIOX_4};
  149. static const unsigned int sdio_cmd_pins[] = {GPIOX_5};
  150. /* spi0 */
  151. static const unsigned int spi0_clk_pins[] = {GPIOZ_0};
  152. static const unsigned int spi0_mosi_pins[] = {GPIOZ_1};
  153. static const unsigned int spi0_miso_pins[] = {GPIOZ_2};
  154. static const unsigned int spi0_ss0_pins[] = {GPIOZ_3};
  155. static const unsigned int spi0_ss1_pins[] = {GPIOZ_4};
  156. static const unsigned int spi0_ss2_pins[] = {GPIOZ_5};
  157. /* spi1 */
  158. static const unsigned int spi1_clk_x_pins[] = {GPIOX_19};
  159. static const unsigned int spi1_mosi_x_pins[] = {GPIOX_17};
  160. static const unsigned int spi1_miso_x_pins[] = {GPIOX_18};
  161. static const unsigned int spi1_ss0_x_pins[] = {GPIOX_16};
  162. static const unsigned int spi1_clk_a_pins[] = {GPIOA_4};
  163. static const unsigned int spi1_mosi_a_pins[] = {GPIOA_2};
  164. static const unsigned int spi1_miso_a_pins[] = {GPIOA_3};
  165. static const unsigned int spi1_ss0_a_pins[] = {GPIOA_5};
  166. static const unsigned int spi1_ss1_pins[] = {GPIOA_6};
  167. /* i2c0 */
  168. static const unsigned int i2c0_sck_pins[] = {GPIOZ_6};
  169. static const unsigned int i2c0_sda_pins[] = {GPIOZ_7};
  170. /* i2c1 */
  171. static const unsigned int i2c1_sck_z_pins[] = {GPIOZ_8};
  172. static const unsigned int i2c1_sda_z_pins[] = {GPIOZ_9};
  173. static const unsigned int i2c1_sck_x_pins[] = {GPIOX_16};
  174. static const unsigned int i2c1_sda_x_pins[] = {GPIOX_17};
  175. /* i2c2 */
  176. static const unsigned int i2c2_sck_x_pins[] = {GPIOX_18};
  177. static const unsigned int i2c2_sda_x_pins[] = {GPIOX_19};
  178. static const unsigned int i2c2_sda_a_pins[] = {GPIOA_17};
  179. static const unsigned int i2c2_sck_a_pins[] = {GPIOA_18};
  180. /* i2c3 */
  181. static const unsigned int i2c3_sda_a6_pins[] = {GPIOA_6};
  182. static const unsigned int i2c3_sck_a7_pins[] = {GPIOA_7};
  183. static const unsigned int i2c3_sda_a12_pins[] = {GPIOA_12};
  184. static const unsigned int i2c3_sck_a13_pins[] = {GPIOA_13};
  185. static const unsigned int i2c3_sda_a19_pins[] = {GPIOA_19};
  186. static const unsigned int i2c3_sck_a20_pins[] = {GPIOA_20};
  187. /* uart_a */
  188. static const unsigned int uart_rts_a_pins[] = {GPIOX_11};
  189. static const unsigned int uart_cts_a_pins[] = {GPIOX_10};
  190. static const unsigned int uart_tx_a_pins[] = {GPIOX_8};
  191. static const unsigned int uart_rx_a_pins[] = {GPIOX_9};
  192. /* uart_b */
  193. static const unsigned int uart_rts_b_z_pins[] = {GPIOZ_0};
  194. static const unsigned int uart_cts_b_z_pins[] = {GPIOZ_1};
  195. static const unsigned int uart_tx_b_z_pins[] = {GPIOZ_2};
  196. static const unsigned int uart_rx_b_z_pins[] = {GPIOZ_3};
  197. static const unsigned int uart_rts_b_x_pins[] = {GPIOX_18};
  198. static const unsigned int uart_cts_b_x_pins[] = {GPIOX_19};
  199. static const unsigned int uart_tx_b_x_pins[] = {GPIOX_16};
  200. static const unsigned int uart_rx_b_x_pins[] = {GPIOX_17};
  201. /* uart_ao_b */
  202. static const unsigned int uart_ao_tx_b_z_pins[] = {GPIOZ_8};
  203. static const unsigned int uart_ao_rx_b_z_pins[] = {GPIOZ_9};
  204. static const unsigned int uart_ao_cts_b_z_pins[] = {GPIOZ_6};
  205. static const unsigned int uart_ao_rts_b_z_pins[] = {GPIOZ_7};
  206. /* pwm_a */
  207. static const unsigned int pwm_a_z_pins[] = {GPIOZ_5};
  208. static const unsigned int pwm_a_x18_pins[] = {GPIOX_18};
  209. static const unsigned int pwm_a_x20_pins[] = {GPIOX_20};
  210. static const unsigned int pwm_a_a_pins[] = {GPIOA_14};
  211. /* pwm_b */
  212. static const unsigned int pwm_b_z_pins[] = {GPIOZ_4};
  213. static const unsigned int pwm_b_x_pins[] = {GPIOX_19};
  214. static const unsigned int pwm_b_a_pins[] = {GPIOA_15};
  215. /* pwm_c */
  216. static const unsigned int pwm_c_x10_pins[] = {GPIOX_10};
  217. static const unsigned int pwm_c_x17_pins[] = {GPIOX_17};
  218. static const unsigned int pwm_c_a_pins[] = {GPIOA_16};
  219. /* pwm_d */
  220. static const unsigned int pwm_d_x11_pins[] = {GPIOX_11};
  221. static const unsigned int pwm_d_x16_pins[] = {GPIOX_16};
  222. /* pwm_vs */
  223. static const unsigned int pwm_vs_pins[] = {GPIOA_0};
  224. /* spdif_in */
  225. static const unsigned int spdif_in_z_pins[] = {GPIOZ_4};
  226. static const unsigned int spdif_in_a1_pins[] = {GPIOA_1};
  227. static const unsigned int spdif_in_a7_pins[] = {GPIOA_7};
  228. static const unsigned int spdif_in_a19_pins[] = {GPIOA_19};
  229. static const unsigned int spdif_in_a20_pins[] = {GPIOA_20};
  230. /* spdif_out */
  231. static const unsigned int spdif_out_z_pins[] = {GPIOZ_5};
  232. static const unsigned int spdif_out_a1_pins[] = {GPIOA_1};
  233. static const unsigned int spdif_out_a11_pins[] = {GPIOA_11};
  234. static const unsigned int spdif_out_a19_pins[] = {GPIOA_19};
  235. static const unsigned int spdif_out_a20_pins[] = {GPIOA_20};
  236. /* jtag_ee */
  237. static const unsigned int jtag_tdo_x_pins[] = {GPIOX_0};
  238. static const unsigned int jtag_tdi_x_pins[] = {GPIOX_1};
  239. static const unsigned int jtag_clk_x_pins[] = {GPIOX_4};
  240. static const unsigned int jtag_tms_x_pins[] = {GPIOX_5};
  241. /* eth */
  242. static const unsigned int eth_txd0_x_pins[] = {GPIOX_8};
  243. static const unsigned int eth_txd1_x_pins[] = {GPIOX_9};
  244. static const unsigned int eth_txen_x_pins[] = {GPIOX_10};
  245. static const unsigned int eth_rgmii_rx_clk_x_pins[] = {GPIOX_12};
  246. static const unsigned int eth_rxd0_x_pins[] = {GPIOX_13};
  247. static const unsigned int eth_rxd1_x_pins[] = {GPIOX_14};
  248. static const unsigned int eth_rx_dv_x_pins[] = {GPIOX_15};
  249. static const unsigned int eth_mdio_x_pins[] = {GPIOX_21};
  250. static const unsigned int eth_mdc_x_pins[] = {GPIOX_22};
  251. static const unsigned int eth_txd0_y_pins[] = {GPIOY_10};
  252. static const unsigned int eth_txd1_y_pins[] = {GPIOY_11};
  253. static const unsigned int eth_txen_y_pins[] = {GPIOY_9};
  254. static const unsigned int eth_rgmii_rx_clk_y_pins[] = {GPIOY_2};
  255. static const unsigned int eth_rxd0_y_pins[] = {GPIOY_4};
  256. static const unsigned int eth_rxd1_y_pins[] = {GPIOY_5};
  257. static const unsigned int eth_rx_dv_y_pins[] = {GPIOY_3};
  258. static const unsigned int eth_mdio_y_pins[] = {GPIOY_0};
  259. static const unsigned int eth_mdc_y_pins[] = {GPIOY_1};
  260. static const unsigned int eth_rxd2_rgmii_pins[] = {GPIOY_6};
  261. static const unsigned int eth_rxd3_rgmii_pins[] = {GPIOY_7};
  262. static const unsigned int eth_rgmii_tx_clk_pins[] = {GPIOY_8};
  263. static const unsigned int eth_txd2_rgmii_pins[] = {GPIOY_12};
  264. static const unsigned int eth_txd3_rgmii_pins[] = {GPIOY_13};
  265. /* pdm */
  266. static const unsigned int pdm_dclk_a14_pins[] = {GPIOA_14};
  267. static const unsigned int pdm_dclk_a19_pins[] = {GPIOA_19};
  268. static const unsigned int pdm_din0_pins[] = {GPIOA_15};
  269. static const unsigned int pdm_din1_pins[] = {GPIOA_16};
  270. static const unsigned int pdm_din2_pins[] = {GPIOA_17};
  271. static const unsigned int pdm_din3_pins[] = {GPIOA_18};
  272. /* mclk */
  273. static const unsigned int mclk_c_pins[] = {GPIOA_0};
  274. static const unsigned int mclk_b_pins[] = {GPIOA_1};
  275. /* tdm */
  276. static const unsigned int tdma_sclk_pins[] = {GPIOX_12};
  277. static const unsigned int tdma_sclk_slv_pins[] = {GPIOX_12};
  278. static const unsigned int tdma_fs_pins[] = {GPIOX_13};
  279. static const unsigned int tdma_fs_slv_pins[] = {GPIOX_13};
  280. static const unsigned int tdma_din0_pins[] = {GPIOX_14};
  281. static const unsigned int tdma_dout0_x14_pins[] = {GPIOX_14};
  282. static const unsigned int tdma_dout0_x15_pins[] = {GPIOX_15};
  283. static const unsigned int tdma_dout1_pins[] = {GPIOX_15};
  284. static const unsigned int tdma_din1_pins[] = {GPIOX_15};
  285. static const unsigned int tdmc_sclk_pins[] = {GPIOA_2};
  286. static const unsigned int tdmc_sclk_slv_pins[] = {GPIOA_2};
  287. static const unsigned int tdmc_fs_pins[] = {GPIOA_3};
  288. static const unsigned int tdmc_fs_slv_pins[] = {GPIOA_3};
  289. static const unsigned int tdmc_din0_pins[] = {GPIOA_4};
  290. static const unsigned int tdmc_dout0_pins[] = {GPIOA_4};
  291. static const unsigned int tdmc_din1_pins[] = {GPIOA_5};
  292. static const unsigned int tdmc_dout1_pins[] = {GPIOA_5};
  293. static const unsigned int tdmc_din2_pins[] = {GPIOA_6};
  294. static const unsigned int tdmc_dout2_pins[] = {GPIOA_6};
  295. static const unsigned int tdmc_din3_pins[] = {GPIOA_7};
  296. static const unsigned int tdmc_dout3_pins[] = {GPIOA_7};
  297. static const unsigned int tdmb_sclk_pins[] = {GPIOA_8};
  298. static const unsigned int tdmb_sclk_slv_pins[] = {GPIOA_8};
  299. static const unsigned int tdmb_fs_pins[] = {GPIOA_9};
  300. static const unsigned int tdmb_fs_slv_pins[] = {GPIOA_9};
  301. static const unsigned int tdmb_din0_pins[] = {GPIOA_10};
  302. static const unsigned int tdmb_dout0_pins[] = {GPIOA_10};
  303. static const unsigned int tdmb_din1_pins[] = {GPIOA_11};
  304. static const unsigned int tdmb_dout1_pins[] = {GPIOA_11};
  305. static const unsigned int tdmb_din2_pins[] = {GPIOA_12};
  306. static const unsigned int tdmb_dout2_pins[] = {GPIOA_12};
  307. static const unsigned int tdmb_din3_pins[] = {GPIOA_13};
  308. static const unsigned int tdmb_dout3_pins[] = {GPIOA_13};
  309. static struct meson_pmx_group meson_axg_periphs_groups[] = {
  310. GPIO_GROUP(GPIOZ_0),
  311. GPIO_GROUP(GPIOZ_1),
  312. GPIO_GROUP(GPIOZ_2),
  313. GPIO_GROUP(GPIOZ_3),
  314. GPIO_GROUP(GPIOZ_4),
  315. GPIO_GROUP(GPIOZ_5),
  316. GPIO_GROUP(GPIOZ_6),
  317. GPIO_GROUP(GPIOZ_7),
  318. GPIO_GROUP(GPIOZ_8),
  319. GPIO_GROUP(GPIOZ_9),
  320. GPIO_GROUP(GPIOZ_10),
  321. GPIO_GROUP(BOOT_0),
  322. GPIO_GROUP(BOOT_1),
  323. GPIO_GROUP(BOOT_2),
  324. GPIO_GROUP(BOOT_3),
  325. GPIO_GROUP(BOOT_4),
  326. GPIO_GROUP(BOOT_5),
  327. GPIO_GROUP(BOOT_6),
  328. GPIO_GROUP(BOOT_7),
  329. GPIO_GROUP(BOOT_8),
  330. GPIO_GROUP(BOOT_9),
  331. GPIO_GROUP(BOOT_10),
  332. GPIO_GROUP(BOOT_11),
  333. GPIO_GROUP(BOOT_12),
  334. GPIO_GROUP(BOOT_13),
  335. GPIO_GROUP(BOOT_14),
  336. GPIO_GROUP(GPIOA_0),
  337. GPIO_GROUP(GPIOA_1),
  338. GPIO_GROUP(GPIOA_2),
  339. GPIO_GROUP(GPIOA_3),
  340. GPIO_GROUP(GPIOA_4),
  341. GPIO_GROUP(GPIOA_5),
  342. GPIO_GROUP(GPIOA_6),
  343. GPIO_GROUP(GPIOA_7),
  344. GPIO_GROUP(GPIOA_8),
  345. GPIO_GROUP(GPIOA_9),
  346. GPIO_GROUP(GPIOA_10),
  347. GPIO_GROUP(GPIOA_11),
  348. GPIO_GROUP(GPIOA_12),
  349. GPIO_GROUP(GPIOA_13),
  350. GPIO_GROUP(GPIOA_14),
  351. GPIO_GROUP(GPIOA_15),
  352. GPIO_GROUP(GPIOA_16),
  353. GPIO_GROUP(GPIOA_17),
  354. GPIO_GROUP(GPIOA_19),
  355. GPIO_GROUP(GPIOA_20),
  356. GPIO_GROUP(GPIOX_0),
  357. GPIO_GROUP(GPIOX_1),
  358. GPIO_GROUP(GPIOX_2),
  359. GPIO_GROUP(GPIOX_3),
  360. GPIO_GROUP(GPIOX_4),
  361. GPIO_GROUP(GPIOX_5),
  362. GPIO_GROUP(GPIOX_6),
  363. GPIO_GROUP(GPIOX_7),
  364. GPIO_GROUP(GPIOX_8),
  365. GPIO_GROUP(GPIOX_9),
  366. GPIO_GROUP(GPIOX_10),
  367. GPIO_GROUP(GPIOX_11),
  368. GPIO_GROUP(GPIOX_12),
  369. GPIO_GROUP(GPIOX_13),
  370. GPIO_GROUP(GPIOX_14),
  371. GPIO_GROUP(GPIOX_15),
  372. GPIO_GROUP(GPIOX_16),
  373. GPIO_GROUP(GPIOX_17),
  374. GPIO_GROUP(GPIOX_18),
  375. GPIO_GROUP(GPIOX_19),
  376. GPIO_GROUP(GPIOX_20),
  377. GPIO_GROUP(GPIOX_21),
  378. GPIO_GROUP(GPIOX_22),
  379. GPIO_GROUP(GPIOY_0),
  380. GPIO_GROUP(GPIOY_1),
  381. GPIO_GROUP(GPIOY_2),
  382. GPIO_GROUP(GPIOY_3),
  383. GPIO_GROUP(GPIOY_4),
  384. GPIO_GROUP(GPIOY_5),
  385. GPIO_GROUP(GPIOY_6),
  386. GPIO_GROUP(GPIOY_7),
  387. GPIO_GROUP(GPIOY_8),
  388. GPIO_GROUP(GPIOY_9),
  389. GPIO_GROUP(GPIOY_10),
  390. GPIO_GROUP(GPIOY_11),
  391. GPIO_GROUP(GPIOY_12),
  392. GPIO_GROUP(GPIOY_13),
  393. GPIO_GROUP(GPIOY_14),
  394. GPIO_GROUP(GPIOY_15),
  395. /* bank BOOT */
  396. GROUP(emmc_nand_d0, 1),
  397. GROUP(emmc_nand_d1, 1),
  398. GROUP(emmc_nand_d2, 1),
  399. GROUP(emmc_nand_d3, 1),
  400. GROUP(emmc_nand_d4, 1),
  401. GROUP(emmc_nand_d5, 1),
  402. GROUP(emmc_nand_d6, 1),
  403. GROUP(emmc_nand_d7, 1),
  404. GROUP(emmc_clk, 1),
  405. GROUP(emmc_cmd, 1),
  406. GROUP(emmc_ds, 1),
  407. GROUP(nand_ce0, 2),
  408. GROUP(nand_ale, 2),
  409. GROUP(nand_cle, 2),
  410. GROUP(nand_wen_clk, 2),
  411. GROUP(nand_ren_wr, 2),
  412. GROUP(nand_rb0, 2),
  413. GROUP(nor_hold, 3),
  414. GROUP(nor_d, 3),
  415. GROUP(nor_q, 3),
  416. GROUP(nor_c, 3),
  417. GROUP(nor_wp, 3),
  418. GROUP(nor_cs, 3),
  419. /* bank GPIOZ */
  420. GROUP(spi0_clk, 1),
  421. GROUP(spi0_mosi, 1),
  422. GROUP(spi0_miso, 1),
  423. GROUP(spi0_ss0, 1),
  424. GROUP(spi0_ss1, 1),
  425. GROUP(spi0_ss2, 1),
  426. GROUP(i2c0_sck, 1),
  427. GROUP(i2c0_sda, 1),
  428. GROUP(i2c1_sck_z, 1),
  429. GROUP(i2c1_sda_z, 1),
  430. GROUP(uart_rts_b_z, 2),
  431. GROUP(uart_cts_b_z, 2),
  432. GROUP(uart_tx_b_z, 2),
  433. GROUP(uart_rx_b_z, 2),
  434. GROUP(pwm_a_z, 2),
  435. GROUP(pwm_b_z, 2),
  436. GROUP(spdif_in_z, 3),
  437. GROUP(spdif_out_z, 3),
  438. GROUP(uart_ao_tx_b_z, 2),
  439. GROUP(uart_ao_rx_b_z, 2),
  440. GROUP(uart_ao_cts_b_z, 2),
  441. GROUP(uart_ao_rts_b_z, 2),
  442. /* bank GPIOX */
  443. GROUP(sdio_d0, 1),
  444. GROUP(sdio_d1, 1),
  445. GROUP(sdio_d2, 1),
  446. GROUP(sdio_d3, 1),
  447. GROUP(sdio_clk, 1),
  448. GROUP(sdio_cmd, 1),
  449. GROUP(i2c1_sck_x, 1),
  450. GROUP(i2c1_sda_x, 1),
  451. GROUP(i2c2_sck_x, 1),
  452. GROUP(i2c2_sda_x, 1),
  453. GROUP(uart_rts_a, 1),
  454. GROUP(uart_cts_a, 1),
  455. GROUP(uart_tx_a, 1),
  456. GROUP(uart_rx_a, 1),
  457. GROUP(uart_rts_b_x, 2),
  458. GROUP(uart_cts_b_x, 2),
  459. GROUP(uart_tx_b_x, 2),
  460. GROUP(uart_rx_b_x, 2),
  461. GROUP(jtag_tdo_x, 2),
  462. GROUP(jtag_tdi_x, 2),
  463. GROUP(jtag_clk_x, 2),
  464. GROUP(jtag_tms_x, 2),
  465. GROUP(spi1_clk_x, 4),
  466. GROUP(spi1_mosi_x, 4),
  467. GROUP(spi1_miso_x, 4),
  468. GROUP(spi1_ss0_x, 4),
  469. GROUP(pwm_a_x18, 3),
  470. GROUP(pwm_a_x20, 1),
  471. GROUP(pwm_b_x, 3),
  472. GROUP(pwm_c_x10, 3),
  473. GROUP(pwm_c_x17, 3),
  474. GROUP(pwm_d_x11, 3),
  475. GROUP(pwm_d_x16, 3),
  476. GROUP(eth_txd0_x, 4),
  477. GROUP(eth_txd1_x, 4),
  478. GROUP(eth_txen_x, 4),
  479. GROUP(eth_rgmii_rx_clk_x, 4),
  480. GROUP(eth_rxd0_x, 4),
  481. GROUP(eth_rxd1_x, 4),
  482. GROUP(eth_rx_dv_x, 4),
  483. GROUP(eth_mdio_x, 4),
  484. GROUP(eth_mdc_x, 4),
  485. GROUP(tdma_sclk, 1),
  486. GROUP(tdma_sclk_slv, 2),
  487. GROUP(tdma_fs, 1),
  488. GROUP(tdma_fs_slv, 2),
  489. GROUP(tdma_din0, 1),
  490. GROUP(tdma_dout0_x14, 2),
  491. GROUP(tdma_dout0_x15, 1),
  492. GROUP(tdma_dout1, 2),
  493. GROUP(tdma_din1, 3),
  494. /* bank GPIOY */
  495. GROUP(eth_txd0_y, 1),
  496. GROUP(eth_txd1_y, 1),
  497. GROUP(eth_txen_y, 1),
  498. GROUP(eth_rgmii_rx_clk_y, 1),
  499. GROUP(eth_rxd0_y, 1),
  500. GROUP(eth_rxd1_y, 1),
  501. GROUP(eth_rx_dv_y, 1),
  502. GROUP(eth_mdio_y, 1),
  503. GROUP(eth_mdc_y, 1),
  504. GROUP(eth_rxd2_rgmii, 1),
  505. GROUP(eth_rxd3_rgmii, 1),
  506. GROUP(eth_rgmii_tx_clk, 1),
  507. GROUP(eth_txd2_rgmii, 1),
  508. GROUP(eth_txd3_rgmii, 1),
  509. /* bank GPIOA */
  510. GROUP(spdif_out_a1, 4),
  511. GROUP(spdif_out_a11, 3),
  512. GROUP(spdif_out_a19, 2),
  513. GROUP(spdif_out_a20, 1),
  514. GROUP(spdif_in_a1, 3),
  515. GROUP(spdif_in_a7, 3),
  516. GROUP(spdif_in_a19, 1),
  517. GROUP(spdif_in_a20, 2),
  518. GROUP(spi1_clk_a, 3),
  519. GROUP(spi1_mosi_a, 3),
  520. GROUP(spi1_miso_a, 3),
  521. GROUP(spi1_ss0_a, 3),
  522. GROUP(spi1_ss1, 3),
  523. GROUP(pwm_a_a, 3),
  524. GROUP(pwm_b_a, 3),
  525. GROUP(pwm_c_a, 3),
  526. GROUP(pwm_vs, 2),
  527. GROUP(i2c2_sda_a, 3),
  528. GROUP(i2c2_sck_a, 3),
  529. GROUP(i2c3_sda_a6, 4),
  530. GROUP(i2c3_sck_a7, 4),
  531. GROUP(i2c3_sda_a12, 4),
  532. GROUP(i2c3_sck_a13, 4),
  533. GROUP(i2c3_sda_a19, 4),
  534. GROUP(i2c3_sck_a20, 4),
  535. GROUP(pdm_dclk_a14, 1),
  536. GROUP(pdm_dclk_a19, 3),
  537. GROUP(pdm_din0, 1),
  538. GROUP(pdm_din1, 1),
  539. GROUP(pdm_din2, 1),
  540. GROUP(pdm_din3, 1),
  541. GROUP(mclk_c, 1),
  542. GROUP(mclk_b, 1),
  543. GROUP(tdmc_sclk, 1),
  544. GROUP(tdmc_sclk_slv, 2),
  545. GROUP(tdmc_fs, 1),
  546. GROUP(tdmc_fs_slv, 2),
  547. GROUP(tdmc_din0, 2),
  548. GROUP(tdmc_dout0, 1),
  549. GROUP(tdmc_din1, 2),
  550. GROUP(tdmc_dout1, 1),
  551. GROUP(tdmc_din2, 2),
  552. GROUP(tdmc_dout2, 1),
  553. GROUP(tdmc_din3, 2),
  554. GROUP(tdmc_dout3, 1),
  555. GROUP(tdmb_sclk, 1),
  556. GROUP(tdmb_sclk_slv, 2),
  557. GROUP(tdmb_fs, 1),
  558. GROUP(tdmb_fs_slv, 2),
  559. GROUP(tdmb_din0, 2),
  560. GROUP(tdmb_dout0, 1),
  561. GROUP(tdmb_din1, 2),
  562. GROUP(tdmb_dout1, 1),
  563. GROUP(tdmb_din2, 2),
  564. GROUP(tdmb_dout2, 1),
  565. GROUP(tdmb_din3, 2),
  566. GROUP(tdmb_dout3, 1),
  567. };
  568. /* uart_ao_a */
  569. static const unsigned int uart_ao_tx_a_pins[] = {GPIOAO_0};
  570. static const unsigned int uart_ao_rx_a_pins[] = {GPIOAO_1};
  571. static const unsigned int uart_ao_cts_a_pins[] = {GPIOAO_2};
  572. static const unsigned int uart_ao_rts_a_pins[] = {GPIOAO_3};
  573. /* uart_ao_b */
  574. static const unsigned int uart_ao_tx_b_pins[] = {GPIOAO_4};
  575. static const unsigned int uart_ao_rx_b_pins[] = {GPIOAO_5};
  576. static const unsigned int uart_ao_cts_b_pins[] = {GPIOAO_2};
  577. static const unsigned int uart_ao_rts_b_pins[] = {GPIOAO_3};
  578. /* i2c_ao */
  579. static const unsigned int i2c_ao_sck_4_pins[] = {GPIOAO_4};
  580. static const unsigned int i2c_ao_sda_5_pins[] = {GPIOAO_5};
  581. static const unsigned int i2c_ao_sck_8_pins[] = {GPIOAO_8};
  582. static const unsigned int i2c_ao_sda_9_pins[] = {GPIOAO_9};
  583. static const unsigned int i2c_ao_sck_10_pins[] = {GPIOAO_10};
  584. static const unsigned int i2c_ao_sda_11_pins[] = {GPIOAO_11};
  585. /* i2c_ao_slave */
  586. static const unsigned int i2c_ao_slave_sck_pins[] = {GPIOAO_10};
  587. static const unsigned int i2c_ao_slave_sda_pins[] = {GPIOAO_11};
  588. /* ir_in */
  589. static const unsigned int remote_input_ao_pins[] = {GPIOAO_6};
  590. /* ir_out */
  591. static const unsigned int remote_out_ao_pins[] = {GPIOAO_7};
  592. /* pwm_ao_a */
  593. static const unsigned int pwm_ao_a_pins[] = {GPIOAO_3};
  594. /* pwm_ao_b */
  595. static const unsigned int pwm_ao_b_ao2_pins[] = {GPIOAO_2};
  596. static const unsigned int pwm_ao_b_ao12_pins[] = {GPIOAO_12};
  597. /* pwm_ao_c */
  598. static const unsigned int pwm_ao_c_ao8_pins[] = {GPIOAO_8};
  599. static const unsigned int pwm_ao_c_ao13_pins[] = {GPIOAO_13};
  600. /* pwm_ao_d */
  601. static const unsigned int pwm_ao_d_pins[] = {GPIOAO_9};
  602. /* jtag_ao */
  603. static const unsigned int jtag_ao_tdi_pins[] = {GPIOAO_3};
  604. static const unsigned int jtag_ao_tdo_pins[] = {GPIOAO_4};
  605. static const unsigned int jtag_ao_clk_pins[] = {GPIOAO_5};
  606. static const unsigned int jtag_ao_tms_pins[] = {GPIOAO_7};
  607. /* gen_clk */
  608. static const unsigned int gen_clk_ee_pins[] = {GPIOAO_13};
  609. static struct meson_pmx_group meson_axg_aobus_groups[] = {
  610. GPIO_GROUP(GPIOAO_0),
  611. GPIO_GROUP(GPIOAO_1),
  612. GPIO_GROUP(GPIOAO_2),
  613. GPIO_GROUP(GPIOAO_3),
  614. GPIO_GROUP(GPIOAO_4),
  615. GPIO_GROUP(GPIOAO_5),
  616. GPIO_GROUP(GPIOAO_6),
  617. GPIO_GROUP(GPIOAO_7),
  618. GPIO_GROUP(GPIOAO_8),
  619. GPIO_GROUP(GPIOAO_9),
  620. GPIO_GROUP(GPIOAO_10),
  621. GPIO_GROUP(GPIOAO_11),
  622. GPIO_GROUP(GPIOAO_12),
  623. GPIO_GROUP(GPIOAO_13),
  624. GPIO_GROUP(GPIO_TEST_N),
  625. /* bank AO */
  626. GROUP(uart_ao_tx_a, 1),
  627. GROUP(uart_ao_rx_a, 1),
  628. GROUP(uart_ao_cts_a, 2),
  629. GROUP(uart_ao_rts_a, 2),
  630. GROUP(uart_ao_tx_b, 1),
  631. GROUP(uart_ao_rx_b, 1),
  632. GROUP(uart_ao_cts_b, 1),
  633. GROUP(uart_ao_rts_b, 1),
  634. GROUP(i2c_ao_sck_4, 2),
  635. GROUP(i2c_ao_sda_5, 2),
  636. GROUP(i2c_ao_sck_8, 2),
  637. GROUP(i2c_ao_sda_9, 2),
  638. GROUP(i2c_ao_sck_10, 2),
  639. GROUP(i2c_ao_sda_11, 2),
  640. GROUP(i2c_ao_slave_sck, 1),
  641. GROUP(i2c_ao_slave_sda, 1),
  642. GROUP(remote_input_ao, 1),
  643. GROUP(remote_out_ao, 1),
  644. GROUP(pwm_ao_a, 3),
  645. GROUP(pwm_ao_b_ao2, 3),
  646. GROUP(pwm_ao_b_ao12, 3),
  647. GROUP(pwm_ao_c_ao8, 3),
  648. GROUP(pwm_ao_c_ao13, 3),
  649. GROUP(pwm_ao_d, 3),
  650. GROUP(jtag_ao_tdi, 4),
  651. GROUP(jtag_ao_tdo, 4),
  652. GROUP(jtag_ao_clk, 4),
  653. GROUP(jtag_ao_tms, 4),
  654. GROUP(gen_clk_ee, 4),
  655. };
  656. static const char * const gpio_periphs_groups[] = {
  657. "GPIOZ_0", "GPIOZ_1", "GPIOZ_2", "GPIOZ_3", "GPIOZ_4",
  658. "GPIOZ_5", "GPIOZ_6", "GPIOZ_7", "GPIOZ_8", "GPIOZ_9",
  659. "GPIOZ_10",
  660. "BOOT_0", "BOOT_1", "BOOT_2", "BOOT_3", "BOOT_4",
  661. "BOOT_5", "BOOT_6", "BOOT_7", "BOOT_8", "BOOT_9",
  662. "BOOT_10", "BOOT_11", "BOOT_12", "BOOT_13", "BOOT_14",
  663. "GPIOA_0", "GPIOA_1", "GPIOA_2", "GPIOA_3", "GPIOA_4",
  664. "GPIOA_5", "GPIOA_6", "GPIOA_7", "GPIOA_8", "GPIOA_9",
  665. "GPIOA_10", "GPIOA_11", "GPIOA_12", "GPIOA_13", "GPIOA_14",
  666. "GPIOA_15", "GPIOA_16", "GPIOA_17", "GPIOA_18", "GPIOA_19",
  667. "GPIOA_20",
  668. "GPIOX_0", "GPIOX_1", "GPIOX_2", "GPIOX_3", "GPIOX_4",
  669. "GPIOX_5", "GPIOX_6", "GPIOX_7", "GPIOX_8", "GPIOX_9",
  670. "GPIOX_10", "GPIOX_11", "GPIOX_12", "GPIOX_13", "GPIOX_14",
  671. "GPIOX_15", "GPIOX_16", "GPIOX_17", "GPIOX_18", "GPIOX_19",
  672. "GPIOX_20", "GPIOX_21", "GPIOX_22",
  673. "GPIOY_0", "GPIOY_1", "GPIOY_2", "GPIOY_3", "GPIOY_4",
  674. "GPIOY_5", "GPIOY_6", "GPIOY_7", "GPIOY_8", "GPIOY_9",
  675. "GPIOY_10", "GPIOY_11", "GPIOY_12", "GPIOY_13", "GPIOY_14",
  676. "GPIOY_15",
  677. };
  678. static const char * const emmc_groups[] = {
  679. "emmc_nand_d0", "emmc_nand_d1", "emmc_nand_d2",
  680. "emmc_nand_d3", "emmc_nand_d4", "emmc_nand_d5",
  681. "emmc_nand_d6", "emmc_nand_d7",
  682. "emmc_clk", "emmc_cmd", "emmc_ds",
  683. };
  684. static const char * const nand_groups[] = {
  685. "emmc_nand_d0", "emmc_nand_d1", "emmc_nand_d2",
  686. "emmc_nand_d3", "emmc_nand_d4", "emmc_nand_d5",
  687. "emmc_nand_d6", "emmc_nand_d7",
  688. "nand_ce0", "nand_ale", "nand_cle",
  689. "nand_wen_clk", "nand_ren_wr", "nand_rb0",
  690. };
  691. static const char * const nor_groups[] = {
  692. "nor_d", "nor_q", "nor_c", "nor_cs",
  693. "nor_hold", "nor_wp",
  694. };
  695. static const char * const sdio_groups[] = {
  696. "sdio_d0", "sdio_d1", "sdio_d2", "sdio_d3",
  697. "sdio_cmd", "sdio_clk",
  698. };
  699. static const char * const spi0_groups[] = {
  700. "spi0_clk", "spi0_mosi", "spi0_miso", "spi0_ss0",
  701. "spi0_ss1", "spi0_ss2"
  702. };
  703. static const char * const spi1_groups[] = {
  704. "spi1_clk_x", "spi1_mosi_x", "spi1_miso_x", "spi1_ss0_x",
  705. "spi1_clk_a", "spi1_mosi_a", "spi1_miso_a", "spi1_ss0_a",
  706. "spi1_ss1"
  707. };
  708. static const char * const uart_a_groups[] = {
  709. "uart_tx_a", "uart_rx_a", "uart_cts_a", "uart_rts_a",
  710. };
  711. static const char * const uart_b_groups[] = {
  712. "uart_tx_b_z", "uart_rx_b_z", "uart_cts_b_z", "uart_rts_b_z",
  713. "uart_tx_b_x", "uart_rx_b_x", "uart_cts_b_x", "uart_rts_b_x",
  714. };
  715. static const char * const uart_ao_b_z_groups[] = {
  716. "uart_ao_tx_b_z", "uart_ao_rx_b_z",
  717. "uart_ao_cts_b_z", "uart_ao_rts_b_z",
  718. };
  719. static const char * const i2c0_groups[] = {
  720. "i2c0_sck", "i2c0_sda",
  721. };
  722. static const char * const i2c1_groups[] = {
  723. "i2c1_sck_z", "i2c1_sda_z",
  724. "i2c1_sck_x", "i2c1_sda_x",
  725. };
  726. static const char * const i2c2_groups[] = {
  727. "i2c2_sck_x", "i2c2_sda_x",
  728. "i2c2_sda_a", "i2c2_sck_a",
  729. };
  730. static const char * const i2c3_groups[] = {
  731. "i2c3_sda_a6", "i2c3_sck_a7",
  732. "i2c3_sda_a12", "i2c3_sck_a13",
  733. "i2c3_sda_a19", "i2c3_sck_a20",
  734. };
  735. static const char * const eth_groups[] = {
  736. "eth_rxd2_rgmii", "eth_rxd3_rgmii", "eth_rgmii_tx_clk",
  737. "eth_txd2_rgmii", "eth_txd3_rgmii",
  738. "eth_txd0_x", "eth_txd1_x", "eth_txen_x", "eth_rgmii_rx_clk_x",
  739. "eth_rxd0_x", "eth_rxd1_x", "eth_rx_dv_x", "eth_mdio_x",
  740. "eth_mdc_x",
  741. "eth_txd0_y", "eth_txd1_y", "eth_txen_y", "eth_rgmii_rx_clk_y",
  742. "eth_rxd0_y", "eth_rxd1_y", "eth_rx_dv_y", "eth_mdio_y",
  743. "eth_mdc_y",
  744. };
  745. static const char * const pwm_a_groups[] = {
  746. "pwm_a_z", "pwm_a_x18", "pwm_a_x20", "pwm_a_a",
  747. };
  748. static const char * const pwm_b_groups[] = {
  749. "pwm_b_z", "pwm_b_x", "pwm_b_a",
  750. };
  751. static const char * const pwm_c_groups[] = {
  752. "pwm_c_x10", "pwm_c_x17", "pwm_c_a",
  753. };
  754. static const char * const pwm_d_groups[] = {
  755. "pwm_d_x11", "pwm_d_x16",
  756. };
  757. static const char * const pwm_vs_groups[] = {
  758. "pwm_vs",
  759. };
  760. static const char * const spdif_out_groups[] = {
  761. "spdif_out_z", "spdif_out_a1", "spdif_out_a11",
  762. "spdif_out_a19", "spdif_out_a20",
  763. };
  764. static const char * const spdif_in_groups[] = {
  765. "spdif_in_z", "spdif_in_a1", "spdif_in_a7",
  766. "spdif_in_a19", "spdif_in_a20",
  767. };
  768. static const char * const jtag_ee_groups[] = {
  769. "jtag_tdo_x", "jtag_tdi_x", "jtag_clk_x",
  770. "jtag_tms_x",
  771. };
  772. static const char * const pdm_groups[] = {
  773. "pdm_din0", "pdm_din1", "pdm_din2", "pdm_din3",
  774. "pdm_dclk_a14", "pdm_dclk_a19",
  775. };
  776. static const char * const gpio_aobus_groups[] = {
  777. "GPIOAO_0", "GPIOAO_1", "GPIOAO_2", "GPIOAO_3", "GPIOAO_4",
  778. "GPIOAO_5", "GPIOAO_6", "GPIOAO_7", "GPIOAO_8", "GPIOAO_9",
  779. "GPIOAO_10", "GPIOAO_11", "GPIOAO_12", "GPIOAO_13",
  780. "GPIO_TEST_N",
  781. };
  782. static const char * const uart_ao_a_groups[] = {
  783. "uart_ao_tx_a", "uart_ao_rx_a", "uart_ao_cts_a", "uart_ao_rts_a",
  784. };
  785. static const char * const uart_ao_b_groups[] = {
  786. "uart_ao_tx_b", "uart_ao_rx_b", "uart_ao_cts_b", "uart_ao_rts_b",
  787. };
  788. static const char * const i2c_ao_groups[] = {
  789. "i2c_ao_sck_4", "i2c_ao_sda_5",
  790. "i2c_ao_sck_8", "i2c_ao_sda_9",
  791. "i2c_ao_sck_10", "i2c_ao_sda_11",
  792. };
  793. static const char * const i2c_ao_slave_groups[] = {
  794. "i2c_ao_slave_sck", "i2c_ao_slave_sda",
  795. };
  796. static const char * const remote_input_ao_groups[] = {
  797. "remote_input_ao",
  798. };
  799. static const char * const remote_out_ao_groups[] = {
  800. "remote_out_ao",
  801. };
  802. static const char * const pwm_ao_a_groups[] = {
  803. "pwm_ao_a",
  804. };
  805. static const char * const pwm_ao_b_groups[] = {
  806. "pwm_ao_b_ao2", "pwm_ao_b_ao12",
  807. };
  808. static const char * const pwm_ao_c_groups[] = {
  809. "pwm_ao_c_ao8", "pwm_ao_c_ao13",
  810. };
  811. static const char * const pwm_ao_d_groups[] = {
  812. "pwm_ao_d",
  813. };
  814. static const char * const jtag_ao_groups[] = {
  815. "jtag_ao_tdi", "jtag_ao_tdo", "jtag_ao_clk", "jtag_ao_tms",
  816. };
  817. static const char * const mclk_c_groups[] = {
  818. "mclk_c",
  819. };
  820. static const char * const mclk_b_groups[] = {
  821. "mclk_b",
  822. };
  823. static const char * const tdma_groups[] = {
  824. "tdma_sclk", "tdma_sclk_slv", "tdma_fs", "tdma_fs_slv",
  825. "tdma_din0", "tdma_dout0_x14", "tdma_dout0_x15", "tdma_dout1",
  826. "tdma_din1",
  827. };
  828. static const char * const tdmc_groups[] = {
  829. "tdmc_sclk", "tdmc_sclk_slv", "tdmc_fs", "tdmc_fs_slv",
  830. "tdmc_din0", "tdmc_dout0", "tdmc_din1", "tdmc_dout1",
  831. "tdmc_din2", "tdmc_dout2", "tdmc_din3", "tdmc_dout3",
  832. };
  833. static const char * const tdmb_groups[] = {
  834. "tdmb_sclk", "tdmb_sclk_slv", "tdmb_fs", "tdmb_fs_slv",
  835. "tdmb_din0", "tdmb_dout0", "tdmb_din1", "tdmb_dout1",
  836. "tdmb_din2", "tdmb_dout2", "tdmb_din3", "tdmb_dout3",
  837. };
  838. static const char * const gen_clk_ee_groups[] = {
  839. "gen_clk_ee",
  840. };
  841. static struct meson_pmx_func meson_axg_periphs_functions[] = {
  842. FUNCTION(gpio_periphs),
  843. FUNCTION(emmc),
  844. FUNCTION(nor),
  845. FUNCTION(spi0),
  846. FUNCTION(spi1),
  847. FUNCTION(sdio),
  848. FUNCTION(nand),
  849. FUNCTION(uart_a),
  850. FUNCTION(uart_b),
  851. FUNCTION(uart_ao_b_z),
  852. FUNCTION(i2c0),
  853. FUNCTION(i2c1),
  854. FUNCTION(i2c2),
  855. FUNCTION(i2c3),
  856. FUNCTION(eth),
  857. FUNCTION(pwm_a),
  858. FUNCTION(pwm_b),
  859. FUNCTION(pwm_c),
  860. FUNCTION(pwm_d),
  861. FUNCTION(pwm_vs),
  862. FUNCTION(spdif_out),
  863. FUNCTION(spdif_in),
  864. FUNCTION(jtag_ee),
  865. FUNCTION(pdm),
  866. FUNCTION(mclk_b),
  867. FUNCTION(mclk_c),
  868. FUNCTION(tdma),
  869. FUNCTION(tdmb),
  870. FUNCTION(tdmc),
  871. };
  872. static struct meson_pmx_func meson_axg_aobus_functions[] = {
  873. FUNCTION(gpio_aobus),
  874. FUNCTION(uart_ao_a),
  875. FUNCTION(uart_ao_b),
  876. FUNCTION(i2c_ao),
  877. FUNCTION(i2c_ao_slave),
  878. FUNCTION(remote_input_ao),
  879. FUNCTION(remote_out_ao),
  880. FUNCTION(pwm_ao_a),
  881. FUNCTION(pwm_ao_b),
  882. FUNCTION(pwm_ao_c),
  883. FUNCTION(pwm_ao_d),
  884. FUNCTION(jtag_ao),
  885. FUNCTION(gen_clk_ee),
  886. };
  887. static struct meson_bank meson_axg_periphs_banks[] = {
  888. /* name first last irq pullen pull dir out in */
  889. BANK("Z", GPIOZ_0, GPIOZ_10, 14, 24, 3, 0, 3, 0, 9, 0, 10, 0, 11, 0),
  890. BANK("BOOT", BOOT_0, BOOT_14, 25, 39, 4, 0, 4, 0, 12, 0, 13, 0, 14, 0),
  891. BANK("A", GPIOA_0, GPIOA_20, 40, 60, 0, 0, 0, 0, 0, 0, 1, 0, 2, 0),
  892. BANK("X", GPIOX_0, GPIOX_22, 61, 83, 2, 0, 2, 0, 6, 0, 7, 0, 8, 0),
  893. BANK("Y", GPIOY_0, GPIOY_15, 84, 99, 1, 0, 1, 0, 3, 0, 4, 0, 5, 0),
  894. };
  895. static struct meson_bank meson_axg_aobus_banks[] = {
  896. /* name first last irq pullen pull dir out in */
  897. BANK("AO", GPIOAO_0, GPIOAO_13, 0, 13, 0, 16, 0, 0, 0, 0, 0, 16, 1, 0),
  898. };
  899. static struct meson_pmx_bank meson_axg_periphs_pmx_banks[] = {
  900. /* name first lask reg offset */
  901. BANK_PMX("Z", GPIOZ_0, GPIOZ_10, 0x2, 0),
  902. BANK_PMX("BOOT", BOOT_0, BOOT_14, 0x0, 0),
  903. BANK_PMX("A", GPIOA_0, GPIOA_20, 0xb, 0),
  904. BANK_PMX("X", GPIOX_0, GPIOX_22, 0x4, 0),
  905. BANK_PMX("Y", GPIOY_0, GPIOY_15, 0x8, 0),
  906. };
  907. static struct meson_axg_pmx_data meson_axg_periphs_pmx_banks_data = {
  908. .pmx_banks = meson_axg_periphs_pmx_banks,
  909. .num_pmx_banks = ARRAY_SIZE(meson_axg_periphs_pmx_banks),
  910. };
  911. static struct meson_pmx_bank meson_axg_aobus_pmx_banks[] = {
  912. BANK_PMX("AO", GPIOAO_0, GPIOAO_13, 0x0, 0),
  913. };
  914. static struct meson_axg_pmx_data meson_axg_aobus_pmx_banks_data = {
  915. .pmx_banks = meson_axg_aobus_pmx_banks,
  916. .num_pmx_banks = ARRAY_SIZE(meson_axg_aobus_pmx_banks),
  917. };
  918. static struct meson_pinctrl_data meson_axg_periphs_pinctrl_data = {
  919. .name = "periphs-banks",
  920. .pins = meson_axg_periphs_pins,
  921. .groups = meson_axg_periphs_groups,
  922. .funcs = meson_axg_periphs_functions,
  923. .banks = meson_axg_periphs_banks,
  924. .num_pins = ARRAY_SIZE(meson_axg_periphs_pins),
  925. .num_groups = ARRAY_SIZE(meson_axg_periphs_groups),
  926. .num_funcs = ARRAY_SIZE(meson_axg_periphs_functions),
  927. .num_banks = ARRAY_SIZE(meson_axg_periphs_banks),
  928. .pmx_ops = &meson_axg_pmx_ops,
  929. .pmx_data = &meson_axg_periphs_pmx_banks_data,
  930. };
  931. static struct meson_pinctrl_data meson_axg_aobus_pinctrl_data = {
  932. .name = "aobus-banks",
  933. .pins = meson_axg_aobus_pins,
  934. .groups = meson_axg_aobus_groups,
  935. .funcs = meson_axg_aobus_functions,
  936. .banks = meson_axg_aobus_banks,
  937. .num_pins = ARRAY_SIZE(meson_axg_aobus_pins),
  938. .num_groups = ARRAY_SIZE(meson_axg_aobus_groups),
  939. .num_funcs = ARRAY_SIZE(meson_axg_aobus_functions),
  940. .num_banks = ARRAY_SIZE(meson_axg_aobus_banks),
  941. .pmx_ops = &meson_axg_pmx_ops,
  942. .pmx_data = &meson_axg_aobus_pmx_banks_data,
  943. };
  944. static const struct of_device_id meson_axg_pinctrl_dt_match[] = {
  945. {
  946. .compatible = "amlogic,meson-axg-periphs-pinctrl",
  947. .data = &meson_axg_periphs_pinctrl_data,
  948. },
  949. {
  950. .compatible = "amlogic,meson-axg-aobus-pinctrl",
  951. .data = &meson_axg_aobus_pinctrl_data,
  952. },
  953. { },
  954. };
  955. static struct platform_driver meson_axg_pinctrl_driver = {
  956. .probe = meson_pinctrl_probe,
  957. .driver = {
  958. .name = "meson-axg-pinctrl",
  959. .of_match_table = meson_axg_pinctrl_dt_match,
  960. },
  961. };
  962. builtin_platform_driver(meson_axg_pinctrl_driver);