rdma.c 51 KB

1234567891011121314151617181920212223242526272829303132333435363738394041424344454647484950515253545556575859606162636465666768697071727374757677787980818283848586878889909192939495969798991001011021031041051061071081091101111121131141151161171181191201211221231241251261271281291301311321331341351361371381391401411421431441451461471481491501511521531541551561571581591601611621631641651661671681691701711721731741751761771781791801811821831841851861871881891901911921931941951961971981992002012022032042052062072082092102112122132142152162172182192202212222232242252262272282292302312322332342352362372382392402412422432442452462472482492502512522532542552562572582592602612622632642652662672682692702712722732742752762772782792802812822832842852862872882892902912922932942952962972982993003013023033043053063073083093103113123133143153163173183193203213223233243253263273283293303313323333343353363373383393403413423433443453463473483493503513523533543553563573583593603613623633643653663673683693703713723733743753763773783793803813823833843853863873883893903913923933943953963973983994004014024034044054064074084094104114124134144154164174184194204214224234244254264274284294304314324334344354364374384394404414424434444454464474484494504514524534544554564574584594604614624634644654664674684694704714724734744754764774784794804814824834844854864874884894904914924934944954964974984995005015025035045055065075085095105115125135145155165175185195205215225235245255265275285295305315325335345355365375385395405415425435445455465475485495505515525535545555565575585595605615625635645655665675685695705715725735745755765775785795805815825835845855865875885895905915925935945955965975985996006016026036046056066076086096106116126136146156166176186196206216226236246256266276286296306316326336346356366376386396406416426436446456466476486496506516526536546556566576586596606616626636646656666676686696706716726736746756766776786796806816826836846856866876886896906916926936946956966976986997007017027037047057067077087097107117127137147157167177187197207217227237247257267277287297307317327337347357367377387397407417427437447457467477487497507517527537547557567577587597607617627637647657667677687697707717727737747757767777787797807817827837847857867877887897907917927937947957967977987998008018028038048058068078088098108118128138148158168178188198208218228238248258268278288298308318328338348358368378388398408418428438448458468478488498508518528538548558568578588598608618628638648658668678688698708718728738748758768778788798808818828838848858868878888898908918928938948958968978988999009019029039049059069079089099109119129139149159169179189199209219229239249259269279289299309319329339349359369379389399409419429439449459469479489499509519529539549559569579589599609619629639649659669679689699709719729739749759769779789799809819829839849859869879889899909919929939949959969979989991000100110021003100410051006100710081009101010111012101310141015101610171018101910201021102210231024102510261027102810291030103110321033103410351036103710381039104010411042104310441045104610471048104910501051105210531054105510561057105810591060106110621063106410651066106710681069107010711072107310741075107610771078107910801081108210831084108510861087108810891090109110921093109410951096109710981099110011011102110311041105110611071108110911101111111211131114111511161117111811191120112111221123112411251126112711281129113011311132113311341135113611371138113911401141114211431144114511461147114811491150115111521153115411551156115711581159116011611162116311641165116611671168116911701171117211731174117511761177117811791180118111821183118411851186118711881189119011911192119311941195119611971198119912001201120212031204120512061207120812091210121112121213121412151216121712181219122012211222122312241225122612271228122912301231123212331234123512361237123812391240124112421243124412451246124712481249125012511252125312541255125612571258125912601261126212631264126512661267126812691270127112721273127412751276127712781279128012811282128312841285128612871288128912901291129212931294129512961297129812991300130113021303130413051306130713081309131013111312131313141315131613171318131913201321132213231324132513261327132813291330133113321333133413351336133713381339134013411342134313441345134613471348134913501351135213531354135513561357135813591360136113621363136413651366136713681369137013711372137313741375137613771378137913801381138213831384138513861387138813891390139113921393139413951396139713981399140014011402140314041405140614071408140914101411141214131414141514161417141814191420142114221423142414251426142714281429143014311432143314341435143614371438143914401441144214431444144514461447144814491450145114521453145414551456145714581459146014611462146314641465146614671468146914701471147214731474147514761477147814791480148114821483148414851486148714881489149014911492149314941495149614971498149915001501150215031504150515061507150815091510151115121513151415151516151715181519152015211522152315241525152615271528152915301531153215331534153515361537153815391540154115421543154415451546154715481549155015511552155315541555155615571558155915601561156215631564156515661567156815691570157115721573157415751576157715781579158015811582158315841585158615871588158915901591159215931594159515961597159815991600160116021603160416051606160716081609161016111612161316141615161616171618161916201621162216231624162516261627162816291630163116321633163416351636163716381639164016411642164316441645164616471648164916501651165216531654165516561657165816591660166116621663166416651666166716681669167016711672167316741675167616771678167916801681168216831684168516861687168816891690169116921693169416951696169716981699170017011702170317041705170617071708170917101711171217131714171517161717171817191720172117221723172417251726172717281729173017311732173317341735173617371738173917401741174217431744174517461747174817491750175117521753175417551756175717581759176017611762176317641765176617671768176917701771177217731774177517761777177817791780178117821783178417851786178717881789179017911792179317941795179617971798179918001801180218031804180518061807180818091810181118121813181418151816181718181819182018211822182318241825182618271828182918301831183218331834183518361837183818391840184118421843184418451846184718481849185018511852185318541855185618571858185918601861186218631864186518661867186818691870187118721873187418751876187718781879188018811882188318841885188618871888188918901891189218931894189518961897189818991900190119021903190419051906190719081909191019111912191319141915191619171918191919201921192219231924192519261927192819291930193119321933193419351936193719381939194019411942194319441945194619471948194919501951195219531954195519561957195819591960196119621963196419651966196719681969197019711972197319741975197619771978197919801981198219831984198519861987198819891990199119921993199419951996199719981999200020012002200320042005200620072008200920102011201220132014201520162017201820192020202120222023202420252026202720282029203020312032203320342035203620372038203920402041204220432044204520462047204820492050205120522053205420552056205720582059
  1. /*
  2. * NVMe over Fabrics RDMA host code.
  3. * Copyright (c) 2015-2016 HGST, a Western Digital Company.
  4. *
  5. * This program is free software; you can redistribute it and/or modify it
  6. * under the terms and conditions of the GNU General Public License,
  7. * version 2, as published by the Free Software Foundation.
  8. *
  9. * This program is distributed in the hope it will be useful, but WITHOUT
  10. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  12. * more details.
  13. */
  14. #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  15. #include <linux/module.h>
  16. #include <linux/init.h>
  17. #include <linux/slab.h>
  18. #include <rdma/mr_pool.h>
  19. #include <linux/err.h>
  20. #include <linux/string.h>
  21. #include <linux/atomic.h>
  22. #include <linux/blk-mq.h>
  23. #include <linux/blk-mq-rdma.h>
  24. #include <linux/types.h>
  25. #include <linux/list.h>
  26. #include <linux/mutex.h>
  27. #include <linux/scatterlist.h>
  28. #include <linux/nvme.h>
  29. #include <asm/unaligned.h>
  30. #include <rdma/ib_verbs.h>
  31. #include <rdma/rdma_cm.h>
  32. #include <linux/nvme-rdma.h>
  33. #include "nvme.h"
  34. #include "fabrics.h"
  35. #define NVME_RDMA_CONNECT_TIMEOUT_MS 3000 /* 3 second */
  36. #define NVME_RDMA_MAX_SEGMENTS 256
  37. #define NVME_RDMA_MAX_INLINE_SEGMENTS 4
  38. struct nvme_rdma_device {
  39. struct ib_device *dev;
  40. struct ib_pd *pd;
  41. struct kref ref;
  42. struct list_head entry;
  43. unsigned int num_inline_segments;
  44. };
  45. struct nvme_rdma_qe {
  46. struct ib_cqe cqe;
  47. void *data;
  48. u64 dma;
  49. };
  50. struct nvme_rdma_queue;
  51. struct nvme_rdma_request {
  52. struct nvme_request req;
  53. struct ib_mr *mr;
  54. struct nvme_rdma_qe sqe;
  55. union nvme_result result;
  56. __le16 status;
  57. refcount_t ref;
  58. struct ib_sge sge[1 + NVME_RDMA_MAX_INLINE_SEGMENTS];
  59. u32 num_sge;
  60. int nents;
  61. struct ib_reg_wr reg_wr;
  62. struct ib_cqe reg_cqe;
  63. struct nvme_rdma_queue *queue;
  64. struct sg_table sg_table;
  65. struct scatterlist first_sgl[];
  66. };
  67. enum nvme_rdma_queue_flags {
  68. NVME_RDMA_Q_ALLOCATED = 0,
  69. NVME_RDMA_Q_LIVE = 1,
  70. NVME_RDMA_Q_TR_READY = 2,
  71. };
  72. struct nvme_rdma_queue {
  73. struct nvme_rdma_qe *rsp_ring;
  74. int queue_size;
  75. size_t cmnd_capsule_len;
  76. struct nvme_rdma_ctrl *ctrl;
  77. struct nvme_rdma_device *device;
  78. struct ib_cq *ib_cq;
  79. struct ib_qp *qp;
  80. unsigned long flags;
  81. struct rdma_cm_id *cm_id;
  82. int cm_error;
  83. struct completion cm_done;
  84. };
  85. struct nvme_rdma_ctrl {
  86. /* read only in the hot path */
  87. struct nvme_rdma_queue *queues;
  88. /* other member variables */
  89. struct blk_mq_tag_set tag_set;
  90. struct work_struct err_work;
  91. struct nvme_rdma_qe async_event_sqe;
  92. struct delayed_work reconnect_work;
  93. struct list_head list;
  94. struct blk_mq_tag_set admin_tag_set;
  95. struct nvme_rdma_device *device;
  96. u32 max_fr_pages;
  97. struct sockaddr_storage addr;
  98. struct sockaddr_storage src_addr;
  99. struct nvme_ctrl ctrl;
  100. bool use_inline_data;
  101. };
  102. static inline struct nvme_rdma_ctrl *to_rdma_ctrl(struct nvme_ctrl *ctrl)
  103. {
  104. return container_of(ctrl, struct nvme_rdma_ctrl, ctrl);
  105. }
  106. static LIST_HEAD(device_list);
  107. static DEFINE_MUTEX(device_list_mutex);
  108. static LIST_HEAD(nvme_rdma_ctrl_list);
  109. static DEFINE_MUTEX(nvme_rdma_ctrl_mutex);
  110. /*
  111. * Disabling this option makes small I/O goes faster, but is fundamentally
  112. * unsafe. With it turned off we will have to register a global rkey that
  113. * allows read and write access to all physical memory.
  114. */
  115. static bool register_always = true;
  116. module_param(register_always, bool, 0444);
  117. MODULE_PARM_DESC(register_always,
  118. "Use memory registration even for contiguous memory regions");
  119. static int nvme_rdma_cm_handler(struct rdma_cm_id *cm_id,
  120. struct rdma_cm_event *event);
  121. static void nvme_rdma_recv_done(struct ib_cq *cq, struct ib_wc *wc);
  122. static const struct blk_mq_ops nvme_rdma_mq_ops;
  123. static const struct blk_mq_ops nvme_rdma_admin_mq_ops;
  124. /* XXX: really should move to a generic header sooner or later.. */
  125. static inline void put_unaligned_le24(u32 val, u8 *p)
  126. {
  127. *p++ = val;
  128. *p++ = val >> 8;
  129. *p++ = val >> 16;
  130. }
  131. static inline int nvme_rdma_queue_idx(struct nvme_rdma_queue *queue)
  132. {
  133. return queue - queue->ctrl->queues;
  134. }
  135. static inline size_t nvme_rdma_inline_data_size(struct nvme_rdma_queue *queue)
  136. {
  137. return queue->cmnd_capsule_len - sizeof(struct nvme_command);
  138. }
  139. static void nvme_rdma_free_qe(struct ib_device *ibdev, struct nvme_rdma_qe *qe,
  140. size_t capsule_size, enum dma_data_direction dir)
  141. {
  142. ib_dma_unmap_single(ibdev, qe->dma, capsule_size, dir);
  143. kfree(qe->data);
  144. }
  145. static int nvme_rdma_alloc_qe(struct ib_device *ibdev, struct nvme_rdma_qe *qe,
  146. size_t capsule_size, enum dma_data_direction dir)
  147. {
  148. qe->data = kzalloc(capsule_size, GFP_KERNEL);
  149. if (!qe->data)
  150. return -ENOMEM;
  151. qe->dma = ib_dma_map_single(ibdev, qe->data, capsule_size, dir);
  152. if (ib_dma_mapping_error(ibdev, qe->dma)) {
  153. kfree(qe->data);
  154. qe->data = NULL;
  155. return -ENOMEM;
  156. }
  157. return 0;
  158. }
  159. static void nvme_rdma_free_ring(struct ib_device *ibdev,
  160. struct nvme_rdma_qe *ring, size_t ib_queue_size,
  161. size_t capsule_size, enum dma_data_direction dir)
  162. {
  163. int i;
  164. for (i = 0; i < ib_queue_size; i++)
  165. nvme_rdma_free_qe(ibdev, &ring[i], capsule_size, dir);
  166. kfree(ring);
  167. }
  168. static struct nvme_rdma_qe *nvme_rdma_alloc_ring(struct ib_device *ibdev,
  169. size_t ib_queue_size, size_t capsule_size,
  170. enum dma_data_direction dir)
  171. {
  172. struct nvme_rdma_qe *ring;
  173. int i;
  174. ring = kcalloc(ib_queue_size, sizeof(struct nvme_rdma_qe), GFP_KERNEL);
  175. if (!ring)
  176. return NULL;
  177. for (i = 0; i < ib_queue_size; i++) {
  178. if (nvme_rdma_alloc_qe(ibdev, &ring[i], capsule_size, dir))
  179. goto out_free_ring;
  180. }
  181. return ring;
  182. out_free_ring:
  183. nvme_rdma_free_ring(ibdev, ring, i, capsule_size, dir);
  184. return NULL;
  185. }
  186. static void nvme_rdma_qp_event(struct ib_event *event, void *context)
  187. {
  188. pr_debug("QP event %s (%d)\n",
  189. ib_event_msg(event->event), event->event);
  190. }
  191. static int nvme_rdma_wait_for_cm(struct nvme_rdma_queue *queue)
  192. {
  193. int ret;
  194. ret = wait_for_completion_interruptible_timeout(&queue->cm_done,
  195. msecs_to_jiffies(NVME_RDMA_CONNECT_TIMEOUT_MS) + 1);
  196. if (ret < 0)
  197. return ret;
  198. if (ret == 0)
  199. return -ETIMEDOUT;
  200. WARN_ON_ONCE(queue->cm_error > 0);
  201. return queue->cm_error;
  202. }
  203. static int nvme_rdma_create_qp(struct nvme_rdma_queue *queue, const int factor)
  204. {
  205. struct nvme_rdma_device *dev = queue->device;
  206. struct ib_qp_init_attr init_attr;
  207. int ret;
  208. memset(&init_attr, 0, sizeof(init_attr));
  209. init_attr.event_handler = nvme_rdma_qp_event;
  210. /* +1 for drain */
  211. init_attr.cap.max_send_wr = factor * queue->queue_size + 1;
  212. /* +1 for drain */
  213. init_attr.cap.max_recv_wr = queue->queue_size + 1;
  214. init_attr.cap.max_recv_sge = 1;
  215. init_attr.cap.max_send_sge = 1 + dev->num_inline_segments;
  216. init_attr.sq_sig_type = IB_SIGNAL_REQ_WR;
  217. init_attr.qp_type = IB_QPT_RC;
  218. init_attr.send_cq = queue->ib_cq;
  219. init_attr.recv_cq = queue->ib_cq;
  220. ret = rdma_create_qp(queue->cm_id, dev->pd, &init_attr);
  221. queue->qp = queue->cm_id->qp;
  222. return ret;
  223. }
  224. static void nvme_rdma_exit_request(struct blk_mq_tag_set *set,
  225. struct request *rq, unsigned int hctx_idx)
  226. {
  227. struct nvme_rdma_ctrl *ctrl = set->driver_data;
  228. struct nvme_rdma_request *req = blk_mq_rq_to_pdu(rq);
  229. int queue_idx = (set == &ctrl->tag_set) ? hctx_idx + 1 : 0;
  230. struct nvme_rdma_queue *queue = &ctrl->queues[queue_idx];
  231. struct nvme_rdma_device *dev = queue->device;
  232. nvme_rdma_free_qe(dev->dev, &req->sqe, sizeof(struct nvme_command),
  233. DMA_TO_DEVICE);
  234. }
  235. static int nvme_rdma_init_request(struct blk_mq_tag_set *set,
  236. struct request *rq, unsigned int hctx_idx,
  237. unsigned int numa_node)
  238. {
  239. struct nvme_rdma_ctrl *ctrl = set->driver_data;
  240. struct nvme_rdma_request *req = blk_mq_rq_to_pdu(rq);
  241. int queue_idx = (set == &ctrl->tag_set) ? hctx_idx + 1 : 0;
  242. struct nvme_rdma_queue *queue = &ctrl->queues[queue_idx];
  243. struct nvme_rdma_device *dev = queue->device;
  244. struct ib_device *ibdev = dev->dev;
  245. int ret;
  246. nvme_req(rq)->ctrl = &ctrl->ctrl;
  247. ret = nvme_rdma_alloc_qe(ibdev, &req->sqe, sizeof(struct nvme_command),
  248. DMA_TO_DEVICE);
  249. if (ret)
  250. return ret;
  251. req->queue = queue;
  252. return 0;
  253. }
  254. static int nvme_rdma_init_hctx(struct blk_mq_hw_ctx *hctx, void *data,
  255. unsigned int hctx_idx)
  256. {
  257. struct nvme_rdma_ctrl *ctrl = data;
  258. struct nvme_rdma_queue *queue = &ctrl->queues[hctx_idx + 1];
  259. BUG_ON(hctx_idx >= ctrl->ctrl.queue_count);
  260. hctx->driver_data = queue;
  261. return 0;
  262. }
  263. static int nvme_rdma_init_admin_hctx(struct blk_mq_hw_ctx *hctx, void *data,
  264. unsigned int hctx_idx)
  265. {
  266. struct nvme_rdma_ctrl *ctrl = data;
  267. struct nvme_rdma_queue *queue = &ctrl->queues[0];
  268. BUG_ON(hctx_idx != 0);
  269. hctx->driver_data = queue;
  270. return 0;
  271. }
  272. static void nvme_rdma_free_dev(struct kref *ref)
  273. {
  274. struct nvme_rdma_device *ndev =
  275. container_of(ref, struct nvme_rdma_device, ref);
  276. mutex_lock(&device_list_mutex);
  277. list_del(&ndev->entry);
  278. mutex_unlock(&device_list_mutex);
  279. ib_dealloc_pd(ndev->pd);
  280. kfree(ndev);
  281. }
  282. static void nvme_rdma_dev_put(struct nvme_rdma_device *dev)
  283. {
  284. kref_put(&dev->ref, nvme_rdma_free_dev);
  285. }
  286. static int nvme_rdma_dev_get(struct nvme_rdma_device *dev)
  287. {
  288. return kref_get_unless_zero(&dev->ref);
  289. }
  290. static struct nvme_rdma_device *
  291. nvme_rdma_find_get_device(struct rdma_cm_id *cm_id)
  292. {
  293. struct nvme_rdma_device *ndev;
  294. mutex_lock(&device_list_mutex);
  295. list_for_each_entry(ndev, &device_list, entry) {
  296. if (ndev->dev->node_guid == cm_id->device->node_guid &&
  297. nvme_rdma_dev_get(ndev))
  298. goto out_unlock;
  299. }
  300. ndev = kzalloc(sizeof(*ndev), GFP_KERNEL);
  301. if (!ndev)
  302. goto out_err;
  303. ndev->dev = cm_id->device;
  304. kref_init(&ndev->ref);
  305. ndev->pd = ib_alloc_pd(ndev->dev,
  306. register_always ? 0 : IB_PD_UNSAFE_GLOBAL_RKEY);
  307. if (IS_ERR(ndev->pd))
  308. goto out_free_dev;
  309. if (!(ndev->dev->attrs.device_cap_flags &
  310. IB_DEVICE_MEM_MGT_EXTENSIONS)) {
  311. dev_err(&ndev->dev->dev,
  312. "Memory registrations not supported.\n");
  313. goto out_free_pd;
  314. }
  315. ndev->num_inline_segments = min(NVME_RDMA_MAX_INLINE_SEGMENTS,
  316. ndev->dev->attrs.max_send_sge - 1);
  317. list_add(&ndev->entry, &device_list);
  318. out_unlock:
  319. mutex_unlock(&device_list_mutex);
  320. return ndev;
  321. out_free_pd:
  322. ib_dealloc_pd(ndev->pd);
  323. out_free_dev:
  324. kfree(ndev);
  325. out_err:
  326. mutex_unlock(&device_list_mutex);
  327. return NULL;
  328. }
  329. static void nvme_rdma_destroy_queue_ib(struct nvme_rdma_queue *queue)
  330. {
  331. struct nvme_rdma_device *dev;
  332. struct ib_device *ibdev;
  333. if (!test_and_clear_bit(NVME_RDMA_Q_TR_READY, &queue->flags))
  334. return;
  335. dev = queue->device;
  336. ibdev = dev->dev;
  337. ib_mr_pool_destroy(queue->qp, &queue->qp->rdma_mrs);
  338. /*
  339. * The cm_id object might have been destroyed during RDMA connection
  340. * establishment error flow to avoid getting other cma events, thus
  341. * the destruction of the QP shouldn't use rdma_cm API.
  342. */
  343. ib_destroy_qp(queue->qp);
  344. ib_free_cq(queue->ib_cq);
  345. nvme_rdma_free_ring(ibdev, queue->rsp_ring, queue->queue_size,
  346. sizeof(struct nvme_completion), DMA_FROM_DEVICE);
  347. nvme_rdma_dev_put(dev);
  348. }
  349. static int nvme_rdma_get_max_fr_pages(struct ib_device *ibdev)
  350. {
  351. return min_t(u32, NVME_RDMA_MAX_SEGMENTS,
  352. ibdev->attrs.max_fast_reg_page_list_len);
  353. }
  354. static int nvme_rdma_create_queue_ib(struct nvme_rdma_queue *queue)
  355. {
  356. struct ib_device *ibdev;
  357. const int send_wr_factor = 3; /* MR, SEND, INV */
  358. const int cq_factor = send_wr_factor + 1; /* + RECV */
  359. int comp_vector, idx = nvme_rdma_queue_idx(queue);
  360. int ret;
  361. queue->device = nvme_rdma_find_get_device(queue->cm_id);
  362. if (!queue->device) {
  363. dev_err(queue->cm_id->device->dev.parent,
  364. "no client data found!\n");
  365. return -ECONNREFUSED;
  366. }
  367. ibdev = queue->device->dev;
  368. /*
  369. * Spread I/O queues completion vectors according their queue index.
  370. * Admin queues can always go on completion vector 0.
  371. */
  372. comp_vector = idx == 0 ? idx : idx - 1;
  373. /* +1 for ib_stop_cq */
  374. queue->ib_cq = ib_alloc_cq(ibdev, queue,
  375. cq_factor * queue->queue_size + 1,
  376. comp_vector, IB_POLL_SOFTIRQ);
  377. if (IS_ERR(queue->ib_cq)) {
  378. ret = PTR_ERR(queue->ib_cq);
  379. goto out_put_dev;
  380. }
  381. ret = nvme_rdma_create_qp(queue, send_wr_factor);
  382. if (ret)
  383. goto out_destroy_ib_cq;
  384. queue->rsp_ring = nvme_rdma_alloc_ring(ibdev, queue->queue_size,
  385. sizeof(struct nvme_completion), DMA_FROM_DEVICE);
  386. if (!queue->rsp_ring) {
  387. ret = -ENOMEM;
  388. goto out_destroy_qp;
  389. }
  390. ret = ib_mr_pool_init(queue->qp, &queue->qp->rdma_mrs,
  391. queue->queue_size,
  392. IB_MR_TYPE_MEM_REG,
  393. nvme_rdma_get_max_fr_pages(ibdev));
  394. if (ret) {
  395. dev_err(queue->ctrl->ctrl.device,
  396. "failed to initialize MR pool sized %d for QID %d\n",
  397. queue->queue_size, idx);
  398. goto out_destroy_ring;
  399. }
  400. set_bit(NVME_RDMA_Q_TR_READY, &queue->flags);
  401. return 0;
  402. out_destroy_ring:
  403. nvme_rdma_free_ring(ibdev, queue->rsp_ring, queue->queue_size,
  404. sizeof(struct nvme_completion), DMA_FROM_DEVICE);
  405. out_destroy_qp:
  406. rdma_destroy_qp(queue->cm_id);
  407. out_destroy_ib_cq:
  408. ib_free_cq(queue->ib_cq);
  409. out_put_dev:
  410. nvme_rdma_dev_put(queue->device);
  411. return ret;
  412. }
  413. static int nvme_rdma_alloc_queue(struct nvme_rdma_ctrl *ctrl,
  414. int idx, size_t queue_size)
  415. {
  416. struct nvme_rdma_queue *queue;
  417. struct sockaddr *src_addr = NULL;
  418. int ret;
  419. queue = &ctrl->queues[idx];
  420. queue->ctrl = ctrl;
  421. init_completion(&queue->cm_done);
  422. if (idx > 0)
  423. queue->cmnd_capsule_len = ctrl->ctrl.ioccsz * 16;
  424. else
  425. queue->cmnd_capsule_len = sizeof(struct nvme_command);
  426. queue->queue_size = queue_size;
  427. queue->cm_id = rdma_create_id(&init_net, nvme_rdma_cm_handler, queue,
  428. RDMA_PS_TCP, IB_QPT_RC);
  429. if (IS_ERR(queue->cm_id)) {
  430. dev_info(ctrl->ctrl.device,
  431. "failed to create CM ID: %ld\n", PTR_ERR(queue->cm_id));
  432. return PTR_ERR(queue->cm_id);
  433. }
  434. if (ctrl->ctrl.opts->mask & NVMF_OPT_HOST_TRADDR)
  435. src_addr = (struct sockaddr *)&ctrl->src_addr;
  436. queue->cm_error = -ETIMEDOUT;
  437. ret = rdma_resolve_addr(queue->cm_id, src_addr,
  438. (struct sockaddr *)&ctrl->addr,
  439. NVME_RDMA_CONNECT_TIMEOUT_MS);
  440. if (ret) {
  441. dev_info(ctrl->ctrl.device,
  442. "rdma_resolve_addr failed (%d).\n", ret);
  443. goto out_destroy_cm_id;
  444. }
  445. ret = nvme_rdma_wait_for_cm(queue);
  446. if (ret) {
  447. dev_info(ctrl->ctrl.device,
  448. "rdma connection establishment failed (%d)\n", ret);
  449. goto out_destroy_cm_id;
  450. }
  451. set_bit(NVME_RDMA_Q_ALLOCATED, &queue->flags);
  452. return 0;
  453. out_destroy_cm_id:
  454. rdma_destroy_id(queue->cm_id);
  455. nvme_rdma_destroy_queue_ib(queue);
  456. return ret;
  457. }
  458. static void nvme_rdma_stop_queue(struct nvme_rdma_queue *queue)
  459. {
  460. if (!test_and_clear_bit(NVME_RDMA_Q_LIVE, &queue->flags))
  461. return;
  462. rdma_disconnect(queue->cm_id);
  463. ib_drain_qp(queue->qp);
  464. }
  465. static void nvme_rdma_free_queue(struct nvme_rdma_queue *queue)
  466. {
  467. if (!test_and_clear_bit(NVME_RDMA_Q_ALLOCATED, &queue->flags))
  468. return;
  469. nvme_rdma_destroy_queue_ib(queue);
  470. rdma_destroy_id(queue->cm_id);
  471. }
  472. static void nvme_rdma_free_io_queues(struct nvme_rdma_ctrl *ctrl)
  473. {
  474. int i;
  475. for (i = 1; i < ctrl->ctrl.queue_count; i++)
  476. nvme_rdma_free_queue(&ctrl->queues[i]);
  477. }
  478. static void nvme_rdma_stop_io_queues(struct nvme_rdma_ctrl *ctrl)
  479. {
  480. int i;
  481. for (i = 1; i < ctrl->ctrl.queue_count; i++)
  482. nvme_rdma_stop_queue(&ctrl->queues[i]);
  483. }
  484. static int nvme_rdma_start_queue(struct nvme_rdma_ctrl *ctrl, int idx)
  485. {
  486. int ret;
  487. if (idx)
  488. ret = nvmf_connect_io_queue(&ctrl->ctrl, idx);
  489. else
  490. ret = nvmf_connect_admin_queue(&ctrl->ctrl);
  491. if (!ret)
  492. set_bit(NVME_RDMA_Q_LIVE, &ctrl->queues[idx].flags);
  493. else
  494. dev_info(ctrl->ctrl.device,
  495. "failed to connect queue: %d ret=%d\n", idx, ret);
  496. return ret;
  497. }
  498. static int nvme_rdma_start_io_queues(struct nvme_rdma_ctrl *ctrl)
  499. {
  500. int i, ret = 0;
  501. for (i = 1; i < ctrl->ctrl.queue_count; i++) {
  502. ret = nvme_rdma_start_queue(ctrl, i);
  503. if (ret)
  504. goto out_stop_queues;
  505. }
  506. return 0;
  507. out_stop_queues:
  508. for (i--; i >= 1; i--)
  509. nvme_rdma_stop_queue(&ctrl->queues[i]);
  510. return ret;
  511. }
  512. static int nvme_rdma_alloc_io_queues(struct nvme_rdma_ctrl *ctrl)
  513. {
  514. struct nvmf_ctrl_options *opts = ctrl->ctrl.opts;
  515. struct ib_device *ibdev = ctrl->device->dev;
  516. unsigned int nr_io_queues;
  517. int i, ret;
  518. nr_io_queues = min(opts->nr_io_queues, num_online_cpus());
  519. /*
  520. * we map queues according to the device irq vectors for
  521. * optimal locality so we don't need more queues than
  522. * completion vectors.
  523. */
  524. nr_io_queues = min_t(unsigned int, nr_io_queues,
  525. ibdev->num_comp_vectors);
  526. ret = nvme_set_queue_count(&ctrl->ctrl, &nr_io_queues);
  527. if (ret)
  528. return ret;
  529. ctrl->ctrl.queue_count = nr_io_queues + 1;
  530. if (ctrl->ctrl.queue_count < 2)
  531. return 0;
  532. dev_info(ctrl->ctrl.device,
  533. "creating %d I/O queues.\n", nr_io_queues);
  534. for (i = 1; i < ctrl->ctrl.queue_count; i++) {
  535. ret = nvme_rdma_alloc_queue(ctrl, i,
  536. ctrl->ctrl.sqsize + 1);
  537. if (ret)
  538. goto out_free_queues;
  539. }
  540. return 0;
  541. out_free_queues:
  542. for (i--; i >= 1; i--)
  543. nvme_rdma_free_queue(&ctrl->queues[i]);
  544. return ret;
  545. }
  546. static void nvme_rdma_free_tagset(struct nvme_ctrl *nctrl,
  547. struct blk_mq_tag_set *set)
  548. {
  549. struct nvme_rdma_ctrl *ctrl = to_rdma_ctrl(nctrl);
  550. blk_mq_free_tag_set(set);
  551. nvme_rdma_dev_put(ctrl->device);
  552. }
  553. static struct blk_mq_tag_set *nvme_rdma_alloc_tagset(struct nvme_ctrl *nctrl,
  554. bool admin)
  555. {
  556. struct nvme_rdma_ctrl *ctrl = to_rdma_ctrl(nctrl);
  557. struct blk_mq_tag_set *set;
  558. int ret;
  559. if (admin) {
  560. set = &ctrl->admin_tag_set;
  561. memset(set, 0, sizeof(*set));
  562. set->ops = &nvme_rdma_admin_mq_ops;
  563. set->queue_depth = NVME_AQ_MQ_TAG_DEPTH;
  564. set->reserved_tags = 2; /* connect + keep-alive */
  565. set->numa_node = NUMA_NO_NODE;
  566. set->cmd_size = sizeof(struct nvme_rdma_request) +
  567. SG_CHUNK_SIZE * sizeof(struct scatterlist);
  568. set->driver_data = ctrl;
  569. set->nr_hw_queues = 1;
  570. set->timeout = ADMIN_TIMEOUT;
  571. set->flags = BLK_MQ_F_NO_SCHED;
  572. } else {
  573. set = &ctrl->tag_set;
  574. memset(set, 0, sizeof(*set));
  575. set->ops = &nvme_rdma_mq_ops;
  576. set->queue_depth = nctrl->sqsize + 1;
  577. set->reserved_tags = 1; /* fabric connect */
  578. set->numa_node = NUMA_NO_NODE;
  579. set->flags = BLK_MQ_F_SHOULD_MERGE;
  580. set->cmd_size = sizeof(struct nvme_rdma_request) +
  581. SG_CHUNK_SIZE * sizeof(struct scatterlist);
  582. set->driver_data = ctrl;
  583. set->nr_hw_queues = nctrl->queue_count - 1;
  584. set->timeout = NVME_IO_TIMEOUT;
  585. }
  586. ret = blk_mq_alloc_tag_set(set);
  587. if (ret)
  588. goto out;
  589. /*
  590. * We need a reference on the device as long as the tag_set is alive,
  591. * as the MRs in the request structures need a valid ib_device.
  592. */
  593. ret = nvme_rdma_dev_get(ctrl->device);
  594. if (!ret) {
  595. ret = -EINVAL;
  596. goto out_free_tagset;
  597. }
  598. return set;
  599. out_free_tagset:
  600. blk_mq_free_tag_set(set);
  601. out:
  602. return ERR_PTR(ret);
  603. }
  604. static void nvme_rdma_destroy_admin_queue(struct nvme_rdma_ctrl *ctrl,
  605. bool remove)
  606. {
  607. if (remove) {
  608. blk_cleanup_queue(ctrl->ctrl.admin_q);
  609. nvme_rdma_free_tagset(&ctrl->ctrl, ctrl->ctrl.admin_tagset);
  610. }
  611. if (ctrl->async_event_sqe.data) {
  612. nvme_rdma_free_qe(ctrl->device->dev, &ctrl->async_event_sqe,
  613. sizeof(struct nvme_command), DMA_TO_DEVICE);
  614. ctrl->async_event_sqe.data = NULL;
  615. }
  616. nvme_rdma_free_queue(&ctrl->queues[0]);
  617. }
  618. static int nvme_rdma_configure_admin_queue(struct nvme_rdma_ctrl *ctrl,
  619. bool new)
  620. {
  621. int error;
  622. error = nvme_rdma_alloc_queue(ctrl, 0, NVME_AQ_DEPTH);
  623. if (error)
  624. return error;
  625. ctrl->device = ctrl->queues[0].device;
  626. ctrl->max_fr_pages = nvme_rdma_get_max_fr_pages(ctrl->device->dev);
  627. error = nvme_rdma_alloc_qe(ctrl->device->dev, &ctrl->async_event_sqe,
  628. sizeof(struct nvme_command), DMA_TO_DEVICE);
  629. if (error)
  630. goto out_free_queue;
  631. if (new) {
  632. ctrl->ctrl.admin_tagset = nvme_rdma_alloc_tagset(&ctrl->ctrl, true);
  633. if (IS_ERR(ctrl->ctrl.admin_tagset)) {
  634. error = PTR_ERR(ctrl->ctrl.admin_tagset);
  635. goto out_free_async_qe;
  636. }
  637. ctrl->ctrl.admin_q = blk_mq_init_queue(&ctrl->admin_tag_set);
  638. if (IS_ERR(ctrl->ctrl.admin_q)) {
  639. error = PTR_ERR(ctrl->ctrl.admin_q);
  640. goto out_free_tagset;
  641. }
  642. }
  643. error = nvme_rdma_start_queue(ctrl, 0);
  644. if (error)
  645. goto out_cleanup_queue;
  646. error = ctrl->ctrl.ops->reg_read64(&ctrl->ctrl, NVME_REG_CAP,
  647. &ctrl->ctrl.cap);
  648. if (error) {
  649. dev_err(ctrl->ctrl.device,
  650. "prop_get NVME_REG_CAP failed\n");
  651. goto out_stop_queue;
  652. }
  653. ctrl->ctrl.sqsize =
  654. min_t(int, NVME_CAP_MQES(ctrl->ctrl.cap), ctrl->ctrl.sqsize);
  655. error = nvme_enable_ctrl(&ctrl->ctrl, ctrl->ctrl.cap);
  656. if (error)
  657. goto out_stop_queue;
  658. ctrl->ctrl.max_hw_sectors =
  659. (ctrl->max_fr_pages - 1) << (ilog2(SZ_4K) - 9);
  660. error = nvme_init_identify(&ctrl->ctrl);
  661. if (error)
  662. goto out_stop_queue;
  663. return 0;
  664. out_stop_queue:
  665. nvme_rdma_stop_queue(&ctrl->queues[0]);
  666. out_cleanup_queue:
  667. if (new)
  668. blk_cleanup_queue(ctrl->ctrl.admin_q);
  669. out_free_tagset:
  670. if (new)
  671. nvme_rdma_free_tagset(&ctrl->ctrl, ctrl->ctrl.admin_tagset);
  672. out_free_async_qe:
  673. nvme_rdma_free_qe(ctrl->device->dev, &ctrl->async_event_sqe,
  674. sizeof(struct nvme_command), DMA_TO_DEVICE);
  675. ctrl->async_event_sqe.data = NULL;
  676. out_free_queue:
  677. nvme_rdma_free_queue(&ctrl->queues[0]);
  678. return error;
  679. }
  680. static void nvme_rdma_destroy_io_queues(struct nvme_rdma_ctrl *ctrl,
  681. bool remove)
  682. {
  683. if (remove) {
  684. blk_cleanup_queue(ctrl->ctrl.connect_q);
  685. nvme_rdma_free_tagset(&ctrl->ctrl, ctrl->ctrl.tagset);
  686. }
  687. nvme_rdma_free_io_queues(ctrl);
  688. }
  689. static int nvme_rdma_configure_io_queues(struct nvme_rdma_ctrl *ctrl, bool new)
  690. {
  691. int ret;
  692. ret = nvme_rdma_alloc_io_queues(ctrl);
  693. if (ret)
  694. return ret;
  695. if (new) {
  696. ctrl->ctrl.tagset = nvme_rdma_alloc_tagset(&ctrl->ctrl, false);
  697. if (IS_ERR(ctrl->ctrl.tagset)) {
  698. ret = PTR_ERR(ctrl->ctrl.tagset);
  699. goto out_free_io_queues;
  700. }
  701. ctrl->ctrl.connect_q = blk_mq_init_queue(&ctrl->tag_set);
  702. if (IS_ERR(ctrl->ctrl.connect_q)) {
  703. ret = PTR_ERR(ctrl->ctrl.connect_q);
  704. goto out_free_tag_set;
  705. }
  706. } else {
  707. blk_mq_update_nr_hw_queues(&ctrl->tag_set,
  708. ctrl->ctrl.queue_count - 1);
  709. }
  710. ret = nvme_rdma_start_io_queues(ctrl);
  711. if (ret)
  712. goto out_cleanup_connect_q;
  713. return 0;
  714. out_cleanup_connect_q:
  715. if (new)
  716. blk_cleanup_queue(ctrl->ctrl.connect_q);
  717. out_free_tag_set:
  718. if (new)
  719. nvme_rdma_free_tagset(&ctrl->ctrl, ctrl->ctrl.tagset);
  720. out_free_io_queues:
  721. nvme_rdma_free_io_queues(ctrl);
  722. return ret;
  723. }
  724. static void nvme_rdma_teardown_admin_queue(struct nvme_rdma_ctrl *ctrl,
  725. bool remove)
  726. {
  727. blk_mq_quiesce_queue(ctrl->ctrl.admin_q);
  728. nvme_rdma_stop_queue(&ctrl->queues[0]);
  729. blk_mq_tagset_busy_iter(&ctrl->admin_tag_set, nvme_cancel_request,
  730. &ctrl->ctrl);
  731. blk_mq_unquiesce_queue(ctrl->ctrl.admin_q);
  732. nvme_rdma_destroy_admin_queue(ctrl, remove);
  733. }
  734. static void nvme_rdma_teardown_io_queues(struct nvme_rdma_ctrl *ctrl,
  735. bool remove)
  736. {
  737. if (ctrl->ctrl.queue_count > 1) {
  738. nvme_stop_queues(&ctrl->ctrl);
  739. nvme_rdma_stop_io_queues(ctrl);
  740. blk_mq_tagset_busy_iter(&ctrl->tag_set, nvme_cancel_request,
  741. &ctrl->ctrl);
  742. if (remove)
  743. nvme_start_queues(&ctrl->ctrl);
  744. nvme_rdma_destroy_io_queues(ctrl, remove);
  745. }
  746. }
  747. static void nvme_rdma_stop_ctrl(struct nvme_ctrl *nctrl)
  748. {
  749. struct nvme_rdma_ctrl *ctrl = to_rdma_ctrl(nctrl);
  750. cancel_work_sync(&ctrl->err_work);
  751. cancel_delayed_work_sync(&ctrl->reconnect_work);
  752. }
  753. static void nvme_rdma_free_ctrl(struct nvme_ctrl *nctrl)
  754. {
  755. struct nvme_rdma_ctrl *ctrl = to_rdma_ctrl(nctrl);
  756. if (list_empty(&ctrl->list))
  757. goto free_ctrl;
  758. mutex_lock(&nvme_rdma_ctrl_mutex);
  759. list_del(&ctrl->list);
  760. mutex_unlock(&nvme_rdma_ctrl_mutex);
  761. nvmf_free_options(nctrl->opts);
  762. free_ctrl:
  763. kfree(ctrl->queues);
  764. kfree(ctrl);
  765. }
  766. static void nvme_rdma_reconnect_or_remove(struct nvme_rdma_ctrl *ctrl)
  767. {
  768. /* If we are resetting/deleting then do nothing */
  769. if (ctrl->ctrl.state != NVME_CTRL_CONNECTING) {
  770. WARN_ON_ONCE(ctrl->ctrl.state == NVME_CTRL_NEW ||
  771. ctrl->ctrl.state == NVME_CTRL_LIVE);
  772. return;
  773. }
  774. if (nvmf_should_reconnect(&ctrl->ctrl)) {
  775. dev_info(ctrl->ctrl.device, "Reconnecting in %d seconds...\n",
  776. ctrl->ctrl.opts->reconnect_delay);
  777. queue_delayed_work(nvme_wq, &ctrl->reconnect_work,
  778. ctrl->ctrl.opts->reconnect_delay * HZ);
  779. } else {
  780. nvme_delete_ctrl(&ctrl->ctrl);
  781. }
  782. }
  783. static int nvme_rdma_setup_ctrl(struct nvme_rdma_ctrl *ctrl, bool new)
  784. {
  785. int ret = -EINVAL;
  786. bool changed;
  787. ret = nvme_rdma_configure_admin_queue(ctrl, new);
  788. if (ret)
  789. return ret;
  790. if (ctrl->ctrl.icdoff) {
  791. dev_err(ctrl->ctrl.device, "icdoff is not supported!\n");
  792. goto destroy_admin;
  793. }
  794. if (!(ctrl->ctrl.sgls & (1 << 2))) {
  795. dev_err(ctrl->ctrl.device,
  796. "Mandatory keyed sgls are not supported!\n");
  797. goto destroy_admin;
  798. }
  799. if (ctrl->ctrl.opts->queue_size > ctrl->ctrl.sqsize + 1) {
  800. dev_warn(ctrl->ctrl.device,
  801. "queue_size %zu > ctrl sqsize %u, clamping down\n",
  802. ctrl->ctrl.opts->queue_size, ctrl->ctrl.sqsize + 1);
  803. }
  804. if (ctrl->ctrl.sqsize + 1 > ctrl->ctrl.maxcmd) {
  805. dev_warn(ctrl->ctrl.device,
  806. "sqsize %u > ctrl maxcmd %u, clamping down\n",
  807. ctrl->ctrl.sqsize + 1, ctrl->ctrl.maxcmd);
  808. ctrl->ctrl.sqsize = ctrl->ctrl.maxcmd - 1;
  809. }
  810. if (ctrl->ctrl.sgls & (1 << 20))
  811. ctrl->use_inline_data = true;
  812. if (ctrl->ctrl.queue_count > 1) {
  813. ret = nvme_rdma_configure_io_queues(ctrl, new);
  814. if (ret)
  815. goto destroy_admin;
  816. }
  817. changed = nvme_change_ctrl_state(&ctrl->ctrl, NVME_CTRL_LIVE);
  818. if (!changed) {
  819. /* state change failure is ok if we're in DELETING state */
  820. WARN_ON_ONCE(ctrl->ctrl.state != NVME_CTRL_DELETING);
  821. ret = -EINVAL;
  822. goto destroy_io;
  823. }
  824. nvme_start_ctrl(&ctrl->ctrl);
  825. return 0;
  826. destroy_io:
  827. if (ctrl->ctrl.queue_count > 1)
  828. nvme_rdma_destroy_io_queues(ctrl, new);
  829. destroy_admin:
  830. nvme_rdma_stop_queue(&ctrl->queues[0]);
  831. nvme_rdma_destroy_admin_queue(ctrl, new);
  832. return ret;
  833. }
  834. static void nvme_rdma_reconnect_ctrl_work(struct work_struct *work)
  835. {
  836. struct nvme_rdma_ctrl *ctrl = container_of(to_delayed_work(work),
  837. struct nvme_rdma_ctrl, reconnect_work);
  838. ++ctrl->ctrl.nr_reconnects;
  839. if (nvme_rdma_setup_ctrl(ctrl, false))
  840. goto requeue;
  841. dev_info(ctrl->ctrl.device, "Successfully reconnected (%d attempts)\n",
  842. ctrl->ctrl.nr_reconnects);
  843. ctrl->ctrl.nr_reconnects = 0;
  844. return;
  845. requeue:
  846. dev_info(ctrl->ctrl.device, "Failed reconnect attempt %d\n",
  847. ctrl->ctrl.nr_reconnects);
  848. nvme_rdma_reconnect_or_remove(ctrl);
  849. }
  850. static void nvme_rdma_error_recovery_work(struct work_struct *work)
  851. {
  852. struct nvme_rdma_ctrl *ctrl = container_of(work,
  853. struct nvme_rdma_ctrl, err_work);
  854. nvme_stop_keep_alive(&ctrl->ctrl);
  855. nvme_rdma_teardown_io_queues(ctrl, false);
  856. nvme_start_queues(&ctrl->ctrl);
  857. nvme_rdma_teardown_admin_queue(ctrl, false);
  858. if (!nvme_change_ctrl_state(&ctrl->ctrl, NVME_CTRL_CONNECTING)) {
  859. /* state change failure is ok if we're in DELETING state */
  860. WARN_ON_ONCE(ctrl->ctrl.state != NVME_CTRL_DELETING);
  861. return;
  862. }
  863. nvme_rdma_reconnect_or_remove(ctrl);
  864. }
  865. static void nvme_rdma_error_recovery(struct nvme_rdma_ctrl *ctrl)
  866. {
  867. if (!nvme_change_ctrl_state(&ctrl->ctrl, NVME_CTRL_RESETTING))
  868. return;
  869. queue_work(nvme_wq, &ctrl->err_work);
  870. }
  871. static void nvme_rdma_wr_error(struct ib_cq *cq, struct ib_wc *wc,
  872. const char *op)
  873. {
  874. struct nvme_rdma_queue *queue = cq->cq_context;
  875. struct nvme_rdma_ctrl *ctrl = queue->ctrl;
  876. if (ctrl->ctrl.state == NVME_CTRL_LIVE)
  877. dev_info(ctrl->ctrl.device,
  878. "%s for CQE 0x%p failed with status %s (%d)\n",
  879. op, wc->wr_cqe,
  880. ib_wc_status_msg(wc->status), wc->status);
  881. nvme_rdma_error_recovery(ctrl);
  882. }
  883. static void nvme_rdma_memreg_done(struct ib_cq *cq, struct ib_wc *wc)
  884. {
  885. if (unlikely(wc->status != IB_WC_SUCCESS))
  886. nvme_rdma_wr_error(cq, wc, "MEMREG");
  887. }
  888. static void nvme_rdma_inv_rkey_done(struct ib_cq *cq, struct ib_wc *wc)
  889. {
  890. struct nvme_rdma_request *req =
  891. container_of(wc->wr_cqe, struct nvme_rdma_request, reg_cqe);
  892. struct request *rq = blk_mq_rq_from_pdu(req);
  893. if (unlikely(wc->status != IB_WC_SUCCESS)) {
  894. nvme_rdma_wr_error(cq, wc, "LOCAL_INV");
  895. return;
  896. }
  897. if (refcount_dec_and_test(&req->ref))
  898. nvme_end_request(rq, req->status, req->result);
  899. }
  900. static int nvme_rdma_inv_rkey(struct nvme_rdma_queue *queue,
  901. struct nvme_rdma_request *req)
  902. {
  903. struct ib_send_wr wr = {
  904. .opcode = IB_WR_LOCAL_INV,
  905. .next = NULL,
  906. .num_sge = 0,
  907. .send_flags = IB_SEND_SIGNALED,
  908. .ex.invalidate_rkey = req->mr->rkey,
  909. };
  910. req->reg_cqe.done = nvme_rdma_inv_rkey_done;
  911. wr.wr_cqe = &req->reg_cqe;
  912. return ib_post_send(queue->qp, &wr, NULL);
  913. }
  914. static void nvme_rdma_unmap_data(struct nvme_rdma_queue *queue,
  915. struct request *rq)
  916. {
  917. struct nvme_rdma_request *req = blk_mq_rq_to_pdu(rq);
  918. struct nvme_rdma_device *dev = queue->device;
  919. struct ib_device *ibdev = dev->dev;
  920. if (!blk_rq_payload_bytes(rq))
  921. return;
  922. if (req->mr) {
  923. ib_mr_pool_put(queue->qp, &queue->qp->rdma_mrs, req->mr);
  924. req->mr = NULL;
  925. }
  926. ib_dma_unmap_sg(ibdev, req->sg_table.sgl,
  927. req->nents, rq_data_dir(rq) ==
  928. WRITE ? DMA_TO_DEVICE : DMA_FROM_DEVICE);
  929. nvme_cleanup_cmd(rq);
  930. sg_free_table_chained(&req->sg_table, true);
  931. }
  932. static int nvme_rdma_set_sg_null(struct nvme_command *c)
  933. {
  934. struct nvme_keyed_sgl_desc *sg = &c->common.dptr.ksgl;
  935. sg->addr = 0;
  936. put_unaligned_le24(0, sg->length);
  937. put_unaligned_le32(0, sg->key);
  938. sg->type = NVME_KEY_SGL_FMT_DATA_DESC << 4;
  939. return 0;
  940. }
  941. static int nvme_rdma_map_sg_inline(struct nvme_rdma_queue *queue,
  942. struct nvme_rdma_request *req, struct nvme_command *c,
  943. int count)
  944. {
  945. struct nvme_sgl_desc *sg = &c->common.dptr.sgl;
  946. struct scatterlist *sgl = req->sg_table.sgl;
  947. struct ib_sge *sge = &req->sge[1];
  948. u32 len = 0;
  949. int i;
  950. for (i = 0; i < count; i++, sgl++, sge++) {
  951. sge->addr = sg_dma_address(sgl);
  952. sge->length = sg_dma_len(sgl);
  953. sge->lkey = queue->device->pd->local_dma_lkey;
  954. len += sge->length;
  955. }
  956. sg->addr = cpu_to_le64(queue->ctrl->ctrl.icdoff);
  957. sg->length = cpu_to_le32(len);
  958. sg->type = (NVME_SGL_FMT_DATA_DESC << 4) | NVME_SGL_FMT_OFFSET;
  959. req->num_sge += count;
  960. return 0;
  961. }
  962. static int nvme_rdma_map_sg_single(struct nvme_rdma_queue *queue,
  963. struct nvme_rdma_request *req, struct nvme_command *c)
  964. {
  965. struct nvme_keyed_sgl_desc *sg = &c->common.dptr.ksgl;
  966. sg->addr = cpu_to_le64(sg_dma_address(req->sg_table.sgl));
  967. put_unaligned_le24(sg_dma_len(req->sg_table.sgl), sg->length);
  968. put_unaligned_le32(queue->device->pd->unsafe_global_rkey, sg->key);
  969. sg->type = NVME_KEY_SGL_FMT_DATA_DESC << 4;
  970. return 0;
  971. }
  972. static int nvme_rdma_map_sg_fr(struct nvme_rdma_queue *queue,
  973. struct nvme_rdma_request *req, struct nvme_command *c,
  974. int count)
  975. {
  976. struct nvme_keyed_sgl_desc *sg = &c->common.dptr.ksgl;
  977. int nr;
  978. req->mr = ib_mr_pool_get(queue->qp, &queue->qp->rdma_mrs);
  979. if (WARN_ON_ONCE(!req->mr))
  980. return -EAGAIN;
  981. /*
  982. * Align the MR to a 4K page size to match the ctrl page size and
  983. * the block virtual boundary.
  984. */
  985. nr = ib_map_mr_sg(req->mr, req->sg_table.sgl, count, NULL, SZ_4K);
  986. if (unlikely(nr < count)) {
  987. ib_mr_pool_put(queue->qp, &queue->qp->rdma_mrs, req->mr);
  988. req->mr = NULL;
  989. if (nr < 0)
  990. return nr;
  991. return -EINVAL;
  992. }
  993. ib_update_fast_reg_key(req->mr, ib_inc_rkey(req->mr->rkey));
  994. req->reg_cqe.done = nvme_rdma_memreg_done;
  995. memset(&req->reg_wr, 0, sizeof(req->reg_wr));
  996. req->reg_wr.wr.opcode = IB_WR_REG_MR;
  997. req->reg_wr.wr.wr_cqe = &req->reg_cqe;
  998. req->reg_wr.wr.num_sge = 0;
  999. req->reg_wr.mr = req->mr;
  1000. req->reg_wr.key = req->mr->rkey;
  1001. req->reg_wr.access = IB_ACCESS_LOCAL_WRITE |
  1002. IB_ACCESS_REMOTE_READ |
  1003. IB_ACCESS_REMOTE_WRITE;
  1004. sg->addr = cpu_to_le64(req->mr->iova);
  1005. put_unaligned_le24(req->mr->length, sg->length);
  1006. put_unaligned_le32(req->mr->rkey, sg->key);
  1007. sg->type = (NVME_KEY_SGL_FMT_DATA_DESC << 4) |
  1008. NVME_SGL_FMT_INVALIDATE;
  1009. return 0;
  1010. }
  1011. static int nvme_rdma_map_data(struct nvme_rdma_queue *queue,
  1012. struct request *rq, struct nvme_command *c)
  1013. {
  1014. struct nvme_rdma_request *req = blk_mq_rq_to_pdu(rq);
  1015. struct nvme_rdma_device *dev = queue->device;
  1016. struct ib_device *ibdev = dev->dev;
  1017. int count, ret;
  1018. req->num_sge = 1;
  1019. refcount_set(&req->ref, 2); /* send and recv completions */
  1020. c->common.flags |= NVME_CMD_SGL_METABUF;
  1021. if (!blk_rq_payload_bytes(rq))
  1022. return nvme_rdma_set_sg_null(c);
  1023. req->sg_table.sgl = req->first_sgl;
  1024. ret = sg_alloc_table_chained(&req->sg_table,
  1025. blk_rq_nr_phys_segments(rq), req->sg_table.sgl);
  1026. if (ret)
  1027. return -ENOMEM;
  1028. req->nents = blk_rq_map_sg(rq->q, rq, req->sg_table.sgl);
  1029. count = ib_dma_map_sg(ibdev, req->sg_table.sgl, req->nents,
  1030. rq_data_dir(rq) == WRITE ? DMA_TO_DEVICE : DMA_FROM_DEVICE);
  1031. if (unlikely(count <= 0)) {
  1032. ret = -EIO;
  1033. goto out_free_table;
  1034. }
  1035. if (count <= dev->num_inline_segments) {
  1036. if (rq_data_dir(rq) == WRITE && nvme_rdma_queue_idx(queue) &&
  1037. queue->ctrl->use_inline_data &&
  1038. blk_rq_payload_bytes(rq) <=
  1039. nvme_rdma_inline_data_size(queue)) {
  1040. ret = nvme_rdma_map_sg_inline(queue, req, c, count);
  1041. goto out;
  1042. }
  1043. if (count == 1 && dev->pd->flags & IB_PD_UNSAFE_GLOBAL_RKEY) {
  1044. ret = nvme_rdma_map_sg_single(queue, req, c);
  1045. goto out;
  1046. }
  1047. }
  1048. ret = nvme_rdma_map_sg_fr(queue, req, c, count);
  1049. out:
  1050. if (unlikely(ret))
  1051. goto out_unmap_sg;
  1052. return 0;
  1053. out_unmap_sg:
  1054. ib_dma_unmap_sg(ibdev, req->sg_table.sgl,
  1055. req->nents, rq_data_dir(rq) ==
  1056. WRITE ? DMA_TO_DEVICE : DMA_FROM_DEVICE);
  1057. out_free_table:
  1058. sg_free_table_chained(&req->sg_table, true);
  1059. return ret;
  1060. }
  1061. static void nvme_rdma_send_done(struct ib_cq *cq, struct ib_wc *wc)
  1062. {
  1063. struct nvme_rdma_qe *qe =
  1064. container_of(wc->wr_cqe, struct nvme_rdma_qe, cqe);
  1065. struct nvme_rdma_request *req =
  1066. container_of(qe, struct nvme_rdma_request, sqe);
  1067. struct request *rq = blk_mq_rq_from_pdu(req);
  1068. if (unlikely(wc->status != IB_WC_SUCCESS)) {
  1069. nvme_rdma_wr_error(cq, wc, "SEND");
  1070. return;
  1071. }
  1072. if (refcount_dec_and_test(&req->ref))
  1073. nvme_end_request(rq, req->status, req->result);
  1074. }
  1075. static int nvme_rdma_post_send(struct nvme_rdma_queue *queue,
  1076. struct nvme_rdma_qe *qe, struct ib_sge *sge, u32 num_sge,
  1077. struct ib_send_wr *first)
  1078. {
  1079. struct ib_send_wr wr;
  1080. int ret;
  1081. sge->addr = qe->dma;
  1082. sge->length = sizeof(struct nvme_command),
  1083. sge->lkey = queue->device->pd->local_dma_lkey;
  1084. wr.next = NULL;
  1085. wr.wr_cqe = &qe->cqe;
  1086. wr.sg_list = sge;
  1087. wr.num_sge = num_sge;
  1088. wr.opcode = IB_WR_SEND;
  1089. wr.send_flags = IB_SEND_SIGNALED;
  1090. if (first)
  1091. first->next = &wr;
  1092. else
  1093. first = &wr;
  1094. ret = ib_post_send(queue->qp, first, NULL);
  1095. if (unlikely(ret)) {
  1096. dev_err(queue->ctrl->ctrl.device,
  1097. "%s failed with error code %d\n", __func__, ret);
  1098. }
  1099. return ret;
  1100. }
  1101. static int nvme_rdma_post_recv(struct nvme_rdma_queue *queue,
  1102. struct nvme_rdma_qe *qe)
  1103. {
  1104. struct ib_recv_wr wr;
  1105. struct ib_sge list;
  1106. int ret;
  1107. list.addr = qe->dma;
  1108. list.length = sizeof(struct nvme_completion);
  1109. list.lkey = queue->device->pd->local_dma_lkey;
  1110. qe->cqe.done = nvme_rdma_recv_done;
  1111. wr.next = NULL;
  1112. wr.wr_cqe = &qe->cqe;
  1113. wr.sg_list = &list;
  1114. wr.num_sge = 1;
  1115. ret = ib_post_recv(queue->qp, &wr, NULL);
  1116. if (unlikely(ret)) {
  1117. dev_err(queue->ctrl->ctrl.device,
  1118. "%s failed with error code %d\n", __func__, ret);
  1119. }
  1120. return ret;
  1121. }
  1122. static struct blk_mq_tags *nvme_rdma_tagset(struct nvme_rdma_queue *queue)
  1123. {
  1124. u32 queue_idx = nvme_rdma_queue_idx(queue);
  1125. if (queue_idx == 0)
  1126. return queue->ctrl->admin_tag_set.tags[queue_idx];
  1127. return queue->ctrl->tag_set.tags[queue_idx - 1];
  1128. }
  1129. static void nvme_rdma_async_done(struct ib_cq *cq, struct ib_wc *wc)
  1130. {
  1131. if (unlikely(wc->status != IB_WC_SUCCESS))
  1132. nvme_rdma_wr_error(cq, wc, "ASYNC");
  1133. }
  1134. static void nvme_rdma_submit_async_event(struct nvme_ctrl *arg)
  1135. {
  1136. struct nvme_rdma_ctrl *ctrl = to_rdma_ctrl(arg);
  1137. struct nvme_rdma_queue *queue = &ctrl->queues[0];
  1138. struct ib_device *dev = queue->device->dev;
  1139. struct nvme_rdma_qe *sqe = &ctrl->async_event_sqe;
  1140. struct nvme_command *cmd = sqe->data;
  1141. struct ib_sge sge;
  1142. int ret;
  1143. ib_dma_sync_single_for_cpu(dev, sqe->dma, sizeof(*cmd), DMA_TO_DEVICE);
  1144. memset(cmd, 0, sizeof(*cmd));
  1145. cmd->common.opcode = nvme_admin_async_event;
  1146. cmd->common.command_id = NVME_AQ_BLK_MQ_DEPTH;
  1147. cmd->common.flags |= NVME_CMD_SGL_METABUF;
  1148. nvme_rdma_set_sg_null(cmd);
  1149. sqe->cqe.done = nvme_rdma_async_done;
  1150. ib_dma_sync_single_for_device(dev, sqe->dma, sizeof(*cmd),
  1151. DMA_TO_DEVICE);
  1152. ret = nvme_rdma_post_send(queue, sqe, &sge, 1, NULL);
  1153. WARN_ON_ONCE(ret);
  1154. }
  1155. static int nvme_rdma_process_nvme_rsp(struct nvme_rdma_queue *queue,
  1156. struct nvme_completion *cqe, struct ib_wc *wc, int tag)
  1157. {
  1158. struct request *rq;
  1159. struct nvme_rdma_request *req;
  1160. int ret = 0;
  1161. rq = blk_mq_tag_to_rq(nvme_rdma_tagset(queue), cqe->command_id);
  1162. if (!rq) {
  1163. dev_err(queue->ctrl->ctrl.device,
  1164. "tag 0x%x on QP %#x not found\n",
  1165. cqe->command_id, queue->qp->qp_num);
  1166. nvme_rdma_error_recovery(queue->ctrl);
  1167. return ret;
  1168. }
  1169. req = blk_mq_rq_to_pdu(rq);
  1170. req->status = cqe->status;
  1171. req->result = cqe->result;
  1172. if (wc->wc_flags & IB_WC_WITH_INVALIDATE) {
  1173. if (unlikely(wc->ex.invalidate_rkey != req->mr->rkey)) {
  1174. dev_err(queue->ctrl->ctrl.device,
  1175. "Bogus remote invalidation for rkey %#x\n",
  1176. req->mr->rkey);
  1177. nvme_rdma_error_recovery(queue->ctrl);
  1178. }
  1179. } else if (req->mr) {
  1180. ret = nvme_rdma_inv_rkey(queue, req);
  1181. if (unlikely(ret < 0)) {
  1182. dev_err(queue->ctrl->ctrl.device,
  1183. "Queueing INV WR for rkey %#x failed (%d)\n",
  1184. req->mr->rkey, ret);
  1185. nvme_rdma_error_recovery(queue->ctrl);
  1186. }
  1187. /* the local invalidation completion will end the request */
  1188. return 0;
  1189. }
  1190. if (refcount_dec_and_test(&req->ref)) {
  1191. if (rq->tag == tag)
  1192. ret = 1;
  1193. nvme_end_request(rq, req->status, req->result);
  1194. }
  1195. return ret;
  1196. }
  1197. static int __nvme_rdma_recv_done(struct ib_cq *cq, struct ib_wc *wc, int tag)
  1198. {
  1199. struct nvme_rdma_qe *qe =
  1200. container_of(wc->wr_cqe, struct nvme_rdma_qe, cqe);
  1201. struct nvme_rdma_queue *queue = cq->cq_context;
  1202. struct ib_device *ibdev = queue->device->dev;
  1203. struct nvme_completion *cqe = qe->data;
  1204. const size_t len = sizeof(struct nvme_completion);
  1205. int ret = 0;
  1206. if (unlikely(wc->status != IB_WC_SUCCESS)) {
  1207. nvme_rdma_wr_error(cq, wc, "RECV");
  1208. return 0;
  1209. }
  1210. ib_dma_sync_single_for_cpu(ibdev, qe->dma, len, DMA_FROM_DEVICE);
  1211. /*
  1212. * AEN requests are special as they don't time out and can
  1213. * survive any kind of queue freeze and often don't respond to
  1214. * aborts. We don't even bother to allocate a struct request
  1215. * for them but rather special case them here.
  1216. */
  1217. if (unlikely(nvme_rdma_queue_idx(queue) == 0 &&
  1218. cqe->command_id >= NVME_AQ_BLK_MQ_DEPTH))
  1219. nvme_complete_async_event(&queue->ctrl->ctrl, cqe->status,
  1220. &cqe->result);
  1221. else
  1222. ret = nvme_rdma_process_nvme_rsp(queue, cqe, wc, tag);
  1223. ib_dma_sync_single_for_device(ibdev, qe->dma, len, DMA_FROM_DEVICE);
  1224. nvme_rdma_post_recv(queue, qe);
  1225. return ret;
  1226. }
  1227. static void nvme_rdma_recv_done(struct ib_cq *cq, struct ib_wc *wc)
  1228. {
  1229. __nvme_rdma_recv_done(cq, wc, -1);
  1230. }
  1231. static int nvme_rdma_conn_established(struct nvme_rdma_queue *queue)
  1232. {
  1233. int ret, i;
  1234. for (i = 0; i < queue->queue_size; i++) {
  1235. ret = nvme_rdma_post_recv(queue, &queue->rsp_ring[i]);
  1236. if (ret)
  1237. goto out_destroy_queue_ib;
  1238. }
  1239. return 0;
  1240. out_destroy_queue_ib:
  1241. nvme_rdma_destroy_queue_ib(queue);
  1242. return ret;
  1243. }
  1244. static int nvme_rdma_conn_rejected(struct nvme_rdma_queue *queue,
  1245. struct rdma_cm_event *ev)
  1246. {
  1247. struct rdma_cm_id *cm_id = queue->cm_id;
  1248. int status = ev->status;
  1249. const char *rej_msg;
  1250. const struct nvme_rdma_cm_rej *rej_data;
  1251. u8 rej_data_len;
  1252. rej_msg = rdma_reject_msg(cm_id, status);
  1253. rej_data = rdma_consumer_reject_data(cm_id, ev, &rej_data_len);
  1254. if (rej_data && rej_data_len >= sizeof(u16)) {
  1255. u16 sts = le16_to_cpu(rej_data->sts);
  1256. dev_err(queue->ctrl->ctrl.device,
  1257. "Connect rejected: status %d (%s) nvme status %d (%s).\n",
  1258. status, rej_msg, sts, nvme_rdma_cm_msg(sts));
  1259. } else {
  1260. dev_err(queue->ctrl->ctrl.device,
  1261. "Connect rejected: status %d (%s).\n", status, rej_msg);
  1262. }
  1263. return -ECONNRESET;
  1264. }
  1265. static int nvme_rdma_addr_resolved(struct nvme_rdma_queue *queue)
  1266. {
  1267. int ret;
  1268. ret = nvme_rdma_create_queue_ib(queue);
  1269. if (ret)
  1270. return ret;
  1271. ret = rdma_resolve_route(queue->cm_id, NVME_RDMA_CONNECT_TIMEOUT_MS);
  1272. if (ret) {
  1273. dev_err(queue->ctrl->ctrl.device,
  1274. "rdma_resolve_route failed (%d).\n",
  1275. queue->cm_error);
  1276. goto out_destroy_queue;
  1277. }
  1278. return 0;
  1279. out_destroy_queue:
  1280. nvme_rdma_destroy_queue_ib(queue);
  1281. return ret;
  1282. }
  1283. static int nvme_rdma_route_resolved(struct nvme_rdma_queue *queue)
  1284. {
  1285. struct nvme_rdma_ctrl *ctrl = queue->ctrl;
  1286. struct rdma_conn_param param = { };
  1287. struct nvme_rdma_cm_req priv = { };
  1288. int ret;
  1289. param.qp_num = queue->qp->qp_num;
  1290. param.flow_control = 1;
  1291. param.responder_resources = queue->device->dev->attrs.max_qp_rd_atom;
  1292. /* maximum retry count */
  1293. param.retry_count = 7;
  1294. param.rnr_retry_count = 7;
  1295. param.private_data = &priv;
  1296. param.private_data_len = sizeof(priv);
  1297. priv.recfmt = cpu_to_le16(NVME_RDMA_CM_FMT_1_0);
  1298. priv.qid = cpu_to_le16(nvme_rdma_queue_idx(queue));
  1299. /*
  1300. * set the admin queue depth to the minimum size
  1301. * specified by the Fabrics standard.
  1302. */
  1303. if (priv.qid == 0) {
  1304. priv.hrqsize = cpu_to_le16(NVME_AQ_DEPTH);
  1305. priv.hsqsize = cpu_to_le16(NVME_AQ_DEPTH - 1);
  1306. } else {
  1307. /*
  1308. * current interpretation of the fabrics spec
  1309. * is at minimum you make hrqsize sqsize+1, or a
  1310. * 1's based representation of sqsize.
  1311. */
  1312. priv.hrqsize = cpu_to_le16(queue->queue_size);
  1313. priv.hsqsize = cpu_to_le16(queue->ctrl->ctrl.sqsize);
  1314. }
  1315. ret = rdma_connect(queue->cm_id, &param);
  1316. if (ret) {
  1317. dev_err(ctrl->ctrl.device,
  1318. "rdma_connect failed (%d).\n", ret);
  1319. goto out_destroy_queue_ib;
  1320. }
  1321. return 0;
  1322. out_destroy_queue_ib:
  1323. nvme_rdma_destroy_queue_ib(queue);
  1324. return ret;
  1325. }
  1326. static int nvme_rdma_cm_handler(struct rdma_cm_id *cm_id,
  1327. struct rdma_cm_event *ev)
  1328. {
  1329. struct nvme_rdma_queue *queue = cm_id->context;
  1330. int cm_error = 0;
  1331. dev_dbg(queue->ctrl->ctrl.device, "%s (%d): status %d id %p\n",
  1332. rdma_event_msg(ev->event), ev->event,
  1333. ev->status, cm_id);
  1334. switch (ev->event) {
  1335. case RDMA_CM_EVENT_ADDR_RESOLVED:
  1336. cm_error = nvme_rdma_addr_resolved(queue);
  1337. break;
  1338. case RDMA_CM_EVENT_ROUTE_RESOLVED:
  1339. cm_error = nvme_rdma_route_resolved(queue);
  1340. break;
  1341. case RDMA_CM_EVENT_ESTABLISHED:
  1342. queue->cm_error = nvme_rdma_conn_established(queue);
  1343. /* complete cm_done regardless of success/failure */
  1344. complete(&queue->cm_done);
  1345. return 0;
  1346. case RDMA_CM_EVENT_REJECTED:
  1347. nvme_rdma_destroy_queue_ib(queue);
  1348. cm_error = nvme_rdma_conn_rejected(queue, ev);
  1349. break;
  1350. case RDMA_CM_EVENT_ROUTE_ERROR:
  1351. case RDMA_CM_EVENT_CONNECT_ERROR:
  1352. case RDMA_CM_EVENT_UNREACHABLE:
  1353. nvme_rdma_destroy_queue_ib(queue);
  1354. /* fall through */
  1355. case RDMA_CM_EVENT_ADDR_ERROR:
  1356. dev_dbg(queue->ctrl->ctrl.device,
  1357. "CM error event %d\n", ev->event);
  1358. cm_error = -ECONNRESET;
  1359. break;
  1360. case RDMA_CM_EVENT_DISCONNECTED:
  1361. case RDMA_CM_EVENT_ADDR_CHANGE:
  1362. case RDMA_CM_EVENT_TIMEWAIT_EXIT:
  1363. dev_dbg(queue->ctrl->ctrl.device,
  1364. "disconnect received - connection closed\n");
  1365. nvme_rdma_error_recovery(queue->ctrl);
  1366. break;
  1367. case RDMA_CM_EVENT_DEVICE_REMOVAL:
  1368. /* device removal is handled via the ib_client API */
  1369. break;
  1370. default:
  1371. dev_err(queue->ctrl->ctrl.device,
  1372. "Unexpected RDMA CM event (%d)\n", ev->event);
  1373. nvme_rdma_error_recovery(queue->ctrl);
  1374. break;
  1375. }
  1376. if (cm_error) {
  1377. queue->cm_error = cm_error;
  1378. complete(&queue->cm_done);
  1379. }
  1380. return 0;
  1381. }
  1382. static enum blk_eh_timer_return
  1383. nvme_rdma_timeout(struct request *rq, bool reserved)
  1384. {
  1385. struct nvme_rdma_request *req = blk_mq_rq_to_pdu(rq);
  1386. dev_warn(req->queue->ctrl->ctrl.device,
  1387. "I/O %d QID %d timeout, reset controller\n",
  1388. rq->tag, nvme_rdma_queue_idx(req->queue));
  1389. /* queue error recovery */
  1390. nvme_rdma_error_recovery(req->queue->ctrl);
  1391. /* fail with DNR on cmd timeout */
  1392. nvme_req(rq)->status = NVME_SC_ABORT_REQ | NVME_SC_DNR;
  1393. return BLK_EH_DONE;
  1394. }
  1395. static blk_status_t nvme_rdma_queue_rq(struct blk_mq_hw_ctx *hctx,
  1396. const struct blk_mq_queue_data *bd)
  1397. {
  1398. struct nvme_ns *ns = hctx->queue->queuedata;
  1399. struct nvme_rdma_queue *queue = hctx->driver_data;
  1400. struct request *rq = bd->rq;
  1401. struct nvme_rdma_request *req = blk_mq_rq_to_pdu(rq);
  1402. struct nvme_rdma_qe *sqe = &req->sqe;
  1403. struct nvme_command *c = sqe->data;
  1404. struct ib_device *dev;
  1405. bool queue_ready = test_bit(NVME_RDMA_Q_LIVE, &queue->flags);
  1406. blk_status_t ret;
  1407. int err;
  1408. WARN_ON_ONCE(rq->tag < 0);
  1409. if (!nvmf_check_ready(&queue->ctrl->ctrl, rq, queue_ready))
  1410. return nvmf_fail_nonready_command(&queue->ctrl->ctrl, rq);
  1411. dev = queue->device->dev;
  1412. ib_dma_sync_single_for_cpu(dev, sqe->dma,
  1413. sizeof(struct nvme_command), DMA_TO_DEVICE);
  1414. ret = nvme_setup_cmd(ns, rq, c);
  1415. if (ret)
  1416. return ret;
  1417. blk_mq_start_request(rq);
  1418. err = nvme_rdma_map_data(queue, rq, c);
  1419. if (unlikely(err < 0)) {
  1420. dev_err(queue->ctrl->ctrl.device,
  1421. "Failed to map data (%d)\n", err);
  1422. nvme_cleanup_cmd(rq);
  1423. goto err;
  1424. }
  1425. sqe->cqe.done = nvme_rdma_send_done;
  1426. ib_dma_sync_single_for_device(dev, sqe->dma,
  1427. sizeof(struct nvme_command), DMA_TO_DEVICE);
  1428. err = nvme_rdma_post_send(queue, sqe, req->sge, req->num_sge,
  1429. req->mr ? &req->reg_wr.wr : NULL);
  1430. if (unlikely(err)) {
  1431. nvme_rdma_unmap_data(queue, rq);
  1432. goto err;
  1433. }
  1434. return BLK_STS_OK;
  1435. err:
  1436. if (err == -ENOMEM || err == -EAGAIN)
  1437. return BLK_STS_RESOURCE;
  1438. return BLK_STS_IOERR;
  1439. }
  1440. static int nvme_rdma_poll(struct blk_mq_hw_ctx *hctx, unsigned int tag)
  1441. {
  1442. struct nvme_rdma_queue *queue = hctx->driver_data;
  1443. struct ib_cq *cq = queue->ib_cq;
  1444. struct ib_wc wc;
  1445. int found = 0;
  1446. while (ib_poll_cq(cq, 1, &wc) > 0) {
  1447. struct ib_cqe *cqe = wc.wr_cqe;
  1448. if (cqe) {
  1449. if (cqe->done == nvme_rdma_recv_done)
  1450. found |= __nvme_rdma_recv_done(cq, &wc, tag);
  1451. else
  1452. cqe->done(cq, &wc);
  1453. }
  1454. }
  1455. return found;
  1456. }
  1457. static void nvme_rdma_complete_rq(struct request *rq)
  1458. {
  1459. struct nvme_rdma_request *req = blk_mq_rq_to_pdu(rq);
  1460. nvme_rdma_unmap_data(req->queue, rq);
  1461. nvme_complete_rq(rq);
  1462. }
  1463. static int nvme_rdma_map_queues(struct blk_mq_tag_set *set)
  1464. {
  1465. struct nvme_rdma_ctrl *ctrl = set->driver_data;
  1466. return blk_mq_rdma_map_queues(set, ctrl->device->dev, 0);
  1467. }
  1468. static const struct blk_mq_ops nvme_rdma_mq_ops = {
  1469. .queue_rq = nvme_rdma_queue_rq,
  1470. .complete = nvme_rdma_complete_rq,
  1471. .init_request = nvme_rdma_init_request,
  1472. .exit_request = nvme_rdma_exit_request,
  1473. .init_hctx = nvme_rdma_init_hctx,
  1474. .poll = nvme_rdma_poll,
  1475. .timeout = nvme_rdma_timeout,
  1476. .map_queues = nvme_rdma_map_queues,
  1477. };
  1478. static const struct blk_mq_ops nvme_rdma_admin_mq_ops = {
  1479. .queue_rq = nvme_rdma_queue_rq,
  1480. .complete = nvme_rdma_complete_rq,
  1481. .init_request = nvme_rdma_init_request,
  1482. .exit_request = nvme_rdma_exit_request,
  1483. .init_hctx = nvme_rdma_init_admin_hctx,
  1484. .timeout = nvme_rdma_timeout,
  1485. };
  1486. static void nvme_rdma_shutdown_ctrl(struct nvme_rdma_ctrl *ctrl, bool shutdown)
  1487. {
  1488. nvme_rdma_teardown_io_queues(ctrl, shutdown);
  1489. if (shutdown)
  1490. nvme_shutdown_ctrl(&ctrl->ctrl);
  1491. else
  1492. nvme_disable_ctrl(&ctrl->ctrl, ctrl->ctrl.cap);
  1493. nvme_rdma_teardown_admin_queue(ctrl, shutdown);
  1494. }
  1495. static void nvme_rdma_delete_ctrl(struct nvme_ctrl *ctrl)
  1496. {
  1497. nvme_rdma_shutdown_ctrl(to_rdma_ctrl(ctrl), true);
  1498. }
  1499. static void nvme_rdma_reset_ctrl_work(struct work_struct *work)
  1500. {
  1501. struct nvme_rdma_ctrl *ctrl =
  1502. container_of(work, struct nvme_rdma_ctrl, ctrl.reset_work);
  1503. nvme_stop_ctrl(&ctrl->ctrl);
  1504. nvme_rdma_shutdown_ctrl(ctrl, false);
  1505. if (!nvme_change_ctrl_state(&ctrl->ctrl, NVME_CTRL_CONNECTING)) {
  1506. /* state change failure should never happen */
  1507. WARN_ON_ONCE(1);
  1508. return;
  1509. }
  1510. if (nvme_rdma_setup_ctrl(ctrl, false))
  1511. goto out_fail;
  1512. return;
  1513. out_fail:
  1514. ++ctrl->ctrl.nr_reconnects;
  1515. nvme_rdma_reconnect_or_remove(ctrl);
  1516. }
  1517. static const struct nvme_ctrl_ops nvme_rdma_ctrl_ops = {
  1518. .name = "rdma",
  1519. .module = THIS_MODULE,
  1520. .flags = NVME_F_FABRICS,
  1521. .reg_read32 = nvmf_reg_read32,
  1522. .reg_read64 = nvmf_reg_read64,
  1523. .reg_write32 = nvmf_reg_write32,
  1524. .free_ctrl = nvme_rdma_free_ctrl,
  1525. .submit_async_event = nvme_rdma_submit_async_event,
  1526. .delete_ctrl = nvme_rdma_delete_ctrl,
  1527. .get_address = nvmf_get_address,
  1528. .stop_ctrl = nvme_rdma_stop_ctrl,
  1529. };
  1530. /*
  1531. * Fails a connection request if it matches an existing controller
  1532. * (association) with the same tuple:
  1533. * <Host NQN, Host ID, local address, remote address, remote port, SUBSYS NQN>
  1534. *
  1535. * if local address is not specified in the request, it will match an
  1536. * existing controller with all the other parameters the same and no
  1537. * local port address specified as well.
  1538. *
  1539. * The ports don't need to be compared as they are intrinsically
  1540. * already matched by the port pointers supplied.
  1541. */
  1542. static bool
  1543. nvme_rdma_existing_controller(struct nvmf_ctrl_options *opts)
  1544. {
  1545. struct nvme_rdma_ctrl *ctrl;
  1546. bool found = false;
  1547. mutex_lock(&nvme_rdma_ctrl_mutex);
  1548. list_for_each_entry(ctrl, &nvme_rdma_ctrl_list, list) {
  1549. found = nvmf_ip_options_match(&ctrl->ctrl, opts);
  1550. if (found)
  1551. break;
  1552. }
  1553. mutex_unlock(&nvme_rdma_ctrl_mutex);
  1554. return found;
  1555. }
  1556. static struct nvme_ctrl *nvme_rdma_create_ctrl(struct device *dev,
  1557. struct nvmf_ctrl_options *opts)
  1558. {
  1559. struct nvme_rdma_ctrl *ctrl;
  1560. int ret;
  1561. bool changed;
  1562. ctrl = kzalloc(sizeof(*ctrl), GFP_KERNEL);
  1563. if (!ctrl)
  1564. return ERR_PTR(-ENOMEM);
  1565. ctrl->ctrl.opts = opts;
  1566. INIT_LIST_HEAD(&ctrl->list);
  1567. if (!(opts->mask & NVMF_OPT_TRSVCID)) {
  1568. opts->trsvcid =
  1569. kstrdup(__stringify(NVME_RDMA_IP_PORT), GFP_KERNEL);
  1570. if (!opts->trsvcid) {
  1571. ret = -ENOMEM;
  1572. goto out_free_ctrl;
  1573. }
  1574. opts->mask |= NVMF_OPT_TRSVCID;
  1575. }
  1576. ret = inet_pton_with_scope(&init_net, AF_UNSPEC,
  1577. opts->traddr, opts->trsvcid, &ctrl->addr);
  1578. if (ret) {
  1579. pr_err("malformed address passed: %s:%s\n",
  1580. opts->traddr, opts->trsvcid);
  1581. goto out_free_ctrl;
  1582. }
  1583. if (opts->mask & NVMF_OPT_HOST_TRADDR) {
  1584. ret = inet_pton_with_scope(&init_net, AF_UNSPEC,
  1585. opts->host_traddr, NULL, &ctrl->src_addr);
  1586. if (ret) {
  1587. pr_err("malformed src address passed: %s\n",
  1588. opts->host_traddr);
  1589. goto out_free_ctrl;
  1590. }
  1591. }
  1592. if (!opts->duplicate_connect && nvme_rdma_existing_controller(opts)) {
  1593. ret = -EALREADY;
  1594. goto out_free_ctrl;
  1595. }
  1596. INIT_DELAYED_WORK(&ctrl->reconnect_work,
  1597. nvme_rdma_reconnect_ctrl_work);
  1598. INIT_WORK(&ctrl->err_work, nvme_rdma_error_recovery_work);
  1599. INIT_WORK(&ctrl->ctrl.reset_work, nvme_rdma_reset_ctrl_work);
  1600. ctrl->ctrl.queue_count = opts->nr_io_queues + 1; /* +1 for admin queue */
  1601. ctrl->ctrl.sqsize = opts->queue_size - 1;
  1602. ctrl->ctrl.kato = opts->kato;
  1603. ret = -ENOMEM;
  1604. ctrl->queues = kcalloc(ctrl->ctrl.queue_count, sizeof(*ctrl->queues),
  1605. GFP_KERNEL);
  1606. if (!ctrl->queues)
  1607. goto out_free_ctrl;
  1608. ret = nvme_init_ctrl(&ctrl->ctrl, dev, &nvme_rdma_ctrl_ops,
  1609. 0 /* no quirks, we're perfect! */);
  1610. if (ret)
  1611. goto out_kfree_queues;
  1612. changed = nvme_change_ctrl_state(&ctrl->ctrl, NVME_CTRL_CONNECTING);
  1613. WARN_ON_ONCE(!changed);
  1614. ret = nvme_rdma_setup_ctrl(ctrl, true);
  1615. if (ret)
  1616. goto out_uninit_ctrl;
  1617. dev_info(ctrl->ctrl.device, "new ctrl: NQN \"%s\", addr %pISpcs\n",
  1618. ctrl->ctrl.opts->subsysnqn, &ctrl->addr);
  1619. nvme_get_ctrl(&ctrl->ctrl);
  1620. mutex_lock(&nvme_rdma_ctrl_mutex);
  1621. list_add_tail(&ctrl->list, &nvme_rdma_ctrl_list);
  1622. mutex_unlock(&nvme_rdma_ctrl_mutex);
  1623. return &ctrl->ctrl;
  1624. out_uninit_ctrl:
  1625. nvme_uninit_ctrl(&ctrl->ctrl);
  1626. nvme_put_ctrl(&ctrl->ctrl);
  1627. if (ret > 0)
  1628. ret = -EIO;
  1629. return ERR_PTR(ret);
  1630. out_kfree_queues:
  1631. kfree(ctrl->queues);
  1632. out_free_ctrl:
  1633. kfree(ctrl);
  1634. return ERR_PTR(ret);
  1635. }
  1636. static struct nvmf_transport_ops nvme_rdma_transport = {
  1637. .name = "rdma",
  1638. .module = THIS_MODULE,
  1639. .required_opts = NVMF_OPT_TRADDR,
  1640. .allowed_opts = NVMF_OPT_TRSVCID | NVMF_OPT_RECONNECT_DELAY |
  1641. NVMF_OPT_HOST_TRADDR | NVMF_OPT_CTRL_LOSS_TMO,
  1642. .create_ctrl = nvme_rdma_create_ctrl,
  1643. };
  1644. static void nvme_rdma_remove_one(struct ib_device *ib_device, void *client_data)
  1645. {
  1646. struct nvme_rdma_ctrl *ctrl;
  1647. struct nvme_rdma_device *ndev;
  1648. bool found = false;
  1649. mutex_lock(&device_list_mutex);
  1650. list_for_each_entry(ndev, &device_list, entry) {
  1651. if (ndev->dev == ib_device) {
  1652. found = true;
  1653. break;
  1654. }
  1655. }
  1656. mutex_unlock(&device_list_mutex);
  1657. if (!found)
  1658. return;
  1659. /* Delete all controllers using this device */
  1660. mutex_lock(&nvme_rdma_ctrl_mutex);
  1661. list_for_each_entry(ctrl, &nvme_rdma_ctrl_list, list) {
  1662. if (ctrl->device->dev != ib_device)
  1663. continue;
  1664. nvme_delete_ctrl(&ctrl->ctrl);
  1665. }
  1666. mutex_unlock(&nvme_rdma_ctrl_mutex);
  1667. flush_workqueue(nvme_delete_wq);
  1668. }
  1669. static struct ib_client nvme_rdma_ib_client = {
  1670. .name = "nvme_rdma",
  1671. .remove = nvme_rdma_remove_one
  1672. };
  1673. static int __init nvme_rdma_init_module(void)
  1674. {
  1675. int ret;
  1676. ret = ib_register_client(&nvme_rdma_ib_client);
  1677. if (ret)
  1678. return ret;
  1679. ret = nvmf_register_transport(&nvme_rdma_transport);
  1680. if (ret)
  1681. goto err_unreg_client;
  1682. return 0;
  1683. err_unreg_client:
  1684. ib_unregister_client(&nvme_rdma_ib_client);
  1685. return ret;
  1686. }
  1687. static void __exit nvme_rdma_cleanup_module(void)
  1688. {
  1689. nvmf_unregister_transport(&nvme_rdma_transport);
  1690. ib_unregister_client(&nvme_rdma_ib_client);
  1691. }
  1692. module_init(nvme_rdma_init_module);
  1693. module_exit(nvme_rdma_cleanup_module);
  1694. MODULE_LICENSE("GPL v2");