nand_micron.c 14 KB

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  1. /*
  2. * Copyright (C) 2017 Free Electrons
  3. * Copyright (C) 2017 NextThing Co
  4. *
  5. * Author: Boris Brezillon <boris.brezillon@free-electrons.com>
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License as published by
  9. * the Free Software Foundation; either version 2 of the License, or
  10. * (at your option) any later version.
  11. *
  12. * This program is distributed in the hope that it will be useful,
  13. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  15. * GNU General Public License for more details.
  16. */
  17. #include <linux/slab.h>
  18. #include "internals.h"
  19. /*
  20. * Special Micron status bit 3 indicates that the block has been
  21. * corrected by on-die ECC and should be rewritten.
  22. */
  23. #define NAND_ECC_STATUS_WRITE_RECOMMENDED BIT(3)
  24. /*
  25. * On chips with 8-bit ECC and additional bit can be used to distinguish
  26. * cases where a errors were corrected without needing a rewrite
  27. *
  28. * Bit 4 Bit 3 Bit 0 Description
  29. * ----- ----- ----- -----------
  30. * 0 0 0 No Errors
  31. * 0 0 1 Multiple uncorrected errors
  32. * 0 1 0 4 - 6 errors corrected, recommend rewrite
  33. * 0 1 1 Reserved
  34. * 1 0 0 1 - 3 errors corrected
  35. * 1 0 1 Reserved
  36. * 1 1 0 7 - 8 errors corrected, recommend rewrite
  37. */
  38. #define NAND_ECC_STATUS_MASK (BIT(4) | BIT(3) | BIT(0))
  39. #define NAND_ECC_STATUS_UNCORRECTABLE BIT(0)
  40. #define NAND_ECC_STATUS_4_6_CORRECTED BIT(3)
  41. #define NAND_ECC_STATUS_1_3_CORRECTED BIT(4)
  42. #define NAND_ECC_STATUS_7_8_CORRECTED (BIT(4) | BIT(3))
  43. struct nand_onfi_vendor_micron {
  44. u8 two_plane_read;
  45. u8 read_cache;
  46. u8 read_unique_id;
  47. u8 dq_imped;
  48. u8 dq_imped_num_settings;
  49. u8 dq_imped_feat_addr;
  50. u8 rb_pulldown_strength;
  51. u8 rb_pulldown_strength_feat_addr;
  52. u8 rb_pulldown_strength_num_settings;
  53. u8 otp_mode;
  54. u8 otp_page_start;
  55. u8 otp_data_prot_addr;
  56. u8 otp_num_pages;
  57. u8 otp_feat_addr;
  58. u8 read_retry_options;
  59. u8 reserved[72];
  60. u8 param_revision;
  61. } __packed;
  62. struct micron_on_die_ecc {
  63. bool forced;
  64. bool enabled;
  65. void *rawbuf;
  66. };
  67. struct micron_nand {
  68. struct micron_on_die_ecc ecc;
  69. };
  70. static int micron_nand_setup_read_retry(struct nand_chip *chip, int retry_mode)
  71. {
  72. u8 feature[ONFI_SUBFEATURE_PARAM_LEN] = {retry_mode};
  73. return nand_set_features(chip, ONFI_FEATURE_ADDR_READ_RETRY, feature);
  74. }
  75. /*
  76. * Configure chip properties from Micron vendor-specific ONFI table
  77. */
  78. static int micron_nand_onfi_init(struct nand_chip *chip)
  79. {
  80. struct nand_parameters *p = &chip->parameters;
  81. if (p->onfi) {
  82. struct nand_onfi_vendor_micron *micron = (void *)p->onfi->vendor;
  83. chip->read_retries = micron->read_retry_options;
  84. chip->setup_read_retry = micron_nand_setup_read_retry;
  85. }
  86. if (p->supports_set_get_features) {
  87. set_bit(ONFI_FEATURE_ADDR_READ_RETRY, p->set_feature_list);
  88. set_bit(ONFI_FEATURE_ON_DIE_ECC, p->set_feature_list);
  89. set_bit(ONFI_FEATURE_ADDR_READ_RETRY, p->get_feature_list);
  90. set_bit(ONFI_FEATURE_ON_DIE_ECC, p->get_feature_list);
  91. }
  92. return 0;
  93. }
  94. static int micron_nand_on_die_4_ooblayout_ecc(struct mtd_info *mtd,
  95. int section,
  96. struct mtd_oob_region *oobregion)
  97. {
  98. if (section >= 4)
  99. return -ERANGE;
  100. oobregion->offset = (section * 16) + 8;
  101. oobregion->length = 8;
  102. return 0;
  103. }
  104. static int micron_nand_on_die_4_ooblayout_free(struct mtd_info *mtd,
  105. int section,
  106. struct mtd_oob_region *oobregion)
  107. {
  108. if (section >= 4)
  109. return -ERANGE;
  110. oobregion->offset = (section * 16) + 2;
  111. oobregion->length = 6;
  112. return 0;
  113. }
  114. static const struct mtd_ooblayout_ops micron_nand_on_die_4_ooblayout_ops = {
  115. .ecc = micron_nand_on_die_4_ooblayout_ecc,
  116. .free = micron_nand_on_die_4_ooblayout_free,
  117. };
  118. static int micron_nand_on_die_8_ooblayout_ecc(struct mtd_info *mtd,
  119. int section,
  120. struct mtd_oob_region *oobregion)
  121. {
  122. struct nand_chip *chip = mtd_to_nand(mtd);
  123. if (section)
  124. return -ERANGE;
  125. oobregion->offset = mtd->oobsize - chip->ecc.total;
  126. oobregion->length = chip->ecc.total;
  127. return 0;
  128. }
  129. static int micron_nand_on_die_8_ooblayout_free(struct mtd_info *mtd,
  130. int section,
  131. struct mtd_oob_region *oobregion)
  132. {
  133. struct nand_chip *chip = mtd_to_nand(mtd);
  134. if (section)
  135. return -ERANGE;
  136. oobregion->offset = 2;
  137. oobregion->length = mtd->oobsize - chip->ecc.total - 2;
  138. return 0;
  139. }
  140. static const struct mtd_ooblayout_ops micron_nand_on_die_8_ooblayout_ops = {
  141. .ecc = micron_nand_on_die_8_ooblayout_ecc,
  142. .free = micron_nand_on_die_8_ooblayout_free,
  143. };
  144. static int micron_nand_on_die_ecc_setup(struct nand_chip *chip, bool enable)
  145. {
  146. struct micron_nand *micron = nand_get_manufacturer_data(chip);
  147. u8 feature[ONFI_SUBFEATURE_PARAM_LEN] = { 0, };
  148. int ret;
  149. if (micron->ecc.forced)
  150. return 0;
  151. if (micron->ecc.enabled == enable)
  152. return 0;
  153. if (enable)
  154. feature[0] |= ONFI_FEATURE_ON_DIE_ECC_EN;
  155. ret = nand_set_features(chip, ONFI_FEATURE_ON_DIE_ECC, feature);
  156. if (!ret)
  157. micron->ecc.enabled = enable;
  158. return ret;
  159. }
  160. static int micron_nand_on_die_ecc_status_4(struct nand_chip *chip, u8 status,
  161. void *buf, int page,
  162. int oob_required)
  163. {
  164. struct micron_nand *micron = nand_get_manufacturer_data(chip);
  165. struct mtd_info *mtd = nand_to_mtd(chip);
  166. unsigned int step, max_bitflips = 0;
  167. int ret;
  168. if (!(status & NAND_ECC_STATUS_WRITE_RECOMMENDED)) {
  169. if (status & NAND_STATUS_FAIL)
  170. mtd->ecc_stats.failed++;
  171. return 0;
  172. }
  173. /*
  174. * The internal ECC doesn't tell us the number of bitflips that have
  175. * been corrected, but tells us if it recommends to rewrite the block.
  176. * If it's the case, we need to read the page in raw mode and compare
  177. * its content to the corrected version to extract the actual number of
  178. * bitflips.
  179. * But before we do that, we must make sure we have all OOB bytes read
  180. * in non-raw mode, even if the user did not request those bytes.
  181. */
  182. if (!oob_required) {
  183. ret = nand_read_data_op(chip, chip->oob_poi, mtd->oobsize,
  184. false);
  185. if (ret)
  186. return ret;
  187. }
  188. micron_nand_on_die_ecc_setup(chip, false);
  189. ret = nand_read_page_op(chip, page, 0, micron->ecc.rawbuf,
  190. mtd->writesize + mtd->oobsize);
  191. if (ret)
  192. return ret;
  193. for (step = 0; step < chip->ecc.steps; step++) {
  194. unsigned int offs, i, nbitflips = 0;
  195. u8 *rawbuf, *corrbuf;
  196. offs = step * chip->ecc.size;
  197. rawbuf = micron->ecc.rawbuf + offs;
  198. corrbuf = buf + offs;
  199. for (i = 0; i < chip->ecc.size; i++)
  200. nbitflips += hweight8(corrbuf[i] ^ rawbuf[i]);
  201. offs = (step * 16) + 4;
  202. rawbuf = micron->ecc.rawbuf + mtd->writesize + offs;
  203. corrbuf = chip->oob_poi + offs;
  204. for (i = 0; i < chip->ecc.bytes + 4; i++)
  205. nbitflips += hweight8(corrbuf[i] ^ rawbuf[i]);
  206. if (WARN_ON(nbitflips > chip->ecc.strength))
  207. return -EINVAL;
  208. max_bitflips = max(nbitflips, max_bitflips);
  209. mtd->ecc_stats.corrected += nbitflips;
  210. }
  211. return max_bitflips;
  212. }
  213. static int micron_nand_on_die_ecc_status_8(struct nand_chip *chip, u8 status)
  214. {
  215. struct mtd_info *mtd = nand_to_mtd(chip);
  216. /*
  217. * With 8/512 we have more information but still don't know precisely
  218. * how many bit-flips were seen.
  219. */
  220. switch (status & NAND_ECC_STATUS_MASK) {
  221. case NAND_ECC_STATUS_UNCORRECTABLE:
  222. mtd->ecc_stats.failed++;
  223. return 0;
  224. case NAND_ECC_STATUS_1_3_CORRECTED:
  225. mtd->ecc_stats.corrected += 3;
  226. return 3;
  227. case NAND_ECC_STATUS_4_6_CORRECTED:
  228. mtd->ecc_stats.corrected += 6;
  229. /* rewrite recommended */
  230. return 6;
  231. case NAND_ECC_STATUS_7_8_CORRECTED:
  232. mtd->ecc_stats.corrected += 8;
  233. /* rewrite recommended */
  234. return 8;
  235. default:
  236. return 0;
  237. }
  238. }
  239. static int
  240. micron_nand_read_page_on_die_ecc(struct nand_chip *chip, uint8_t *buf,
  241. int oob_required, int page)
  242. {
  243. struct mtd_info *mtd = nand_to_mtd(chip);
  244. u8 status;
  245. int ret, max_bitflips = 0;
  246. ret = micron_nand_on_die_ecc_setup(chip, true);
  247. if (ret)
  248. return ret;
  249. ret = nand_read_page_op(chip, page, 0, NULL, 0);
  250. if (ret)
  251. goto out;
  252. ret = nand_status_op(chip, &status);
  253. if (ret)
  254. goto out;
  255. ret = nand_exit_status_op(chip);
  256. if (ret)
  257. goto out;
  258. ret = nand_read_data_op(chip, buf, mtd->writesize, false);
  259. if (!ret && oob_required)
  260. ret = nand_read_data_op(chip, chip->oob_poi, mtd->oobsize,
  261. false);
  262. if (chip->ecc.strength == 4)
  263. max_bitflips = micron_nand_on_die_ecc_status_4(chip, status,
  264. buf, page,
  265. oob_required);
  266. else
  267. max_bitflips = micron_nand_on_die_ecc_status_8(chip, status);
  268. out:
  269. micron_nand_on_die_ecc_setup(chip, false);
  270. return ret ? ret : max_bitflips;
  271. }
  272. static int
  273. micron_nand_write_page_on_die_ecc(struct nand_chip *chip, const uint8_t *buf,
  274. int oob_required, int page)
  275. {
  276. int ret;
  277. ret = micron_nand_on_die_ecc_setup(chip, true);
  278. if (ret)
  279. return ret;
  280. ret = nand_write_page_raw(chip, buf, oob_required, page);
  281. micron_nand_on_die_ecc_setup(chip, false);
  282. return ret;
  283. }
  284. enum {
  285. /* The NAND flash doesn't support on-die ECC */
  286. MICRON_ON_DIE_UNSUPPORTED,
  287. /*
  288. * The NAND flash supports on-die ECC and it can be
  289. * enabled/disabled by a set features command.
  290. */
  291. MICRON_ON_DIE_SUPPORTED,
  292. /*
  293. * The NAND flash supports on-die ECC, and it cannot be
  294. * disabled.
  295. */
  296. MICRON_ON_DIE_MANDATORY,
  297. };
  298. #define MICRON_ID_INTERNAL_ECC_MASK GENMASK(1, 0)
  299. #define MICRON_ID_ECC_ENABLED BIT(7)
  300. /*
  301. * Try to detect if the NAND support on-die ECC. To do this, we enable
  302. * the feature, and read back if it has been enabled as expected. We
  303. * also check if it can be disabled, because some Micron NANDs do not
  304. * allow disabling the on-die ECC and we don't support such NANDs for
  305. * now.
  306. *
  307. * This function also has the side effect of disabling on-die ECC if
  308. * it had been left enabled by the firmware/bootloader.
  309. */
  310. static int micron_supports_on_die_ecc(struct nand_chip *chip)
  311. {
  312. u8 id[5];
  313. int ret;
  314. if (!chip->parameters.onfi)
  315. return MICRON_ON_DIE_UNSUPPORTED;
  316. if (chip->bits_per_cell != 1)
  317. return MICRON_ON_DIE_UNSUPPORTED;
  318. /*
  319. * We only support on-die ECC of 4/512 or 8/512
  320. */
  321. if (chip->ecc_strength_ds != 4 && chip->ecc_strength_ds != 8)
  322. return MICRON_ON_DIE_UNSUPPORTED;
  323. /* 0x2 means on-die ECC is available. */
  324. if (chip->id.len != 5 ||
  325. (chip->id.data[4] & MICRON_ID_INTERNAL_ECC_MASK) != 0x2)
  326. return MICRON_ON_DIE_UNSUPPORTED;
  327. ret = micron_nand_on_die_ecc_setup(chip, true);
  328. if (ret)
  329. return MICRON_ON_DIE_UNSUPPORTED;
  330. ret = nand_readid_op(chip, 0, id, sizeof(id));
  331. if (ret)
  332. return MICRON_ON_DIE_UNSUPPORTED;
  333. if (!(id[4] & MICRON_ID_ECC_ENABLED))
  334. return MICRON_ON_DIE_UNSUPPORTED;
  335. ret = micron_nand_on_die_ecc_setup(chip, false);
  336. if (ret)
  337. return MICRON_ON_DIE_UNSUPPORTED;
  338. ret = nand_readid_op(chip, 0, id, sizeof(id));
  339. if (ret)
  340. return MICRON_ON_DIE_UNSUPPORTED;
  341. if (id[4] & MICRON_ID_ECC_ENABLED)
  342. return MICRON_ON_DIE_MANDATORY;
  343. /*
  344. * We only support on-die ECC of 4/512 or 8/512
  345. */
  346. if (chip->ecc_strength_ds != 4 && chip->ecc_strength_ds != 8)
  347. return MICRON_ON_DIE_UNSUPPORTED;
  348. return MICRON_ON_DIE_SUPPORTED;
  349. }
  350. static int micron_nand_init(struct nand_chip *chip)
  351. {
  352. struct mtd_info *mtd = nand_to_mtd(chip);
  353. struct micron_nand *micron;
  354. int ondie;
  355. int ret;
  356. micron = kzalloc(sizeof(*micron), GFP_KERNEL);
  357. if (!micron)
  358. return -ENOMEM;
  359. nand_set_manufacturer_data(chip, micron);
  360. ret = micron_nand_onfi_init(chip);
  361. if (ret)
  362. goto err_free_manuf_data;
  363. if (mtd->writesize == 2048)
  364. chip->bbt_options |= NAND_BBT_SCAN2NDPAGE;
  365. ondie = micron_supports_on_die_ecc(chip);
  366. if (ondie == MICRON_ON_DIE_MANDATORY &&
  367. chip->ecc.mode != NAND_ECC_ON_DIE) {
  368. pr_err("On-die ECC forcefully enabled, not supported\n");
  369. ret = -EINVAL;
  370. goto err_free_manuf_data;
  371. }
  372. if (chip->ecc.mode == NAND_ECC_ON_DIE) {
  373. if (ondie == MICRON_ON_DIE_UNSUPPORTED) {
  374. pr_err("On-die ECC selected but not supported\n");
  375. ret = -EINVAL;
  376. goto err_free_manuf_data;
  377. }
  378. if (ondie == MICRON_ON_DIE_MANDATORY) {
  379. micron->ecc.forced = true;
  380. micron->ecc.enabled = true;
  381. }
  382. /*
  383. * In case of 4bit on-die ECC, we need a buffer to store a
  384. * page dumped in raw mode so that we can compare its content
  385. * to the same page after ECC correction happened and extract
  386. * the real number of bitflips from this comparison.
  387. * That's not needed for 8-bit ECC, because the status expose
  388. * a better approximation of the number of bitflips in a page.
  389. */
  390. if (chip->ecc_strength_ds == 4) {
  391. micron->ecc.rawbuf = kmalloc(mtd->writesize +
  392. mtd->oobsize,
  393. GFP_KERNEL);
  394. if (!micron->ecc.rawbuf) {
  395. ret = -ENOMEM;
  396. goto err_free_manuf_data;
  397. }
  398. }
  399. if (chip->ecc_strength_ds == 4)
  400. mtd_set_ooblayout(mtd,
  401. &micron_nand_on_die_4_ooblayout_ops);
  402. else
  403. mtd_set_ooblayout(mtd,
  404. &micron_nand_on_die_8_ooblayout_ops);
  405. chip->ecc.bytes = chip->ecc_strength_ds * 2;
  406. chip->ecc.size = 512;
  407. chip->ecc.strength = chip->ecc_strength_ds;
  408. chip->ecc.algo = NAND_ECC_BCH;
  409. chip->ecc.read_page = micron_nand_read_page_on_die_ecc;
  410. chip->ecc.write_page = micron_nand_write_page_on_die_ecc;
  411. if (ondie == MICRON_ON_DIE_MANDATORY) {
  412. chip->ecc.read_page_raw = nand_read_page_raw_notsupp;
  413. chip->ecc.write_page_raw = nand_write_page_raw_notsupp;
  414. } else {
  415. chip->ecc.read_page_raw = nand_read_page_raw;
  416. chip->ecc.write_page_raw = nand_write_page_raw;
  417. }
  418. }
  419. return 0;
  420. err_free_manuf_data:
  421. kfree(micron->ecc.rawbuf);
  422. kfree(micron);
  423. return ret;
  424. }
  425. static void micron_nand_cleanup(struct nand_chip *chip)
  426. {
  427. struct micron_nand *micron = nand_get_manufacturer_data(chip);
  428. kfree(micron->ecc.rawbuf);
  429. kfree(micron);
  430. }
  431. static void micron_fixup_onfi_param_page(struct nand_chip *chip,
  432. struct nand_onfi_params *p)
  433. {
  434. /*
  435. * MT29F1G08ABAFAWP-ITE:F and possibly others report 00 00 for the
  436. * revision number field of the ONFI parameter page. Assume ONFI
  437. * version 1.0 if the revision number is 00 00.
  438. */
  439. if (le16_to_cpu(p->revision) == 0)
  440. p->revision = cpu_to_le16(ONFI_VERSION_1_0);
  441. }
  442. const struct nand_manufacturer_ops micron_nand_manuf_ops = {
  443. .init = micron_nand_init,
  444. .cleanup = micron_nand_cleanup,
  445. .fixup_onfi_param_page = micron_fixup_onfi_param_page,
  446. };