sdhci-of-dwcmshc.c 3.7 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155
  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * Driver for Synopsys DesignWare Cores Mobile Storage Host Controller
  4. *
  5. * Copyright (C) 2018 Synaptics Incorporated
  6. *
  7. * Author: Jisheng Zhang <jszhang@kernel.org>
  8. */
  9. #include <linux/clk.h>
  10. #include <linux/dma-mapping.h>
  11. #include <linux/kernel.h>
  12. #include <linux/module.h>
  13. #include <linux/of.h>
  14. #include <linux/sizes.h>
  15. #include "sdhci-pltfm.h"
  16. #define BOUNDARY_OK(addr, len) \
  17. ((addr | (SZ_128M - 1)) == ((addr + len - 1) | (SZ_128M - 1)))
  18. struct dwcmshc_priv {
  19. struct clk *bus_clk;
  20. };
  21. /*
  22. * If DMA addr spans 128MB boundary, we split the DMA transfer into two
  23. * so that each DMA transfer doesn't exceed the boundary.
  24. */
  25. static void dwcmshc_adma_write_desc(struct sdhci_host *host, void **desc,
  26. dma_addr_t addr, int len, unsigned int cmd)
  27. {
  28. int tmplen, offset;
  29. if (likely(!len || BOUNDARY_OK(addr, len))) {
  30. sdhci_adma_write_desc(host, desc, addr, len, cmd);
  31. return;
  32. }
  33. offset = addr & (SZ_128M - 1);
  34. tmplen = SZ_128M - offset;
  35. sdhci_adma_write_desc(host, desc, addr, tmplen, cmd);
  36. addr += tmplen;
  37. len -= tmplen;
  38. sdhci_adma_write_desc(host, desc, addr, len, cmd);
  39. }
  40. static const struct sdhci_ops sdhci_dwcmshc_ops = {
  41. .set_clock = sdhci_set_clock,
  42. .set_bus_width = sdhci_set_bus_width,
  43. .set_uhs_signaling = sdhci_set_uhs_signaling,
  44. .get_max_clock = sdhci_pltfm_clk_get_max_clock,
  45. .reset = sdhci_reset,
  46. .adma_write_desc = dwcmshc_adma_write_desc,
  47. };
  48. static const struct sdhci_pltfm_data sdhci_dwcmshc_pdata = {
  49. .ops = &sdhci_dwcmshc_ops,
  50. .quirks = SDHCI_QUIRK_CAP_CLOCK_BASE_BROKEN,
  51. };
  52. static int dwcmshc_probe(struct platform_device *pdev)
  53. {
  54. struct sdhci_pltfm_host *pltfm_host;
  55. struct sdhci_host *host;
  56. struct dwcmshc_priv *priv;
  57. int err;
  58. u32 extra;
  59. host = sdhci_pltfm_init(pdev, &sdhci_dwcmshc_pdata,
  60. sizeof(struct dwcmshc_priv));
  61. if (IS_ERR(host))
  62. return PTR_ERR(host);
  63. /*
  64. * extra adma table cnt for cross 128M boundary handling.
  65. */
  66. extra = DIV_ROUND_UP_ULL(dma_get_required_mask(&pdev->dev), SZ_128M);
  67. if (extra > SDHCI_MAX_SEGS)
  68. extra = SDHCI_MAX_SEGS;
  69. host->adma_table_cnt += extra;
  70. pltfm_host = sdhci_priv(host);
  71. priv = sdhci_pltfm_priv(pltfm_host);
  72. pltfm_host->clk = devm_clk_get(&pdev->dev, "core");
  73. if (IS_ERR(pltfm_host->clk)) {
  74. err = PTR_ERR(pltfm_host->clk);
  75. dev_err(&pdev->dev, "failed to get core clk: %d\n", err);
  76. goto free_pltfm;
  77. }
  78. err = clk_prepare_enable(pltfm_host->clk);
  79. if (err)
  80. goto free_pltfm;
  81. priv->bus_clk = devm_clk_get(&pdev->dev, "bus");
  82. if (!IS_ERR(priv->bus_clk))
  83. clk_prepare_enable(priv->bus_clk);
  84. err = mmc_of_parse(host->mmc);
  85. if (err)
  86. goto err_clk;
  87. sdhci_get_of_property(pdev);
  88. err = sdhci_add_host(host);
  89. if (err)
  90. goto err_clk;
  91. return 0;
  92. err_clk:
  93. clk_disable_unprepare(pltfm_host->clk);
  94. clk_disable_unprepare(priv->bus_clk);
  95. free_pltfm:
  96. sdhci_pltfm_free(pdev);
  97. return err;
  98. }
  99. static int dwcmshc_remove(struct platform_device *pdev)
  100. {
  101. struct sdhci_host *host = platform_get_drvdata(pdev);
  102. struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
  103. struct dwcmshc_priv *priv = sdhci_pltfm_priv(pltfm_host);
  104. sdhci_remove_host(host, 0);
  105. clk_disable_unprepare(pltfm_host->clk);
  106. clk_disable_unprepare(priv->bus_clk);
  107. sdhci_pltfm_free(pdev);
  108. return 0;
  109. }
  110. static const struct of_device_id sdhci_dwcmshc_dt_ids[] = {
  111. { .compatible = "snps,dwcmshc-sdhci" },
  112. {}
  113. };
  114. MODULE_DEVICE_TABLE(of, sdhci_dwcmshc_dt_ids);
  115. static struct platform_driver sdhci_dwcmshc_driver = {
  116. .driver = {
  117. .name = "sdhci-dwcmshc",
  118. .of_match_table = sdhci_dwcmshc_dt_ids,
  119. },
  120. .probe = dwcmshc_probe,
  121. .remove = dwcmshc_remove,
  122. };
  123. module_platform_driver(sdhci_dwcmshc_driver);
  124. MODULE_DESCRIPTION("SDHCI platform driver for Synopsys DWC MSHC");
  125. MODULE_AUTHOR("Jisheng Zhang <jszhang@kernel.org>");
  126. MODULE_LICENSE("GPL v2");