card_dev.c 34 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764765766767768769770771772773774775776777778779780781782783784785786787788789790791792793794795796797798799800801802803804805806807808809810811812813814815816817818819820821822823824825826827828829830831832833834835836837838839840841842843844845846847848849850851852853854855856857858859860861862863864865866867868869870871872873874875876877878879880881882883884885886887888889890891892893894895896897898899900901902903904905906907908909910911912913914915916917918919920921922923924925926927928929930931932933934935936937938939940941942943944945946947948949950951952953954955956957958959960961962963964965966967968969970971972973974975976977978979980981982983984985986987988989990991992993994995996997998999100010011002100310041005100610071008100910101011101210131014101510161017101810191020102110221023102410251026102710281029103010311032103310341035103610371038103910401041104210431044104510461047104810491050105110521053105410551056105710581059106010611062106310641065106610671068106910701071107210731074107510761077107810791080108110821083108410851086108710881089109010911092109310941095109610971098109911001101110211031104110511061107110811091110111111121113111411151116111711181119112011211122112311241125112611271128112911301131113211331134113511361137113811391140114111421143114411451146114711481149115011511152115311541155115611571158115911601161116211631164116511661167116811691170117111721173117411751176117711781179118011811182118311841185118611871188118911901191119211931194119511961197119811991200120112021203120412051206120712081209121012111212121312141215121612171218121912201221122212231224122512261227122812291230123112321233123412351236123712381239124012411242124312441245124612471248124912501251125212531254125512561257125812591260126112621263126412651266126712681269127012711272127312741275127612771278127912801281128212831284128512861287128812891290129112921293129412951296129712981299130013011302130313041305130613071308130913101311131213131314131513161317131813191320132113221323132413251326132713281329133013311332133313341335133613371338133913401341134213431344134513461347134813491350135113521353135413551356135713581359136013611362136313641365136613671368136913701371137213731374137513761377137813791380138113821383138413851386138713881389139013911392139313941395139613971398139914001401140214031404140514061407140814091410
  1. /**
  2. * IBM Accelerator Family 'GenWQE'
  3. *
  4. * (C) Copyright IBM Corp. 2013
  5. *
  6. * Author: Frank Haverkamp <haver@linux.vnet.ibm.com>
  7. * Author: Joerg-Stephan Vogt <jsvogt@de.ibm.com>
  8. * Author: Michael Jung <mijung@gmx.net>
  9. * Author: Michael Ruettger <michael@ibmra.de>
  10. *
  11. * This program is free software; you can redistribute it and/or modify
  12. * it under the terms of the GNU General Public License (version 2 only)
  13. * as published by the Free Software Foundation.
  14. *
  15. * This program is distributed in the hope that it will be useful,
  16. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  17. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  18. * GNU General Public License for more details.
  19. */
  20. /*
  21. * Character device representation of the GenWQE device. This allows
  22. * user-space applications to communicate with the card.
  23. */
  24. #include <linux/kernel.h>
  25. #include <linux/types.h>
  26. #include <linux/module.h>
  27. #include <linux/pci.h>
  28. #include <linux/string.h>
  29. #include <linux/fs.h>
  30. #include <linux/sched/signal.h>
  31. #include <linux/wait.h>
  32. #include <linux/delay.h>
  33. #include <linux/atomic.h>
  34. #include "card_base.h"
  35. #include "card_ddcb.h"
  36. static int genwqe_open_files(struct genwqe_dev *cd)
  37. {
  38. int rc;
  39. unsigned long flags;
  40. spin_lock_irqsave(&cd->file_lock, flags);
  41. rc = list_empty(&cd->file_list);
  42. spin_unlock_irqrestore(&cd->file_lock, flags);
  43. return !rc;
  44. }
  45. static void genwqe_add_file(struct genwqe_dev *cd, struct genwqe_file *cfile)
  46. {
  47. unsigned long flags;
  48. cfile->opener = get_pid(task_tgid(current));
  49. spin_lock_irqsave(&cd->file_lock, flags);
  50. list_add(&cfile->list, &cd->file_list);
  51. spin_unlock_irqrestore(&cd->file_lock, flags);
  52. }
  53. static int genwqe_del_file(struct genwqe_dev *cd, struct genwqe_file *cfile)
  54. {
  55. unsigned long flags;
  56. spin_lock_irqsave(&cd->file_lock, flags);
  57. list_del(&cfile->list);
  58. spin_unlock_irqrestore(&cd->file_lock, flags);
  59. put_pid(cfile->opener);
  60. return 0;
  61. }
  62. static void genwqe_add_pin(struct genwqe_file *cfile, struct dma_mapping *m)
  63. {
  64. unsigned long flags;
  65. spin_lock_irqsave(&cfile->pin_lock, flags);
  66. list_add(&m->pin_list, &cfile->pin_list);
  67. spin_unlock_irqrestore(&cfile->pin_lock, flags);
  68. }
  69. static int genwqe_del_pin(struct genwqe_file *cfile, struct dma_mapping *m)
  70. {
  71. unsigned long flags;
  72. spin_lock_irqsave(&cfile->pin_lock, flags);
  73. list_del(&m->pin_list);
  74. spin_unlock_irqrestore(&cfile->pin_lock, flags);
  75. return 0;
  76. }
  77. /**
  78. * genwqe_search_pin() - Search for the mapping for a userspace address
  79. * @cfile: Descriptor of opened file
  80. * @u_addr: User virtual address
  81. * @size: Size of buffer
  82. * @dma_addr: DMA address to be updated
  83. *
  84. * Return: Pointer to the corresponding mapping NULL if not found
  85. */
  86. static struct dma_mapping *genwqe_search_pin(struct genwqe_file *cfile,
  87. unsigned long u_addr,
  88. unsigned int size,
  89. void **virt_addr)
  90. {
  91. unsigned long flags;
  92. struct dma_mapping *m;
  93. spin_lock_irqsave(&cfile->pin_lock, flags);
  94. list_for_each_entry(m, &cfile->pin_list, pin_list) {
  95. if ((((u64)m->u_vaddr) <= (u_addr)) &&
  96. (((u64)m->u_vaddr + m->size) >= (u_addr + size))) {
  97. if (virt_addr)
  98. *virt_addr = m->k_vaddr +
  99. (u_addr - (u64)m->u_vaddr);
  100. spin_unlock_irqrestore(&cfile->pin_lock, flags);
  101. return m;
  102. }
  103. }
  104. spin_unlock_irqrestore(&cfile->pin_lock, flags);
  105. return NULL;
  106. }
  107. static void __genwqe_add_mapping(struct genwqe_file *cfile,
  108. struct dma_mapping *dma_map)
  109. {
  110. unsigned long flags;
  111. spin_lock_irqsave(&cfile->map_lock, flags);
  112. list_add(&dma_map->card_list, &cfile->map_list);
  113. spin_unlock_irqrestore(&cfile->map_lock, flags);
  114. }
  115. static void __genwqe_del_mapping(struct genwqe_file *cfile,
  116. struct dma_mapping *dma_map)
  117. {
  118. unsigned long flags;
  119. spin_lock_irqsave(&cfile->map_lock, flags);
  120. list_del(&dma_map->card_list);
  121. spin_unlock_irqrestore(&cfile->map_lock, flags);
  122. }
  123. /**
  124. * __genwqe_search_mapping() - Search for the mapping for a userspace address
  125. * @cfile: descriptor of opened file
  126. * @u_addr: user virtual address
  127. * @size: size of buffer
  128. * @dma_addr: DMA address to be updated
  129. * Return: Pointer to the corresponding mapping NULL if not found
  130. */
  131. static struct dma_mapping *__genwqe_search_mapping(struct genwqe_file *cfile,
  132. unsigned long u_addr,
  133. unsigned int size,
  134. dma_addr_t *dma_addr,
  135. void **virt_addr)
  136. {
  137. unsigned long flags;
  138. struct dma_mapping *m;
  139. struct pci_dev *pci_dev = cfile->cd->pci_dev;
  140. spin_lock_irqsave(&cfile->map_lock, flags);
  141. list_for_each_entry(m, &cfile->map_list, card_list) {
  142. if ((((u64)m->u_vaddr) <= (u_addr)) &&
  143. (((u64)m->u_vaddr + m->size) >= (u_addr + size))) {
  144. /* match found: current is as expected and
  145. addr is in range */
  146. if (dma_addr)
  147. *dma_addr = m->dma_addr +
  148. (u_addr - (u64)m->u_vaddr);
  149. if (virt_addr)
  150. *virt_addr = m->k_vaddr +
  151. (u_addr - (u64)m->u_vaddr);
  152. spin_unlock_irqrestore(&cfile->map_lock, flags);
  153. return m;
  154. }
  155. }
  156. spin_unlock_irqrestore(&cfile->map_lock, flags);
  157. dev_err(&pci_dev->dev,
  158. "[%s] Entry not found: u_addr=%lx, size=%x\n",
  159. __func__, u_addr, size);
  160. return NULL;
  161. }
  162. static void genwqe_remove_mappings(struct genwqe_file *cfile)
  163. {
  164. int i = 0;
  165. struct list_head *node, *next;
  166. struct dma_mapping *dma_map;
  167. struct genwqe_dev *cd = cfile->cd;
  168. struct pci_dev *pci_dev = cfile->cd->pci_dev;
  169. list_for_each_safe(node, next, &cfile->map_list) {
  170. dma_map = list_entry(node, struct dma_mapping, card_list);
  171. list_del_init(&dma_map->card_list);
  172. /*
  173. * This is really a bug, because those things should
  174. * have been already tidied up.
  175. *
  176. * GENWQE_MAPPING_RAW should have been removed via mmunmap().
  177. * GENWQE_MAPPING_SGL_TEMP should be removed by tidy up code.
  178. */
  179. dev_err(&pci_dev->dev,
  180. "[%s] %d. cleanup mapping: u_vaddr=%p u_kaddr=%016lx dma_addr=%lx\n",
  181. __func__, i++, dma_map->u_vaddr,
  182. (unsigned long)dma_map->k_vaddr,
  183. (unsigned long)dma_map->dma_addr);
  184. if (dma_map->type == GENWQE_MAPPING_RAW) {
  185. /* we allocated this dynamically */
  186. __genwqe_free_consistent(cd, dma_map->size,
  187. dma_map->k_vaddr,
  188. dma_map->dma_addr);
  189. kfree(dma_map);
  190. } else if (dma_map->type == GENWQE_MAPPING_SGL_TEMP) {
  191. /* we use dma_map statically from the request */
  192. genwqe_user_vunmap(cd, dma_map);
  193. }
  194. }
  195. }
  196. static void genwqe_remove_pinnings(struct genwqe_file *cfile)
  197. {
  198. struct list_head *node, *next;
  199. struct dma_mapping *dma_map;
  200. struct genwqe_dev *cd = cfile->cd;
  201. list_for_each_safe(node, next, &cfile->pin_list) {
  202. dma_map = list_entry(node, struct dma_mapping, pin_list);
  203. /*
  204. * This is not a bug, because a killed processed might
  205. * not call the unpin ioctl, which is supposed to free
  206. * the resources.
  207. *
  208. * Pinnings are dymically allocated and need to be
  209. * deleted.
  210. */
  211. list_del_init(&dma_map->pin_list);
  212. genwqe_user_vunmap(cd, dma_map);
  213. kfree(dma_map);
  214. }
  215. }
  216. /**
  217. * genwqe_kill_fasync() - Send signal to all processes with open GenWQE files
  218. *
  219. * E.g. genwqe_send_signal(cd, SIGIO);
  220. */
  221. static int genwqe_kill_fasync(struct genwqe_dev *cd, int sig)
  222. {
  223. unsigned int files = 0;
  224. unsigned long flags;
  225. struct genwqe_file *cfile;
  226. spin_lock_irqsave(&cd->file_lock, flags);
  227. list_for_each_entry(cfile, &cd->file_list, list) {
  228. if (cfile->async_queue)
  229. kill_fasync(&cfile->async_queue, sig, POLL_HUP);
  230. files++;
  231. }
  232. spin_unlock_irqrestore(&cd->file_lock, flags);
  233. return files;
  234. }
  235. static int genwqe_terminate(struct genwqe_dev *cd)
  236. {
  237. unsigned int files = 0;
  238. unsigned long flags;
  239. struct genwqe_file *cfile;
  240. spin_lock_irqsave(&cd->file_lock, flags);
  241. list_for_each_entry(cfile, &cd->file_list, list) {
  242. kill_pid(cfile->opener, SIGKILL, 1);
  243. files++;
  244. }
  245. spin_unlock_irqrestore(&cd->file_lock, flags);
  246. return files;
  247. }
  248. /**
  249. * genwqe_open() - file open
  250. * @inode: file system information
  251. * @filp: file handle
  252. *
  253. * This function is executed whenever an application calls
  254. * open("/dev/genwqe",..).
  255. *
  256. * Return: 0 if successful or <0 if errors
  257. */
  258. static int genwqe_open(struct inode *inode, struct file *filp)
  259. {
  260. struct genwqe_dev *cd;
  261. struct genwqe_file *cfile;
  262. cfile = kzalloc(sizeof(*cfile), GFP_KERNEL);
  263. if (cfile == NULL)
  264. return -ENOMEM;
  265. cd = container_of(inode->i_cdev, struct genwqe_dev, cdev_genwqe);
  266. cfile->cd = cd;
  267. cfile->filp = filp;
  268. cfile->client = NULL;
  269. spin_lock_init(&cfile->map_lock); /* list of raw memory allocations */
  270. INIT_LIST_HEAD(&cfile->map_list);
  271. spin_lock_init(&cfile->pin_lock); /* list of user pinned memory */
  272. INIT_LIST_HEAD(&cfile->pin_list);
  273. filp->private_data = cfile;
  274. genwqe_add_file(cd, cfile);
  275. return 0;
  276. }
  277. /**
  278. * genwqe_fasync() - Setup process to receive SIGIO.
  279. * @fd: file descriptor
  280. * @filp: file handle
  281. * @mode: file mode
  282. *
  283. * Sending a signal is working as following:
  284. *
  285. * if (cdev->async_queue)
  286. * kill_fasync(&cdev->async_queue, SIGIO, POLL_IN);
  287. *
  288. * Some devices also implement asynchronous notification to indicate
  289. * when the device can be written; in this case, of course,
  290. * kill_fasync must be called with a mode of POLL_OUT.
  291. */
  292. static int genwqe_fasync(int fd, struct file *filp, int mode)
  293. {
  294. struct genwqe_file *cdev = (struct genwqe_file *)filp->private_data;
  295. return fasync_helper(fd, filp, mode, &cdev->async_queue);
  296. }
  297. /**
  298. * genwqe_release() - file close
  299. * @inode: file system information
  300. * @filp: file handle
  301. *
  302. * This function is executed whenever an application calls 'close(fd_genwqe)'
  303. *
  304. * Return: always 0
  305. */
  306. static int genwqe_release(struct inode *inode, struct file *filp)
  307. {
  308. struct genwqe_file *cfile = (struct genwqe_file *)filp->private_data;
  309. struct genwqe_dev *cd = cfile->cd;
  310. /* there must be no entries in these lists! */
  311. genwqe_remove_mappings(cfile);
  312. genwqe_remove_pinnings(cfile);
  313. /* remove this filp from the asynchronously notified filp's */
  314. genwqe_fasync(-1, filp, 0);
  315. /*
  316. * For this to work we must not release cd when this cfile is
  317. * not yet released, otherwise the list entry is invalid,
  318. * because the list itself gets reinstantiated!
  319. */
  320. genwqe_del_file(cd, cfile);
  321. kfree(cfile);
  322. return 0;
  323. }
  324. static void genwqe_vma_open(struct vm_area_struct *vma)
  325. {
  326. /* nothing ... */
  327. }
  328. /**
  329. * genwqe_vma_close() - Called each time when vma is unmapped
  330. *
  331. * Free memory which got allocated by GenWQE mmap().
  332. */
  333. static void genwqe_vma_close(struct vm_area_struct *vma)
  334. {
  335. unsigned long vsize = vma->vm_end - vma->vm_start;
  336. struct inode *inode = file_inode(vma->vm_file);
  337. struct dma_mapping *dma_map;
  338. struct genwqe_dev *cd = container_of(inode->i_cdev, struct genwqe_dev,
  339. cdev_genwqe);
  340. struct pci_dev *pci_dev = cd->pci_dev;
  341. dma_addr_t d_addr = 0;
  342. struct genwqe_file *cfile = vma->vm_private_data;
  343. dma_map = __genwqe_search_mapping(cfile, vma->vm_start, vsize,
  344. &d_addr, NULL);
  345. if (dma_map == NULL) {
  346. dev_err(&pci_dev->dev,
  347. " [%s] err: mapping not found: v=%lx, p=%lx s=%lx\n",
  348. __func__, vma->vm_start, vma->vm_pgoff << PAGE_SHIFT,
  349. vsize);
  350. return;
  351. }
  352. __genwqe_del_mapping(cfile, dma_map);
  353. __genwqe_free_consistent(cd, dma_map->size, dma_map->k_vaddr,
  354. dma_map->dma_addr);
  355. kfree(dma_map);
  356. }
  357. static const struct vm_operations_struct genwqe_vma_ops = {
  358. .open = genwqe_vma_open,
  359. .close = genwqe_vma_close,
  360. };
  361. /**
  362. * genwqe_mmap() - Provide contignous buffers to userspace
  363. *
  364. * We use mmap() to allocate contignous buffers used for DMA
  365. * transfers. After the buffer is allocated we remap it to user-space
  366. * and remember a reference to our dma_mapping data structure, where
  367. * we store the associated DMA address and allocated size.
  368. *
  369. * When we receive a DDCB execution request with the ATS bits set to
  370. * plain buffer, we lookup our dma_mapping list to find the
  371. * corresponding DMA address for the associated user-space address.
  372. */
  373. static int genwqe_mmap(struct file *filp, struct vm_area_struct *vma)
  374. {
  375. int rc;
  376. unsigned long pfn, vsize = vma->vm_end - vma->vm_start;
  377. struct genwqe_file *cfile = (struct genwqe_file *)filp->private_data;
  378. struct genwqe_dev *cd = cfile->cd;
  379. struct dma_mapping *dma_map;
  380. if (vsize == 0)
  381. return -EINVAL;
  382. if (get_order(vsize) > MAX_ORDER)
  383. return -ENOMEM;
  384. dma_map = kzalloc(sizeof(struct dma_mapping), GFP_KERNEL);
  385. if (dma_map == NULL)
  386. return -ENOMEM;
  387. genwqe_mapping_init(dma_map, GENWQE_MAPPING_RAW);
  388. dma_map->u_vaddr = (void *)vma->vm_start;
  389. dma_map->size = vsize;
  390. dma_map->nr_pages = DIV_ROUND_UP(vsize, PAGE_SIZE);
  391. dma_map->k_vaddr = __genwqe_alloc_consistent(cd, vsize,
  392. &dma_map->dma_addr);
  393. if (dma_map->k_vaddr == NULL) {
  394. rc = -ENOMEM;
  395. goto free_dma_map;
  396. }
  397. if (capable(CAP_SYS_ADMIN) && (vsize > sizeof(dma_addr_t)))
  398. *(dma_addr_t *)dma_map->k_vaddr = dma_map->dma_addr;
  399. pfn = virt_to_phys(dma_map->k_vaddr) >> PAGE_SHIFT;
  400. rc = remap_pfn_range(vma,
  401. vma->vm_start,
  402. pfn,
  403. vsize,
  404. vma->vm_page_prot);
  405. if (rc != 0) {
  406. rc = -EFAULT;
  407. goto free_dma_mem;
  408. }
  409. vma->vm_private_data = cfile;
  410. vma->vm_ops = &genwqe_vma_ops;
  411. __genwqe_add_mapping(cfile, dma_map);
  412. return 0;
  413. free_dma_mem:
  414. __genwqe_free_consistent(cd, dma_map->size,
  415. dma_map->k_vaddr,
  416. dma_map->dma_addr);
  417. free_dma_map:
  418. kfree(dma_map);
  419. return rc;
  420. }
  421. /**
  422. * do_flash_update() - Excute flash update (write image or CVPD)
  423. * @cd: genwqe device
  424. * @load: details about image load
  425. *
  426. * Return: 0 if successful
  427. */
  428. #define FLASH_BLOCK 0x40000 /* we use 256k blocks */
  429. static int do_flash_update(struct genwqe_file *cfile,
  430. struct genwqe_bitstream *load)
  431. {
  432. int rc = 0;
  433. int blocks_to_flash;
  434. dma_addr_t dma_addr;
  435. u64 flash = 0;
  436. size_t tocopy = 0;
  437. u8 __user *buf;
  438. u8 *xbuf;
  439. u32 crc;
  440. u8 cmdopts;
  441. struct genwqe_dev *cd = cfile->cd;
  442. struct file *filp = cfile->filp;
  443. struct pci_dev *pci_dev = cd->pci_dev;
  444. if ((load->size & 0x3) != 0)
  445. return -EINVAL;
  446. if (((unsigned long)(load->data_addr) & ~PAGE_MASK) != 0)
  447. return -EINVAL;
  448. /* FIXME Bits have changed for new service layer! */
  449. switch ((char)load->partition) {
  450. case '0':
  451. cmdopts = 0x14;
  452. break; /* download/erase_first/part_0 */
  453. case '1':
  454. cmdopts = 0x1C;
  455. break; /* download/erase_first/part_1 */
  456. case 'v':
  457. cmdopts = 0x0C;
  458. break; /* download/erase_first/vpd */
  459. default:
  460. return -EINVAL;
  461. }
  462. buf = (u8 __user *)load->data_addr;
  463. xbuf = __genwqe_alloc_consistent(cd, FLASH_BLOCK, &dma_addr);
  464. if (xbuf == NULL)
  465. return -ENOMEM;
  466. blocks_to_flash = load->size / FLASH_BLOCK;
  467. while (load->size) {
  468. struct genwqe_ddcb_cmd *req;
  469. /*
  470. * We must be 4 byte aligned. Buffer must be 0 appened
  471. * to have defined values when calculating CRC.
  472. */
  473. tocopy = min_t(size_t, load->size, FLASH_BLOCK);
  474. rc = copy_from_user(xbuf, buf, tocopy);
  475. if (rc) {
  476. rc = -EFAULT;
  477. goto free_buffer;
  478. }
  479. crc = genwqe_crc32(xbuf, tocopy, 0xffffffff);
  480. dev_dbg(&pci_dev->dev,
  481. "[%s] DMA: %lx CRC: %08x SZ: %ld %d\n",
  482. __func__, (unsigned long)dma_addr, crc, tocopy,
  483. blocks_to_flash);
  484. /* prepare DDCB for SLU process */
  485. req = ddcb_requ_alloc();
  486. if (req == NULL) {
  487. rc = -ENOMEM;
  488. goto free_buffer;
  489. }
  490. req->cmd = SLCMD_MOVE_FLASH;
  491. req->cmdopts = cmdopts;
  492. /* prepare invariant values */
  493. if (genwqe_get_slu_id(cd) <= 0x2) {
  494. *(__be64 *)&req->__asiv[0] = cpu_to_be64(dma_addr);
  495. *(__be64 *)&req->__asiv[8] = cpu_to_be64(tocopy);
  496. *(__be64 *)&req->__asiv[16] = cpu_to_be64(flash);
  497. *(__be32 *)&req->__asiv[24] = cpu_to_be32(0);
  498. req->__asiv[24] = load->uid;
  499. *(__be32 *)&req->__asiv[28] = cpu_to_be32(crc);
  500. /* for simulation only */
  501. *(__be64 *)&req->__asiv[88] = cpu_to_be64(load->slu_id);
  502. *(__be64 *)&req->__asiv[96] = cpu_to_be64(load->app_id);
  503. req->asiv_length = 32; /* bytes included in crc calc */
  504. } else { /* setup DDCB for ATS architecture */
  505. *(__be64 *)&req->asiv[0] = cpu_to_be64(dma_addr);
  506. *(__be32 *)&req->asiv[8] = cpu_to_be32(tocopy);
  507. *(__be32 *)&req->asiv[12] = cpu_to_be32(0); /* resvd */
  508. *(__be64 *)&req->asiv[16] = cpu_to_be64(flash);
  509. *(__be32 *)&req->asiv[24] = cpu_to_be32(load->uid<<24);
  510. *(__be32 *)&req->asiv[28] = cpu_to_be32(crc);
  511. /* for simulation only */
  512. *(__be64 *)&req->asiv[80] = cpu_to_be64(load->slu_id);
  513. *(__be64 *)&req->asiv[88] = cpu_to_be64(load->app_id);
  514. /* Rd only */
  515. req->ats = 0x4ULL << 44;
  516. req->asiv_length = 40; /* bytes included in crc calc */
  517. }
  518. req->asv_length = 8;
  519. /* For Genwqe5 we get back the calculated CRC */
  520. *(u64 *)&req->asv[0] = 0ULL; /* 0x80 */
  521. rc = __genwqe_execute_raw_ddcb(cd, req, filp->f_flags);
  522. load->retc = req->retc;
  523. load->attn = req->attn;
  524. load->progress = req->progress;
  525. if (rc < 0) {
  526. ddcb_requ_free(req);
  527. goto free_buffer;
  528. }
  529. if (req->retc != DDCB_RETC_COMPLETE) {
  530. rc = -EIO;
  531. ddcb_requ_free(req);
  532. goto free_buffer;
  533. }
  534. load->size -= tocopy;
  535. flash += tocopy;
  536. buf += tocopy;
  537. blocks_to_flash--;
  538. ddcb_requ_free(req);
  539. }
  540. free_buffer:
  541. __genwqe_free_consistent(cd, FLASH_BLOCK, xbuf, dma_addr);
  542. return rc;
  543. }
  544. static int do_flash_read(struct genwqe_file *cfile,
  545. struct genwqe_bitstream *load)
  546. {
  547. int rc, blocks_to_flash;
  548. dma_addr_t dma_addr;
  549. u64 flash = 0;
  550. size_t tocopy = 0;
  551. u8 __user *buf;
  552. u8 *xbuf;
  553. u8 cmdopts;
  554. struct genwqe_dev *cd = cfile->cd;
  555. struct file *filp = cfile->filp;
  556. struct pci_dev *pci_dev = cd->pci_dev;
  557. struct genwqe_ddcb_cmd *cmd;
  558. if ((load->size & 0x3) != 0)
  559. return -EINVAL;
  560. if (((unsigned long)(load->data_addr) & ~PAGE_MASK) != 0)
  561. return -EINVAL;
  562. /* FIXME Bits have changed for new service layer! */
  563. switch ((char)load->partition) {
  564. case '0':
  565. cmdopts = 0x12;
  566. break; /* upload/part_0 */
  567. case '1':
  568. cmdopts = 0x1A;
  569. break; /* upload/part_1 */
  570. case 'v':
  571. cmdopts = 0x0A;
  572. break; /* upload/vpd */
  573. default:
  574. return -EINVAL;
  575. }
  576. buf = (u8 __user *)load->data_addr;
  577. xbuf = __genwqe_alloc_consistent(cd, FLASH_BLOCK, &dma_addr);
  578. if (xbuf == NULL)
  579. return -ENOMEM;
  580. blocks_to_flash = load->size / FLASH_BLOCK;
  581. while (load->size) {
  582. /*
  583. * We must be 4 byte aligned. Buffer must be 0 appened
  584. * to have defined values when calculating CRC.
  585. */
  586. tocopy = min_t(size_t, load->size, FLASH_BLOCK);
  587. dev_dbg(&pci_dev->dev,
  588. "[%s] DMA: %lx SZ: %ld %d\n",
  589. __func__, (unsigned long)dma_addr, tocopy,
  590. blocks_to_flash);
  591. /* prepare DDCB for SLU process */
  592. cmd = ddcb_requ_alloc();
  593. if (cmd == NULL) {
  594. rc = -ENOMEM;
  595. goto free_buffer;
  596. }
  597. cmd->cmd = SLCMD_MOVE_FLASH;
  598. cmd->cmdopts = cmdopts;
  599. /* prepare invariant values */
  600. if (genwqe_get_slu_id(cd) <= 0x2) {
  601. *(__be64 *)&cmd->__asiv[0] = cpu_to_be64(dma_addr);
  602. *(__be64 *)&cmd->__asiv[8] = cpu_to_be64(tocopy);
  603. *(__be64 *)&cmd->__asiv[16] = cpu_to_be64(flash);
  604. *(__be32 *)&cmd->__asiv[24] = cpu_to_be32(0);
  605. cmd->__asiv[24] = load->uid;
  606. *(__be32 *)&cmd->__asiv[28] = cpu_to_be32(0) /* CRC */;
  607. cmd->asiv_length = 32; /* bytes included in crc calc */
  608. } else { /* setup DDCB for ATS architecture */
  609. *(__be64 *)&cmd->asiv[0] = cpu_to_be64(dma_addr);
  610. *(__be32 *)&cmd->asiv[8] = cpu_to_be32(tocopy);
  611. *(__be32 *)&cmd->asiv[12] = cpu_to_be32(0); /* resvd */
  612. *(__be64 *)&cmd->asiv[16] = cpu_to_be64(flash);
  613. *(__be32 *)&cmd->asiv[24] = cpu_to_be32(load->uid<<24);
  614. *(__be32 *)&cmd->asiv[28] = cpu_to_be32(0); /* CRC */
  615. /* rd/wr */
  616. cmd->ats = 0x5ULL << 44;
  617. cmd->asiv_length = 40; /* bytes included in crc calc */
  618. }
  619. cmd->asv_length = 8;
  620. /* we only get back the calculated CRC */
  621. *(u64 *)&cmd->asv[0] = 0ULL; /* 0x80 */
  622. rc = __genwqe_execute_raw_ddcb(cd, cmd, filp->f_flags);
  623. load->retc = cmd->retc;
  624. load->attn = cmd->attn;
  625. load->progress = cmd->progress;
  626. if ((rc < 0) && (rc != -EBADMSG)) {
  627. ddcb_requ_free(cmd);
  628. goto free_buffer;
  629. }
  630. rc = copy_to_user(buf, xbuf, tocopy);
  631. if (rc) {
  632. rc = -EFAULT;
  633. ddcb_requ_free(cmd);
  634. goto free_buffer;
  635. }
  636. /* We know that we can get retc 0x104 with CRC err */
  637. if (((cmd->retc == DDCB_RETC_FAULT) &&
  638. (cmd->attn != 0x02)) || /* Normally ignore CRC error */
  639. ((cmd->retc == DDCB_RETC_COMPLETE) &&
  640. (cmd->attn != 0x00))) { /* Everything was fine */
  641. rc = -EIO;
  642. ddcb_requ_free(cmd);
  643. goto free_buffer;
  644. }
  645. load->size -= tocopy;
  646. flash += tocopy;
  647. buf += tocopy;
  648. blocks_to_flash--;
  649. ddcb_requ_free(cmd);
  650. }
  651. rc = 0;
  652. free_buffer:
  653. __genwqe_free_consistent(cd, FLASH_BLOCK, xbuf, dma_addr);
  654. return rc;
  655. }
  656. static int genwqe_pin_mem(struct genwqe_file *cfile, struct genwqe_mem *m)
  657. {
  658. int rc;
  659. struct genwqe_dev *cd = cfile->cd;
  660. struct pci_dev *pci_dev = cfile->cd->pci_dev;
  661. struct dma_mapping *dma_map;
  662. unsigned long map_addr;
  663. unsigned long map_size;
  664. if ((m->addr == 0x0) || (m->size == 0))
  665. return -EINVAL;
  666. map_addr = (m->addr & PAGE_MASK);
  667. map_size = round_up(m->size + (m->addr & ~PAGE_MASK), PAGE_SIZE);
  668. dma_map = kzalloc(sizeof(struct dma_mapping), GFP_KERNEL);
  669. if (dma_map == NULL)
  670. return -ENOMEM;
  671. genwqe_mapping_init(dma_map, GENWQE_MAPPING_SGL_PINNED);
  672. rc = genwqe_user_vmap(cd, dma_map, (void *)map_addr, map_size);
  673. if (rc != 0) {
  674. dev_err(&pci_dev->dev,
  675. "[%s] genwqe_user_vmap rc=%d\n", __func__, rc);
  676. kfree(dma_map);
  677. return rc;
  678. }
  679. genwqe_add_pin(cfile, dma_map);
  680. return 0;
  681. }
  682. static int genwqe_unpin_mem(struct genwqe_file *cfile, struct genwqe_mem *m)
  683. {
  684. struct genwqe_dev *cd = cfile->cd;
  685. struct dma_mapping *dma_map;
  686. unsigned long map_addr;
  687. unsigned long map_size;
  688. if (m->addr == 0x0)
  689. return -EINVAL;
  690. map_addr = (m->addr & PAGE_MASK);
  691. map_size = round_up(m->size + (m->addr & ~PAGE_MASK), PAGE_SIZE);
  692. dma_map = genwqe_search_pin(cfile, map_addr, map_size, NULL);
  693. if (dma_map == NULL)
  694. return -ENOENT;
  695. genwqe_del_pin(cfile, dma_map);
  696. genwqe_user_vunmap(cd, dma_map);
  697. kfree(dma_map);
  698. return 0;
  699. }
  700. /**
  701. * ddcb_cmd_cleanup() - Remove dynamically created fixup entries
  702. *
  703. * Only if there are any. Pinnings are not removed.
  704. */
  705. static int ddcb_cmd_cleanup(struct genwqe_file *cfile, struct ddcb_requ *req)
  706. {
  707. unsigned int i;
  708. struct dma_mapping *dma_map;
  709. struct genwqe_dev *cd = cfile->cd;
  710. for (i = 0; i < DDCB_FIXUPS; i++) {
  711. dma_map = &req->dma_mappings[i];
  712. if (dma_mapping_used(dma_map)) {
  713. __genwqe_del_mapping(cfile, dma_map);
  714. genwqe_user_vunmap(cd, dma_map);
  715. }
  716. if (req->sgls[i].sgl != NULL)
  717. genwqe_free_sync_sgl(cd, &req->sgls[i]);
  718. }
  719. return 0;
  720. }
  721. /**
  722. * ddcb_cmd_fixups() - Establish DMA fixups/sglists for user memory references
  723. *
  724. * Before the DDCB gets executed we need to handle the fixups. We
  725. * replace the user-space addresses with DMA addresses or do
  726. * additional setup work e.g. generating a scatter-gather list which
  727. * is used to describe the memory referred to in the fixup.
  728. */
  729. static int ddcb_cmd_fixups(struct genwqe_file *cfile, struct ddcb_requ *req)
  730. {
  731. int rc;
  732. unsigned int asiv_offs, i;
  733. struct genwqe_dev *cd = cfile->cd;
  734. struct genwqe_ddcb_cmd *cmd = &req->cmd;
  735. struct dma_mapping *m;
  736. for (i = 0, asiv_offs = 0x00; asiv_offs <= 0x58;
  737. i++, asiv_offs += 0x08) {
  738. u64 u_addr;
  739. dma_addr_t d_addr;
  740. u32 u_size = 0;
  741. u64 ats_flags;
  742. ats_flags = ATS_GET_FLAGS(cmd->ats, asiv_offs);
  743. switch (ats_flags) {
  744. case ATS_TYPE_DATA:
  745. break; /* nothing to do here */
  746. case ATS_TYPE_FLAT_RDWR:
  747. case ATS_TYPE_FLAT_RD: {
  748. u_addr = be64_to_cpu(*((__be64 *)&cmd->
  749. asiv[asiv_offs]));
  750. u_size = be32_to_cpu(*((__be32 *)&cmd->
  751. asiv[asiv_offs + 0x08]));
  752. /*
  753. * No data available. Ignore u_addr in this
  754. * case and set addr to 0. Hardware must not
  755. * fetch the buffer.
  756. */
  757. if (u_size == 0x0) {
  758. *((__be64 *)&cmd->asiv[asiv_offs]) =
  759. cpu_to_be64(0x0);
  760. break;
  761. }
  762. m = __genwqe_search_mapping(cfile, u_addr, u_size,
  763. &d_addr, NULL);
  764. if (m == NULL) {
  765. rc = -EFAULT;
  766. goto err_out;
  767. }
  768. *((__be64 *)&cmd->asiv[asiv_offs]) =
  769. cpu_to_be64(d_addr);
  770. break;
  771. }
  772. case ATS_TYPE_SGL_RDWR:
  773. case ATS_TYPE_SGL_RD: {
  774. int page_offs;
  775. u_addr = be64_to_cpu(*((__be64 *)
  776. &cmd->asiv[asiv_offs]));
  777. u_size = be32_to_cpu(*((__be32 *)
  778. &cmd->asiv[asiv_offs + 0x08]));
  779. /*
  780. * No data available. Ignore u_addr in this
  781. * case and set addr to 0. Hardware must not
  782. * fetch the empty sgl.
  783. */
  784. if (u_size == 0x0) {
  785. *((__be64 *)&cmd->asiv[asiv_offs]) =
  786. cpu_to_be64(0x0);
  787. break;
  788. }
  789. m = genwqe_search_pin(cfile, u_addr, u_size, NULL);
  790. if (m != NULL) {
  791. page_offs = (u_addr -
  792. (u64)m->u_vaddr)/PAGE_SIZE;
  793. } else {
  794. m = &req->dma_mappings[i];
  795. genwqe_mapping_init(m,
  796. GENWQE_MAPPING_SGL_TEMP);
  797. if (ats_flags == ATS_TYPE_SGL_RD)
  798. m->write = 0;
  799. rc = genwqe_user_vmap(cd, m, (void *)u_addr,
  800. u_size);
  801. if (rc != 0)
  802. goto err_out;
  803. __genwqe_add_mapping(cfile, m);
  804. page_offs = 0;
  805. }
  806. /* create genwqe style scatter gather list */
  807. rc = genwqe_alloc_sync_sgl(cd, &req->sgls[i],
  808. (void __user *)u_addr,
  809. u_size, m->write);
  810. if (rc != 0)
  811. goto err_out;
  812. genwqe_setup_sgl(cd, &req->sgls[i],
  813. &m->dma_list[page_offs]);
  814. *((__be64 *)&cmd->asiv[asiv_offs]) =
  815. cpu_to_be64(req->sgls[i].sgl_dma_addr);
  816. break;
  817. }
  818. default:
  819. rc = -EINVAL;
  820. goto err_out;
  821. }
  822. }
  823. return 0;
  824. err_out:
  825. ddcb_cmd_cleanup(cfile, req);
  826. return rc;
  827. }
  828. /**
  829. * genwqe_execute_ddcb() - Execute DDCB using userspace address fixups
  830. *
  831. * The code will build up the translation tables or lookup the
  832. * contignous memory allocation table to find the right translations
  833. * and DMA addresses.
  834. */
  835. static int genwqe_execute_ddcb(struct genwqe_file *cfile,
  836. struct genwqe_ddcb_cmd *cmd)
  837. {
  838. int rc;
  839. struct genwqe_dev *cd = cfile->cd;
  840. struct file *filp = cfile->filp;
  841. struct ddcb_requ *req = container_of(cmd, struct ddcb_requ, cmd);
  842. rc = ddcb_cmd_fixups(cfile, req);
  843. if (rc != 0)
  844. return rc;
  845. rc = __genwqe_execute_raw_ddcb(cd, cmd, filp->f_flags);
  846. ddcb_cmd_cleanup(cfile, req);
  847. return rc;
  848. }
  849. static int do_execute_ddcb(struct genwqe_file *cfile,
  850. unsigned long arg, int raw)
  851. {
  852. int rc;
  853. struct genwqe_ddcb_cmd *cmd;
  854. struct genwqe_dev *cd = cfile->cd;
  855. struct file *filp = cfile->filp;
  856. cmd = ddcb_requ_alloc();
  857. if (cmd == NULL)
  858. return -ENOMEM;
  859. if (copy_from_user(cmd, (void __user *)arg, sizeof(*cmd))) {
  860. ddcb_requ_free(cmd);
  861. return -EFAULT;
  862. }
  863. if (!raw)
  864. rc = genwqe_execute_ddcb(cfile, cmd);
  865. else
  866. rc = __genwqe_execute_raw_ddcb(cd, cmd, filp->f_flags);
  867. /* Copy back only the modifed fields. Do not copy ASIV
  868. back since the copy got modified by the driver. */
  869. if (copy_to_user((void __user *)arg, cmd,
  870. sizeof(*cmd) - DDCB_ASIV_LENGTH)) {
  871. ddcb_requ_free(cmd);
  872. return -EFAULT;
  873. }
  874. ddcb_requ_free(cmd);
  875. return rc;
  876. }
  877. /**
  878. * genwqe_ioctl() - IO control
  879. * @filp: file handle
  880. * @cmd: command identifier (passed from user)
  881. * @arg: argument (passed from user)
  882. *
  883. * Return: 0 success
  884. */
  885. static long genwqe_ioctl(struct file *filp, unsigned int cmd,
  886. unsigned long arg)
  887. {
  888. int rc = 0;
  889. struct genwqe_file *cfile = (struct genwqe_file *)filp->private_data;
  890. struct genwqe_dev *cd = cfile->cd;
  891. struct pci_dev *pci_dev = cd->pci_dev;
  892. struct genwqe_reg_io __user *io;
  893. u64 val;
  894. u32 reg_offs;
  895. /* Return -EIO if card hit EEH */
  896. if (pci_channel_offline(pci_dev))
  897. return -EIO;
  898. if (_IOC_TYPE(cmd) != GENWQE_IOC_CODE)
  899. return -EINVAL;
  900. switch (cmd) {
  901. case GENWQE_GET_CARD_STATE:
  902. put_user(cd->card_state, (enum genwqe_card_state __user *)arg);
  903. return 0;
  904. /* Register access */
  905. case GENWQE_READ_REG64: {
  906. io = (struct genwqe_reg_io __user *)arg;
  907. if (get_user(reg_offs, &io->num))
  908. return -EFAULT;
  909. if ((reg_offs >= cd->mmio_len) || (reg_offs & 0x7))
  910. return -EINVAL;
  911. val = __genwqe_readq(cd, reg_offs);
  912. put_user(val, &io->val64);
  913. return 0;
  914. }
  915. case GENWQE_WRITE_REG64: {
  916. io = (struct genwqe_reg_io __user *)arg;
  917. if (!capable(CAP_SYS_ADMIN))
  918. return -EPERM;
  919. if ((filp->f_flags & O_ACCMODE) == O_RDONLY)
  920. return -EPERM;
  921. if (get_user(reg_offs, &io->num))
  922. return -EFAULT;
  923. if ((reg_offs >= cd->mmio_len) || (reg_offs & 0x7))
  924. return -EINVAL;
  925. if (get_user(val, &io->val64))
  926. return -EFAULT;
  927. __genwqe_writeq(cd, reg_offs, val);
  928. return 0;
  929. }
  930. case GENWQE_READ_REG32: {
  931. io = (struct genwqe_reg_io __user *)arg;
  932. if (get_user(reg_offs, &io->num))
  933. return -EFAULT;
  934. if ((reg_offs >= cd->mmio_len) || (reg_offs & 0x3))
  935. return -EINVAL;
  936. val = __genwqe_readl(cd, reg_offs);
  937. put_user(val, &io->val64);
  938. return 0;
  939. }
  940. case GENWQE_WRITE_REG32: {
  941. io = (struct genwqe_reg_io __user *)arg;
  942. if (!capable(CAP_SYS_ADMIN))
  943. return -EPERM;
  944. if ((filp->f_flags & O_ACCMODE) == O_RDONLY)
  945. return -EPERM;
  946. if (get_user(reg_offs, &io->num))
  947. return -EFAULT;
  948. if ((reg_offs >= cd->mmio_len) || (reg_offs & 0x3))
  949. return -EINVAL;
  950. if (get_user(val, &io->val64))
  951. return -EFAULT;
  952. __genwqe_writel(cd, reg_offs, val);
  953. return 0;
  954. }
  955. /* Flash update/reading */
  956. case GENWQE_SLU_UPDATE: {
  957. struct genwqe_bitstream load;
  958. if (!genwqe_is_privileged(cd))
  959. return -EPERM;
  960. if ((filp->f_flags & O_ACCMODE) == O_RDONLY)
  961. return -EPERM;
  962. if (copy_from_user(&load, (void __user *)arg,
  963. sizeof(load)))
  964. return -EFAULT;
  965. rc = do_flash_update(cfile, &load);
  966. if (copy_to_user((void __user *)arg, &load, sizeof(load)))
  967. return -EFAULT;
  968. return rc;
  969. }
  970. case GENWQE_SLU_READ: {
  971. struct genwqe_bitstream load;
  972. if (!genwqe_is_privileged(cd))
  973. return -EPERM;
  974. if (genwqe_flash_readback_fails(cd))
  975. return -ENOSPC; /* known to fail for old versions */
  976. if (copy_from_user(&load, (void __user *)arg, sizeof(load)))
  977. return -EFAULT;
  978. rc = do_flash_read(cfile, &load);
  979. if (copy_to_user((void __user *)arg, &load, sizeof(load)))
  980. return -EFAULT;
  981. return rc;
  982. }
  983. /* memory pinning and unpinning */
  984. case GENWQE_PIN_MEM: {
  985. struct genwqe_mem m;
  986. if (copy_from_user(&m, (void __user *)arg, sizeof(m)))
  987. return -EFAULT;
  988. return genwqe_pin_mem(cfile, &m);
  989. }
  990. case GENWQE_UNPIN_MEM: {
  991. struct genwqe_mem m;
  992. if (copy_from_user(&m, (void __user *)arg, sizeof(m)))
  993. return -EFAULT;
  994. return genwqe_unpin_mem(cfile, &m);
  995. }
  996. /* launch an DDCB and wait for completion */
  997. case GENWQE_EXECUTE_DDCB:
  998. return do_execute_ddcb(cfile, arg, 0);
  999. case GENWQE_EXECUTE_RAW_DDCB: {
  1000. if (!capable(CAP_SYS_ADMIN))
  1001. return -EPERM;
  1002. return do_execute_ddcb(cfile, arg, 1);
  1003. }
  1004. default:
  1005. return -EINVAL;
  1006. }
  1007. return rc;
  1008. }
  1009. #if defined(CONFIG_COMPAT)
  1010. /**
  1011. * genwqe_compat_ioctl() - Compatibility ioctl
  1012. *
  1013. * Called whenever a 32-bit process running under a 64-bit kernel
  1014. * performs an ioctl on /dev/genwqe<n>_card.
  1015. *
  1016. * @filp: file pointer.
  1017. * @cmd: command.
  1018. * @arg: user argument.
  1019. * Return: zero on success or negative number on failure.
  1020. */
  1021. static long genwqe_compat_ioctl(struct file *filp, unsigned int cmd,
  1022. unsigned long arg)
  1023. {
  1024. return genwqe_ioctl(filp, cmd, arg);
  1025. }
  1026. #endif /* defined(CONFIG_COMPAT) */
  1027. static const struct file_operations genwqe_fops = {
  1028. .owner = THIS_MODULE,
  1029. .open = genwqe_open,
  1030. .fasync = genwqe_fasync,
  1031. .mmap = genwqe_mmap,
  1032. .unlocked_ioctl = genwqe_ioctl,
  1033. #if defined(CONFIG_COMPAT)
  1034. .compat_ioctl = genwqe_compat_ioctl,
  1035. #endif
  1036. .release = genwqe_release,
  1037. };
  1038. static int genwqe_device_initialized(struct genwqe_dev *cd)
  1039. {
  1040. return cd->dev != NULL;
  1041. }
  1042. /**
  1043. * genwqe_device_create() - Create and configure genwqe char device
  1044. * @cd: genwqe device descriptor
  1045. *
  1046. * This function must be called before we create any more genwqe
  1047. * character devices, because it is allocating the major and minor
  1048. * number which are supposed to be used by the client drivers.
  1049. */
  1050. int genwqe_device_create(struct genwqe_dev *cd)
  1051. {
  1052. int rc;
  1053. struct pci_dev *pci_dev = cd->pci_dev;
  1054. /*
  1055. * Here starts the individual setup per client. It must
  1056. * initialize its own cdev data structure with its own fops.
  1057. * The appropriate devnum needs to be created. The ranges must
  1058. * not overlap.
  1059. */
  1060. rc = alloc_chrdev_region(&cd->devnum_genwqe, 0,
  1061. GENWQE_MAX_MINOR, GENWQE_DEVNAME);
  1062. if (rc < 0) {
  1063. dev_err(&pci_dev->dev, "err: alloc_chrdev_region failed\n");
  1064. goto err_dev;
  1065. }
  1066. cdev_init(&cd->cdev_genwqe, &genwqe_fops);
  1067. cd->cdev_genwqe.owner = THIS_MODULE;
  1068. rc = cdev_add(&cd->cdev_genwqe, cd->devnum_genwqe, 1);
  1069. if (rc < 0) {
  1070. dev_err(&pci_dev->dev, "err: cdev_add failed\n");
  1071. goto err_add;
  1072. }
  1073. /*
  1074. * Finally the device in /dev/... must be created. The rule is
  1075. * to use card%d_clientname for each created device.
  1076. */
  1077. cd->dev = device_create_with_groups(cd->class_genwqe,
  1078. &cd->pci_dev->dev,
  1079. cd->devnum_genwqe, cd,
  1080. genwqe_attribute_groups,
  1081. GENWQE_DEVNAME "%u_card",
  1082. cd->card_idx);
  1083. if (IS_ERR(cd->dev)) {
  1084. rc = PTR_ERR(cd->dev);
  1085. goto err_cdev;
  1086. }
  1087. rc = genwqe_init_debugfs(cd);
  1088. if (rc != 0)
  1089. goto err_debugfs;
  1090. return 0;
  1091. err_debugfs:
  1092. device_destroy(cd->class_genwqe, cd->devnum_genwqe);
  1093. err_cdev:
  1094. cdev_del(&cd->cdev_genwqe);
  1095. err_add:
  1096. unregister_chrdev_region(cd->devnum_genwqe, GENWQE_MAX_MINOR);
  1097. err_dev:
  1098. cd->dev = NULL;
  1099. return rc;
  1100. }
  1101. static int genwqe_inform_and_stop_processes(struct genwqe_dev *cd)
  1102. {
  1103. int rc;
  1104. unsigned int i;
  1105. struct pci_dev *pci_dev = cd->pci_dev;
  1106. if (!genwqe_open_files(cd))
  1107. return 0;
  1108. dev_warn(&pci_dev->dev, "[%s] send SIGIO and wait ...\n", __func__);
  1109. rc = genwqe_kill_fasync(cd, SIGIO);
  1110. if (rc > 0) {
  1111. /* give kill_timeout seconds to close file descriptors ... */
  1112. for (i = 0; (i < GENWQE_KILL_TIMEOUT) &&
  1113. genwqe_open_files(cd); i++) {
  1114. dev_info(&pci_dev->dev, " %d sec ...", i);
  1115. cond_resched();
  1116. msleep(1000);
  1117. }
  1118. /* if no open files we can safely continue, else ... */
  1119. if (!genwqe_open_files(cd))
  1120. return 0;
  1121. dev_warn(&pci_dev->dev,
  1122. "[%s] send SIGKILL and wait ...\n", __func__);
  1123. rc = genwqe_terminate(cd);
  1124. if (rc) {
  1125. /* Give kill_timout more seconds to end processes */
  1126. for (i = 0; (i < GENWQE_KILL_TIMEOUT) &&
  1127. genwqe_open_files(cd); i++) {
  1128. dev_warn(&pci_dev->dev, " %d sec ...", i);
  1129. cond_resched();
  1130. msleep(1000);
  1131. }
  1132. }
  1133. }
  1134. return 0;
  1135. }
  1136. /**
  1137. * genwqe_device_remove() - Remove genwqe's char device
  1138. *
  1139. * This function must be called after the client devices are removed
  1140. * because it will free the major/minor number range for the genwqe
  1141. * drivers.
  1142. *
  1143. * This function must be robust enough to be called twice.
  1144. */
  1145. int genwqe_device_remove(struct genwqe_dev *cd)
  1146. {
  1147. int rc;
  1148. struct pci_dev *pci_dev = cd->pci_dev;
  1149. if (!genwqe_device_initialized(cd))
  1150. return 1;
  1151. genwqe_inform_and_stop_processes(cd);
  1152. /*
  1153. * We currently do wait until all filedescriptors are
  1154. * closed. This leads to a problem when we abort the
  1155. * application which will decrease this reference from
  1156. * 1/unused to 0/illegal and not from 2/used 1/empty.
  1157. */
  1158. rc = kref_read(&cd->cdev_genwqe.kobj.kref);
  1159. if (rc != 1) {
  1160. dev_err(&pci_dev->dev,
  1161. "[%s] err: cdev_genwqe...refcount=%d\n", __func__, rc);
  1162. panic("Fatal err: cannot free resources with pending references!");
  1163. }
  1164. genqwe_exit_debugfs(cd);
  1165. device_destroy(cd->class_genwqe, cd->devnum_genwqe);
  1166. cdev_del(&cd->cdev_genwqe);
  1167. unregister_chrdev_region(cd->devnum_genwqe, GENWQE_MAX_MINOR);
  1168. cd->dev = NULL;
  1169. return 0;
  1170. }