w6692.c 36 KB

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  1. /*
  2. * w6692.c mISDN driver for Winbond w6692 based cards
  3. *
  4. * Author Karsten Keil <kkeil@suse.de>
  5. * based on the w6692 I4L driver from Petr Novak <petr.novak@i.cz>
  6. *
  7. * Copyright 2009 by Karsten Keil <keil@isdn4linux.de>
  8. *
  9. * This program is free software; you can redistribute it and/or modify
  10. * it under the terms of the GNU General Public License version 2 as
  11. * published by the Free Software Foundation.
  12. *
  13. * This program is distributed in the hope that it will be useful,
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16. * GNU General Public License for more details.
  17. *
  18. * You should have received a copy of the GNU General Public License
  19. * along with this program; if not, write to the Free Software
  20. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  21. *
  22. */
  23. #include <linux/interrupt.h>
  24. #include <linux/module.h>
  25. #include <linux/pci.h>
  26. #include <linux/delay.h>
  27. #include <linux/mISDNhw.h>
  28. #include <linux/slab.h>
  29. #include "w6692.h"
  30. #define W6692_REV "2.0"
  31. #define DBUSY_TIMER_VALUE 80
  32. enum {
  33. W6692_ASUS,
  34. W6692_WINBOND,
  35. W6692_USR
  36. };
  37. /* private data in the PCI devices list */
  38. struct w6692map {
  39. u_int subtype;
  40. char *name;
  41. };
  42. static const struct w6692map w6692_map[] =
  43. {
  44. {W6692_ASUS, "Dynalink/AsusCom IS64PH"},
  45. {W6692_WINBOND, "Winbond W6692"},
  46. {W6692_USR, "USR W6692"}
  47. };
  48. #ifndef PCI_VENDOR_ID_USR
  49. #define PCI_VENDOR_ID_USR 0x16ec
  50. #define PCI_DEVICE_ID_USR_6692 0x3409
  51. #endif
  52. struct w6692_ch {
  53. struct bchannel bch;
  54. u32 addr;
  55. struct timer_list timer;
  56. u8 b_mode;
  57. };
  58. struct w6692_hw {
  59. struct list_head list;
  60. struct pci_dev *pdev;
  61. char name[MISDN_MAX_IDLEN];
  62. u32 irq;
  63. u32 irqcnt;
  64. u32 addr;
  65. u32 fmask; /* feature mask - bit set per card nr */
  66. int subtype;
  67. spinlock_t lock; /* hw lock */
  68. u8 imask;
  69. u8 pctl;
  70. u8 xaddr;
  71. u8 xdata;
  72. u8 state;
  73. struct w6692_ch bc[2];
  74. struct dchannel dch;
  75. char log[64];
  76. };
  77. static LIST_HEAD(Cards);
  78. static DEFINE_RWLOCK(card_lock); /* protect Cards */
  79. static int w6692_cnt;
  80. static int debug;
  81. static u32 led;
  82. static u32 pots;
  83. static void
  84. _set_debug(struct w6692_hw *card)
  85. {
  86. card->dch.debug = debug;
  87. card->bc[0].bch.debug = debug;
  88. card->bc[1].bch.debug = debug;
  89. }
  90. static int
  91. set_debug(const char *val, const struct kernel_param *kp)
  92. {
  93. int ret;
  94. struct w6692_hw *card;
  95. ret = param_set_uint(val, kp);
  96. if (!ret) {
  97. read_lock(&card_lock);
  98. list_for_each_entry(card, &Cards, list)
  99. _set_debug(card);
  100. read_unlock(&card_lock);
  101. }
  102. return ret;
  103. }
  104. MODULE_AUTHOR("Karsten Keil");
  105. MODULE_LICENSE("GPL v2");
  106. MODULE_VERSION(W6692_REV);
  107. module_param_call(debug, set_debug, param_get_uint, &debug, S_IRUGO | S_IWUSR);
  108. MODULE_PARM_DESC(debug, "W6692 debug mask");
  109. module_param(led, uint, S_IRUGO | S_IWUSR);
  110. MODULE_PARM_DESC(led, "W6692 LED support bitmask (one bit per card)");
  111. module_param(pots, uint, S_IRUGO | S_IWUSR);
  112. MODULE_PARM_DESC(pots, "W6692 POTS support bitmask (one bit per card)");
  113. static inline u8
  114. ReadW6692(struct w6692_hw *card, u8 offset)
  115. {
  116. return inb(card->addr + offset);
  117. }
  118. static inline void
  119. WriteW6692(struct w6692_hw *card, u8 offset, u8 value)
  120. {
  121. outb(value, card->addr + offset);
  122. }
  123. static inline u8
  124. ReadW6692B(struct w6692_ch *bc, u8 offset)
  125. {
  126. return inb(bc->addr + offset);
  127. }
  128. static inline void
  129. WriteW6692B(struct w6692_ch *bc, u8 offset, u8 value)
  130. {
  131. outb(value, bc->addr + offset);
  132. }
  133. static void
  134. enable_hwirq(struct w6692_hw *card)
  135. {
  136. WriteW6692(card, W_IMASK, card->imask);
  137. }
  138. static void
  139. disable_hwirq(struct w6692_hw *card)
  140. {
  141. WriteW6692(card, W_IMASK, 0xff);
  142. }
  143. static const char *W6692Ver[] = {"V00", "V01", "V10", "V11"};
  144. static void
  145. W6692Version(struct w6692_hw *card)
  146. {
  147. int val;
  148. val = ReadW6692(card, W_D_RBCH);
  149. pr_notice("%s: Winbond W6692 version: %s\n", card->name,
  150. W6692Ver[(val >> 6) & 3]);
  151. }
  152. static void
  153. w6692_led_handler(struct w6692_hw *card, int on)
  154. {
  155. if ((!(card->fmask & led)) || card->subtype == W6692_USR)
  156. return;
  157. if (on) {
  158. card->xdata &= 0xfb; /* LED ON */
  159. WriteW6692(card, W_XDATA, card->xdata);
  160. } else {
  161. card->xdata |= 0x04; /* LED OFF */
  162. WriteW6692(card, W_XDATA, card->xdata);
  163. }
  164. }
  165. static void
  166. ph_command(struct w6692_hw *card, u8 cmd)
  167. {
  168. pr_debug("%s: ph_command %x\n", card->name, cmd);
  169. WriteW6692(card, W_CIX, cmd);
  170. }
  171. static void
  172. W6692_new_ph(struct w6692_hw *card)
  173. {
  174. if (card->state == W_L1CMD_RST)
  175. ph_command(card, W_L1CMD_DRC);
  176. schedule_event(&card->dch, FLG_PHCHANGE);
  177. }
  178. static void
  179. W6692_ph_bh(struct dchannel *dch)
  180. {
  181. struct w6692_hw *card = dch->hw;
  182. switch (card->state) {
  183. case W_L1CMD_RST:
  184. dch->state = 0;
  185. l1_event(dch->l1, HW_RESET_IND);
  186. break;
  187. case W_L1IND_CD:
  188. dch->state = 3;
  189. l1_event(dch->l1, HW_DEACT_CNF);
  190. break;
  191. case W_L1IND_DRD:
  192. dch->state = 3;
  193. l1_event(dch->l1, HW_DEACT_IND);
  194. break;
  195. case W_L1IND_CE:
  196. dch->state = 4;
  197. l1_event(dch->l1, HW_POWERUP_IND);
  198. break;
  199. case W_L1IND_LD:
  200. if (dch->state <= 5) {
  201. dch->state = 5;
  202. l1_event(dch->l1, ANYSIGNAL);
  203. } else {
  204. dch->state = 8;
  205. l1_event(dch->l1, LOSTFRAMING);
  206. }
  207. break;
  208. case W_L1IND_ARD:
  209. dch->state = 6;
  210. l1_event(dch->l1, INFO2);
  211. break;
  212. case W_L1IND_AI8:
  213. dch->state = 7;
  214. l1_event(dch->l1, INFO4_P8);
  215. break;
  216. case W_L1IND_AI10:
  217. dch->state = 7;
  218. l1_event(dch->l1, INFO4_P10);
  219. break;
  220. default:
  221. pr_debug("%s: TE unknown state %02x dch state %02x\n",
  222. card->name, card->state, dch->state);
  223. break;
  224. }
  225. pr_debug("%s: TE newstate %02x\n", card->name, dch->state);
  226. }
  227. static void
  228. W6692_empty_Dfifo(struct w6692_hw *card, int count)
  229. {
  230. struct dchannel *dch = &card->dch;
  231. u8 *ptr;
  232. pr_debug("%s: empty_Dfifo %d\n", card->name, count);
  233. if (!dch->rx_skb) {
  234. dch->rx_skb = mI_alloc_skb(card->dch.maxlen, GFP_ATOMIC);
  235. if (!dch->rx_skb) {
  236. pr_info("%s: D receive out of memory\n", card->name);
  237. WriteW6692(card, W_D_CMDR, W_D_CMDR_RACK);
  238. return;
  239. }
  240. }
  241. if ((dch->rx_skb->len + count) >= dch->maxlen) {
  242. pr_debug("%s: empty_Dfifo overrun %d\n", card->name,
  243. dch->rx_skb->len + count);
  244. WriteW6692(card, W_D_CMDR, W_D_CMDR_RACK);
  245. return;
  246. }
  247. ptr = skb_put(dch->rx_skb, count);
  248. insb(card->addr + W_D_RFIFO, ptr, count);
  249. WriteW6692(card, W_D_CMDR, W_D_CMDR_RACK);
  250. if (debug & DEBUG_HW_DFIFO) {
  251. snprintf(card->log, 63, "D-recv %s %d ",
  252. card->name, count);
  253. print_hex_dump_bytes(card->log, DUMP_PREFIX_OFFSET, ptr, count);
  254. }
  255. }
  256. static void
  257. W6692_fill_Dfifo(struct w6692_hw *card)
  258. {
  259. struct dchannel *dch = &card->dch;
  260. int count;
  261. u8 *ptr;
  262. u8 cmd = W_D_CMDR_XMS;
  263. pr_debug("%s: fill_Dfifo\n", card->name);
  264. if (!dch->tx_skb)
  265. return;
  266. count = dch->tx_skb->len - dch->tx_idx;
  267. if (count <= 0)
  268. return;
  269. if (count > W_D_FIFO_THRESH)
  270. count = W_D_FIFO_THRESH;
  271. else
  272. cmd |= W_D_CMDR_XME;
  273. ptr = dch->tx_skb->data + dch->tx_idx;
  274. dch->tx_idx += count;
  275. outsb(card->addr + W_D_XFIFO, ptr, count);
  276. WriteW6692(card, W_D_CMDR, cmd);
  277. if (test_and_set_bit(FLG_BUSY_TIMER, &dch->Flags)) {
  278. pr_debug("%s: fill_Dfifo dbusytimer running\n", card->name);
  279. del_timer(&dch->timer);
  280. }
  281. dch->timer.expires = jiffies + ((DBUSY_TIMER_VALUE * HZ) / 1000);
  282. add_timer(&dch->timer);
  283. if (debug & DEBUG_HW_DFIFO) {
  284. snprintf(card->log, 63, "D-send %s %d ",
  285. card->name, count);
  286. print_hex_dump_bytes(card->log, DUMP_PREFIX_OFFSET, ptr, count);
  287. }
  288. }
  289. static void
  290. d_retransmit(struct w6692_hw *card)
  291. {
  292. struct dchannel *dch = &card->dch;
  293. if (test_and_clear_bit(FLG_BUSY_TIMER, &dch->Flags))
  294. del_timer(&dch->timer);
  295. #ifdef FIXME
  296. if (test_and_clear_bit(FLG_L1_BUSY, &dch->Flags))
  297. dchannel_sched_event(dch, D_CLEARBUSY);
  298. #endif
  299. if (test_bit(FLG_TX_BUSY, &dch->Flags)) {
  300. /* Restart frame */
  301. dch->tx_idx = 0;
  302. W6692_fill_Dfifo(card);
  303. } else if (dch->tx_skb) { /* should not happen */
  304. pr_info("%s: %s without TX_BUSY\n", card->name, __func__);
  305. test_and_set_bit(FLG_TX_BUSY, &dch->Flags);
  306. dch->tx_idx = 0;
  307. W6692_fill_Dfifo(card);
  308. } else {
  309. pr_info("%s: XDU no TX_BUSY\n", card->name);
  310. if (get_next_dframe(dch))
  311. W6692_fill_Dfifo(card);
  312. }
  313. }
  314. static void
  315. handle_rxD(struct w6692_hw *card) {
  316. u8 stat;
  317. int count;
  318. stat = ReadW6692(card, W_D_RSTA);
  319. if (stat & (W_D_RSTA_RDOV | W_D_RSTA_CRCE | W_D_RSTA_RMB)) {
  320. if (stat & W_D_RSTA_RDOV) {
  321. pr_debug("%s: D-channel RDOV\n", card->name);
  322. #ifdef ERROR_STATISTIC
  323. card->dch.err_rx++;
  324. #endif
  325. }
  326. if (stat & W_D_RSTA_CRCE) {
  327. pr_debug("%s: D-channel CRC error\n", card->name);
  328. #ifdef ERROR_STATISTIC
  329. card->dch.err_crc++;
  330. #endif
  331. }
  332. if (stat & W_D_RSTA_RMB) {
  333. pr_debug("%s: D-channel ABORT\n", card->name);
  334. #ifdef ERROR_STATISTIC
  335. card->dch.err_rx++;
  336. #endif
  337. }
  338. if (card->dch.rx_skb)
  339. dev_kfree_skb(card->dch.rx_skb);
  340. card->dch.rx_skb = NULL;
  341. WriteW6692(card, W_D_CMDR, W_D_CMDR_RACK | W_D_CMDR_RRST);
  342. } else {
  343. count = ReadW6692(card, W_D_RBCL) & (W_D_FIFO_THRESH - 1);
  344. if (count == 0)
  345. count = W_D_FIFO_THRESH;
  346. W6692_empty_Dfifo(card, count);
  347. recv_Dchannel(&card->dch);
  348. }
  349. }
  350. static void
  351. handle_txD(struct w6692_hw *card) {
  352. if (test_and_clear_bit(FLG_BUSY_TIMER, &card->dch.Flags))
  353. del_timer(&card->dch.timer);
  354. if (card->dch.tx_skb && card->dch.tx_idx < card->dch.tx_skb->len) {
  355. W6692_fill_Dfifo(card);
  356. } else {
  357. if (card->dch.tx_skb)
  358. dev_kfree_skb(card->dch.tx_skb);
  359. if (get_next_dframe(&card->dch))
  360. W6692_fill_Dfifo(card);
  361. }
  362. }
  363. static void
  364. handle_statusD(struct w6692_hw *card)
  365. {
  366. struct dchannel *dch = &card->dch;
  367. u8 exval, v1, cir;
  368. exval = ReadW6692(card, W_D_EXIR);
  369. pr_debug("%s: D_EXIR %02x\n", card->name, exval);
  370. if (exval & (W_D_EXI_XDUN | W_D_EXI_XCOL)) {
  371. /* Transmit underrun/collision */
  372. pr_debug("%s: D-channel underrun/collision\n", card->name);
  373. #ifdef ERROR_STATISTIC
  374. dch->err_tx++;
  375. #endif
  376. d_retransmit(card);
  377. }
  378. if (exval & W_D_EXI_RDOV) { /* RDOV */
  379. pr_debug("%s: D-channel RDOV\n", card->name);
  380. WriteW6692(card, W_D_CMDR, W_D_CMDR_RRST);
  381. }
  382. if (exval & W_D_EXI_TIN2) /* TIN2 - never */
  383. pr_debug("%s: spurious TIN2 interrupt\n", card->name);
  384. if (exval & W_D_EXI_MOC) { /* MOC - not supported */
  385. v1 = ReadW6692(card, W_MOSR);
  386. pr_debug("%s: spurious MOC interrupt MOSR %02x\n",
  387. card->name, v1);
  388. }
  389. if (exval & W_D_EXI_ISC) { /* ISC - Level1 change */
  390. cir = ReadW6692(card, W_CIR);
  391. pr_debug("%s: ISC CIR %02X\n", card->name, cir);
  392. if (cir & W_CIR_ICC) {
  393. v1 = cir & W_CIR_COD_MASK;
  394. pr_debug("%s: ph_state_change %x -> %x\n", card->name,
  395. dch->state, v1);
  396. card->state = v1;
  397. if (card->fmask & led) {
  398. switch (v1) {
  399. case W_L1IND_AI8:
  400. case W_L1IND_AI10:
  401. w6692_led_handler(card, 1);
  402. break;
  403. default:
  404. w6692_led_handler(card, 0);
  405. break;
  406. }
  407. }
  408. W6692_new_ph(card);
  409. }
  410. if (cir & W_CIR_SCC) {
  411. v1 = ReadW6692(card, W_SQR);
  412. pr_debug("%s: SCC SQR %02X\n", card->name, v1);
  413. }
  414. }
  415. if (exval & W_D_EXI_WEXP)
  416. pr_debug("%s: spurious WEXP interrupt!\n", card->name);
  417. if (exval & W_D_EXI_TEXP)
  418. pr_debug("%s: spurious TEXP interrupt!\n", card->name);
  419. }
  420. static void
  421. W6692_empty_Bfifo(struct w6692_ch *wch, int count)
  422. {
  423. struct w6692_hw *card = wch->bch.hw;
  424. u8 *ptr;
  425. int maxlen;
  426. pr_debug("%s: empty_Bfifo %d\n", card->name, count);
  427. if (unlikely(wch->bch.state == ISDN_P_NONE)) {
  428. pr_debug("%s: empty_Bfifo ISDN_P_NONE\n", card->name);
  429. WriteW6692B(wch, W_B_CMDR, W_B_CMDR_RACK | W_B_CMDR_RACT);
  430. if (wch->bch.rx_skb)
  431. skb_trim(wch->bch.rx_skb, 0);
  432. return;
  433. }
  434. if (test_bit(FLG_RX_OFF, &wch->bch.Flags)) {
  435. wch->bch.dropcnt += count;
  436. WriteW6692B(wch, W_B_CMDR, W_B_CMDR_RACK | W_B_CMDR_RACT);
  437. return;
  438. }
  439. maxlen = bchannel_get_rxbuf(&wch->bch, count);
  440. if (maxlen < 0) {
  441. WriteW6692B(wch, W_B_CMDR, W_B_CMDR_RACK | W_B_CMDR_RACT);
  442. if (wch->bch.rx_skb)
  443. skb_trim(wch->bch.rx_skb, 0);
  444. pr_warning("%s.B%d: No bufferspace for %d bytes\n",
  445. card->name, wch->bch.nr, count);
  446. return;
  447. }
  448. ptr = skb_put(wch->bch.rx_skb, count);
  449. insb(wch->addr + W_B_RFIFO, ptr, count);
  450. WriteW6692B(wch, W_B_CMDR, W_B_CMDR_RACK | W_B_CMDR_RACT);
  451. if (debug & DEBUG_HW_DFIFO) {
  452. snprintf(card->log, 63, "B%1d-recv %s %d ",
  453. wch->bch.nr, card->name, count);
  454. print_hex_dump_bytes(card->log, DUMP_PREFIX_OFFSET, ptr, count);
  455. }
  456. }
  457. static void
  458. W6692_fill_Bfifo(struct w6692_ch *wch)
  459. {
  460. struct w6692_hw *card = wch->bch.hw;
  461. int count, fillempty = 0;
  462. u8 *ptr, cmd = W_B_CMDR_RACT | W_B_CMDR_XMS;
  463. pr_debug("%s: fill Bfifo\n", card->name);
  464. if (!wch->bch.tx_skb) {
  465. if (!test_bit(FLG_TX_EMPTY, &wch->bch.Flags))
  466. return;
  467. ptr = wch->bch.fill;
  468. count = W_B_FIFO_THRESH;
  469. fillempty = 1;
  470. } else {
  471. count = wch->bch.tx_skb->len - wch->bch.tx_idx;
  472. if (count <= 0)
  473. return;
  474. ptr = wch->bch.tx_skb->data + wch->bch.tx_idx;
  475. }
  476. if (count > W_B_FIFO_THRESH)
  477. count = W_B_FIFO_THRESH;
  478. else if (test_bit(FLG_HDLC, &wch->bch.Flags))
  479. cmd |= W_B_CMDR_XME;
  480. pr_debug("%s: fill Bfifo%d/%d\n", card->name,
  481. count, wch->bch.tx_idx);
  482. wch->bch.tx_idx += count;
  483. if (fillempty) {
  484. while (count > 0) {
  485. outsb(wch->addr + W_B_XFIFO, ptr, MISDN_BCH_FILL_SIZE);
  486. count -= MISDN_BCH_FILL_SIZE;
  487. }
  488. } else {
  489. outsb(wch->addr + W_B_XFIFO, ptr, count);
  490. }
  491. WriteW6692B(wch, W_B_CMDR, cmd);
  492. if ((debug & DEBUG_HW_BFIFO) && !fillempty) {
  493. snprintf(card->log, 63, "B%1d-send %s %d ",
  494. wch->bch.nr, card->name, count);
  495. print_hex_dump_bytes(card->log, DUMP_PREFIX_OFFSET, ptr, count);
  496. }
  497. }
  498. #if 0
  499. static int
  500. setvolume(struct w6692_ch *wch, int mic, struct sk_buff *skb)
  501. {
  502. struct w6692_hw *card = wch->bch.hw;
  503. u16 *vol = (u16 *)skb->data;
  504. u8 val;
  505. if ((!(card->fmask & pots)) ||
  506. !test_bit(FLG_TRANSPARENT, &wch->bch.Flags))
  507. return -ENODEV;
  508. if (skb->len < 2)
  509. return -EINVAL;
  510. if (*vol > 7)
  511. return -EINVAL;
  512. val = *vol & 7;
  513. val = 7 - val;
  514. if (mic) {
  515. val <<= 3;
  516. card->xaddr &= 0xc7;
  517. } else {
  518. card->xaddr &= 0xf8;
  519. }
  520. card->xaddr |= val;
  521. WriteW6692(card, W_XADDR, card->xaddr);
  522. return 0;
  523. }
  524. static int
  525. enable_pots(struct w6692_ch *wch)
  526. {
  527. struct w6692_hw *card = wch->bch.hw;
  528. if ((!(card->fmask & pots)) ||
  529. !test_bit(FLG_TRANSPARENT, &wch->bch.Flags))
  530. return -ENODEV;
  531. wch->b_mode |= W_B_MODE_EPCM | W_B_MODE_BSW0;
  532. WriteW6692B(wch, W_B_MODE, wch->b_mode);
  533. WriteW6692B(wch, W_B_CMDR, W_B_CMDR_RRST | W_B_CMDR_XRST);
  534. card->pctl |= ((wch->bch.nr & 2) ? W_PCTL_PCX : 0);
  535. WriteW6692(card, W_PCTL, card->pctl);
  536. return 0;
  537. }
  538. #endif
  539. static int
  540. disable_pots(struct w6692_ch *wch)
  541. {
  542. struct w6692_hw *card = wch->bch.hw;
  543. if (!(card->fmask & pots))
  544. return -ENODEV;
  545. wch->b_mode &= ~(W_B_MODE_EPCM | W_B_MODE_BSW0);
  546. WriteW6692B(wch, W_B_MODE, wch->b_mode);
  547. WriteW6692B(wch, W_B_CMDR, W_B_CMDR_RRST | W_B_CMDR_RACT |
  548. W_B_CMDR_XRST);
  549. return 0;
  550. }
  551. static int
  552. w6692_mode(struct w6692_ch *wch, u32 pr)
  553. {
  554. struct w6692_hw *card;
  555. card = wch->bch.hw;
  556. pr_debug("%s: B%d protocol %x-->%x\n", card->name,
  557. wch->bch.nr, wch->bch.state, pr);
  558. switch (pr) {
  559. case ISDN_P_NONE:
  560. if ((card->fmask & pots) && (wch->b_mode & W_B_MODE_EPCM))
  561. disable_pots(wch);
  562. wch->b_mode = 0;
  563. mISDN_clear_bchannel(&wch->bch);
  564. WriteW6692B(wch, W_B_MODE, wch->b_mode);
  565. WriteW6692B(wch, W_B_CMDR, W_B_CMDR_RRST | W_B_CMDR_XRST);
  566. test_and_clear_bit(FLG_HDLC, &wch->bch.Flags);
  567. test_and_clear_bit(FLG_TRANSPARENT, &wch->bch.Flags);
  568. break;
  569. case ISDN_P_B_RAW:
  570. wch->b_mode = W_B_MODE_MMS;
  571. WriteW6692B(wch, W_B_MODE, wch->b_mode);
  572. WriteW6692B(wch, W_B_EXIM, 0);
  573. WriteW6692B(wch, W_B_CMDR, W_B_CMDR_RRST | W_B_CMDR_RACT |
  574. W_B_CMDR_XRST);
  575. test_and_set_bit(FLG_TRANSPARENT, &wch->bch.Flags);
  576. break;
  577. case ISDN_P_B_HDLC:
  578. wch->b_mode = W_B_MODE_ITF;
  579. WriteW6692B(wch, W_B_MODE, wch->b_mode);
  580. WriteW6692B(wch, W_B_ADM1, 0xff);
  581. WriteW6692B(wch, W_B_ADM2, 0xff);
  582. WriteW6692B(wch, W_B_EXIM, 0);
  583. WriteW6692B(wch, W_B_CMDR, W_B_CMDR_RRST | W_B_CMDR_RACT |
  584. W_B_CMDR_XRST);
  585. test_and_set_bit(FLG_HDLC, &wch->bch.Flags);
  586. break;
  587. default:
  588. pr_info("%s: protocol %x not known\n", card->name, pr);
  589. return -ENOPROTOOPT;
  590. }
  591. wch->bch.state = pr;
  592. return 0;
  593. }
  594. static void
  595. send_next(struct w6692_ch *wch)
  596. {
  597. if (wch->bch.tx_skb && wch->bch.tx_idx < wch->bch.tx_skb->len) {
  598. W6692_fill_Bfifo(wch);
  599. } else {
  600. if (wch->bch.tx_skb)
  601. dev_kfree_skb(wch->bch.tx_skb);
  602. if (get_next_bframe(&wch->bch)) {
  603. W6692_fill_Bfifo(wch);
  604. test_and_clear_bit(FLG_TX_EMPTY, &wch->bch.Flags);
  605. } else if (test_bit(FLG_TX_EMPTY, &wch->bch.Flags)) {
  606. W6692_fill_Bfifo(wch);
  607. }
  608. }
  609. }
  610. static void
  611. W6692B_interrupt(struct w6692_hw *card, int ch)
  612. {
  613. struct w6692_ch *wch = &card->bc[ch];
  614. int count;
  615. u8 stat, star = 0;
  616. stat = ReadW6692B(wch, W_B_EXIR);
  617. pr_debug("%s: B%d EXIR %02x\n", card->name, wch->bch.nr, stat);
  618. if (stat & W_B_EXI_RME) {
  619. star = ReadW6692B(wch, W_B_STAR);
  620. if (star & (W_B_STAR_RDOV | W_B_STAR_CRCE | W_B_STAR_RMB)) {
  621. if ((star & W_B_STAR_RDOV) &&
  622. test_bit(FLG_ACTIVE, &wch->bch.Flags)) {
  623. pr_debug("%s: B%d RDOV proto=%x\n", card->name,
  624. wch->bch.nr, wch->bch.state);
  625. #ifdef ERROR_STATISTIC
  626. wch->bch.err_rdo++;
  627. #endif
  628. }
  629. if (test_bit(FLG_HDLC, &wch->bch.Flags)) {
  630. if (star & W_B_STAR_CRCE) {
  631. pr_debug("%s: B%d CRC error\n",
  632. card->name, wch->bch.nr);
  633. #ifdef ERROR_STATISTIC
  634. wch->bch.err_crc++;
  635. #endif
  636. }
  637. if (star & W_B_STAR_RMB) {
  638. pr_debug("%s: B%d message abort\n",
  639. card->name, wch->bch.nr);
  640. #ifdef ERROR_STATISTIC
  641. wch->bch.err_inv++;
  642. #endif
  643. }
  644. }
  645. WriteW6692B(wch, W_B_CMDR, W_B_CMDR_RACK |
  646. W_B_CMDR_RRST | W_B_CMDR_RACT);
  647. if (wch->bch.rx_skb)
  648. skb_trim(wch->bch.rx_skb, 0);
  649. } else {
  650. count = ReadW6692B(wch, W_B_RBCL) &
  651. (W_B_FIFO_THRESH - 1);
  652. if (count == 0)
  653. count = W_B_FIFO_THRESH;
  654. W6692_empty_Bfifo(wch, count);
  655. recv_Bchannel(&wch->bch, 0, false);
  656. }
  657. }
  658. if (stat & W_B_EXI_RMR) {
  659. if (!(stat & W_B_EXI_RME))
  660. star = ReadW6692B(wch, W_B_STAR);
  661. if (star & W_B_STAR_RDOV) {
  662. pr_debug("%s: B%d RDOV proto=%x\n", card->name,
  663. wch->bch.nr, wch->bch.state);
  664. #ifdef ERROR_STATISTIC
  665. wch->bch.err_rdo++;
  666. #endif
  667. WriteW6692B(wch, W_B_CMDR, W_B_CMDR_RACK |
  668. W_B_CMDR_RRST | W_B_CMDR_RACT);
  669. } else {
  670. W6692_empty_Bfifo(wch, W_B_FIFO_THRESH);
  671. if (test_bit(FLG_TRANSPARENT, &wch->bch.Flags))
  672. recv_Bchannel(&wch->bch, 0, false);
  673. }
  674. }
  675. if (stat & W_B_EXI_RDOV) {
  676. /* only if it is not handled yet */
  677. if (!(star & W_B_STAR_RDOV)) {
  678. pr_debug("%s: B%d RDOV IRQ proto=%x\n", card->name,
  679. wch->bch.nr, wch->bch.state);
  680. #ifdef ERROR_STATISTIC
  681. wch->bch.err_rdo++;
  682. #endif
  683. WriteW6692B(wch, W_B_CMDR, W_B_CMDR_RACK |
  684. W_B_CMDR_RRST | W_B_CMDR_RACT);
  685. }
  686. }
  687. if (stat & W_B_EXI_XFR) {
  688. if (!(stat & (W_B_EXI_RME | W_B_EXI_RMR))) {
  689. star = ReadW6692B(wch, W_B_STAR);
  690. pr_debug("%s: B%d star %02x\n", card->name,
  691. wch->bch.nr, star);
  692. }
  693. if (star & W_B_STAR_XDOW) {
  694. pr_warning("%s: B%d XDOW proto=%x\n", card->name,
  695. wch->bch.nr, wch->bch.state);
  696. #ifdef ERROR_STATISTIC
  697. wch->bch.err_xdu++;
  698. #endif
  699. WriteW6692B(wch, W_B_CMDR, W_B_CMDR_XRST |
  700. W_B_CMDR_RACT);
  701. /* resend */
  702. if (wch->bch.tx_skb) {
  703. if (!test_bit(FLG_TRANSPARENT, &wch->bch.Flags))
  704. wch->bch.tx_idx = 0;
  705. }
  706. }
  707. send_next(wch);
  708. if (star & W_B_STAR_XDOW)
  709. return; /* handle XDOW only once */
  710. }
  711. if (stat & W_B_EXI_XDUN) {
  712. pr_warning("%s: B%d XDUN proto=%x\n", card->name,
  713. wch->bch.nr, wch->bch.state);
  714. #ifdef ERROR_STATISTIC
  715. wch->bch.err_xdu++;
  716. #endif
  717. /* resend - no XRST needed */
  718. if (wch->bch.tx_skb) {
  719. if (!test_bit(FLG_TRANSPARENT, &wch->bch.Flags))
  720. wch->bch.tx_idx = 0;
  721. } else if (test_bit(FLG_FILLEMPTY, &wch->bch.Flags)) {
  722. test_and_set_bit(FLG_TX_EMPTY, &wch->bch.Flags);
  723. }
  724. send_next(wch);
  725. }
  726. }
  727. static irqreturn_t
  728. w6692_irq(int intno, void *dev_id)
  729. {
  730. struct w6692_hw *card = dev_id;
  731. u8 ista;
  732. spin_lock(&card->lock);
  733. ista = ReadW6692(card, W_ISTA);
  734. if ((ista | card->imask) == card->imask) {
  735. /* possible a shared IRQ reqest */
  736. spin_unlock(&card->lock);
  737. return IRQ_NONE;
  738. }
  739. card->irqcnt++;
  740. pr_debug("%s: ista %02x\n", card->name, ista);
  741. ista &= ~card->imask;
  742. if (ista & W_INT_B1_EXI)
  743. W6692B_interrupt(card, 0);
  744. if (ista & W_INT_B2_EXI)
  745. W6692B_interrupt(card, 1);
  746. if (ista & W_INT_D_RME)
  747. handle_rxD(card);
  748. if (ista & W_INT_D_RMR)
  749. W6692_empty_Dfifo(card, W_D_FIFO_THRESH);
  750. if (ista & W_INT_D_XFR)
  751. handle_txD(card);
  752. if (ista & W_INT_D_EXI)
  753. handle_statusD(card);
  754. if (ista & (W_INT_XINT0 | W_INT_XINT1)) /* XINT0/1 - never */
  755. pr_debug("%s: W6692 spurious XINT!\n", card->name);
  756. /* End IRQ Handler */
  757. spin_unlock(&card->lock);
  758. return IRQ_HANDLED;
  759. }
  760. static void
  761. dbusy_timer_handler(struct timer_list *t)
  762. {
  763. struct dchannel *dch = from_timer(dch, t, timer);
  764. struct w6692_hw *card = dch->hw;
  765. int rbch, star;
  766. u_long flags;
  767. if (test_bit(FLG_BUSY_TIMER, &dch->Flags)) {
  768. spin_lock_irqsave(&card->lock, flags);
  769. rbch = ReadW6692(card, W_D_RBCH);
  770. star = ReadW6692(card, W_D_STAR);
  771. pr_debug("%s: D-Channel Busy RBCH %02x STAR %02x\n",
  772. card->name, rbch, star);
  773. if (star & W_D_STAR_XBZ) /* D-Channel Busy */
  774. test_and_set_bit(FLG_L1_BUSY, &dch->Flags);
  775. else {
  776. /* discard frame; reset transceiver */
  777. test_and_clear_bit(FLG_BUSY_TIMER, &dch->Flags);
  778. if (dch->tx_idx)
  779. dch->tx_idx = 0;
  780. else
  781. pr_info("%s: W6692 D-Channel Busy no tx_idx\n",
  782. card->name);
  783. /* Transmitter reset */
  784. WriteW6692(card, W_D_CMDR, W_D_CMDR_XRST);
  785. }
  786. spin_unlock_irqrestore(&card->lock, flags);
  787. }
  788. }
  789. static void initW6692(struct w6692_hw *card)
  790. {
  791. u8 val;
  792. timer_setup(&card->dch.timer, dbusy_timer_handler, 0);
  793. w6692_mode(&card->bc[0], ISDN_P_NONE);
  794. w6692_mode(&card->bc[1], ISDN_P_NONE);
  795. WriteW6692(card, W_D_CTL, 0x00);
  796. disable_hwirq(card);
  797. WriteW6692(card, W_D_SAM, 0xff);
  798. WriteW6692(card, W_D_TAM, 0xff);
  799. WriteW6692(card, W_D_MODE, W_D_MODE_RACT);
  800. card->state = W_L1CMD_RST;
  801. ph_command(card, W_L1CMD_RST);
  802. ph_command(card, W_L1CMD_ECK);
  803. /* enable all IRQ but extern */
  804. card->imask = 0x18;
  805. WriteW6692(card, W_D_EXIM, 0x00);
  806. WriteW6692B(&card->bc[0], W_B_EXIM, 0);
  807. WriteW6692B(&card->bc[1], W_B_EXIM, 0);
  808. /* Reset D-chan receiver and transmitter */
  809. WriteW6692(card, W_D_CMDR, W_D_CMDR_RRST | W_D_CMDR_XRST);
  810. /* Reset B-chan receiver and transmitter */
  811. WriteW6692B(&card->bc[0], W_B_CMDR, W_B_CMDR_RRST | W_B_CMDR_XRST);
  812. WriteW6692B(&card->bc[1], W_B_CMDR, W_B_CMDR_RRST | W_B_CMDR_XRST);
  813. /* enable peripheral */
  814. if (card->subtype == W6692_USR) {
  815. /* seems that USR implemented some power control features
  816. * Pin 79 is connected to the oscilator circuit so we
  817. * have to handle it here
  818. */
  819. card->pctl = 0x80;
  820. card->xdata = 0;
  821. WriteW6692(card, W_PCTL, card->pctl);
  822. WriteW6692(card, W_XDATA, card->xdata);
  823. } else {
  824. card->pctl = W_PCTL_OE5 | W_PCTL_OE4 | W_PCTL_OE2 |
  825. W_PCTL_OE1 | W_PCTL_OE0;
  826. card->xaddr = 0x00;/* all sw off */
  827. if (card->fmask & pots)
  828. card->xdata |= 0x06; /* POWER UP/ LED OFF / ALAW */
  829. if (card->fmask & led)
  830. card->xdata |= 0x04; /* LED OFF */
  831. if ((card->fmask & pots) || (card->fmask & led)) {
  832. WriteW6692(card, W_PCTL, card->pctl);
  833. WriteW6692(card, W_XADDR, card->xaddr);
  834. WriteW6692(card, W_XDATA, card->xdata);
  835. val = ReadW6692(card, W_XADDR);
  836. if (debug & DEBUG_HW)
  837. pr_notice("%s: W_XADDR=%02x\n",
  838. card->name, val);
  839. }
  840. }
  841. }
  842. static void
  843. reset_w6692(struct w6692_hw *card)
  844. {
  845. WriteW6692(card, W_D_CTL, W_D_CTL_SRST);
  846. mdelay(10);
  847. WriteW6692(card, W_D_CTL, 0);
  848. }
  849. static int
  850. init_card(struct w6692_hw *card)
  851. {
  852. int cnt = 3;
  853. u_long flags;
  854. spin_lock_irqsave(&card->lock, flags);
  855. disable_hwirq(card);
  856. spin_unlock_irqrestore(&card->lock, flags);
  857. if (request_irq(card->irq, w6692_irq, IRQF_SHARED, card->name, card)) {
  858. pr_info("%s: couldn't get interrupt %d\n", card->name,
  859. card->irq);
  860. return -EIO;
  861. }
  862. while (cnt--) {
  863. spin_lock_irqsave(&card->lock, flags);
  864. initW6692(card);
  865. enable_hwirq(card);
  866. spin_unlock_irqrestore(&card->lock, flags);
  867. /* Timeout 10ms */
  868. msleep_interruptible(10);
  869. if (debug & DEBUG_HW)
  870. pr_notice("%s: IRQ %d count %d\n", card->name,
  871. card->irq, card->irqcnt);
  872. if (!card->irqcnt) {
  873. pr_info("%s: IRQ(%d) getting no IRQs during init %d\n",
  874. card->name, card->irq, 3 - cnt);
  875. reset_w6692(card);
  876. } else
  877. return 0;
  878. }
  879. free_irq(card->irq, card);
  880. return -EIO;
  881. }
  882. static int
  883. w6692_l2l1B(struct mISDNchannel *ch, struct sk_buff *skb)
  884. {
  885. struct bchannel *bch = container_of(ch, struct bchannel, ch);
  886. struct w6692_ch *bc = container_of(bch, struct w6692_ch, bch);
  887. struct w6692_hw *card = bch->hw;
  888. int ret = -EINVAL;
  889. struct mISDNhead *hh = mISDN_HEAD_P(skb);
  890. unsigned long flags;
  891. switch (hh->prim) {
  892. case PH_DATA_REQ:
  893. spin_lock_irqsave(&card->lock, flags);
  894. ret = bchannel_senddata(bch, skb);
  895. if (ret > 0) { /* direct TX */
  896. ret = 0;
  897. W6692_fill_Bfifo(bc);
  898. }
  899. spin_unlock_irqrestore(&card->lock, flags);
  900. return ret;
  901. case PH_ACTIVATE_REQ:
  902. spin_lock_irqsave(&card->lock, flags);
  903. if (!test_and_set_bit(FLG_ACTIVE, &bch->Flags))
  904. ret = w6692_mode(bc, ch->protocol);
  905. else
  906. ret = 0;
  907. spin_unlock_irqrestore(&card->lock, flags);
  908. if (!ret)
  909. _queue_data(ch, PH_ACTIVATE_IND, MISDN_ID_ANY, 0,
  910. NULL, GFP_KERNEL);
  911. break;
  912. case PH_DEACTIVATE_REQ:
  913. spin_lock_irqsave(&card->lock, flags);
  914. mISDN_clear_bchannel(bch);
  915. w6692_mode(bc, ISDN_P_NONE);
  916. spin_unlock_irqrestore(&card->lock, flags);
  917. _queue_data(ch, PH_DEACTIVATE_IND, MISDN_ID_ANY, 0,
  918. NULL, GFP_KERNEL);
  919. ret = 0;
  920. break;
  921. default:
  922. pr_info("%s: %s unknown prim(%x,%x)\n",
  923. card->name, __func__, hh->prim, hh->id);
  924. ret = -EINVAL;
  925. }
  926. if (!ret)
  927. dev_kfree_skb(skb);
  928. return ret;
  929. }
  930. static int
  931. channel_bctrl(struct bchannel *bch, struct mISDN_ctrl_req *cq)
  932. {
  933. return mISDN_ctrl_bchannel(bch, cq);
  934. }
  935. static int
  936. open_bchannel(struct w6692_hw *card, struct channel_req *rq)
  937. {
  938. struct bchannel *bch;
  939. if (rq->adr.channel == 0 || rq->adr.channel > 2)
  940. return -EINVAL;
  941. if (rq->protocol == ISDN_P_NONE)
  942. return -EINVAL;
  943. bch = &card->bc[rq->adr.channel - 1].bch;
  944. if (test_and_set_bit(FLG_OPEN, &bch->Flags))
  945. return -EBUSY; /* b-channel can be only open once */
  946. bch->ch.protocol = rq->protocol;
  947. rq->ch = &bch->ch;
  948. return 0;
  949. }
  950. static int
  951. channel_ctrl(struct w6692_hw *card, struct mISDN_ctrl_req *cq)
  952. {
  953. int ret = 0;
  954. switch (cq->op) {
  955. case MISDN_CTRL_GETOP:
  956. cq->op = MISDN_CTRL_L1_TIMER3;
  957. break;
  958. case MISDN_CTRL_L1_TIMER3:
  959. ret = l1_event(card->dch.l1, HW_TIMER3_VALUE | (cq->p1 & 0xff));
  960. break;
  961. default:
  962. pr_info("%s: unknown CTRL OP %x\n", card->name, cq->op);
  963. ret = -EINVAL;
  964. break;
  965. }
  966. return ret;
  967. }
  968. static int
  969. w6692_bctrl(struct mISDNchannel *ch, u32 cmd, void *arg)
  970. {
  971. struct bchannel *bch = container_of(ch, struct bchannel, ch);
  972. struct w6692_ch *bc = container_of(bch, struct w6692_ch, bch);
  973. struct w6692_hw *card = bch->hw;
  974. int ret = -EINVAL;
  975. u_long flags;
  976. pr_debug("%s: %s cmd:%x %p\n", card->name, __func__, cmd, arg);
  977. switch (cmd) {
  978. case CLOSE_CHANNEL:
  979. test_and_clear_bit(FLG_OPEN, &bch->Flags);
  980. cancel_work_sync(&bch->workq);
  981. spin_lock_irqsave(&card->lock, flags);
  982. mISDN_clear_bchannel(bch);
  983. w6692_mode(bc, ISDN_P_NONE);
  984. spin_unlock_irqrestore(&card->lock, flags);
  985. ch->protocol = ISDN_P_NONE;
  986. ch->peer = NULL;
  987. module_put(THIS_MODULE);
  988. ret = 0;
  989. break;
  990. case CONTROL_CHANNEL:
  991. ret = channel_bctrl(bch, arg);
  992. break;
  993. default:
  994. pr_info("%s: %s unknown prim(%x)\n",
  995. card->name, __func__, cmd);
  996. }
  997. return ret;
  998. }
  999. static int
  1000. w6692_l2l1D(struct mISDNchannel *ch, struct sk_buff *skb)
  1001. {
  1002. struct mISDNdevice *dev = container_of(ch, struct mISDNdevice, D);
  1003. struct dchannel *dch = container_of(dev, struct dchannel, dev);
  1004. struct w6692_hw *card = container_of(dch, struct w6692_hw, dch);
  1005. int ret = -EINVAL;
  1006. struct mISDNhead *hh = mISDN_HEAD_P(skb);
  1007. u32 id;
  1008. u_long flags;
  1009. switch (hh->prim) {
  1010. case PH_DATA_REQ:
  1011. spin_lock_irqsave(&card->lock, flags);
  1012. ret = dchannel_senddata(dch, skb);
  1013. if (ret > 0) { /* direct TX */
  1014. id = hh->id; /* skb can be freed */
  1015. W6692_fill_Dfifo(card);
  1016. ret = 0;
  1017. spin_unlock_irqrestore(&card->lock, flags);
  1018. queue_ch_frame(ch, PH_DATA_CNF, id, NULL);
  1019. } else
  1020. spin_unlock_irqrestore(&card->lock, flags);
  1021. return ret;
  1022. case PH_ACTIVATE_REQ:
  1023. ret = l1_event(dch->l1, hh->prim);
  1024. break;
  1025. case PH_DEACTIVATE_REQ:
  1026. test_and_clear_bit(FLG_L2_ACTIVATED, &dch->Flags);
  1027. ret = l1_event(dch->l1, hh->prim);
  1028. break;
  1029. }
  1030. if (!ret)
  1031. dev_kfree_skb(skb);
  1032. return ret;
  1033. }
  1034. static int
  1035. w6692_l1callback(struct dchannel *dch, u32 cmd)
  1036. {
  1037. struct w6692_hw *card = container_of(dch, struct w6692_hw, dch);
  1038. u_long flags;
  1039. pr_debug("%s: cmd(%x) state(%02x)\n", card->name, cmd, card->state);
  1040. switch (cmd) {
  1041. case INFO3_P8:
  1042. spin_lock_irqsave(&card->lock, flags);
  1043. ph_command(card, W_L1CMD_AR8);
  1044. spin_unlock_irqrestore(&card->lock, flags);
  1045. break;
  1046. case INFO3_P10:
  1047. spin_lock_irqsave(&card->lock, flags);
  1048. ph_command(card, W_L1CMD_AR10);
  1049. spin_unlock_irqrestore(&card->lock, flags);
  1050. break;
  1051. case HW_RESET_REQ:
  1052. spin_lock_irqsave(&card->lock, flags);
  1053. if (card->state != W_L1IND_DRD)
  1054. ph_command(card, W_L1CMD_RST);
  1055. ph_command(card, W_L1CMD_ECK);
  1056. spin_unlock_irqrestore(&card->lock, flags);
  1057. break;
  1058. case HW_DEACT_REQ:
  1059. skb_queue_purge(&dch->squeue);
  1060. if (dch->tx_skb) {
  1061. dev_kfree_skb(dch->tx_skb);
  1062. dch->tx_skb = NULL;
  1063. }
  1064. dch->tx_idx = 0;
  1065. if (dch->rx_skb) {
  1066. dev_kfree_skb(dch->rx_skb);
  1067. dch->rx_skb = NULL;
  1068. }
  1069. test_and_clear_bit(FLG_TX_BUSY, &dch->Flags);
  1070. if (test_and_clear_bit(FLG_BUSY_TIMER, &dch->Flags))
  1071. del_timer(&dch->timer);
  1072. break;
  1073. case HW_POWERUP_REQ:
  1074. spin_lock_irqsave(&card->lock, flags);
  1075. ph_command(card, W_L1CMD_ECK);
  1076. spin_unlock_irqrestore(&card->lock, flags);
  1077. break;
  1078. case PH_ACTIVATE_IND:
  1079. test_and_set_bit(FLG_ACTIVE, &dch->Flags);
  1080. _queue_data(&dch->dev.D, cmd, MISDN_ID_ANY, 0, NULL,
  1081. GFP_ATOMIC);
  1082. break;
  1083. case PH_DEACTIVATE_IND:
  1084. test_and_clear_bit(FLG_ACTIVE, &dch->Flags);
  1085. _queue_data(&dch->dev.D, cmd, MISDN_ID_ANY, 0, NULL,
  1086. GFP_ATOMIC);
  1087. break;
  1088. default:
  1089. pr_debug("%s: %s unknown command %x\n", card->name,
  1090. __func__, cmd);
  1091. return -1;
  1092. }
  1093. return 0;
  1094. }
  1095. static int
  1096. open_dchannel(struct w6692_hw *card, struct channel_req *rq, void *caller)
  1097. {
  1098. pr_debug("%s: %s dev(%d) open from %p\n", card->name, __func__,
  1099. card->dch.dev.id, caller);
  1100. if (rq->protocol != ISDN_P_TE_S0)
  1101. return -EINVAL;
  1102. if (rq->adr.channel == 1)
  1103. /* E-Channel not supported */
  1104. return -EINVAL;
  1105. rq->ch = &card->dch.dev.D;
  1106. rq->ch->protocol = rq->protocol;
  1107. if (card->dch.state == 7)
  1108. _queue_data(rq->ch, PH_ACTIVATE_IND, MISDN_ID_ANY,
  1109. 0, NULL, GFP_KERNEL);
  1110. return 0;
  1111. }
  1112. static int
  1113. w6692_dctrl(struct mISDNchannel *ch, u32 cmd, void *arg)
  1114. {
  1115. struct mISDNdevice *dev = container_of(ch, struct mISDNdevice, D);
  1116. struct dchannel *dch = container_of(dev, struct dchannel, dev);
  1117. struct w6692_hw *card = container_of(dch, struct w6692_hw, dch);
  1118. struct channel_req *rq;
  1119. int err = 0;
  1120. pr_debug("%s: DCTRL: %x %p\n", card->name, cmd, arg);
  1121. switch (cmd) {
  1122. case OPEN_CHANNEL:
  1123. rq = arg;
  1124. if (rq->protocol == ISDN_P_TE_S0)
  1125. err = open_dchannel(card, rq, __builtin_return_address(0));
  1126. else
  1127. err = open_bchannel(card, rq);
  1128. if (err)
  1129. break;
  1130. if (!try_module_get(THIS_MODULE))
  1131. pr_info("%s: cannot get module\n", card->name);
  1132. break;
  1133. case CLOSE_CHANNEL:
  1134. pr_debug("%s: dev(%d) close from %p\n", card->name,
  1135. dch->dev.id, __builtin_return_address(0));
  1136. module_put(THIS_MODULE);
  1137. break;
  1138. case CONTROL_CHANNEL:
  1139. err = channel_ctrl(card, arg);
  1140. break;
  1141. default:
  1142. pr_debug("%s: unknown DCTRL command %x\n", card->name, cmd);
  1143. return -EINVAL;
  1144. }
  1145. return err;
  1146. }
  1147. static int
  1148. setup_w6692(struct w6692_hw *card)
  1149. {
  1150. u32 val;
  1151. if (!request_region(card->addr, 256, card->name)) {
  1152. pr_info("%s: config port %x-%x already in use\n", card->name,
  1153. card->addr, card->addr + 255);
  1154. return -EIO;
  1155. }
  1156. W6692Version(card);
  1157. card->bc[0].addr = card->addr;
  1158. card->bc[1].addr = card->addr + 0x40;
  1159. val = ReadW6692(card, W_ISTA);
  1160. if (debug & DEBUG_HW)
  1161. pr_notice("%s ISTA=%02x\n", card->name, val);
  1162. val = ReadW6692(card, W_IMASK);
  1163. if (debug & DEBUG_HW)
  1164. pr_notice("%s IMASK=%02x\n", card->name, val);
  1165. val = ReadW6692(card, W_D_EXIR);
  1166. if (debug & DEBUG_HW)
  1167. pr_notice("%s D_EXIR=%02x\n", card->name, val);
  1168. val = ReadW6692(card, W_D_EXIM);
  1169. if (debug & DEBUG_HW)
  1170. pr_notice("%s D_EXIM=%02x\n", card->name, val);
  1171. val = ReadW6692(card, W_D_RSTA);
  1172. if (debug & DEBUG_HW)
  1173. pr_notice("%s D_RSTA=%02x\n", card->name, val);
  1174. return 0;
  1175. }
  1176. static void
  1177. release_card(struct w6692_hw *card)
  1178. {
  1179. u_long flags;
  1180. spin_lock_irqsave(&card->lock, flags);
  1181. disable_hwirq(card);
  1182. w6692_mode(&card->bc[0], ISDN_P_NONE);
  1183. w6692_mode(&card->bc[1], ISDN_P_NONE);
  1184. if ((card->fmask & led) || card->subtype == W6692_USR) {
  1185. card->xdata |= 0x04; /* LED OFF */
  1186. WriteW6692(card, W_XDATA, card->xdata);
  1187. }
  1188. spin_unlock_irqrestore(&card->lock, flags);
  1189. free_irq(card->irq, card);
  1190. l1_event(card->dch.l1, CLOSE_CHANNEL);
  1191. mISDN_unregister_device(&card->dch.dev);
  1192. release_region(card->addr, 256);
  1193. mISDN_freebchannel(&card->bc[1].bch);
  1194. mISDN_freebchannel(&card->bc[0].bch);
  1195. mISDN_freedchannel(&card->dch);
  1196. write_lock_irqsave(&card_lock, flags);
  1197. list_del(&card->list);
  1198. write_unlock_irqrestore(&card_lock, flags);
  1199. pci_disable_device(card->pdev);
  1200. pci_set_drvdata(card->pdev, NULL);
  1201. kfree(card);
  1202. }
  1203. static int
  1204. setup_instance(struct w6692_hw *card)
  1205. {
  1206. int i, err;
  1207. u_long flags;
  1208. snprintf(card->name, MISDN_MAX_IDLEN - 1, "w6692.%d", w6692_cnt + 1);
  1209. write_lock_irqsave(&card_lock, flags);
  1210. list_add_tail(&card->list, &Cards);
  1211. write_unlock_irqrestore(&card_lock, flags);
  1212. card->fmask = (1 << w6692_cnt);
  1213. _set_debug(card);
  1214. spin_lock_init(&card->lock);
  1215. mISDN_initdchannel(&card->dch, MAX_DFRAME_LEN_L1, W6692_ph_bh);
  1216. card->dch.dev.Dprotocols = (1 << ISDN_P_TE_S0);
  1217. card->dch.dev.D.send = w6692_l2l1D;
  1218. card->dch.dev.D.ctrl = w6692_dctrl;
  1219. card->dch.dev.Bprotocols = (1 << (ISDN_P_B_RAW & ISDN_P_B_MASK)) |
  1220. (1 << (ISDN_P_B_HDLC & ISDN_P_B_MASK));
  1221. card->dch.hw = card;
  1222. card->dch.dev.nrbchan = 2;
  1223. for (i = 0; i < 2; i++) {
  1224. mISDN_initbchannel(&card->bc[i].bch, MAX_DATA_MEM,
  1225. W_B_FIFO_THRESH);
  1226. card->bc[i].bch.hw = card;
  1227. card->bc[i].bch.nr = i + 1;
  1228. card->bc[i].bch.ch.nr = i + 1;
  1229. card->bc[i].bch.ch.send = w6692_l2l1B;
  1230. card->bc[i].bch.ch.ctrl = w6692_bctrl;
  1231. set_channelmap(i + 1, card->dch.dev.channelmap);
  1232. list_add(&card->bc[i].bch.ch.list, &card->dch.dev.bchannels);
  1233. }
  1234. err = setup_w6692(card);
  1235. if (err)
  1236. goto error_setup;
  1237. err = mISDN_register_device(&card->dch.dev, &card->pdev->dev,
  1238. card->name);
  1239. if (err)
  1240. goto error_reg;
  1241. err = init_card(card);
  1242. if (err)
  1243. goto error_init;
  1244. err = create_l1(&card->dch, w6692_l1callback);
  1245. if (!err) {
  1246. w6692_cnt++;
  1247. pr_notice("W6692 %d cards installed\n", w6692_cnt);
  1248. return 0;
  1249. }
  1250. free_irq(card->irq, card);
  1251. error_init:
  1252. mISDN_unregister_device(&card->dch.dev);
  1253. error_reg:
  1254. release_region(card->addr, 256);
  1255. error_setup:
  1256. mISDN_freebchannel(&card->bc[1].bch);
  1257. mISDN_freebchannel(&card->bc[0].bch);
  1258. mISDN_freedchannel(&card->dch);
  1259. write_lock_irqsave(&card_lock, flags);
  1260. list_del(&card->list);
  1261. write_unlock_irqrestore(&card_lock, flags);
  1262. kfree(card);
  1263. return err;
  1264. }
  1265. static int
  1266. w6692_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
  1267. {
  1268. int err = -ENOMEM;
  1269. struct w6692_hw *card;
  1270. struct w6692map *m = (struct w6692map *)ent->driver_data;
  1271. card = kzalloc(sizeof(struct w6692_hw), GFP_KERNEL);
  1272. if (!card) {
  1273. pr_info("No kmem for w6692 card\n");
  1274. return err;
  1275. }
  1276. card->pdev = pdev;
  1277. card->subtype = m->subtype;
  1278. err = pci_enable_device(pdev);
  1279. if (err) {
  1280. kfree(card);
  1281. return err;
  1282. }
  1283. printk(KERN_INFO "mISDN_w6692: found adapter %s at %s\n",
  1284. m->name, pci_name(pdev));
  1285. card->addr = pci_resource_start(pdev, 1);
  1286. card->irq = pdev->irq;
  1287. pci_set_drvdata(pdev, card);
  1288. err = setup_instance(card);
  1289. if (err)
  1290. pci_set_drvdata(pdev, NULL);
  1291. return err;
  1292. }
  1293. static void
  1294. w6692_remove_pci(struct pci_dev *pdev)
  1295. {
  1296. struct w6692_hw *card = pci_get_drvdata(pdev);
  1297. if (card)
  1298. release_card(card);
  1299. else
  1300. if (debug)
  1301. pr_notice("%s: drvdata already removed\n", __func__);
  1302. }
  1303. static const struct pci_device_id w6692_ids[] = {
  1304. { PCI_VENDOR_ID_DYNALINK, PCI_DEVICE_ID_DYNALINK_IS64PH,
  1305. PCI_ANY_ID, PCI_ANY_ID, 0, 0, (ulong)&w6692_map[0]},
  1306. { PCI_VENDOR_ID_WINBOND2, PCI_DEVICE_ID_WINBOND2_6692,
  1307. PCI_VENDOR_ID_USR, PCI_DEVICE_ID_USR_6692, 0, 0,
  1308. (ulong)&w6692_map[2]},
  1309. { PCI_VENDOR_ID_WINBOND2, PCI_DEVICE_ID_WINBOND2_6692,
  1310. PCI_ANY_ID, PCI_ANY_ID, 0, 0, (ulong)&w6692_map[1]},
  1311. { }
  1312. };
  1313. MODULE_DEVICE_TABLE(pci, w6692_ids);
  1314. static struct pci_driver w6692_driver = {
  1315. .name = "w6692",
  1316. .probe = w6692_probe,
  1317. .remove = w6692_remove_pci,
  1318. .id_table = w6692_ids,
  1319. };
  1320. static int __init w6692_init(void)
  1321. {
  1322. int err;
  1323. pr_notice("Winbond W6692 PCI driver Rev. %s\n", W6692_REV);
  1324. err = pci_register_driver(&w6692_driver);
  1325. return err;
  1326. }
  1327. static void __exit w6692_cleanup(void)
  1328. {
  1329. pci_unregister_driver(&w6692_driver);
  1330. }
  1331. module_init(w6692_init);
  1332. module_exit(w6692_cleanup);