nes.c 31 KB

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  1. /*
  2. * Copyright (c) 2006 - 2011 Intel Corporation. All rights reserved.
  3. * Copyright (c) 2005 Open Grid Computing, Inc. All rights reserved.
  4. *
  5. * This software is available to you under a choice of one of two
  6. * licenses. You may choose to be licensed under the terms of the GNU
  7. * General Public License (GPL) Version 2, available from the file
  8. * COPYING in the main directory of this source tree, or the
  9. * OpenIB.org BSD license below:
  10. *
  11. * Redistribution and use in source and binary forms, with or
  12. * without modification, are permitted provided that the following
  13. * conditions are met:
  14. *
  15. * - Redistributions of source code must retain the above
  16. * copyright notice, this list of conditions and the following
  17. * disclaimer.
  18. *
  19. * - Redistributions in binary form must reproduce the above
  20. * copyright notice, this list of conditions and the following
  21. * disclaimer in the documentation and/or other materials
  22. * provided with the distribution.
  23. *
  24. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  25. * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  26. * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  27. * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  28. * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  29. * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  30. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  31. * SOFTWARE.
  32. */
  33. #include <linux/module.h>
  34. #include <linux/moduleparam.h>
  35. #include <linux/netdevice.h>
  36. #include <linux/etherdevice.h>
  37. #include <linux/ethtool.h>
  38. #include <linux/mii.h>
  39. #include <linux/if_vlan.h>
  40. #include <linux/crc32.h>
  41. #include <linux/in.h>
  42. #include <linux/fs.h>
  43. #include <linux/init.h>
  44. #include <linux/if_arp.h>
  45. #include <linux/highmem.h>
  46. #include <linux/slab.h>
  47. #include <asm/io.h>
  48. #include <asm/irq.h>
  49. #include <asm/byteorder.h>
  50. #include <rdma/ib_smi.h>
  51. #include <rdma/ib_verbs.h>
  52. #include <rdma/ib_pack.h>
  53. #include <rdma/iw_cm.h>
  54. #include "nes.h"
  55. #include <net/netevent.h>
  56. #include <net/neighbour.h>
  57. #include <linux/route.h>
  58. #include <net/ip_fib.h>
  59. MODULE_AUTHOR("NetEffect");
  60. MODULE_DESCRIPTION("NetEffect RNIC Low-level iWARP Driver");
  61. MODULE_LICENSE("Dual BSD/GPL");
  62. int interrupt_mod_interval = 0;
  63. /* Interoperability */
  64. int mpa_version = 1;
  65. module_param(mpa_version, int, 0644);
  66. MODULE_PARM_DESC(mpa_version, "MPA version to be used int MPA Req/Resp (0 or 1)");
  67. /* Interoperability */
  68. int disable_mpa_crc = 0;
  69. module_param(disable_mpa_crc, int, 0644);
  70. MODULE_PARM_DESC(disable_mpa_crc, "Disable checking of MPA CRC");
  71. unsigned int nes_drv_opt = NES_DRV_OPT_DISABLE_INT_MOD | NES_DRV_OPT_ENABLE_PAU;
  72. module_param(nes_drv_opt, int, 0644);
  73. MODULE_PARM_DESC(nes_drv_opt, "Driver option parameters");
  74. unsigned int nes_debug_level = 0;
  75. module_param_named(debug_level, nes_debug_level, uint, 0644);
  76. MODULE_PARM_DESC(debug_level, "Enable debug output level");
  77. unsigned int wqm_quanta = 0x10000;
  78. module_param(wqm_quanta, int, 0644);
  79. MODULE_PARM_DESC(wqm_quanta, "WQM quanta");
  80. static bool limit_maxrdreqsz;
  81. module_param(limit_maxrdreqsz, bool, 0644);
  82. MODULE_PARM_DESC(limit_maxrdreqsz, "Limit max read request size to 256 Bytes");
  83. LIST_HEAD(nes_adapter_list);
  84. static LIST_HEAD(nes_dev_list);
  85. atomic_t qps_destroyed;
  86. static unsigned int ee_flsh_adapter;
  87. static unsigned int sysfs_nonidx_addr;
  88. static unsigned int sysfs_idx_addr;
  89. static const struct pci_device_id nes_pci_table[] = {
  90. { PCI_VDEVICE(NETEFFECT, PCI_DEVICE_ID_NETEFFECT_NE020), },
  91. { PCI_VDEVICE(NETEFFECT, PCI_DEVICE_ID_NETEFFECT_NE020_KR), },
  92. {0}
  93. };
  94. MODULE_DEVICE_TABLE(pci, nes_pci_table);
  95. static int nes_inetaddr_event(struct notifier_block *, unsigned long, void *);
  96. static int nes_net_event(struct notifier_block *, unsigned long, void *);
  97. static int nes_notifiers_registered;
  98. static struct notifier_block nes_inetaddr_notifier = {
  99. .notifier_call = nes_inetaddr_event
  100. };
  101. static struct notifier_block nes_net_notifier = {
  102. .notifier_call = nes_net_event
  103. };
  104. /**
  105. * nes_inetaddr_event
  106. */
  107. static int nes_inetaddr_event(struct notifier_block *notifier,
  108. unsigned long event, void *ptr)
  109. {
  110. struct in_ifaddr *ifa = ptr;
  111. struct net_device *event_netdev = ifa->ifa_dev->dev;
  112. struct nes_device *nesdev;
  113. struct net_device *netdev;
  114. struct net_device *upper_dev;
  115. struct nes_vnic *nesvnic;
  116. unsigned int is_bonded;
  117. nes_debug(NES_DBG_NETDEV, "nes_inetaddr_event: ip address %pI4, netmask %pI4.\n",
  118. &ifa->ifa_address, &ifa->ifa_mask);
  119. list_for_each_entry(nesdev, &nes_dev_list, list) {
  120. nes_debug(NES_DBG_NETDEV, "Nesdev list entry = 0x%p. (%s)\n",
  121. nesdev, nesdev->netdev[0]->name);
  122. netdev = nesdev->netdev[0];
  123. nesvnic = netdev_priv(netdev);
  124. upper_dev = netdev_master_upper_dev_get(netdev);
  125. is_bonded = netif_is_bond_slave(netdev) &&
  126. (upper_dev == event_netdev);
  127. if ((netdev == event_netdev) || is_bonded) {
  128. if (nesvnic->rdma_enabled == 0) {
  129. nes_debug(NES_DBG_NETDEV, "Returning without processing event for %s since"
  130. " RDMA is not enabled.\n",
  131. netdev->name);
  132. return NOTIFY_OK;
  133. }
  134. /* we have ifa->ifa_address/mask here if we need it */
  135. switch (event) {
  136. case NETDEV_DOWN:
  137. nes_debug(NES_DBG_NETDEV, "event:DOWN\n");
  138. nes_write_indexed(nesdev,
  139. NES_IDX_DST_IP_ADDR+(0x10*PCI_FUNC(nesdev->pcidev->devfn)), 0);
  140. nes_manage_arp_cache(netdev, netdev->dev_addr,
  141. ntohl(nesvnic->local_ipaddr), NES_ARP_DELETE);
  142. nesvnic->local_ipaddr = 0;
  143. if (is_bonded)
  144. continue;
  145. else
  146. return NOTIFY_OK;
  147. break;
  148. case NETDEV_UP:
  149. nes_debug(NES_DBG_NETDEV, "event:UP\n");
  150. if (nesvnic->local_ipaddr != 0) {
  151. nes_debug(NES_DBG_NETDEV, "Interface already has local_ipaddr\n");
  152. return NOTIFY_OK;
  153. }
  154. /* fall through */
  155. case NETDEV_CHANGEADDR:
  156. /* Add the address to the IP table */
  157. if (upper_dev) {
  158. struct in_device *in;
  159. rcu_read_lock();
  160. in = __in_dev_get_rcu(upper_dev);
  161. nesvnic->local_ipaddr = in->ifa_list->ifa_address;
  162. rcu_read_unlock();
  163. } else {
  164. nesvnic->local_ipaddr = ifa->ifa_address;
  165. }
  166. nes_write_indexed(nesdev,
  167. NES_IDX_DST_IP_ADDR+(0x10*PCI_FUNC(nesdev->pcidev->devfn)),
  168. ntohl(nesvnic->local_ipaddr));
  169. nes_manage_arp_cache(netdev, netdev->dev_addr,
  170. ntohl(nesvnic->local_ipaddr), NES_ARP_ADD);
  171. if (is_bonded)
  172. continue;
  173. else
  174. return NOTIFY_OK;
  175. break;
  176. default:
  177. break;
  178. }
  179. }
  180. }
  181. return NOTIFY_DONE;
  182. }
  183. /**
  184. * nes_net_event
  185. */
  186. static int nes_net_event(struct notifier_block *notifier,
  187. unsigned long event, void *ptr)
  188. {
  189. struct neighbour *neigh = ptr;
  190. struct nes_device *nesdev;
  191. struct net_device *netdev;
  192. struct nes_vnic *nesvnic;
  193. switch (event) {
  194. case NETEVENT_NEIGH_UPDATE:
  195. list_for_each_entry(nesdev, &nes_dev_list, list) {
  196. /* nes_debug(NES_DBG_NETDEV, "Nesdev list entry = 0x%p.\n", nesdev); */
  197. netdev = nesdev->netdev[0];
  198. nesvnic = netdev_priv(netdev);
  199. if (netdev == neigh->dev) {
  200. if (nesvnic->rdma_enabled == 0) {
  201. nes_debug(NES_DBG_NETDEV, "Skipping device %s since no RDMA\n",
  202. netdev->name);
  203. } else {
  204. if (neigh->nud_state & NUD_VALID) {
  205. nes_manage_arp_cache(neigh->dev, neigh->ha,
  206. ntohl(*(__be32 *)neigh->primary_key), NES_ARP_ADD);
  207. } else {
  208. nes_manage_arp_cache(neigh->dev, neigh->ha,
  209. ntohl(*(__be32 *)neigh->primary_key), NES_ARP_DELETE);
  210. }
  211. }
  212. return NOTIFY_OK;
  213. }
  214. }
  215. break;
  216. default:
  217. nes_debug(NES_DBG_NETDEV, "NETEVENT_ %lu undefined\n", event);
  218. break;
  219. }
  220. return NOTIFY_DONE;
  221. }
  222. /**
  223. * nes_add_ref
  224. */
  225. void nes_add_ref(struct ib_qp *ibqp)
  226. {
  227. struct nes_qp *nesqp;
  228. nesqp = to_nesqp(ibqp);
  229. nes_debug(NES_DBG_QP, "Bumping refcount for QP%u. Pre-inc value = %u\n",
  230. ibqp->qp_num, atomic_read(&nesqp->refcount));
  231. atomic_inc(&nesqp->refcount);
  232. }
  233. static void nes_cqp_rem_ref_callback(struct nes_device *nesdev, struct nes_cqp_request *cqp_request)
  234. {
  235. unsigned long flags;
  236. struct nes_qp *nesqp = cqp_request->cqp_callback_pointer;
  237. struct nes_adapter *nesadapter = nesdev->nesadapter;
  238. atomic_inc(&qps_destroyed);
  239. /* Free the control structures */
  240. if (nesqp->pbl_vbase) {
  241. pci_free_consistent(nesdev->pcidev, nesqp->qp_mem_size,
  242. nesqp->hwqp.q2_vbase, nesqp->hwqp.q2_pbase);
  243. spin_lock_irqsave(&nesadapter->pbl_lock, flags);
  244. nesadapter->free_256pbl++;
  245. spin_unlock_irqrestore(&nesadapter->pbl_lock, flags);
  246. pci_free_consistent(nesdev->pcidev, 256, nesqp->pbl_vbase, nesqp->pbl_pbase);
  247. nesqp->pbl_vbase = NULL;
  248. } else {
  249. pci_free_consistent(nesdev->pcidev, nesqp->qp_mem_size,
  250. nesqp->hwqp.sq_vbase, nesqp->hwqp.sq_pbase);
  251. }
  252. nes_free_resource(nesadapter, nesadapter->allocated_qps, nesqp->hwqp.qp_id);
  253. nesadapter->qp_table[nesqp->hwqp.qp_id-NES_FIRST_QPN] = NULL;
  254. kfree(nesqp->allocated_buffer);
  255. }
  256. /**
  257. * nes_rem_ref
  258. */
  259. void nes_rem_ref(struct ib_qp *ibqp)
  260. {
  261. u64 u64temp;
  262. struct nes_qp *nesqp;
  263. struct nes_vnic *nesvnic = to_nesvnic(ibqp->device);
  264. struct nes_device *nesdev = nesvnic->nesdev;
  265. struct nes_hw_cqp_wqe *cqp_wqe;
  266. struct nes_cqp_request *cqp_request;
  267. u32 opcode;
  268. nesqp = to_nesqp(ibqp);
  269. if (atomic_read(&nesqp->refcount) == 0) {
  270. printk(KERN_INFO PFX "%s: Reference count already 0 for QP%d, last aeq = 0x%04X.\n",
  271. __func__, ibqp->qp_num, nesqp->last_aeq);
  272. BUG();
  273. }
  274. if (atomic_dec_and_test(&nesqp->refcount)) {
  275. if (nesqp->pau_mode)
  276. nes_destroy_pau_qp(nesdev, nesqp);
  277. /* Destroy the QP */
  278. cqp_request = nes_get_cqp_request(nesdev);
  279. if (cqp_request == NULL) {
  280. nes_debug(NES_DBG_QP, "Failed to get a cqp_request.\n");
  281. return;
  282. }
  283. cqp_request->waiting = 0;
  284. cqp_request->callback = 1;
  285. cqp_request->cqp_callback = nes_cqp_rem_ref_callback;
  286. cqp_request->cqp_callback_pointer = nesqp;
  287. cqp_wqe = &cqp_request->cqp_wqe;
  288. nes_fill_init_cqp_wqe(cqp_wqe, nesdev);
  289. opcode = NES_CQP_DESTROY_QP | NES_CQP_QP_TYPE_IWARP;
  290. if (nesqp->hte_added) {
  291. opcode |= NES_CQP_QP_DEL_HTE;
  292. nesqp->hte_added = 0;
  293. }
  294. set_wqe_32bit_value(cqp_wqe->wqe_words, NES_CQP_WQE_OPCODE_IDX, opcode);
  295. set_wqe_32bit_value(cqp_wqe->wqe_words, NES_CQP_WQE_ID_IDX, nesqp->hwqp.qp_id);
  296. u64temp = (u64)nesqp->nesqp_context_pbase;
  297. set_wqe_64bit_value(cqp_wqe->wqe_words, NES_CQP_QP_WQE_CONTEXT_LOW_IDX, u64temp);
  298. nes_post_cqp_request(nesdev, cqp_request);
  299. }
  300. }
  301. /**
  302. * nes_get_qp
  303. */
  304. struct ib_qp *nes_get_qp(struct ib_device *device, int qpn)
  305. {
  306. struct nes_vnic *nesvnic = to_nesvnic(device);
  307. struct nes_device *nesdev = nesvnic->nesdev;
  308. struct nes_adapter *nesadapter = nesdev->nesadapter;
  309. if ((qpn < NES_FIRST_QPN) || (qpn >= (NES_FIRST_QPN + nesadapter->max_qp)))
  310. return NULL;
  311. return &nesadapter->qp_table[qpn - NES_FIRST_QPN]->ibqp;
  312. }
  313. /**
  314. * nes_print_macaddr
  315. */
  316. static void nes_print_macaddr(struct net_device *netdev)
  317. {
  318. nes_debug(NES_DBG_INIT, "%s: %pM, IRQ %u\n",
  319. netdev->name, netdev->dev_addr, netdev->irq);
  320. }
  321. /**
  322. * nes_interrupt - handle interrupts
  323. */
  324. static irqreturn_t nes_interrupt(int irq, void *dev_id)
  325. {
  326. struct nes_device *nesdev = (struct nes_device *)dev_id;
  327. int handled = 0;
  328. u32 int_mask;
  329. u32 int_req;
  330. u32 int_stat;
  331. u32 intf_int_stat;
  332. u32 timer_stat;
  333. if (nesdev->msi_enabled) {
  334. /* No need to read the interrupt pending register if msi is enabled */
  335. handled = 1;
  336. } else {
  337. if (unlikely(nesdev->nesadapter->hw_rev == NE020_REV)) {
  338. /* Master interrupt enable provides synchronization for kicking off bottom half
  339. when interrupt sharing is going on */
  340. int_mask = nes_read32(nesdev->regs + NES_INT_MASK);
  341. if (int_mask & 0x80000000) {
  342. /* Check interrupt status to see if this might be ours */
  343. int_stat = nes_read32(nesdev->regs + NES_INT_STAT);
  344. int_req = nesdev->int_req;
  345. if (int_stat&int_req) {
  346. /* if interesting CEQ or AEQ is pending, claim the interrupt */
  347. if ((int_stat&int_req) & (~(NES_INT_TIMER|NES_INT_INTF))) {
  348. handled = 1;
  349. } else {
  350. if (((int_stat & int_req) & NES_INT_TIMER) == NES_INT_TIMER) {
  351. /* Timer might be running but might be for another function */
  352. timer_stat = nes_read32(nesdev->regs + NES_TIMER_STAT);
  353. if ((timer_stat & nesdev->timer_int_req) != 0) {
  354. handled = 1;
  355. }
  356. }
  357. if ((((int_stat & int_req) & NES_INT_INTF) == NES_INT_INTF) &&
  358. (handled == 0)) {
  359. intf_int_stat = nes_read32(nesdev->regs+NES_INTF_INT_STAT);
  360. if ((intf_int_stat & nesdev->intf_int_req) != 0) {
  361. handled = 1;
  362. }
  363. }
  364. }
  365. if (handled) {
  366. nes_write32(nesdev->regs+NES_INT_MASK, int_mask & (~0x80000000));
  367. int_mask = nes_read32(nesdev->regs+NES_INT_MASK);
  368. /* Save off the status to save an additional read */
  369. nesdev->int_stat = int_stat;
  370. nesdev->napi_isr_ran = 1;
  371. }
  372. }
  373. }
  374. } else {
  375. handled = nes_read32(nesdev->regs+NES_INT_PENDING);
  376. }
  377. }
  378. if (handled) {
  379. if (nes_napi_isr(nesdev) == 0) {
  380. tasklet_schedule(&nesdev->dpc_tasklet);
  381. }
  382. return IRQ_HANDLED;
  383. } else {
  384. return IRQ_NONE;
  385. }
  386. }
  387. /**
  388. * nes_probe - Device initialization
  389. */
  390. static int nes_probe(struct pci_dev *pcidev, const struct pci_device_id *ent)
  391. {
  392. struct net_device *netdev = NULL;
  393. struct nes_device *nesdev = NULL;
  394. int ret = 0;
  395. void __iomem *mmio_regs = NULL;
  396. u8 hw_rev;
  397. printk(KERN_INFO PFX "NetEffect RNIC driver v%s loading. (%s)\n",
  398. DRV_VERSION, pci_name(pcidev));
  399. ret = pci_enable_device(pcidev);
  400. if (ret) {
  401. printk(KERN_ERR PFX "Unable to enable PCI device. (%s)\n", pci_name(pcidev));
  402. goto bail0;
  403. }
  404. nes_debug(NES_DBG_INIT, "BAR0 (@0x%08lX) size = 0x%lX bytes\n",
  405. (long unsigned int)pci_resource_start(pcidev, BAR_0),
  406. (long unsigned int)pci_resource_len(pcidev, BAR_0));
  407. nes_debug(NES_DBG_INIT, "BAR1 (@0x%08lX) size = 0x%lX bytes\n",
  408. (long unsigned int)pci_resource_start(pcidev, BAR_1),
  409. (long unsigned int)pci_resource_len(pcidev, BAR_1));
  410. /* Make sure PCI base addr are MMIO */
  411. if (!(pci_resource_flags(pcidev, BAR_0) & IORESOURCE_MEM) ||
  412. !(pci_resource_flags(pcidev, BAR_1) & IORESOURCE_MEM)) {
  413. printk(KERN_ERR PFX "PCI regions not an MMIO resource\n");
  414. ret = -ENODEV;
  415. goto bail1;
  416. }
  417. /* Reserve PCI I/O and memory resources */
  418. ret = pci_request_regions(pcidev, DRV_NAME);
  419. if (ret) {
  420. printk(KERN_ERR PFX "Unable to request regions. (%s)\n", pci_name(pcidev));
  421. goto bail1;
  422. }
  423. if ((sizeof(dma_addr_t) > 4)) {
  424. ret = pci_set_dma_mask(pcidev, DMA_BIT_MASK(64));
  425. if (ret < 0) {
  426. printk(KERN_ERR PFX "64b DMA mask configuration failed\n");
  427. goto bail2;
  428. }
  429. ret = pci_set_consistent_dma_mask(pcidev, DMA_BIT_MASK(64));
  430. if (ret) {
  431. printk(KERN_ERR PFX "64b DMA consistent mask configuration failed\n");
  432. goto bail2;
  433. }
  434. } else {
  435. ret = pci_set_dma_mask(pcidev, DMA_BIT_MASK(32));
  436. if (ret < 0) {
  437. printk(KERN_ERR PFX "32b DMA mask configuration failed\n");
  438. goto bail2;
  439. }
  440. ret = pci_set_consistent_dma_mask(pcidev, DMA_BIT_MASK(32));
  441. if (ret) {
  442. printk(KERN_ERR PFX "32b DMA consistent mask configuration failed\n");
  443. goto bail2;
  444. }
  445. }
  446. pci_set_master(pcidev);
  447. /* Allocate hardware structure */
  448. nesdev = kzalloc(sizeof(struct nes_device), GFP_KERNEL);
  449. if (!nesdev) {
  450. ret = -ENOMEM;
  451. goto bail2;
  452. }
  453. nes_debug(NES_DBG_INIT, "Allocated nes device at %p\n", nesdev);
  454. nesdev->pcidev = pcidev;
  455. pci_set_drvdata(pcidev, nesdev);
  456. pci_read_config_byte(pcidev, 0x0008, &hw_rev);
  457. nes_debug(NES_DBG_INIT, "hw_rev=%u\n", hw_rev);
  458. spin_lock_init(&nesdev->indexed_regs_lock);
  459. /* Remap the PCI registers in adapter BAR0 to kernel VA space */
  460. mmio_regs = ioremap_nocache(pci_resource_start(pcidev, BAR_0),
  461. pci_resource_len(pcidev, BAR_0));
  462. if (mmio_regs == NULL) {
  463. printk(KERN_ERR PFX "Unable to remap BAR0\n");
  464. ret = -EIO;
  465. goto bail3;
  466. }
  467. nesdev->regs = mmio_regs;
  468. nesdev->index_reg = 0x50 + (PCI_FUNC(pcidev->devfn)*8) + mmio_regs;
  469. /* Ensure interrupts are disabled */
  470. nes_write32(nesdev->regs+NES_INT_MASK, 0x7fffffff);
  471. if (nes_drv_opt & NES_DRV_OPT_ENABLE_MSI) {
  472. if (!pci_enable_msi(nesdev->pcidev)) {
  473. nesdev->msi_enabled = 1;
  474. nes_debug(NES_DBG_INIT, "MSI is enabled for device %s\n",
  475. pci_name(pcidev));
  476. } else {
  477. nes_debug(NES_DBG_INIT, "MSI is disabled by linux for device %s\n",
  478. pci_name(pcidev));
  479. }
  480. } else {
  481. nes_debug(NES_DBG_INIT, "MSI not requested due to driver options for device %s\n",
  482. pci_name(pcidev));
  483. }
  484. nesdev->csr_start = pci_resource_start(nesdev->pcidev, BAR_0);
  485. nesdev->doorbell_region = pci_resource_start(nesdev->pcidev, BAR_1);
  486. /* Init the adapter */
  487. nesdev->nesadapter = nes_init_adapter(nesdev, hw_rev);
  488. if (!nesdev->nesadapter) {
  489. printk(KERN_ERR PFX "Unable to initialize adapter.\n");
  490. ret = -ENOMEM;
  491. goto bail5;
  492. }
  493. nesdev->nesadapter->et_rx_coalesce_usecs_irq = interrupt_mod_interval;
  494. nesdev->nesadapter->wqm_quanta = wqm_quanta;
  495. /* nesdev->base_doorbell_index =
  496. nesdev->nesadapter->pd_config_base[PCI_FUNC(nesdev->pcidev->devfn)]; */
  497. nesdev->base_doorbell_index = 1;
  498. nesdev->doorbell_start = nesdev->nesadapter->doorbell_start;
  499. if (nesdev->nesadapter->phy_type[0] == NES_PHY_TYPE_PUMA_1G) {
  500. switch (PCI_FUNC(nesdev->pcidev->devfn) %
  501. nesdev->nesadapter->port_count) {
  502. case 1:
  503. nesdev->mac_index = 2;
  504. break;
  505. case 2:
  506. nesdev->mac_index = 1;
  507. break;
  508. case 3:
  509. nesdev->mac_index = 3;
  510. break;
  511. case 0:
  512. default:
  513. nesdev->mac_index = 0;
  514. }
  515. } else {
  516. nesdev->mac_index = PCI_FUNC(nesdev->pcidev->devfn) %
  517. nesdev->nesadapter->port_count;
  518. }
  519. if ((limit_maxrdreqsz ||
  520. ((nesdev->nesadapter->phy_type[0] == NES_PHY_TYPE_GLADIUS) &&
  521. (hw_rev == NE020_REV1))) &&
  522. (pcie_get_readrq(pcidev) > 256)) {
  523. if (pcie_set_readrq(pcidev, 256))
  524. printk(KERN_ERR PFX "Unable to set max read request"
  525. " to 256 bytes\n");
  526. else
  527. nes_debug(NES_DBG_INIT, "Max read request size set"
  528. " to 256 bytes\n");
  529. }
  530. tasklet_init(&nesdev->dpc_tasklet, nes_dpc, (unsigned long)nesdev);
  531. /* bring up the Control QP */
  532. if (nes_init_cqp(nesdev)) {
  533. ret = -ENODEV;
  534. goto bail6;
  535. }
  536. /* Arm the CCQ */
  537. nes_write32(nesdev->regs+NES_CQE_ALLOC, NES_CQE_ALLOC_NOTIFY_NEXT |
  538. PCI_FUNC(nesdev->pcidev->devfn));
  539. nes_read32(nesdev->regs+NES_CQE_ALLOC);
  540. /* Enable the interrupts */
  541. nesdev->int_req = (0x101 << PCI_FUNC(nesdev->pcidev->devfn)) |
  542. (1 << (PCI_FUNC(nesdev->pcidev->devfn)+16));
  543. if (PCI_FUNC(nesdev->pcidev->devfn) < 4) {
  544. nesdev->int_req |= (1 << (PCI_FUNC(nesdev->mac_index)+24));
  545. }
  546. /* TODO: This really should be the first driver to load, not function 0 */
  547. if (PCI_FUNC(nesdev->pcidev->devfn) == 0) {
  548. /* pick up PCI and critical errors if the first driver to load */
  549. nesdev->intf_int_req = NES_INTF_INT_PCIERR | NES_INTF_INT_CRITERR;
  550. nesdev->int_req |= NES_INT_INTF;
  551. } else {
  552. nesdev->intf_int_req = 0;
  553. }
  554. nesdev->intf_int_req |= (1 << (PCI_FUNC(nesdev->pcidev->devfn)+16));
  555. nes_write_indexed(nesdev, NES_IDX_DEBUG_ERROR_MASKS0, 0);
  556. nes_write_indexed(nesdev, NES_IDX_DEBUG_ERROR_MASKS1, 0);
  557. nes_write_indexed(nesdev, NES_IDX_DEBUG_ERROR_MASKS2, 0x00001265);
  558. nes_write_indexed(nesdev, NES_IDX_DEBUG_ERROR_MASKS4, 0x18021804);
  559. nes_write_indexed(nesdev, NES_IDX_DEBUG_ERROR_MASKS3, 0x17801790);
  560. /* deal with both periodic and one_shot */
  561. nesdev->timer_int_req = 0x101 << PCI_FUNC(nesdev->pcidev->devfn);
  562. nesdev->nesadapter->timer_int_req |= nesdev->timer_int_req;
  563. nes_debug(NES_DBG_INIT, "setting int_req for function %u, nesdev = 0x%04X, adapter = 0x%04X\n",
  564. PCI_FUNC(nesdev->pcidev->devfn),
  565. nesdev->timer_int_req, nesdev->nesadapter->timer_int_req);
  566. nes_write32(nesdev->regs+NES_INTF_INT_MASK, ~(nesdev->intf_int_req));
  567. list_add_tail(&nesdev->list, &nes_dev_list);
  568. /* Request an interrupt line for the driver */
  569. ret = request_irq(pcidev->irq, nes_interrupt, IRQF_SHARED, DRV_NAME, nesdev);
  570. if (ret) {
  571. printk(KERN_ERR PFX "%s: requested IRQ %u is busy\n",
  572. pci_name(pcidev), pcidev->irq);
  573. goto bail65;
  574. }
  575. nes_write32(nesdev->regs+NES_INT_MASK, ~nesdev->int_req);
  576. if (nes_notifiers_registered == 0) {
  577. register_inetaddr_notifier(&nes_inetaddr_notifier);
  578. register_netevent_notifier(&nes_net_notifier);
  579. }
  580. nes_notifiers_registered++;
  581. INIT_DELAYED_WORK(&nesdev->work, nes_recheck_link_status);
  582. /* Initialize network devices */
  583. netdev = nes_netdev_init(nesdev, mmio_regs);
  584. if (netdev == NULL) {
  585. ret = -ENOMEM;
  586. goto bail7;
  587. }
  588. /* Register network device */
  589. ret = register_netdev(netdev);
  590. if (ret) {
  591. printk(KERN_ERR PFX "Unable to register netdev, ret = %d\n", ret);
  592. nes_netdev_destroy(netdev);
  593. goto bail7;
  594. }
  595. nes_print_macaddr(netdev);
  596. nesdev->netdev_count++;
  597. nesdev->nesadapter->netdev_count++;
  598. printk(KERN_INFO PFX "%s: NetEffect RNIC driver successfully loaded.\n",
  599. pci_name(pcidev));
  600. return 0;
  601. bail7:
  602. printk(KERN_ERR PFX "bail7\n");
  603. while (nesdev->netdev_count > 0) {
  604. nesdev->netdev_count--;
  605. nesdev->nesadapter->netdev_count--;
  606. unregister_netdev(nesdev->netdev[nesdev->netdev_count]);
  607. nes_netdev_destroy(nesdev->netdev[nesdev->netdev_count]);
  608. }
  609. nes_debug(NES_DBG_INIT, "netdev_count=%d, nesadapter->netdev_count=%d\n",
  610. nesdev->netdev_count, nesdev->nesadapter->netdev_count);
  611. nes_notifiers_registered--;
  612. if (nes_notifiers_registered == 0) {
  613. unregister_netevent_notifier(&nes_net_notifier);
  614. unregister_inetaddr_notifier(&nes_inetaddr_notifier);
  615. }
  616. list_del(&nesdev->list);
  617. nes_destroy_cqp(nesdev);
  618. bail65:
  619. printk(KERN_ERR PFX "bail65\n");
  620. free_irq(pcidev->irq, nesdev);
  621. if (nesdev->msi_enabled) {
  622. pci_disable_msi(pcidev);
  623. }
  624. bail6:
  625. printk(KERN_ERR PFX "bail6\n");
  626. tasklet_kill(&nesdev->dpc_tasklet);
  627. /* Deallocate the Adapter Structure */
  628. nes_destroy_adapter(nesdev->nesadapter);
  629. bail5:
  630. printk(KERN_ERR PFX "bail5\n");
  631. iounmap(nesdev->regs);
  632. bail3:
  633. printk(KERN_ERR PFX "bail3\n");
  634. kfree(nesdev);
  635. bail2:
  636. pci_release_regions(pcidev);
  637. bail1:
  638. pci_disable_device(pcidev);
  639. bail0:
  640. return ret;
  641. }
  642. /**
  643. * nes_remove - unload from kernel
  644. */
  645. static void nes_remove(struct pci_dev *pcidev)
  646. {
  647. struct nes_device *nesdev = pci_get_drvdata(pcidev);
  648. struct net_device *netdev;
  649. int netdev_index = 0;
  650. unsigned long flags;
  651. if (nesdev->netdev_count) {
  652. netdev = nesdev->netdev[netdev_index];
  653. if (netdev) {
  654. netif_stop_queue(netdev);
  655. unregister_netdev(netdev);
  656. nes_netdev_destroy(netdev);
  657. nesdev->netdev[netdev_index] = NULL;
  658. nesdev->netdev_count--;
  659. nesdev->nesadapter->netdev_count--;
  660. }
  661. }
  662. nes_notifiers_registered--;
  663. if (nes_notifiers_registered == 0) {
  664. unregister_netevent_notifier(&nes_net_notifier);
  665. unregister_inetaddr_notifier(&nes_inetaddr_notifier);
  666. }
  667. list_del(&nesdev->list);
  668. nes_destroy_cqp(nesdev);
  669. free_irq(pcidev->irq, nesdev);
  670. tasklet_kill(&nesdev->dpc_tasklet);
  671. spin_lock_irqsave(&nesdev->nesadapter->phy_lock, flags);
  672. if (nesdev->link_recheck) {
  673. spin_unlock_irqrestore(&nesdev->nesadapter->phy_lock, flags);
  674. cancel_delayed_work_sync(&nesdev->work);
  675. } else {
  676. spin_unlock_irqrestore(&nesdev->nesadapter->phy_lock, flags);
  677. }
  678. /* Deallocate the Adapter Structure */
  679. nes_destroy_adapter(nesdev->nesadapter);
  680. if (nesdev->msi_enabled) {
  681. pci_disable_msi(pcidev);
  682. }
  683. iounmap(nesdev->regs);
  684. kfree(nesdev);
  685. /* nes_debug(NES_DBG_SHUTDOWN, "calling pci_release_regions.\n"); */
  686. pci_release_regions(pcidev);
  687. pci_disable_device(pcidev);
  688. pci_set_drvdata(pcidev, NULL);
  689. }
  690. static ssize_t adapter_show(struct device_driver *ddp, char *buf)
  691. {
  692. unsigned int devfn = 0xffffffff;
  693. unsigned char bus_number = 0xff;
  694. unsigned int i = 0;
  695. struct nes_device *nesdev;
  696. list_for_each_entry(nesdev, &nes_dev_list, list) {
  697. if (i == ee_flsh_adapter) {
  698. devfn = nesdev->pcidev->devfn;
  699. bus_number = nesdev->pcidev->bus->number;
  700. break;
  701. }
  702. i++;
  703. }
  704. return snprintf(buf, PAGE_SIZE, "%x:%x\n", bus_number, devfn);
  705. }
  706. static ssize_t adapter_store(struct device_driver *ddp,
  707. const char *buf, size_t count)
  708. {
  709. char *p = (char *)buf;
  710. ee_flsh_adapter = simple_strtoul(p, &p, 10);
  711. return strnlen(buf, count);
  712. }
  713. static ssize_t eeprom_cmd_show(struct device_driver *ddp, char *buf)
  714. {
  715. u32 eeprom_cmd = 0xdead;
  716. u32 i = 0;
  717. struct nes_device *nesdev;
  718. list_for_each_entry(nesdev, &nes_dev_list, list) {
  719. if (i == ee_flsh_adapter) {
  720. eeprom_cmd = nes_read32(nesdev->regs + NES_EEPROM_COMMAND);
  721. break;
  722. }
  723. i++;
  724. }
  725. return snprintf(buf, PAGE_SIZE, "0x%x\n", eeprom_cmd);
  726. }
  727. static ssize_t eeprom_cmd_store(struct device_driver *ddp,
  728. const char *buf, size_t count)
  729. {
  730. char *p = (char *)buf;
  731. u32 val;
  732. u32 i = 0;
  733. struct nes_device *nesdev;
  734. if (p[1] == 'x' || p[1] == 'X' || p[0] == 'x' || p[0] == 'X') {
  735. val = simple_strtoul(p, &p, 16);
  736. list_for_each_entry(nesdev, &nes_dev_list, list) {
  737. if (i == ee_flsh_adapter) {
  738. nes_write32(nesdev->regs + NES_EEPROM_COMMAND, val);
  739. break;
  740. }
  741. i++;
  742. }
  743. }
  744. return strnlen(buf, count);
  745. }
  746. static ssize_t eeprom_data_show(struct device_driver *ddp, char *buf)
  747. {
  748. u32 eeprom_data = 0xdead;
  749. u32 i = 0;
  750. struct nes_device *nesdev;
  751. list_for_each_entry(nesdev, &nes_dev_list, list) {
  752. if (i == ee_flsh_adapter) {
  753. eeprom_data = nes_read32(nesdev->regs + NES_EEPROM_DATA);
  754. break;
  755. }
  756. i++;
  757. }
  758. return snprintf(buf, PAGE_SIZE, "0x%x\n", eeprom_data);
  759. }
  760. static ssize_t eeprom_data_store(struct device_driver *ddp,
  761. const char *buf, size_t count)
  762. {
  763. char *p = (char *)buf;
  764. u32 val;
  765. u32 i = 0;
  766. struct nes_device *nesdev;
  767. if (p[1] == 'x' || p[1] == 'X' || p[0] == 'x' || p[0] == 'X') {
  768. val = simple_strtoul(p, &p, 16);
  769. list_for_each_entry(nesdev, &nes_dev_list, list) {
  770. if (i == ee_flsh_adapter) {
  771. nes_write32(nesdev->regs + NES_EEPROM_DATA, val);
  772. break;
  773. }
  774. i++;
  775. }
  776. }
  777. return strnlen(buf, count);
  778. }
  779. static ssize_t flash_cmd_show(struct device_driver *ddp, char *buf)
  780. {
  781. u32 flash_cmd = 0xdead;
  782. u32 i = 0;
  783. struct nes_device *nesdev;
  784. list_for_each_entry(nesdev, &nes_dev_list, list) {
  785. if (i == ee_flsh_adapter) {
  786. flash_cmd = nes_read32(nesdev->regs + NES_FLASH_COMMAND);
  787. break;
  788. }
  789. i++;
  790. }
  791. return snprintf(buf, PAGE_SIZE, "0x%x\n", flash_cmd);
  792. }
  793. static ssize_t flash_cmd_store(struct device_driver *ddp,
  794. const char *buf, size_t count)
  795. {
  796. char *p = (char *)buf;
  797. u32 val;
  798. u32 i = 0;
  799. struct nes_device *nesdev;
  800. if (p[1] == 'x' || p[1] == 'X' || p[0] == 'x' || p[0] == 'X') {
  801. val = simple_strtoul(p, &p, 16);
  802. list_for_each_entry(nesdev, &nes_dev_list, list) {
  803. if (i == ee_flsh_adapter) {
  804. nes_write32(nesdev->regs + NES_FLASH_COMMAND, val);
  805. break;
  806. }
  807. i++;
  808. }
  809. }
  810. return strnlen(buf, count);
  811. }
  812. static ssize_t flash_data_show(struct device_driver *ddp, char *buf)
  813. {
  814. u32 flash_data = 0xdead;
  815. u32 i = 0;
  816. struct nes_device *nesdev;
  817. list_for_each_entry(nesdev, &nes_dev_list, list) {
  818. if (i == ee_flsh_adapter) {
  819. flash_data = nes_read32(nesdev->regs + NES_FLASH_DATA);
  820. break;
  821. }
  822. i++;
  823. }
  824. return snprintf(buf, PAGE_SIZE, "0x%x\n", flash_data);
  825. }
  826. static ssize_t flash_data_store(struct device_driver *ddp,
  827. const char *buf, size_t count)
  828. {
  829. char *p = (char *)buf;
  830. u32 val;
  831. u32 i = 0;
  832. struct nes_device *nesdev;
  833. if (p[1] == 'x' || p[1] == 'X' || p[0] == 'x' || p[0] == 'X') {
  834. val = simple_strtoul(p, &p, 16);
  835. list_for_each_entry(nesdev, &nes_dev_list, list) {
  836. if (i == ee_flsh_adapter) {
  837. nes_write32(nesdev->regs + NES_FLASH_DATA, val);
  838. break;
  839. }
  840. i++;
  841. }
  842. }
  843. return strnlen(buf, count);
  844. }
  845. static ssize_t nonidx_addr_show(struct device_driver *ddp, char *buf)
  846. {
  847. return snprintf(buf, PAGE_SIZE, "0x%x\n", sysfs_nonidx_addr);
  848. }
  849. static ssize_t nonidx_addr_store(struct device_driver *ddp,
  850. const char *buf, size_t count)
  851. {
  852. char *p = (char *)buf;
  853. if (p[1] == 'x' || p[1] == 'X' || p[0] == 'x' || p[0] == 'X')
  854. sysfs_nonidx_addr = simple_strtoul(p, &p, 16);
  855. return strnlen(buf, count);
  856. }
  857. static ssize_t nonidx_data_show(struct device_driver *ddp, char *buf)
  858. {
  859. u32 nonidx_data = 0xdead;
  860. u32 i = 0;
  861. struct nes_device *nesdev;
  862. list_for_each_entry(nesdev, &nes_dev_list, list) {
  863. if (i == ee_flsh_adapter) {
  864. nonidx_data = nes_read32(nesdev->regs + sysfs_nonidx_addr);
  865. break;
  866. }
  867. i++;
  868. }
  869. return snprintf(buf, PAGE_SIZE, "0x%x\n", nonidx_data);
  870. }
  871. static ssize_t nonidx_data_store(struct device_driver *ddp,
  872. const char *buf, size_t count)
  873. {
  874. char *p = (char *)buf;
  875. u32 val;
  876. u32 i = 0;
  877. struct nes_device *nesdev;
  878. if (p[1] == 'x' || p[1] == 'X' || p[0] == 'x' || p[0] == 'X') {
  879. val = simple_strtoul(p, &p, 16);
  880. list_for_each_entry(nesdev, &nes_dev_list, list) {
  881. if (i == ee_flsh_adapter) {
  882. nes_write32(nesdev->regs + sysfs_nonidx_addr, val);
  883. break;
  884. }
  885. i++;
  886. }
  887. }
  888. return strnlen(buf, count);
  889. }
  890. static ssize_t idx_addr_show(struct device_driver *ddp, char *buf)
  891. {
  892. return snprintf(buf, PAGE_SIZE, "0x%x\n", sysfs_idx_addr);
  893. }
  894. static ssize_t idx_addr_store(struct device_driver *ddp,
  895. const char *buf, size_t count)
  896. {
  897. char *p = (char *)buf;
  898. if (p[1] == 'x' || p[1] == 'X' || p[0] == 'x' || p[0] == 'X')
  899. sysfs_idx_addr = simple_strtoul(p, &p, 16);
  900. return strnlen(buf, count);
  901. }
  902. static ssize_t idx_data_show(struct device_driver *ddp, char *buf)
  903. {
  904. u32 idx_data = 0xdead;
  905. u32 i = 0;
  906. struct nes_device *nesdev;
  907. list_for_each_entry(nesdev, &nes_dev_list, list) {
  908. if (i == ee_flsh_adapter) {
  909. idx_data = nes_read_indexed(nesdev, sysfs_idx_addr);
  910. break;
  911. }
  912. i++;
  913. }
  914. return snprintf(buf, PAGE_SIZE, "0x%x\n", idx_data);
  915. }
  916. static ssize_t idx_data_store(struct device_driver *ddp,
  917. const char *buf, size_t count)
  918. {
  919. char *p = (char *)buf;
  920. u32 val;
  921. u32 i = 0;
  922. struct nes_device *nesdev;
  923. if (p[1] == 'x' || p[1] == 'X' || p[0] == 'x' || p[0] == 'X') {
  924. val = simple_strtoul(p, &p, 16);
  925. list_for_each_entry(nesdev, &nes_dev_list, list) {
  926. if (i == ee_flsh_adapter) {
  927. nes_write_indexed(nesdev, sysfs_idx_addr, val);
  928. break;
  929. }
  930. i++;
  931. }
  932. }
  933. return strnlen(buf, count);
  934. }
  935. static ssize_t wqm_quanta_show(struct device_driver *ddp, char *buf)
  936. {
  937. u32 wqm_quanta_value = 0xdead;
  938. u32 i = 0;
  939. struct nes_device *nesdev;
  940. list_for_each_entry(nesdev, &nes_dev_list, list) {
  941. if (i == ee_flsh_adapter) {
  942. wqm_quanta_value = nesdev->nesadapter->wqm_quanta;
  943. break;
  944. }
  945. i++;
  946. }
  947. return snprintf(buf, PAGE_SIZE, "0x%X\n", wqm_quanta_value);
  948. }
  949. static ssize_t wqm_quanta_store(struct device_driver *ddp, const char *buf,
  950. size_t count)
  951. {
  952. unsigned long wqm_quanta_value;
  953. u32 wqm_config1;
  954. u32 i = 0;
  955. struct nes_device *nesdev;
  956. if (kstrtoul(buf, 0, &wqm_quanta_value) < 0)
  957. return -EINVAL;
  958. list_for_each_entry(nesdev, &nes_dev_list, list) {
  959. if (i == ee_flsh_adapter) {
  960. nesdev->nesadapter->wqm_quanta = wqm_quanta_value;
  961. wqm_config1 = nes_read_indexed(nesdev,
  962. NES_IDX_WQM_CONFIG1);
  963. nes_write_indexed(nesdev, NES_IDX_WQM_CONFIG1,
  964. ((wqm_quanta_value << 1) |
  965. (wqm_config1 & 0x00000001)));
  966. break;
  967. }
  968. i++;
  969. }
  970. return strnlen(buf, count);
  971. }
  972. static DRIVER_ATTR_RW(adapter);
  973. static DRIVER_ATTR_RW(eeprom_cmd);
  974. static DRIVER_ATTR_RW(eeprom_data);
  975. static DRIVER_ATTR_RW(flash_cmd);
  976. static DRIVER_ATTR_RW(flash_data);
  977. static DRIVER_ATTR_RW(nonidx_addr);
  978. static DRIVER_ATTR_RW(nonidx_data);
  979. static DRIVER_ATTR_RW(idx_addr);
  980. static DRIVER_ATTR_RW(idx_data);
  981. static DRIVER_ATTR_RW(wqm_quanta);
  982. static struct attribute *nes_attrs[] = {
  983. &driver_attr_adapter.attr,
  984. &driver_attr_eeprom_cmd.attr,
  985. &driver_attr_eeprom_data.attr,
  986. &driver_attr_flash_cmd.attr,
  987. &driver_attr_flash_data.attr,
  988. &driver_attr_nonidx_addr.attr,
  989. &driver_attr_nonidx_data.attr,
  990. &driver_attr_idx_addr.attr,
  991. &driver_attr_idx_data.attr,
  992. &driver_attr_wqm_quanta.attr,
  993. NULL,
  994. };
  995. ATTRIBUTE_GROUPS(nes);
  996. static struct pci_driver nes_pci_driver = {
  997. .name = DRV_NAME,
  998. .id_table = nes_pci_table,
  999. .probe = nes_probe,
  1000. .remove = nes_remove,
  1001. .groups = nes_groups,
  1002. };
  1003. /**
  1004. * nes_init_module - module initialization entry point
  1005. */
  1006. static int __init nes_init_module(void)
  1007. {
  1008. int retval;
  1009. retval = nes_cm_start();
  1010. if (retval) {
  1011. printk(KERN_ERR PFX "Unable to start NetEffect iWARP CM.\n");
  1012. return retval;
  1013. }
  1014. return pci_register_driver(&nes_pci_driver);
  1015. }
  1016. /**
  1017. * nes_exit_module - module unload entry point
  1018. */
  1019. static void __exit nes_exit_module(void)
  1020. {
  1021. nes_cm_stop();
  1022. pci_unregister_driver(&nes_pci_driver);
  1023. }
  1024. module_init(nes_init_module);
  1025. module_exit(nes_exit_module);