mad.c 17 KB

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  1. /*
  2. * Copyright (c) 2013-2015, Mellanox Technologies. All rights reserved.
  3. *
  4. * This software is available to you under a choice of one of two
  5. * licenses. You may choose to be licensed under the terms of the GNU
  6. * General Public License (GPL) Version 2, available from the file
  7. * COPYING in the main directory of this source tree, or the
  8. * OpenIB.org BSD license below:
  9. *
  10. * Redistribution and use in source and binary forms, with or
  11. * without modification, are permitted provided that the following
  12. * conditions are met:
  13. *
  14. * - Redistributions of source code must retain the above
  15. * copyright notice, this list of conditions and the following
  16. * disclaimer.
  17. *
  18. * - Redistributions in binary form must reproduce the above
  19. * copyright notice, this list of conditions and the following
  20. * disclaimer in the documentation and/or other materials
  21. * provided with the distribution.
  22. *
  23. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  24. * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  25. * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  26. * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  27. * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  28. * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  29. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  30. * SOFTWARE.
  31. */
  32. #include <linux/mlx5/cmd.h>
  33. #include <linux/mlx5/vport.h>
  34. #include <rdma/ib_mad.h>
  35. #include <rdma/ib_smi.h>
  36. #include <rdma/ib_pma.h>
  37. #include "mlx5_ib.h"
  38. enum {
  39. MLX5_IB_VENDOR_CLASS1 = 0x9,
  40. MLX5_IB_VENDOR_CLASS2 = 0xa
  41. };
  42. static bool can_do_mad_ifc(struct mlx5_ib_dev *dev, u8 port_num,
  43. struct ib_mad *in_mad)
  44. {
  45. if (in_mad->mad_hdr.mgmt_class != IB_MGMT_CLASS_SUBN_LID_ROUTED &&
  46. in_mad->mad_hdr.mgmt_class != IB_MGMT_CLASS_SUBN_DIRECTED_ROUTE)
  47. return true;
  48. return dev->mdev->port_caps[port_num - 1].has_smi;
  49. }
  50. int mlx5_MAD_IFC(struct mlx5_ib_dev *dev, int ignore_mkey, int ignore_bkey,
  51. u8 port, const struct ib_wc *in_wc, const struct ib_grh *in_grh,
  52. const void *in_mad, void *response_mad)
  53. {
  54. u8 op_modifier = 0;
  55. if (!can_do_mad_ifc(dev, port, (struct ib_mad *)in_mad))
  56. return -EPERM;
  57. /* Key check traps can't be generated unless we have in_wc to
  58. * tell us where to send the trap.
  59. */
  60. if (ignore_mkey || !in_wc)
  61. op_modifier |= 0x1;
  62. if (ignore_bkey || !in_wc)
  63. op_modifier |= 0x2;
  64. return mlx5_core_mad_ifc(dev->mdev, in_mad, response_mad, op_modifier, port);
  65. }
  66. static int process_mad(struct ib_device *ibdev, int mad_flags, u8 port_num,
  67. const struct ib_wc *in_wc, const struct ib_grh *in_grh,
  68. const struct ib_mad *in_mad, struct ib_mad *out_mad)
  69. {
  70. u16 slid;
  71. int err;
  72. slid = in_wc ? ib_lid_cpu16(in_wc->slid) : be16_to_cpu(IB_LID_PERMISSIVE);
  73. if (in_mad->mad_hdr.method == IB_MGMT_METHOD_TRAP && slid == 0)
  74. return IB_MAD_RESULT_SUCCESS | IB_MAD_RESULT_CONSUMED;
  75. if (in_mad->mad_hdr.mgmt_class == IB_MGMT_CLASS_SUBN_LID_ROUTED ||
  76. in_mad->mad_hdr.mgmt_class == IB_MGMT_CLASS_SUBN_DIRECTED_ROUTE) {
  77. if (in_mad->mad_hdr.method != IB_MGMT_METHOD_GET &&
  78. in_mad->mad_hdr.method != IB_MGMT_METHOD_SET &&
  79. in_mad->mad_hdr.method != IB_MGMT_METHOD_TRAP_REPRESS)
  80. return IB_MAD_RESULT_SUCCESS;
  81. /* Don't process SMInfo queries -- the SMA can't handle them.
  82. */
  83. if (in_mad->mad_hdr.attr_id == IB_SMP_ATTR_SM_INFO)
  84. return IB_MAD_RESULT_SUCCESS;
  85. } else if (in_mad->mad_hdr.mgmt_class == IB_MGMT_CLASS_PERF_MGMT ||
  86. in_mad->mad_hdr.mgmt_class == MLX5_IB_VENDOR_CLASS1 ||
  87. in_mad->mad_hdr.mgmt_class == MLX5_IB_VENDOR_CLASS2 ||
  88. in_mad->mad_hdr.mgmt_class == IB_MGMT_CLASS_CONG_MGMT) {
  89. if (in_mad->mad_hdr.method != IB_MGMT_METHOD_GET &&
  90. in_mad->mad_hdr.method != IB_MGMT_METHOD_SET)
  91. return IB_MAD_RESULT_SUCCESS;
  92. } else {
  93. return IB_MAD_RESULT_SUCCESS;
  94. }
  95. err = mlx5_MAD_IFC(to_mdev(ibdev),
  96. mad_flags & IB_MAD_IGNORE_MKEY,
  97. mad_flags & IB_MAD_IGNORE_BKEY,
  98. port_num, in_wc, in_grh, in_mad, out_mad);
  99. if (err)
  100. return IB_MAD_RESULT_FAILURE;
  101. /* set return bit in status of directed route responses */
  102. if (in_mad->mad_hdr.mgmt_class == IB_MGMT_CLASS_SUBN_DIRECTED_ROUTE)
  103. out_mad->mad_hdr.status |= cpu_to_be16(1 << 15);
  104. if (in_mad->mad_hdr.method == IB_MGMT_METHOD_TRAP_REPRESS)
  105. /* no response for trap repress */
  106. return IB_MAD_RESULT_SUCCESS | IB_MAD_RESULT_CONSUMED;
  107. return IB_MAD_RESULT_SUCCESS | IB_MAD_RESULT_REPLY;
  108. }
  109. static void pma_cnt_ext_assign(struct ib_pma_portcounters_ext *pma_cnt_ext,
  110. void *out)
  111. {
  112. #define MLX5_SUM_CNT(p, cntr1, cntr2) \
  113. (MLX5_GET64(query_vport_counter_out, p, cntr1) + \
  114. MLX5_GET64(query_vport_counter_out, p, cntr2))
  115. pma_cnt_ext->port_xmit_data =
  116. cpu_to_be64(MLX5_SUM_CNT(out, transmitted_ib_unicast.octets,
  117. transmitted_ib_multicast.octets) >> 2);
  118. pma_cnt_ext->port_rcv_data =
  119. cpu_to_be64(MLX5_SUM_CNT(out, received_ib_unicast.octets,
  120. received_ib_multicast.octets) >> 2);
  121. pma_cnt_ext->port_xmit_packets =
  122. cpu_to_be64(MLX5_SUM_CNT(out, transmitted_ib_unicast.packets,
  123. transmitted_ib_multicast.packets));
  124. pma_cnt_ext->port_rcv_packets =
  125. cpu_to_be64(MLX5_SUM_CNT(out, received_ib_unicast.packets,
  126. received_ib_multicast.packets));
  127. pma_cnt_ext->port_unicast_xmit_packets =
  128. MLX5_GET64_BE(query_vport_counter_out,
  129. out, transmitted_ib_unicast.packets);
  130. pma_cnt_ext->port_unicast_rcv_packets =
  131. MLX5_GET64_BE(query_vport_counter_out,
  132. out, received_ib_unicast.packets);
  133. pma_cnt_ext->port_multicast_xmit_packets =
  134. MLX5_GET64_BE(query_vport_counter_out,
  135. out, transmitted_ib_multicast.packets);
  136. pma_cnt_ext->port_multicast_rcv_packets =
  137. MLX5_GET64_BE(query_vport_counter_out,
  138. out, received_ib_multicast.packets);
  139. }
  140. static void pma_cnt_assign(struct ib_pma_portcounters *pma_cnt,
  141. void *out)
  142. {
  143. /* Traffic counters will be reported in
  144. * their 64bit form via ib_pma_portcounters_ext by default.
  145. */
  146. void *out_pma = MLX5_ADDR_OF(ppcnt_reg, out,
  147. counter_set);
  148. #define MLX5_ASSIGN_PMA_CNTR(counter_var, counter_name) { \
  149. counter_var = MLX5_GET_BE(typeof(counter_var), \
  150. ib_port_cntrs_grp_data_layout, \
  151. out_pma, counter_name); \
  152. }
  153. MLX5_ASSIGN_PMA_CNTR(pma_cnt->symbol_error_counter,
  154. symbol_error_counter);
  155. MLX5_ASSIGN_PMA_CNTR(pma_cnt->link_error_recovery_counter,
  156. link_error_recovery_counter);
  157. MLX5_ASSIGN_PMA_CNTR(pma_cnt->link_downed_counter,
  158. link_downed_counter);
  159. MLX5_ASSIGN_PMA_CNTR(pma_cnt->port_rcv_errors,
  160. port_rcv_errors);
  161. MLX5_ASSIGN_PMA_CNTR(pma_cnt->port_rcv_remphys_errors,
  162. port_rcv_remote_physical_errors);
  163. MLX5_ASSIGN_PMA_CNTR(pma_cnt->port_rcv_switch_relay_errors,
  164. port_rcv_switch_relay_errors);
  165. MLX5_ASSIGN_PMA_CNTR(pma_cnt->port_xmit_discards,
  166. port_xmit_discards);
  167. MLX5_ASSIGN_PMA_CNTR(pma_cnt->port_xmit_constraint_errors,
  168. port_xmit_constraint_errors);
  169. MLX5_ASSIGN_PMA_CNTR(pma_cnt->port_xmit_wait,
  170. port_xmit_wait);
  171. MLX5_ASSIGN_PMA_CNTR(pma_cnt->port_rcv_constraint_errors,
  172. port_rcv_constraint_errors);
  173. MLX5_ASSIGN_PMA_CNTR(pma_cnt->link_overrun_errors,
  174. link_overrun_errors);
  175. MLX5_ASSIGN_PMA_CNTR(pma_cnt->vl15_dropped,
  176. vl_15_dropped);
  177. }
  178. static int process_pma_cmd(struct mlx5_core_dev *mdev, u8 port_num,
  179. const struct ib_mad *in_mad, struct ib_mad *out_mad)
  180. {
  181. int err;
  182. void *out_cnt;
  183. /* Declaring support of extended counters */
  184. if (in_mad->mad_hdr.attr_id == IB_PMA_CLASS_PORT_INFO) {
  185. struct ib_class_port_info cpi = {};
  186. cpi.capability_mask = IB_PMA_CLASS_CAP_EXT_WIDTH;
  187. memcpy((out_mad->data + 40), &cpi, sizeof(cpi));
  188. return IB_MAD_RESULT_SUCCESS | IB_MAD_RESULT_REPLY;
  189. }
  190. if (in_mad->mad_hdr.attr_id == IB_PMA_PORT_COUNTERS_EXT) {
  191. struct ib_pma_portcounters_ext *pma_cnt_ext =
  192. (struct ib_pma_portcounters_ext *)(out_mad->data + 40);
  193. int sz = MLX5_ST_SZ_BYTES(query_vport_counter_out);
  194. out_cnt = kvzalloc(sz, GFP_KERNEL);
  195. if (!out_cnt)
  196. return IB_MAD_RESULT_FAILURE;
  197. err = mlx5_core_query_vport_counter(mdev, 0, 0,
  198. port_num, out_cnt, sz);
  199. if (!err)
  200. pma_cnt_ext_assign(pma_cnt_ext, out_cnt);
  201. } else {
  202. struct ib_pma_portcounters *pma_cnt =
  203. (struct ib_pma_portcounters *)(out_mad->data + 40);
  204. int sz = MLX5_ST_SZ_BYTES(ppcnt_reg);
  205. out_cnt = kvzalloc(sz, GFP_KERNEL);
  206. if (!out_cnt)
  207. return IB_MAD_RESULT_FAILURE;
  208. err = mlx5_core_query_ib_ppcnt(mdev, port_num,
  209. out_cnt, sz);
  210. if (!err)
  211. pma_cnt_assign(pma_cnt, out_cnt);
  212. }
  213. kvfree(out_cnt);
  214. if (err)
  215. return IB_MAD_RESULT_FAILURE;
  216. return IB_MAD_RESULT_SUCCESS | IB_MAD_RESULT_REPLY;
  217. }
  218. int mlx5_ib_process_mad(struct ib_device *ibdev, int mad_flags, u8 port_num,
  219. const struct ib_wc *in_wc, const struct ib_grh *in_grh,
  220. const struct ib_mad_hdr *in, size_t in_mad_size,
  221. struct ib_mad_hdr *out, size_t *out_mad_size,
  222. u16 *out_mad_pkey_index)
  223. {
  224. struct mlx5_ib_dev *dev = to_mdev(ibdev);
  225. const struct ib_mad *in_mad = (const struct ib_mad *)in;
  226. struct ib_mad *out_mad = (struct ib_mad *)out;
  227. struct mlx5_core_dev *mdev;
  228. u8 mdev_port_num;
  229. int ret;
  230. if (WARN_ON_ONCE(in_mad_size != sizeof(*in_mad) ||
  231. *out_mad_size != sizeof(*out_mad)))
  232. return IB_MAD_RESULT_FAILURE;
  233. memset(out_mad->data, 0, sizeof(out_mad->data));
  234. mdev = mlx5_ib_get_native_port_mdev(dev, port_num, &mdev_port_num);
  235. if (!mdev)
  236. return IB_MAD_RESULT_FAILURE;
  237. if (MLX5_CAP_GEN(mdev, vport_counters) &&
  238. in_mad->mad_hdr.mgmt_class == IB_MGMT_CLASS_PERF_MGMT &&
  239. in_mad->mad_hdr.method == IB_MGMT_METHOD_GET) {
  240. ret = process_pma_cmd(mdev, mdev_port_num, in_mad, out_mad);
  241. } else {
  242. ret = process_mad(ibdev, mad_flags, port_num, in_wc, in_grh,
  243. in_mad, out_mad);
  244. }
  245. mlx5_ib_put_native_port_mdev(dev, port_num);
  246. return ret;
  247. }
  248. int mlx5_query_ext_port_caps(struct mlx5_ib_dev *dev, u8 port)
  249. {
  250. struct ib_smp *in_mad = NULL;
  251. struct ib_smp *out_mad = NULL;
  252. int err = -ENOMEM;
  253. u16 packet_error;
  254. in_mad = kzalloc(sizeof(*in_mad), GFP_KERNEL);
  255. out_mad = kmalloc(sizeof(*out_mad), GFP_KERNEL);
  256. if (!in_mad || !out_mad)
  257. goto out;
  258. init_query_mad(in_mad);
  259. in_mad->attr_id = MLX5_ATTR_EXTENDED_PORT_INFO;
  260. in_mad->attr_mod = cpu_to_be32(port);
  261. err = mlx5_MAD_IFC(dev, 1, 1, 1, NULL, NULL, in_mad, out_mad);
  262. packet_error = be16_to_cpu(out_mad->status);
  263. dev->mdev->port_caps[port - 1].ext_port_cap = (!err && !packet_error) ?
  264. MLX_EXT_PORT_CAP_FLAG_EXTENDED_PORT_INFO : 0;
  265. out:
  266. kfree(in_mad);
  267. kfree(out_mad);
  268. return err;
  269. }
  270. int mlx5_query_mad_ifc_smp_attr_node_info(struct ib_device *ibdev,
  271. struct ib_smp *out_mad)
  272. {
  273. struct ib_smp *in_mad = NULL;
  274. int err = -ENOMEM;
  275. in_mad = kzalloc(sizeof(*in_mad), GFP_KERNEL);
  276. if (!in_mad)
  277. return -ENOMEM;
  278. init_query_mad(in_mad);
  279. in_mad->attr_id = IB_SMP_ATTR_NODE_INFO;
  280. err = mlx5_MAD_IFC(to_mdev(ibdev), 1, 1, 1, NULL, NULL, in_mad,
  281. out_mad);
  282. kfree(in_mad);
  283. return err;
  284. }
  285. int mlx5_query_mad_ifc_system_image_guid(struct ib_device *ibdev,
  286. __be64 *sys_image_guid)
  287. {
  288. struct ib_smp *out_mad = NULL;
  289. int err = -ENOMEM;
  290. out_mad = kmalloc(sizeof(*out_mad), GFP_KERNEL);
  291. if (!out_mad)
  292. return -ENOMEM;
  293. err = mlx5_query_mad_ifc_smp_attr_node_info(ibdev, out_mad);
  294. if (err)
  295. goto out;
  296. memcpy(sys_image_guid, out_mad->data + 4, 8);
  297. out:
  298. kfree(out_mad);
  299. return err;
  300. }
  301. int mlx5_query_mad_ifc_max_pkeys(struct ib_device *ibdev,
  302. u16 *max_pkeys)
  303. {
  304. struct ib_smp *out_mad = NULL;
  305. int err = -ENOMEM;
  306. out_mad = kmalloc(sizeof(*out_mad), GFP_KERNEL);
  307. if (!out_mad)
  308. return -ENOMEM;
  309. err = mlx5_query_mad_ifc_smp_attr_node_info(ibdev, out_mad);
  310. if (err)
  311. goto out;
  312. *max_pkeys = be16_to_cpup((__be16 *)(out_mad->data + 28));
  313. out:
  314. kfree(out_mad);
  315. return err;
  316. }
  317. int mlx5_query_mad_ifc_vendor_id(struct ib_device *ibdev,
  318. u32 *vendor_id)
  319. {
  320. struct ib_smp *out_mad = NULL;
  321. int err = -ENOMEM;
  322. out_mad = kmalloc(sizeof(*out_mad), GFP_KERNEL);
  323. if (!out_mad)
  324. return -ENOMEM;
  325. err = mlx5_query_mad_ifc_smp_attr_node_info(ibdev, out_mad);
  326. if (err)
  327. goto out;
  328. *vendor_id = be32_to_cpup((__be32 *)(out_mad->data + 36)) & 0xffff;
  329. out:
  330. kfree(out_mad);
  331. return err;
  332. }
  333. int mlx5_query_mad_ifc_node_desc(struct mlx5_ib_dev *dev, char *node_desc)
  334. {
  335. struct ib_smp *in_mad = NULL;
  336. struct ib_smp *out_mad = NULL;
  337. int err = -ENOMEM;
  338. in_mad = kzalloc(sizeof(*in_mad), GFP_KERNEL);
  339. out_mad = kmalloc(sizeof(*out_mad), GFP_KERNEL);
  340. if (!in_mad || !out_mad)
  341. goto out;
  342. init_query_mad(in_mad);
  343. in_mad->attr_id = IB_SMP_ATTR_NODE_DESC;
  344. err = mlx5_MAD_IFC(dev, 1, 1, 1, NULL, NULL, in_mad, out_mad);
  345. if (err)
  346. goto out;
  347. memcpy(node_desc, out_mad->data, IB_DEVICE_NODE_DESC_MAX);
  348. out:
  349. kfree(in_mad);
  350. kfree(out_mad);
  351. return err;
  352. }
  353. int mlx5_query_mad_ifc_node_guid(struct mlx5_ib_dev *dev, __be64 *node_guid)
  354. {
  355. struct ib_smp *in_mad = NULL;
  356. struct ib_smp *out_mad = NULL;
  357. int err = -ENOMEM;
  358. in_mad = kzalloc(sizeof(*in_mad), GFP_KERNEL);
  359. out_mad = kmalloc(sizeof(*out_mad), GFP_KERNEL);
  360. if (!in_mad || !out_mad)
  361. goto out;
  362. init_query_mad(in_mad);
  363. in_mad->attr_id = IB_SMP_ATTR_NODE_INFO;
  364. err = mlx5_MAD_IFC(dev, 1, 1, 1, NULL, NULL, in_mad, out_mad);
  365. if (err)
  366. goto out;
  367. memcpy(node_guid, out_mad->data + 12, 8);
  368. out:
  369. kfree(in_mad);
  370. kfree(out_mad);
  371. return err;
  372. }
  373. int mlx5_query_mad_ifc_pkey(struct ib_device *ibdev, u8 port, u16 index,
  374. u16 *pkey)
  375. {
  376. struct ib_smp *in_mad = NULL;
  377. struct ib_smp *out_mad = NULL;
  378. int err = -ENOMEM;
  379. in_mad = kzalloc(sizeof(*in_mad), GFP_KERNEL);
  380. out_mad = kmalloc(sizeof(*out_mad), GFP_KERNEL);
  381. if (!in_mad || !out_mad)
  382. goto out;
  383. init_query_mad(in_mad);
  384. in_mad->attr_id = IB_SMP_ATTR_PKEY_TABLE;
  385. in_mad->attr_mod = cpu_to_be32(index / 32);
  386. err = mlx5_MAD_IFC(to_mdev(ibdev), 1, 1, port, NULL, NULL, in_mad,
  387. out_mad);
  388. if (err)
  389. goto out;
  390. *pkey = be16_to_cpu(((__be16 *)out_mad->data)[index % 32]);
  391. out:
  392. kfree(in_mad);
  393. kfree(out_mad);
  394. return err;
  395. }
  396. int mlx5_query_mad_ifc_gids(struct ib_device *ibdev, u8 port, int index,
  397. union ib_gid *gid)
  398. {
  399. struct ib_smp *in_mad = NULL;
  400. struct ib_smp *out_mad = NULL;
  401. int err = -ENOMEM;
  402. in_mad = kzalloc(sizeof(*in_mad), GFP_KERNEL);
  403. out_mad = kmalloc(sizeof(*out_mad), GFP_KERNEL);
  404. if (!in_mad || !out_mad)
  405. goto out;
  406. init_query_mad(in_mad);
  407. in_mad->attr_id = IB_SMP_ATTR_PORT_INFO;
  408. in_mad->attr_mod = cpu_to_be32(port);
  409. err = mlx5_MAD_IFC(to_mdev(ibdev), 1, 1, port, NULL, NULL, in_mad,
  410. out_mad);
  411. if (err)
  412. goto out;
  413. memcpy(gid->raw, out_mad->data + 8, 8);
  414. init_query_mad(in_mad);
  415. in_mad->attr_id = IB_SMP_ATTR_GUID_INFO;
  416. in_mad->attr_mod = cpu_to_be32(index / 8);
  417. err = mlx5_MAD_IFC(to_mdev(ibdev), 1, 1, port, NULL, NULL, in_mad,
  418. out_mad);
  419. if (err)
  420. goto out;
  421. memcpy(gid->raw + 8, out_mad->data + (index % 8) * 8, 8);
  422. out:
  423. kfree(in_mad);
  424. kfree(out_mad);
  425. return err;
  426. }
  427. int mlx5_query_mad_ifc_port(struct ib_device *ibdev, u8 port,
  428. struct ib_port_attr *props)
  429. {
  430. struct mlx5_ib_dev *dev = to_mdev(ibdev);
  431. struct mlx5_core_dev *mdev = dev->mdev;
  432. struct ib_smp *in_mad = NULL;
  433. struct ib_smp *out_mad = NULL;
  434. int ext_active_speed;
  435. int err = -ENOMEM;
  436. if (port < 1 || port > dev->num_ports) {
  437. mlx5_ib_warn(dev, "invalid port number %d\n", port);
  438. return -EINVAL;
  439. }
  440. in_mad = kzalloc(sizeof(*in_mad), GFP_KERNEL);
  441. out_mad = kmalloc(sizeof(*out_mad), GFP_KERNEL);
  442. if (!in_mad || !out_mad)
  443. goto out;
  444. /* props being zeroed by the caller, avoid zeroing it here */
  445. init_query_mad(in_mad);
  446. in_mad->attr_id = IB_SMP_ATTR_PORT_INFO;
  447. in_mad->attr_mod = cpu_to_be32(port);
  448. err = mlx5_MAD_IFC(dev, 1, 1, port, NULL, NULL, in_mad, out_mad);
  449. if (err) {
  450. mlx5_ib_warn(dev, "err %d\n", err);
  451. goto out;
  452. }
  453. props->lid = be16_to_cpup((__be16 *)(out_mad->data + 16));
  454. props->lmc = out_mad->data[34] & 0x7;
  455. props->sm_lid = be16_to_cpup((__be16 *)(out_mad->data + 18));
  456. props->sm_sl = out_mad->data[36] & 0xf;
  457. props->state = out_mad->data[32] & 0xf;
  458. props->phys_state = out_mad->data[33] >> 4;
  459. props->port_cap_flags = be32_to_cpup((__be32 *)(out_mad->data + 20));
  460. props->gid_tbl_len = out_mad->data[50];
  461. props->max_msg_sz = 1 << MLX5_CAP_GEN(mdev, log_max_msg);
  462. props->pkey_tbl_len = mdev->port_caps[port - 1].pkey_table_len;
  463. props->bad_pkey_cntr = be16_to_cpup((__be16 *)(out_mad->data + 46));
  464. props->qkey_viol_cntr = be16_to_cpup((__be16 *)(out_mad->data + 48));
  465. props->active_width = out_mad->data[31] & 0xf;
  466. props->active_speed = out_mad->data[35] >> 4;
  467. props->max_mtu = out_mad->data[41] & 0xf;
  468. props->active_mtu = out_mad->data[36] >> 4;
  469. props->subnet_timeout = out_mad->data[51] & 0x1f;
  470. props->max_vl_num = out_mad->data[37] >> 4;
  471. props->init_type_reply = out_mad->data[41] >> 4;
  472. /* Check if extended speeds (EDR/FDR/...) are supported */
  473. if (props->port_cap_flags & IB_PORT_EXTENDED_SPEEDS_SUP) {
  474. ext_active_speed = out_mad->data[62] >> 4;
  475. switch (ext_active_speed) {
  476. case 1:
  477. props->active_speed = 16; /* FDR */
  478. break;
  479. case 2:
  480. props->active_speed = 32; /* EDR */
  481. break;
  482. }
  483. }
  484. /* If reported active speed is QDR, check if is FDR-10 */
  485. if (props->active_speed == 4) {
  486. if (mdev->port_caps[port - 1].ext_port_cap &
  487. MLX_EXT_PORT_CAP_FLAG_EXTENDED_PORT_INFO) {
  488. init_query_mad(in_mad);
  489. in_mad->attr_id = MLX5_ATTR_EXTENDED_PORT_INFO;
  490. in_mad->attr_mod = cpu_to_be32(port);
  491. err = mlx5_MAD_IFC(dev, 1, 1, port,
  492. NULL, NULL, in_mad, out_mad);
  493. if (err)
  494. goto out;
  495. /* Checking LinkSpeedActive for FDR-10 */
  496. if (out_mad->data[15] & 0x1)
  497. props->active_speed = 8;
  498. }
  499. }
  500. out:
  501. kfree(in_mad);
  502. kfree(out_mad);
  503. return err;
  504. }