i2c-designware-platdrv.c 13 KB

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  1. // SPDX-License-Identifier: GPL-2.0-or-later
  2. /*
  3. * Synopsys DesignWare I2C adapter driver.
  4. *
  5. * Based on the TI DAVINCI I2C adapter driver.
  6. *
  7. * Copyright (C) 2006 Texas Instruments.
  8. * Copyright (C) 2007 MontaVista Software Inc.
  9. * Copyright (C) 2009 Provigent Ltd.
  10. */
  11. #include <linux/acpi.h>
  12. #include <linux/clk-provider.h>
  13. #include <linux/clk.h>
  14. #include <linux/delay.h>
  15. #include <linux/dmi.h>
  16. #include <linux/err.h>
  17. #include <linux/errno.h>
  18. #include <linux/i2c.h>
  19. #include <linux/interrupt.h>
  20. #include <linux/io.h>
  21. #include <linux/kernel.h>
  22. #include <linux/module.h>
  23. #include <linux/of.h>
  24. #include <linux/platform_data/i2c-designware.h>
  25. #include <linux/platform_device.h>
  26. #include <linux/pm.h>
  27. #include <linux/pm_runtime.h>
  28. #include <linux/property.h>
  29. #include <linux/reset.h>
  30. #include <linux/sched.h>
  31. #include <linux/slab.h>
  32. #include <linux/suspend.h>
  33. #include "i2c-designware-core.h"
  34. static u32 i2c_dw_get_clk_rate_khz(struct dw_i2c_dev *dev)
  35. {
  36. return clk_get_rate(dev->clk)/1000;
  37. }
  38. #ifdef CONFIG_ACPI
  39. /*
  40. * The HCNT/LCNT information coming from ACPI should be the most accurate
  41. * for given platform. However, some systems get it wrong. On such systems
  42. * we get better results by calculating those based on the input clock.
  43. */
  44. static const struct dmi_system_id dw_i2c_no_acpi_params[] = {
  45. {
  46. .ident = "Dell Inspiron 7348",
  47. .matches = {
  48. DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
  49. DMI_MATCH(DMI_PRODUCT_NAME, "Inspiron 7348"),
  50. },
  51. },
  52. { }
  53. };
  54. static void dw_i2c_acpi_params(struct platform_device *pdev, char method[],
  55. u16 *hcnt, u16 *lcnt, u32 *sda_hold)
  56. {
  57. struct acpi_buffer buf = { ACPI_ALLOCATE_BUFFER };
  58. acpi_handle handle = ACPI_HANDLE(&pdev->dev);
  59. union acpi_object *obj;
  60. if (dmi_check_system(dw_i2c_no_acpi_params))
  61. return;
  62. if (ACPI_FAILURE(acpi_evaluate_object(handle, method, NULL, &buf)))
  63. return;
  64. obj = (union acpi_object *)buf.pointer;
  65. if (obj->type == ACPI_TYPE_PACKAGE && obj->package.count == 3) {
  66. const union acpi_object *objs = obj->package.elements;
  67. *hcnt = (u16)objs[0].integer.value;
  68. *lcnt = (u16)objs[1].integer.value;
  69. *sda_hold = (u32)objs[2].integer.value;
  70. }
  71. kfree(buf.pointer);
  72. }
  73. static int dw_i2c_acpi_configure(struct platform_device *pdev)
  74. {
  75. struct dw_i2c_dev *dev = platform_get_drvdata(pdev);
  76. struct i2c_timings *t = &dev->timings;
  77. u32 ss_ht = 0, fp_ht = 0, hs_ht = 0, fs_ht = 0;
  78. dev->adapter.nr = -1;
  79. dev->tx_fifo_depth = 32;
  80. dev->rx_fifo_depth = 32;
  81. /*
  82. * Try to get SDA hold time and *CNT values from an ACPI method for
  83. * selected speed modes.
  84. */
  85. dw_i2c_acpi_params(pdev, "SSCN", &dev->ss_hcnt, &dev->ss_lcnt, &ss_ht);
  86. dw_i2c_acpi_params(pdev, "FPCN", &dev->fp_hcnt, &dev->fp_lcnt, &fp_ht);
  87. dw_i2c_acpi_params(pdev, "HSCN", &dev->hs_hcnt, &dev->hs_lcnt, &hs_ht);
  88. dw_i2c_acpi_params(pdev, "FMCN", &dev->fs_hcnt, &dev->fs_lcnt, &fs_ht);
  89. switch (t->bus_freq_hz) {
  90. case 100000:
  91. dev->sda_hold_time = ss_ht;
  92. break;
  93. case 1000000:
  94. dev->sda_hold_time = fp_ht;
  95. break;
  96. case 3400000:
  97. dev->sda_hold_time = hs_ht;
  98. break;
  99. case 400000:
  100. default:
  101. dev->sda_hold_time = fs_ht;
  102. break;
  103. }
  104. return 0;
  105. }
  106. static const struct acpi_device_id dw_i2c_acpi_match[] = {
  107. { "INT33C2", 0 },
  108. { "INT33C3", 0 },
  109. { "INT3432", 0 },
  110. { "INT3433", 0 },
  111. { "80860F41", ACCESS_NO_IRQ_SUSPEND },
  112. { "808622C1", ACCESS_NO_IRQ_SUSPEND | MODEL_CHERRYTRAIL },
  113. { "AMD0010", ACCESS_INTR_MASK },
  114. { "AMDI0010", ACCESS_INTR_MASK },
  115. { "AMDI0510", 0 },
  116. { "APMC0D0F", 0 },
  117. { "HISI02A1", 0 },
  118. { "HISI02A2", 0 },
  119. { }
  120. };
  121. MODULE_DEVICE_TABLE(acpi, dw_i2c_acpi_match);
  122. #else
  123. static inline int dw_i2c_acpi_configure(struct platform_device *pdev)
  124. {
  125. return -ENODEV;
  126. }
  127. #endif
  128. #ifdef CONFIG_OF
  129. #define MSCC_ICPU_CFG_TWI_DELAY 0x0
  130. #define MSCC_ICPU_CFG_TWI_DELAY_ENABLE BIT(0)
  131. #define MSCC_ICPU_CFG_TWI_SPIKE_FILTER 0x4
  132. static int mscc_twi_set_sda_hold_time(struct dw_i2c_dev *dev)
  133. {
  134. writel((dev->sda_hold_time << 1) | MSCC_ICPU_CFG_TWI_DELAY_ENABLE,
  135. dev->ext + MSCC_ICPU_CFG_TWI_DELAY);
  136. return 0;
  137. }
  138. static int dw_i2c_of_configure(struct platform_device *pdev)
  139. {
  140. struct dw_i2c_dev *dev = platform_get_drvdata(pdev);
  141. struct resource *mem;
  142. switch (dev->flags & MODEL_MASK) {
  143. case MODEL_MSCC_OCELOT:
  144. mem = platform_get_resource(pdev, IORESOURCE_MEM, 1);
  145. dev->ext = devm_ioremap_resource(&pdev->dev, mem);
  146. if (!IS_ERR(dev->ext))
  147. dev->set_sda_hold_time = mscc_twi_set_sda_hold_time;
  148. break;
  149. default:
  150. break;
  151. }
  152. return 0;
  153. }
  154. static const struct of_device_id dw_i2c_of_match[] = {
  155. { .compatible = "snps,designware-i2c", },
  156. { .compatible = "mscc,ocelot-i2c", .data = (void *)MODEL_MSCC_OCELOT },
  157. {},
  158. };
  159. MODULE_DEVICE_TABLE(of, dw_i2c_of_match);
  160. #else
  161. static inline int dw_i2c_of_configure(struct platform_device *pdev)
  162. {
  163. return -ENODEV;
  164. }
  165. #endif
  166. static void i2c_dw_configure_master(struct dw_i2c_dev *dev)
  167. {
  168. struct i2c_timings *t = &dev->timings;
  169. dev->functionality = I2C_FUNC_10BIT_ADDR | DW_IC_DEFAULT_FUNCTIONALITY;
  170. dev->master_cfg = DW_IC_CON_MASTER | DW_IC_CON_SLAVE_DISABLE |
  171. DW_IC_CON_RESTART_EN;
  172. dev->mode = DW_IC_MASTER;
  173. switch (t->bus_freq_hz) {
  174. case 100000:
  175. dev->master_cfg |= DW_IC_CON_SPEED_STD;
  176. break;
  177. case 3400000:
  178. dev->master_cfg |= DW_IC_CON_SPEED_HIGH;
  179. break;
  180. default:
  181. dev->master_cfg |= DW_IC_CON_SPEED_FAST;
  182. }
  183. }
  184. static void i2c_dw_configure_slave(struct dw_i2c_dev *dev)
  185. {
  186. dev->functionality = I2C_FUNC_SLAVE | DW_IC_DEFAULT_FUNCTIONALITY;
  187. dev->slave_cfg = DW_IC_CON_RX_FIFO_FULL_HLD_CTRL |
  188. DW_IC_CON_RESTART_EN | DW_IC_CON_STOP_DET_IFADDRESSED;
  189. dev->mode = DW_IC_SLAVE;
  190. }
  191. static void dw_i2c_set_fifo_size(struct dw_i2c_dev *dev, int id)
  192. {
  193. u32 param, tx_fifo_depth, rx_fifo_depth;
  194. /*
  195. * Try to detect the FIFO depth if not set by interface driver,
  196. * the depth could be from 2 to 256 from HW spec.
  197. */
  198. param = i2c_dw_read_comp_param(dev);
  199. tx_fifo_depth = ((param >> 16) & 0xff) + 1;
  200. rx_fifo_depth = ((param >> 8) & 0xff) + 1;
  201. if (!dev->tx_fifo_depth) {
  202. dev->tx_fifo_depth = tx_fifo_depth;
  203. dev->rx_fifo_depth = rx_fifo_depth;
  204. dev->adapter.nr = id;
  205. } else if (tx_fifo_depth >= 2) {
  206. dev->tx_fifo_depth = min_t(u32, dev->tx_fifo_depth,
  207. tx_fifo_depth);
  208. dev->rx_fifo_depth = min_t(u32, dev->rx_fifo_depth,
  209. rx_fifo_depth);
  210. }
  211. }
  212. static void dw_i2c_plat_pm_cleanup(struct dw_i2c_dev *dev)
  213. {
  214. pm_runtime_disable(dev->dev);
  215. if (dev->shared_with_punit)
  216. pm_runtime_put_noidle(dev->dev);
  217. }
  218. static int dw_i2c_plat_probe(struct platform_device *pdev)
  219. {
  220. struct dw_i2c_platform_data *pdata = dev_get_platdata(&pdev->dev);
  221. struct i2c_adapter *adap;
  222. struct dw_i2c_dev *dev;
  223. struct i2c_timings *t;
  224. u32 acpi_speed;
  225. struct resource *mem;
  226. int i, irq, ret;
  227. static const int supported_speeds[] = {
  228. 0, 100000, 400000, 1000000, 3400000
  229. };
  230. irq = platform_get_irq(pdev, 0);
  231. if (irq < 0)
  232. return irq;
  233. dev = devm_kzalloc(&pdev->dev, sizeof(struct dw_i2c_dev), GFP_KERNEL);
  234. if (!dev)
  235. return -ENOMEM;
  236. mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  237. dev->base = devm_ioremap_resource(&pdev->dev, mem);
  238. if (IS_ERR(dev->base))
  239. return PTR_ERR(dev->base);
  240. dev->dev = &pdev->dev;
  241. dev->irq = irq;
  242. platform_set_drvdata(pdev, dev);
  243. dev->rst = devm_reset_control_get_optional_exclusive(&pdev->dev, NULL);
  244. if (IS_ERR(dev->rst)) {
  245. if (PTR_ERR(dev->rst) == -EPROBE_DEFER)
  246. return -EPROBE_DEFER;
  247. } else {
  248. reset_control_deassert(dev->rst);
  249. }
  250. t = &dev->timings;
  251. if (pdata)
  252. t->bus_freq_hz = pdata->i2c_scl_freq;
  253. else
  254. i2c_parse_fw_timings(&pdev->dev, t, false);
  255. acpi_speed = i2c_acpi_find_bus_speed(&pdev->dev);
  256. /*
  257. * Some DSTDs use a non standard speed, round down to the lowest
  258. * standard speed.
  259. */
  260. for (i = 1; i < ARRAY_SIZE(supported_speeds); i++) {
  261. if (acpi_speed < supported_speeds[i])
  262. break;
  263. }
  264. acpi_speed = supported_speeds[i - 1];
  265. /*
  266. * Find bus speed from the "clock-frequency" device property, ACPI
  267. * or by using fast mode if neither is set.
  268. */
  269. if (acpi_speed && t->bus_freq_hz)
  270. t->bus_freq_hz = min(t->bus_freq_hz, acpi_speed);
  271. else if (acpi_speed || t->bus_freq_hz)
  272. t->bus_freq_hz = max(t->bus_freq_hz, acpi_speed);
  273. else
  274. t->bus_freq_hz = 400000;
  275. dev->flags |= (uintptr_t)device_get_match_data(&pdev->dev);
  276. if (pdev->dev.of_node)
  277. dw_i2c_of_configure(pdev);
  278. if (has_acpi_companion(&pdev->dev))
  279. dw_i2c_acpi_configure(pdev);
  280. /*
  281. * Only standard mode at 100kHz, fast mode at 400kHz,
  282. * fast mode plus at 1MHz and high speed mode at 3.4MHz are supported.
  283. */
  284. if (t->bus_freq_hz != 100000 && t->bus_freq_hz != 400000 &&
  285. t->bus_freq_hz != 1000000 && t->bus_freq_hz != 3400000) {
  286. dev_err(&pdev->dev,
  287. "%d Hz is unsupported, only 100kHz, 400kHz, 1MHz and 3.4MHz are supported\n",
  288. t->bus_freq_hz);
  289. ret = -EINVAL;
  290. goto exit_reset;
  291. }
  292. ret = i2c_dw_probe_lock_support(dev);
  293. if (ret)
  294. goto exit_reset;
  295. if (i2c_detect_slave_mode(&pdev->dev))
  296. i2c_dw_configure_slave(dev);
  297. else
  298. i2c_dw_configure_master(dev);
  299. dev->clk = devm_clk_get(&pdev->dev, NULL);
  300. if (!i2c_dw_prepare_clk(dev, true)) {
  301. u64 clk_khz;
  302. dev->get_clk_rate_khz = i2c_dw_get_clk_rate_khz;
  303. clk_khz = dev->get_clk_rate_khz(dev);
  304. if (!dev->sda_hold_time && t->sda_hold_ns)
  305. dev->sda_hold_time =
  306. div_u64(clk_khz * t->sda_hold_ns + 500000, 1000000);
  307. }
  308. dw_i2c_set_fifo_size(dev, pdev->id);
  309. adap = &dev->adapter;
  310. adap->owner = THIS_MODULE;
  311. adap->class = I2C_CLASS_DEPRECATED;
  312. ACPI_COMPANION_SET(&adap->dev, ACPI_COMPANION(&pdev->dev));
  313. adap->dev.of_node = pdev->dev.of_node;
  314. dev_pm_set_driver_flags(&pdev->dev,
  315. DPM_FLAG_SMART_PREPARE |
  316. DPM_FLAG_SMART_SUSPEND |
  317. DPM_FLAG_LEAVE_SUSPENDED);
  318. /* The code below assumes runtime PM to be disabled. */
  319. WARN_ON(pm_runtime_enabled(&pdev->dev));
  320. pm_runtime_set_autosuspend_delay(&pdev->dev, 1000);
  321. pm_runtime_use_autosuspend(&pdev->dev);
  322. pm_runtime_set_active(&pdev->dev);
  323. if (dev->shared_with_punit)
  324. pm_runtime_get_noresume(&pdev->dev);
  325. pm_runtime_enable(&pdev->dev);
  326. if (dev->mode == DW_IC_SLAVE)
  327. ret = i2c_dw_probe_slave(dev);
  328. else
  329. ret = i2c_dw_probe(dev);
  330. if (ret)
  331. goto exit_probe;
  332. return ret;
  333. exit_probe:
  334. dw_i2c_plat_pm_cleanup(dev);
  335. exit_reset:
  336. if (!IS_ERR_OR_NULL(dev->rst))
  337. reset_control_assert(dev->rst);
  338. return ret;
  339. }
  340. static int dw_i2c_plat_remove(struct platform_device *pdev)
  341. {
  342. struct dw_i2c_dev *dev = platform_get_drvdata(pdev);
  343. pm_runtime_get_sync(&pdev->dev);
  344. i2c_del_adapter(&dev->adapter);
  345. dev->disable(dev);
  346. pm_runtime_dont_use_autosuspend(&pdev->dev);
  347. pm_runtime_put_sync(&pdev->dev);
  348. dw_i2c_plat_pm_cleanup(dev);
  349. if (!IS_ERR_OR_NULL(dev->rst))
  350. reset_control_assert(dev->rst);
  351. return 0;
  352. }
  353. #ifdef CONFIG_PM_SLEEP
  354. static int dw_i2c_plat_prepare(struct device *dev)
  355. {
  356. /*
  357. * If the ACPI companion device object is present for this device, it
  358. * may be accessed during suspend and resume of other devices via I2C
  359. * operation regions, so tell the PM core and middle layers to avoid
  360. * skipping system suspend/resume callbacks for it in that case.
  361. */
  362. return !has_acpi_companion(dev);
  363. }
  364. static void dw_i2c_plat_complete(struct device *dev)
  365. {
  366. /*
  367. * The device can only be in runtime suspend at this point if it has not
  368. * been resumed throughout the ending system suspend/resume cycle, so if
  369. * the platform firmware might mess up with it, request the runtime PM
  370. * framework to resume it.
  371. */
  372. if (pm_runtime_suspended(dev) && pm_resume_via_firmware())
  373. pm_request_resume(dev);
  374. }
  375. #else
  376. #define dw_i2c_plat_prepare NULL
  377. #define dw_i2c_plat_complete NULL
  378. #endif
  379. #ifdef CONFIG_PM
  380. static int dw_i2c_plat_suspend(struct device *dev)
  381. {
  382. struct dw_i2c_dev *i_dev = dev_get_drvdata(dev);
  383. if (i_dev->shared_with_punit)
  384. return 0;
  385. i_dev->disable(i_dev);
  386. i2c_dw_prepare_clk(i_dev, false);
  387. return 0;
  388. }
  389. static int dw_i2c_plat_resume(struct device *dev)
  390. {
  391. struct dw_i2c_dev *i_dev = dev_get_drvdata(dev);
  392. if (!i_dev->shared_with_punit)
  393. i2c_dw_prepare_clk(i_dev, true);
  394. i_dev->init(i_dev);
  395. return 0;
  396. }
  397. static const struct dev_pm_ops dw_i2c_dev_pm_ops = {
  398. .prepare = dw_i2c_plat_prepare,
  399. .complete = dw_i2c_plat_complete,
  400. SET_LATE_SYSTEM_SLEEP_PM_OPS(dw_i2c_plat_suspend, dw_i2c_plat_resume)
  401. SET_RUNTIME_PM_OPS(dw_i2c_plat_suspend, dw_i2c_plat_resume, NULL)
  402. };
  403. #define DW_I2C_DEV_PMOPS (&dw_i2c_dev_pm_ops)
  404. #else
  405. #define DW_I2C_DEV_PMOPS NULL
  406. #endif
  407. /* Work with hotplug and coldplug */
  408. MODULE_ALIAS("platform:i2c_designware");
  409. static struct platform_driver dw_i2c_driver = {
  410. .probe = dw_i2c_plat_probe,
  411. .remove = dw_i2c_plat_remove,
  412. .driver = {
  413. .name = "i2c_designware",
  414. .of_match_table = of_match_ptr(dw_i2c_of_match),
  415. .acpi_match_table = ACPI_PTR(dw_i2c_acpi_match),
  416. .pm = DW_I2C_DEV_PMOPS,
  417. },
  418. };
  419. static int __init dw_i2c_init_driver(void)
  420. {
  421. return platform_driver_register(&dw_i2c_driver);
  422. }
  423. subsys_initcall(dw_i2c_init_driver);
  424. static void __exit dw_i2c_exit_driver(void)
  425. {
  426. platform_driver_unregister(&dw_i2c_driver);
  427. }
  428. module_exit(dw_i2c_exit_driver);
  429. MODULE_AUTHOR("Baruch Siach <baruch@tkos.co.il>");
  430. MODULE_DESCRIPTION("Synopsys DesignWare I2C bus adapter");
  431. MODULE_LICENSE("GPL");