i2c-algo-pca.c 15 KB

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  1. /*
  2. * i2c-algo-pca.c i2c driver algorithms for PCA9564 adapters
  3. * Copyright (C) 2004 Arcom Control Systems
  4. * Copyright (C) 2008 Pengutronix
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License as published by
  8. * the Free Software Foundation; either version 2 of the License, or
  9. * (at your option) any later version.
  10. *
  11. * This program is distributed in the hope that it will be useful,
  12. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14. * GNU General Public License for more details.
  15. */
  16. #include <linux/kernel.h>
  17. #include <linux/module.h>
  18. #include <linux/moduleparam.h>
  19. #include <linux/delay.h>
  20. #include <linux/jiffies.h>
  21. #include <linux/errno.h>
  22. #include <linux/i2c.h>
  23. #include <linux/i2c-algo-pca.h>
  24. #define DEB1(fmt, args...) do { if (i2c_debug >= 1) \
  25. printk(KERN_DEBUG fmt, ## args); } while (0)
  26. #define DEB2(fmt, args...) do { if (i2c_debug >= 2) \
  27. printk(KERN_DEBUG fmt, ## args); } while (0)
  28. #define DEB3(fmt, args...) do { if (i2c_debug >= 3) \
  29. printk(KERN_DEBUG fmt, ## args); } while (0)
  30. static int i2c_debug;
  31. #define pca_outw(adap, reg, val) adap->write_byte(adap->data, reg, val)
  32. #define pca_inw(adap, reg) adap->read_byte(adap->data, reg)
  33. #define pca_status(adap) pca_inw(adap, I2C_PCA_STA)
  34. #define pca_clock(adap) adap->i2c_clock
  35. #define pca_set_con(adap, val) pca_outw(adap, I2C_PCA_CON, val)
  36. #define pca_get_con(adap) pca_inw(adap, I2C_PCA_CON)
  37. #define pca_wait(adap) adap->wait_for_completion(adap->data)
  38. static void pca_reset(struct i2c_algo_pca_data *adap)
  39. {
  40. if (adap->chip == I2C_PCA_CHIP_9665) {
  41. /* Ignore the reset function from the module,
  42. * we can use the parallel bus reset.
  43. */
  44. pca_outw(adap, I2C_PCA_INDPTR, I2C_PCA_IPRESET);
  45. pca_outw(adap, I2C_PCA_IND, 0xA5);
  46. pca_outw(adap, I2C_PCA_IND, 0x5A);
  47. } else {
  48. adap->reset_chip(adap->data);
  49. }
  50. }
  51. /*
  52. * Generate a start condition on the i2c bus.
  53. *
  54. * returns after the start condition has occurred
  55. */
  56. static int pca_start(struct i2c_algo_pca_data *adap)
  57. {
  58. int sta = pca_get_con(adap);
  59. DEB2("=== START\n");
  60. sta |= I2C_PCA_CON_STA;
  61. sta &= ~(I2C_PCA_CON_STO|I2C_PCA_CON_SI);
  62. pca_set_con(adap, sta);
  63. return pca_wait(adap);
  64. }
  65. /*
  66. * Generate a repeated start condition on the i2c bus
  67. *
  68. * return after the repeated start condition has occurred
  69. */
  70. static int pca_repeated_start(struct i2c_algo_pca_data *adap)
  71. {
  72. int sta = pca_get_con(adap);
  73. DEB2("=== REPEATED START\n");
  74. sta |= I2C_PCA_CON_STA;
  75. sta &= ~(I2C_PCA_CON_STO|I2C_PCA_CON_SI);
  76. pca_set_con(adap, sta);
  77. return pca_wait(adap);
  78. }
  79. /*
  80. * Generate a stop condition on the i2c bus
  81. *
  82. * returns after the stop condition has been generated
  83. *
  84. * STOPs do not generate an interrupt or set the SI flag, since the
  85. * part returns the idle state (0xf8). Hence we don't need to
  86. * pca_wait here.
  87. */
  88. static void pca_stop(struct i2c_algo_pca_data *adap)
  89. {
  90. int sta = pca_get_con(adap);
  91. DEB2("=== STOP\n");
  92. sta |= I2C_PCA_CON_STO;
  93. sta &= ~(I2C_PCA_CON_STA|I2C_PCA_CON_SI);
  94. pca_set_con(adap, sta);
  95. }
  96. /*
  97. * Send the slave address and R/W bit
  98. *
  99. * returns after the address has been sent
  100. */
  101. static int pca_address(struct i2c_algo_pca_data *adap,
  102. struct i2c_msg *msg)
  103. {
  104. int sta = pca_get_con(adap);
  105. int addr = i2c_8bit_addr_from_msg(msg);
  106. DEB2("=== SLAVE ADDRESS %#04x+%c=%#04x\n",
  107. msg->addr, msg->flags & I2C_M_RD ? 'R' : 'W', addr);
  108. pca_outw(adap, I2C_PCA_DAT, addr);
  109. sta &= ~(I2C_PCA_CON_STO|I2C_PCA_CON_STA|I2C_PCA_CON_SI);
  110. pca_set_con(adap, sta);
  111. return pca_wait(adap);
  112. }
  113. /*
  114. * Transmit a byte.
  115. *
  116. * Returns after the byte has been transmitted
  117. */
  118. static int pca_tx_byte(struct i2c_algo_pca_data *adap,
  119. __u8 b)
  120. {
  121. int sta = pca_get_con(adap);
  122. DEB2("=== WRITE %#04x\n", b);
  123. pca_outw(adap, I2C_PCA_DAT, b);
  124. sta &= ~(I2C_PCA_CON_STO|I2C_PCA_CON_STA|I2C_PCA_CON_SI);
  125. pca_set_con(adap, sta);
  126. return pca_wait(adap);
  127. }
  128. /*
  129. * Receive a byte
  130. *
  131. * returns immediately.
  132. */
  133. static void pca_rx_byte(struct i2c_algo_pca_data *adap,
  134. __u8 *b, int ack)
  135. {
  136. *b = pca_inw(adap, I2C_PCA_DAT);
  137. DEB2("=== READ %#04x %s\n", *b, ack ? "ACK" : "NACK");
  138. }
  139. /*
  140. * Setup ACK or NACK for next received byte and wait for it to arrive.
  141. *
  142. * Returns after next byte has arrived.
  143. */
  144. static int pca_rx_ack(struct i2c_algo_pca_data *adap,
  145. int ack)
  146. {
  147. int sta = pca_get_con(adap);
  148. sta &= ~(I2C_PCA_CON_STO|I2C_PCA_CON_STA|I2C_PCA_CON_SI|I2C_PCA_CON_AA);
  149. if (ack)
  150. sta |= I2C_PCA_CON_AA;
  151. pca_set_con(adap, sta);
  152. return pca_wait(adap);
  153. }
  154. static int pca_xfer(struct i2c_adapter *i2c_adap,
  155. struct i2c_msg *msgs,
  156. int num)
  157. {
  158. struct i2c_algo_pca_data *adap = i2c_adap->algo_data;
  159. struct i2c_msg *msg = NULL;
  160. int curmsg;
  161. int numbytes = 0;
  162. int state;
  163. int ret;
  164. int completed = 1;
  165. unsigned long timeout = jiffies + i2c_adap->timeout;
  166. while ((state = pca_status(adap)) != 0xf8) {
  167. if (time_before(jiffies, timeout)) {
  168. msleep(10);
  169. } else {
  170. dev_dbg(&i2c_adap->dev, "bus is not idle. status is "
  171. "%#04x\n", state);
  172. return -EBUSY;
  173. }
  174. }
  175. DEB1("{{{ XFER %d messages\n", num);
  176. if (i2c_debug >= 2) {
  177. for (curmsg = 0; curmsg < num; curmsg++) {
  178. int addr, i;
  179. msg = &msgs[curmsg];
  180. addr = (0x7f & msg->addr) ;
  181. if (msg->flags & I2C_M_RD)
  182. printk(KERN_INFO " [%02d] RD %d bytes from %#02x [%#02x, ...]\n",
  183. curmsg, msg->len, addr, (addr << 1) | 1);
  184. else {
  185. printk(KERN_INFO " [%02d] WR %d bytes to %#02x [%#02x%s",
  186. curmsg, msg->len, addr, addr << 1,
  187. msg->len == 0 ? "" : ", ");
  188. for (i = 0; i < msg->len; i++)
  189. printk("%#04x%s", msg->buf[i], i == msg->len - 1 ? "" : ", ");
  190. printk("]\n");
  191. }
  192. }
  193. }
  194. curmsg = 0;
  195. ret = -EIO;
  196. while (curmsg < num) {
  197. state = pca_status(adap);
  198. DEB3("STATE is 0x%02x\n", state);
  199. msg = &msgs[curmsg];
  200. switch (state) {
  201. case 0xf8: /* On reset or stop the bus is idle */
  202. completed = pca_start(adap);
  203. break;
  204. case 0x08: /* A START condition has been transmitted */
  205. case 0x10: /* A repeated start condition has been transmitted */
  206. completed = pca_address(adap, msg);
  207. break;
  208. case 0x18: /* SLA+W has been transmitted; ACK has been received */
  209. case 0x28: /* Data byte in I2CDAT has been transmitted; ACK has been received */
  210. if (numbytes < msg->len) {
  211. completed = pca_tx_byte(adap,
  212. msg->buf[numbytes]);
  213. numbytes++;
  214. break;
  215. }
  216. curmsg++; numbytes = 0;
  217. if (curmsg == num)
  218. pca_stop(adap);
  219. else
  220. completed = pca_repeated_start(adap);
  221. break;
  222. case 0x20: /* SLA+W has been transmitted; NOT ACK has been received */
  223. DEB2("NOT ACK received after SLA+W\n");
  224. pca_stop(adap);
  225. ret = -ENXIO;
  226. goto out;
  227. case 0x40: /* SLA+R has been transmitted; ACK has been received */
  228. completed = pca_rx_ack(adap, msg->len > 1);
  229. break;
  230. case 0x50: /* Data bytes has been received; ACK has been returned */
  231. if (numbytes < msg->len) {
  232. pca_rx_byte(adap, &msg->buf[numbytes], 1);
  233. numbytes++;
  234. completed = pca_rx_ack(adap,
  235. numbytes < msg->len - 1);
  236. break;
  237. }
  238. curmsg++; numbytes = 0;
  239. if (curmsg == num)
  240. pca_stop(adap);
  241. else
  242. completed = pca_repeated_start(adap);
  243. break;
  244. case 0x48: /* SLA+R has been transmitted; NOT ACK has been received */
  245. DEB2("NOT ACK received after SLA+R\n");
  246. pca_stop(adap);
  247. ret = -ENXIO;
  248. goto out;
  249. case 0x30: /* Data byte in I2CDAT has been transmitted; NOT ACK has been received */
  250. DEB2("NOT ACK received after data byte\n");
  251. pca_stop(adap);
  252. goto out;
  253. case 0x38: /* Arbitration lost during SLA+W, SLA+R or data bytes */
  254. DEB2("Arbitration lost\n");
  255. /*
  256. * The PCA9564 data sheet (2006-09-01) says "A
  257. * START condition will be transmitted when the
  258. * bus becomes free (STOP or SCL and SDA high)"
  259. * when the STA bit is set (p. 11).
  260. *
  261. * In case this won't work, try pca_reset()
  262. * instead.
  263. */
  264. pca_start(adap);
  265. goto out;
  266. case 0x58: /* Data byte has been received; NOT ACK has been returned */
  267. if (numbytes == msg->len - 1) {
  268. pca_rx_byte(adap, &msg->buf[numbytes], 0);
  269. curmsg++; numbytes = 0;
  270. if (curmsg == num)
  271. pca_stop(adap);
  272. else
  273. completed = pca_repeated_start(adap);
  274. } else {
  275. DEB2("NOT ACK sent after data byte received. "
  276. "Not final byte. numbytes %d. len %d\n",
  277. numbytes, msg->len);
  278. pca_stop(adap);
  279. goto out;
  280. }
  281. break;
  282. case 0x70: /* Bus error - SDA stuck low */
  283. DEB2("BUS ERROR - SDA Stuck low\n");
  284. pca_reset(adap);
  285. goto out;
  286. case 0x90: /* Bus error - SCL stuck low */
  287. DEB2("BUS ERROR - SCL Stuck low\n");
  288. pca_reset(adap);
  289. goto out;
  290. case 0x00: /* Bus error during master or slave mode due to illegal START or STOP condition */
  291. DEB2("BUS ERROR - Illegal START or STOP\n");
  292. pca_reset(adap);
  293. goto out;
  294. default:
  295. dev_err(&i2c_adap->dev, "unhandled SIO state 0x%02x\n", state);
  296. break;
  297. }
  298. if (!completed)
  299. goto out;
  300. }
  301. ret = curmsg;
  302. out:
  303. DEB1("}}} transferred %d/%d messages. "
  304. "status is %#04x. control is %#04x\n",
  305. curmsg, num, pca_status(adap),
  306. pca_get_con(adap));
  307. return ret;
  308. }
  309. static u32 pca_func(struct i2c_adapter *adap)
  310. {
  311. return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL;
  312. }
  313. static const struct i2c_algorithm pca_algo = {
  314. .master_xfer = pca_xfer,
  315. .functionality = pca_func,
  316. };
  317. static unsigned int pca_probe_chip(struct i2c_adapter *adap)
  318. {
  319. struct i2c_algo_pca_data *pca_data = adap->algo_data;
  320. /* The trick here is to check if there is an indirect register
  321. * available. If there is one, we will read the value we first
  322. * wrote on I2C_PCA_IADR. Otherwise, we will read the last value
  323. * we wrote on I2C_PCA_ADR
  324. */
  325. pca_outw(pca_data, I2C_PCA_INDPTR, I2C_PCA_IADR);
  326. pca_outw(pca_data, I2C_PCA_IND, 0xAA);
  327. pca_outw(pca_data, I2C_PCA_INDPTR, I2C_PCA_ITO);
  328. pca_outw(pca_data, I2C_PCA_IND, 0x00);
  329. pca_outw(pca_data, I2C_PCA_INDPTR, I2C_PCA_IADR);
  330. if (pca_inw(pca_data, I2C_PCA_IND) == 0xAA) {
  331. printk(KERN_INFO "%s: PCA9665 detected.\n", adap->name);
  332. pca_data->chip = I2C_PCA_CHIP_9665;
  333. } else {
  334. printk(KERN_INFO "%s: PCA9564 detected.\n", adap->name);
  335. pca_data->chip = I2C_PCA_CHIP_9564;
  336. }
  337. return pca_data->chip;
  338. }
  339. static int pca_init(struct i2c_adapter *adap)
  340. {
  341. struct i2c_algo_pca_data *pca_data = adap->algo_data;
  342. adap->algo = &pca_algo;
  343. if (pca_probe_chip(adap) == I2C_PCA_CHIP_9564) {
  344. static int freqs[] = {330, 288, 217, 146, 88, 59, 44, 36};
  345. int clock;
  346. if (pca_data->i2c_clock > 7) {
  347. switch (pca_data->i2c_clock) {
  348. case 330000:
  349. pca_data->i2c_clock = I2C_PCA_CON_330kHz;
  350. break;
  351. case 288000:
  352. pca_data->i2c_clock = I2C_PCA_CON_288kHz;
  353. break;
  354. case 217000:
  355. pca_data->i2c_clock = I2C_PCA_CON_217kHz;
  356. break;
  357. case 146000:
  358. pca_data->i2c_clock = I2C_PCA_CON_146kHz;
  359. break;
  360. case 88000:
  361. pca_data->i2c_clock = I2C_PCA_CON_88kHz;
  362. break;
  363. case 59000:
  364. pca_data->i2c_clock = I2C_PCA_CON_59kHz;
  365. break;
  366. case 44000:
  367. pca_data->i2c_clock = I2C_PCA_CON_44kHz;
  368. break;
  369. case 36000:
  370. pca_data->i2c_clock = I2C_PCA_CON_36kHz;
  371. break;
  372. default:
  373. printk(KERN_WARNING
  374. "%s: Invalid I2C clock speed selected."
  375. " Using default 59kHz.\n", adap->name);
  376. pca_data->i2c_clock = I2C_PCA_CON_59kHz;
  377. }
  378. } else {
  379. printk(KERN_WARNING "%s: "
  380. "Choosing the clock frequency based on "
  381. "index is deprecated."
  382. " Use the nominal frequency.\n", adap->name);
  383. }
  384. pca_reset(pca_data);
  385. clock = pca_clock(pca_data);
  386. printk(KERN_INFO "%s: Clock frequency is %dkHz\n",
  387. adap->name, freqs[clock]);
  388. pca_set_con(pca_data, I2C_PCA_CON_ENSIO | clock);
  389. } else {
  390. int clock;
  391. int mode;
  392. int tlow, thi;
  393. /* Values can be found on PCA9665 datasheet section 7.3.2.6 */
  394. int min_tlow, min_thi;
  395. /* These values are the maximum raise and fall values allowed
  396. * by the I2C operation mode (Standard, Fast or Fast+)
  397. * They are used (added) below to calculate the clock dividers
  398. * of PCA9665. Note that they are slightly different of the
  399. * real maximum, to allow the change on mode exactly on the
  400. * maximum clock rate for each mode
  401. */
  402. int raise_fall_time;
  403. if (pca_data->i2c_clock > 1265800) {
  404. printk(KERN_WARNING "%s: I2C clock speed too high."
  405. " Using 1265.8kHz.\n", adap->name);
  406. pca_data->i2c_clock = 1265800;
  407. }
  408. if (pca_data->i2c_clock < 60300) {
  409. printk(KERN_WARNING "%s: I2C clock speed too low."
  410. " Using 60.3kHz.\n", adap->name);
  411. pca_data->i2c_clock = 60300;
  412. }
  413. /* To avoid integer overflow, use clock/100 for calculations */
  414. clock = pca_clock(pca_data) / 100;
  415. if (pca_data->i2c_clock > 1000000) {
  416. mode = I2C_PCA_MODE_TURBO;
  417. min_tlow = 14;
  418. min_thi = 5;
  419. raise_fall_time = 22; /* Raise 11e-8s, Fall 11e-8s */
  420. } else if (pca_data->i2c_clock > 400000) {
  421. mode = I2C_PCA_MODE_FASTP;
  422. min_tlow = 17;
  423. min_thi = 9;
  424. raise_fall_time = 22; /* Raise 11e-8s, Fall 11e-8s */
  425. } else if (pca_data->i2c_clock > 100000) {
  426. mode = I2C_PCA_MODE_FAST;
  427. min_tlow = 44;
  428. min_thi = 20;
  429. raise_fall_time = 58; /* Raise 29e-8s, Fall 29e-8s */
  430. } else {
  431. mode = I2C_PCA_MODE_STD;
  432. min_tlow = 157;
  433. min_thi = 134;
  434. raise_fall_time = 127; /* Raise 29e-8s, Fall 98e-8s */
  435. }
  436. /* The minimum clock that respects the thi/tlow = 134/157 is
  437. * 64800 Hz. Below that, we have to fix the tlow to 255 and
  438. * calculate the thi factor.
  439. */
  440. if (clock < 648) {
  441. tlow = 255;
  442. thi = 1000000 - clock * raise_fall_time;
  443. thi /= (I2C_PCA_OSC_PER * clock) - tlow;
  444. } else {
  445. tlow = (1000000 - clock * raise_fall_time) * min_tlow;
  446. tlow /= I2C_PCA_OSC_PER * clock * (min_thi + min_tlow);
  447. thi = tlow * min_thi / min_tlow;
  448. }
  449. pca_reset(pca_data);
  450. printk(KERN_INFO
  451. "%s: Clock frequency is %dHz\n", adap->name, clock * 100);
  452. pca_outw(pca_data, I2C_PCA_INDPTR, I2C_PCA_IMODE);
  453. pca_outw(pca_data, I2C_PCA_IND, mode);
  454. pca_outw(pca_data, I2C_PCA_INDPTR, I2C_PCA_ISCLL);
  455. pca_outw(pca_data, I2C_PCA_IND, tlow);
  456. pca_outw(pca_data, I2C_PCA_INDPTR, I2C_PCA_ISCLH);
  457. pca_outw(pca_data, I2C_PCA_IND, thi);
  458. pca_set_con(pca_data, I2C_PCA_CON_ENSIO);
  459. }
  460. udelay(500); /* 500 us for oscillator to stabilise */
  461. return 0;
  462. }
  463. /*
  464. * registering functions to load algorithms at runtime
  465. */
  466. int i2c_pca_add_bus(struct i2c_adapter *adap)
  467. {
  468. int rval;
  469. rval = pca_init(adap);
  470. if (rval)
  471. return rval;
  472. return i2c_add_adapter(adap);
  473. }
  474. EXPORT_SYMBOL(i2c_pca_add_bus);
  475. int i2c_pca_add_numbered_bus(struct i2c_adapter *adap)
  476. {
  477. int rval;
  478. rval = pca_init(adap);
  479. if (rval)
  480. return rval;
  481. return i2c_add_numbered_adapter(adap);
  482. }
  483. EXPORT_SYMBOL(i2c_pca_add_numbered_bus);
  484. MODULE_AUTHOR("Ian Campbell <icampbell@arcom.com>, "
  485. "Wolfram Sang <w.sang@pengutronix.de>");
  486. MODULE_DESCRIPTION("I2C-Bus PCA9564/PCA9665 algorithm");
  487. MODULE_LICENSE("GPL");
  488. module_param(i2c_debug, int, 0);