coresight.c 28 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * Copyright (c) 2012, The Linux Foundation. All rights reserved.
  4. */
  5. #include <linux/kernel.h>
  6. #include <linux/init.h>
  7. #include <linux/types.h>
  8. #include <linux/device.h>
  9. #include <linux/io.h>
  10. #include <linux/err.h>
  11. #include <linux/export.h>
  12. #include <linux/slab.h>
  13. #include <linux/mutex.h>
  14. #include <linux/clk.h>
  15. #include <linux/coresight.h>
  16. #include <linux/of_platform.h>
  17. #include <linux/delay.h>
  18. #include <linux/pm_runtime.h>
  19. #include "coresight-priv.h"
  20. static DEFINE_MUTEX(coresight_mutex);
  21. /**
  22. * struct coresight_node - elements of a path, from source to sink
  23. * @csdev: Address of an element.
  24. * @link: hook to the list.
  25. */
  26. struct coresight_node {
  27. struct coresight_device *csdev;
  28. struct list_head link;
  29. };
  30. /*
  31. * When operating Coresight drivers from the sysFS interface, only a single
  32. * path can exist from a tracer (associated to a CPU) to a sink.
  33. */
  34. static DEFINE_PER_CPU(struct list_head *, tracer_path);
  35. /*
  36. * As of this writing only a single STM can be found in CS topologies. Since
  37. * there is no way to know if we'll ever see more and what kind of
  38. * configuration they will enact, for the time being only define a single path
  39. * for STM.
  40. */
  41. static struct list_head *stm_path;
  42. /*
  43. * When losing synchronisation a new barrier packet needs to be inserted at the
  44. * beginning of the data collected in a buffer. That way the decoder knows that
  45. * it needs to look for another sync sequence.
  46. */
  47. const u32 barrier_pkt[4] = {0x7fffffff, 0x7fffffff, 0x7fffffff, 0x7fffffff};
  48. static int coresight_id_match(struct device *dev, void *data)
  49. {
  50. int trace_id, i_trace_id;
  51. struct coresight_device *csdev, *i_csdev;
  52. csdev = data;
  53. i_csdev = to_coresight_device(dev);
  54. /*
  55. * No need to care about oneself and components that are not
  56. * sources or not enabled
  57. */
  58. if (i_csdev == csdev || !i_csdev->enable ||
  59. i_csdev->type != CORESIGHT_DEV_TYPE_SOURCE)
  60. return 0;
  61. /* Get the source ID for both compoment */
  62. trace_id = source_ops(csdev)->trace_id(csdev);
  63. i_trace_id = source_ops(i_csdev)->trace_id(i_csdev);
  64. /* All you need is one */
  65. if (trace_id == i_trace_id)
  66. return 1;
  67. return 0;
  68. }
  69. static int coresight_source_is_unique(struct coresight_device *csdev)
  70. {
  71. int trace_id = source_ops(csdev)->trace_id(csdev);
  72. /* this shouldn't happen */
  73. if (trace_id < 0)
  74. return 0;
  75. return !bus_for_each_dev(&coresight_bustype, NULL,
  76. csdev, coresight_id_match);
  77. }
  78. static int coresight_find_link_inport(struct coresight_device *csdev,
  79. struct coresight_device *parent)
  80. {
  81. int i;
  82. struct coresight_connection *conn;
  83. for (i = 0; i < parent->nr_outport; i++) {
  84. conn = &parent->conns[i];
  85. if (conn->child_dev == csdev)
  86. return conn->child_port;
  87. }
  88. dev_err(&csdev->dev, "couldn't find inport, parent: %s, child: %s\n",
  89. dev_name(&parent->dev), dev_name(&csdev->dev));
  90. return -ENODEV;
  91. }
  92. static int coresight_find_link_outport(struct coresight_device *csdev,
  93. struct coresight_device *child)
  94. {
  95. int i;
  96. struct coresight_connection *conn;
  97. for (i = 0; i < csdev->nr_outport; i++) {
  98. conn = &csdev->conns[i];
  99. if (conn->child_dev == child)
  100. return conn->outport;
  101. }
  102. dev_err(&csdev->dev, "couldn't find outport, parent: %s, child: %s\n",
  103. dev_name(&csdev->dev), dev_name(&child->dev));
  104. return -ENODEV;
  105. }
  106. static inline u32 coresight_read_claim_tags(void __iomem *base)
  107. {
  108. return readl_relaxed(base + CORESIGHT_CLAIMCLR);
  109. }
  110. static inline bool coresight_is_claimed_self_hosted(void __iomem *base)
  111. {
  112. return coresight_read_claim_tags(base) == CORESIGHT_CLAIM_SELF_HOSTED;
  113. }
  114. static inline bool coresight_is_claimed_any(void __iomem *base)
  115. {
  116. return coresight_read_claim_tags(base) != 0;
  117. }
  118. static inline void coresight_set_claim_tags(void __iomem *base)
  119. {
  120. writel_relaxed(CORESIGHT_CLAIM_SELF_HOSTED, base + CORESIGHT_CLAIMSET);
  121. isb();
  122. }
  123. static inline void coresight_clear_claim_tags(void __iomem *base)
  124. {
  125. writel_relaxed(CORESIGHT_CLAIM_SELF_HOSTED, base + CORESIGHT_CLAIMCLR);
  126. isb();
  127. }
  128. /*
  129. * coresight_claim_device_unlocked : Claim the device for self-hosted usage
  130. * to prevent an external tool from touching this device. As per PSCI
  131. * standards, section "Preserving the execution context" => "Debug and Trace
  132. * save and Restore", DBGCLAIM[1] is reserved for Self-hosted debug/trace and
  133. * DBGCLAIM[0] is reserved for external tools.
  134. *
  135. * Called with CS_UNLOCKed for the component.
  136. * Returns : 0 on success
  137. */
  138. int coresight_claim_device_unlocked(void __iomem *base)
  139. {
  140. if (coresight_is_claimed_any(base))
  141. return -EBUSY;
  142. coresight_set_claim_tags(base);
  143. if (coresight_is_claimed_self_hosted(base))
  144. return 0;
  145. /* There was a race setting the tags, clean up and fail */
  146. coresight_clear_claim_tags(base);
  147. return -EBUSY;
  148. }
  149. int coresight_claim_device(void __iomem *base)
  150. {
  151. int rc;
  152. CS_UNLOCK(base);
  153. rc = coresight_claim_device_unlocked(base);
  154. CS_LOCK(base);
  155. return rc;
  156. }
  157. /*
  158. * coresight_disclaim_device_unlocked : Clear the claim tags for the device.
  159. * Called with CS_UNLOCKed for the component.
  160. */
  161. void coresight_disclaim_device_unlocked(void __iomem *base)
  162. {
  163. if (coresight_is_claimed_self_hosted(base))
  164. coresight_clear_claim_tags(base);
  165. else
  166. /*
  167. * The external agent may have not honoured our claim
  168. * and has manipulated it. Or something else has seriously
  169. * gone wrong in our driver.
  170. */
  171. WARN_ON_ONCE(1);
  172. }
  173. void coresight_disclaim_device(void __iomem *base)
  174. {
  175. CS_UNLOCK(base);
  176. coresight_disclaim_device_unlocked(base);
  177. CS_LOCK(base);
  178. }
  179. static int coresight_enable_sink(struct coresight_device *csdev,
  180. u32 mode, void *data)
  181. {
  182. int ret;
  183. /*
  184. * We need to make sure the "new" session is compatible with the
  185. * existing "mode" of operation.
  186. */
  187. if (sink_ops(csdev)->enable) {
  188. ret = sink_ops(csdev)->enable(csdev, mode, data);
  189. if (ret)
  190. return ret;
  191. csdev->enable = true;
  192. }
  193. atomic_inc(csdev->refcnt);
  194. return 0;
  195. }
  196. static void coresight_disable_sink(struct coresight_device *csdev)
  197. {
  198. if (atomic_dec_return(csdev->refcnt) == 0) {
  199. if (sink_ops(csdev)->disable) {
  200. sink_ops(csdev)->disable(csdev);
  201. csdev->enable = false;
  202. }
  203. }
  204. }
  205. static int coresight_enable_link(struct coresight_device *csdev,
  206. struct coresight_device *parent,
  207. struct coresight_device *child)
  208. {
  209. int ret;
  210. int link_subtype;
  211. int refport, inport, outport;
  212. if (!parent || !child)
  213. return -EINVAL;
  214. inport = coresight_find_link_inport(csdev, parent);
  215. outport = coresight_find_link_outport(csdev, child);
  216. link_subtype = csdev->subtype.link_subtype;
  217. if (link_subtype == CORESIGHT_DEV_SUBTYPE_LINK_MERG)
  218. refport = inport;
  219. else if (link_subtype == CORESIGHT_DEV_SUBTYPE_LINK_SPLIT)
  220. refport = outport;
  221. else
  222. refport = 0;
  223. if (refport < 0)
  224. return refport;
  225. if (atomic_inc_return(&csdev->refcnt[refport]) == 1) {
  226. if (link_ops(csdev)->enable) {
  227. ret = link_ops(csdev)->enable(csdev, inport, outport);
  228. if (ret) {
  229. atomic_dec(&csdev->refcnt[refport]);
  230. return ret;
  231. }
  232. }
  233. }
  234. csdev->enable = true;
  235. return 0;
  236. }
  237. static void coresight_disable_link(struct coresight_device *csdev,
  238. struct coresight_device *parent,
  239. struct coresight_device *child)
  240. {
  241. int i, nr_conns;
  242. int link_subtype;
  243. int refport, inport, outport;
  244. if (!parent || !child)
  245. return;
  246. inport = coresight_find_link_inport(csdev, parent);
  247. outport = coresight_find_link_outport(csdev, child);
  248. link_subtype = csdev->subtype.link_subtype;
  249. if (link_subtype == CORESIGHT_DEV_SUBTYPE_LINK_MERG) {
  250. refport = inport;
  251. nr_conns = csdev->nr_inport;
  252. } else if (link_subtype == CORESIGHT_DEV_SUBTYPE_LINK_SPLIT) {
  253. refport = outport;
  254. nr_conns = csdev->nr_outport;
  255. } else {
  256. refport = 0;
  257. nr_conns = 1;
  258. }
  259. if (atomic_dec_return(&csdev->refcnt[refport]) == 0) {
  260. if (link_ops(csdev)->disable)
  261. link_ops(csdev)->disable(csdev, inport, outport);
  262. }
  263. for (i = 0; i < nr_conns; i++)
  264. if (atomic_read(&csdev->refcnt[i]) != 0)
  265. return;
  266. csdev->enable = false;
  267. }
  268. static int coresight_enable_source(struct coresight_device *csdev, u32 mode)
  269. {
  270. int ret;
  271. if (!coresight_source_is_unique(csdev)) {
  272. dev_warn(&csdev->dev, "traceID %d not unique\n",
  273. source_ops(csdev)->trace_id(csdev));
  274. return -EINVAL;
  275. }
  276. if (!csdev->enable) {
  277. if (source_ops(csdev)->enable) {
  278. ret = source_ops(csdev)->enable(csdev, NULL, mode);
  279. if (ret)
  280. return ret;
  281. }
  282. csdev->enable = true;
  283. }
  284. atomic_inc(csdev->refcnt);
  285. return 0;
  286. }
  287. /**
  288. * coresight_disable_source - Drop the reference count by 1 and disable
  289. * the device if there are no users left.
  290. *
  291. * @csdev - The coresight device to disable
  292. *
  293. * Returns true if the device has been disabled.
  294. */
  295. static bool coresight_disable_source(struct coresight_device *csdev)
  296. {
  297. if (atomic_dec_return(csdev->refcnt) == 0) {
  298. if (source_ops(csdev)->disable)
  299. source_ops(csdev)->disable(csdev, NULL);
  300. csdev->enable = false;
  301. }
  302. return !csdev->enable;
  303. }
  304. /*
  305. * coresight_disable_path_from : Disable components in the given path beyond
  306. * @nd in the list. If @nd is NULL, all the components, except the SOURCE are
  307. * disabled.
  308. */
  309. static void coresight_disable_path_from(struct list_head *path,
  310. struct coresight_node *nd)
  311. {
  312. u32 type;
  313. struct coresight_device *csdev, *parent, *child;
  314. if (!nd)
  315. nd = list_first_entry(path, struct coresight_node, link);
  316. list_for_each_entry_continue(nd, path, link) {
  317. csdev = nd->csdev;
  318. type = csdev->type;
  319. /*
  320. * ETF devices are tricky... They can be a link or a sink,
  321. * depending on how they are configured. If an ETF has been
  322. * "activated" it will be configured as a sink, otherwise
  323. * go ahead with the link configuration.
  324. */
  325. if (type == CORESIGHT_DEV_TYPE_LINKSINK)
  326. type = (csdev == coresight_get_sink(path)) ?
  327. CORESIGHT_DEV_TYPE_SINK :
  328. CORESIGHT_DEV_TYPE_LINK;
  329. switch (type) {
  330. case CORESIGHT_DEV_TYPE_SINK:
  331. coresight_disable_sink(csdev);
  332. break;
  333. case CORESIGHT_DEV_TYPE_SOURCE:
  334. /*
  335. * We skip the first node in the path assuming that it
  336. * is the source. So we don't expect a source device in
  337. * the middle of a path.
  338. */
  339. WARN_ON(1);
  340. break;
  341. case CORESIGHT_DEV_TYPE_LINK:
  342. parent = list_prev_entry(nd, link)->csdev;
  343. child = list_next_entry(nd, link)->csdev;
  344. coresight_disable_link(csdev, parent, child);
  345. break;
  346. default:
  347. break;
  348. }
  349. }
  350. }
  351. void coresight_disable_path(struct list_head *path)
  352. {
  353. coresight_disable_path_from(path, NULL);
  354. }
  355. int coresight_enable_path(struct list_head *path, u32 mode, void *sink_data)
  356. {
  357. int ret = 0;
  358. u32 type;
  359. struct coresight_node *nd;
  360. struct coresight_device *csdev, *parent, *child;
  361. list_for_each_entry_reverse(nd, path, link) {
  362. csdev = nd->csdev;
  363. type = csdev->type;
  364. /*
  365. * ETF devices are tricky... They can be a link or a sink,
  366. * depending on how they are configured. If an ETF has been
  367. * "activated" it will be configured as a sink, otherwise
  368. * go ahead with the link configuration.
  369. */
  370. if (type == CORESIGHT_DEV_TYPE_LINKSINK)
  371. type = (csdev == coresight_get_sink(path)) ?
  372. CORESIGHT_DEV_TYPE_SINK :
  373. CORESIGHT_DEV_TYPE_LINK;
  374. switch (type) {
  375. case CORESIGHT_DEV_TYPE_SINK:
  376. ret = coresight_enable_sink(csdev, mode, sink_data);
  377. /*
  378. * Sink is the first component turned on. If we
  379. * failed to enable the sink, there are no components
  380. * that need disabling. Disabling the path here
  381. * would mean we could disrupt an existing session.
  382. */
  383. if (ret)
  384. goto out;
  385. break;
  386. case CORESIGHT_DEV_TYPE_SOURCE:
  387. /* sources are enabled from either sysFS or Perf */
  388. break;
  389. case CORESIGHT_DEV_TYPE_LINK:
  390. parent = list_prev_entry(nd, link)->csdev;
  391. child = list_next_entry(nd, link)->csdev;
  392. ret = coresight_enable_link(csdev, parent, child);
  393. if (ret)
  394. goto err;
  395. break;
  396. default:
  397. goto err;
  398. }
  399. }
  400. out:
  401. return ret;
  402. err:
  403. coresight_disable_path_from(path, nd);
  404. goto out;
  405. }
  406. struct coresight_device *coresight_get_sink(struct list_head *path)
  407. {
  408. struct coresight_device *csdev;
  409. if (!path)
  410. return NULL;
  411. csdev = list_last_entry(path, struct coresight_node, link)->csdev;
  412. if (csdev->type != CORESIGHT_DEV_TYPE_SINK &&
  413. csdev->type != CORESIGHT_DEV_TYPE_LINKSINK)
  414. return NULL;
  415. return csdev;
  416. }
  417. static int coresight_enabled_sink(struct device *dev, void *data)
  418. {
  419. bool *reset = data;
  420. struct coresight_device *csdev = to_coresight_device(dev);
  421. if ((csdev->type == CORESIGHT_DEV_TYPE_SINK ||
  422. csdev->type == CORESIGHT_DEV_TYPE_LINKSINK) &&
  423. csdev->activated) {
  424. /*
  425. * Now that we have a handle on the sink for this session,
  426. * disable the sysFS "enable_sink" flag so that possible
  427. * concurrent perf session that wish to use another sink don't
  428. * trip on it. Doing so has no ramification for the current
  429. * session.
  430. */
  431. if (*reset)
  432. csdev->activated = false;
  433. return 1;
  434. }
  435. return 0;
  436. }
  437. /**
  438. * coresight_get_enabled_sink - returns the first enabled sink found on the bus
  439. * @deactivate: Whether the 'enable_sink' flag should be reset
  440. *
  441. * When operated from perf the deactivate parameter should be set to 'true'.
  442. * That way the "enabled_sink" flag of the sink that was selected can be reset,
  443. * allowing for other concurrent perf sessions to choose a different sink.
  444. *
  445. * When operated from sysFS users have full control and as such the deactivate
  446. * parameter should be set to 'false', hence mandating users to explicitly
  447. * clear the flag.
  448. */
  449. struct coresight_device *coresight_get_enabled_sink(bool deactivate)
  450. {
  451. struct device *dev = NULL;
  452. dev = bus_find_device(&coresight_bustype, NULL, &deactivate,
  453. coresight_enabled_sink);
  454. return dev ? to_coresight_device(dev) : NULL;
  455. }
  456. /*
  457. * coresight_grab_device - Power up this device and any of the helper
  458. * devices connected to it for trace operation. Since the helper devices
  459. * don't appear on the trace path, they should be handled along with the
  460. * the master device.
  461. */
  462. static void coresight_grab_device(struct coresight_device *csdev)
  463. {
  464. int i;
  465. for (i = 0; i < csdev->nr_outport; i++) {
  466. struct coresight_device *child = csdev->conns[i].child_dev;
  467. if (child && child->type == CORESIGHT_DEV_TYPE_HELPER)
  468. pm_runtime_get_sync(child->dev.parent);
  469. }
  470. pm_runtime_get_sync(csdev->dev.parent);
  471. }
  472. /*
  473. * coresight_drop_device - Release this device and any of the helper
  474. * devices connected to it.
  475. */
  476. static void coresight_drop_device(struct coresight_device *csdev)
  477. {
  478. int i;
  479. pm_runtime_put(csdev->dev.parent);
  480. for (i = 0; i < csdev->nr_outport; i++) {
  481. struct coresight_device *child = csdev->conns[i].child_dev;
  482. if (child && child->type == CORESIGHT_DEV_TYPE_HELPER)
  483. pm_runtime_put(child->dev.parent);
  484. }
  485. }
  486. /**
  487. * _coresight_build_path - recursively build a path from a @csdev to a sink.
  488. * @csdev: The device to start from.
  489. * @path: The list to add devices to.
  490. *
  491. * The tree of Coresight device is traversed until an activated sink is
  492. * found. From there the sink is added to the list along with all the
  493. * devices that led to that point - the end result is a list from source
  494. * to sink. In that list the source is the first device and the sink the
  495. * last one.
  496. */
  497. static int _coresight_build_path(struct coresight_device *csdev,
  498. struct coresight_device *sink,
  499. struct list_head *path)
  500. {
  501. int i;
  502. bool found = false;
  503. struct coresight_node *node;
  504. /* An activated sink has been found. Enqueue the element */
  505. if (csdev == sink)
  506. goto out;
  507. /* Not a sink - recursively explore each port found on this element */
  508. for (i = 0; i < csdev->nr_outport; i++) {
  509. struct coresight_device *child_dev = csdev->conns[i].child_dev;
  510. if (child_dev &&
  511. _coresight_build_path(child_dev, sink, path) == 0) {
  512. found = true;
  513. break;
  514. }
  515. }
  516. if (!found)
  517. return -ENODEV;
  518. out:
  519. /*
  520. * A path from this element to a sink has been found. The elements
  521. * leading to the sink are already enqueued, all that is left to do
  522. * is tell the PM runtime core we need this element and add a node
  523. * for it.
  524. */
  525. node = kzalloc(sizeof(struct coresight_node), GFP_KERNEL);
  526. if (!node)
  527. return -ENOMEM;
  528. coresight_grab_device(csdev);
  529. node->csdev = csdev;
  530. list_add(&node->link, path);
  531. return 0;
  532. }
  533. struct list_head *coresight_build_path(struct coresight_device *source,
  534. struct coresight_device *sink)
  535. {
  536. struct list_head *path;
  537. int rc;
  538. if (!sink)
  539. return ERR_PTR(-EINVAL);
  540. path = kzalloc(sizeof(struct list_head), GFP_KERNEL);
  541. if (!path)
  542. return ERR_PTR(-ENOMEM);
  543. INIT_LIST_HEAD(path);
  544. rc = _coresight_build_path(source, sink, path);
  545. if (rc) {
  546. kfree(path);
  547. return ERR_PTR(rc);
  548. }
  549. return path;
  550. }
  551. /**
  552. * coresight_release_path - release a previously built path.
  553. * @path: the path to release.
  554. *
  555. * Go through all the elements of a path and 1) removed it from the list and
  556. * 2) free the memory allocated for each node.
  557. */
  558. void coresight_release_path(struct list_head *path)
  559. {
  560. struct coresight_device *csdev;
  561. struct coresight_node *nd, *next;
  562. list_for_each_entry_safe(nd, next, path, link) {
  563. csdev = nd->csdev;
  564. coresight_drop_device(csdev);
  565. list_del(&nd->link);
  566. kfree(nd);
  567. }
  568. kfree(path);
  569. path = NULL;
  570. }
  571. /** coresight_validate_source - make sure a source has the right credentials
  572. * @csdev: the device structure for a source.
  573. * @function: the function this was called from.
  574. *
  575. * Assumes the coresight_mutex is held.
  576. */
  577. static int coresight_validate_source(struct coresight_device *csdev,
  578. const char *function)
  579. {
  580. u32 type, subtype;
  581. type = csdev->type;
  582. subtype = csdev->subtype.source_subtype;
  583. if (type != CORESIGHT_DEV_TYPE_SOURCE) {
  584. dev_err(&csdev->dev, "wrong device type in %s\n", function);
  585. return -EINVAL;
  586. }
  587. if (subtype != CORESIGHT_DEV_SUBTYPE_SOURCE_PROC &&
  588. subtype != CORESIGHT_DEV_SUBTYPE_SOURCE_SOFTWARE) {
  589. dev_err(&csdev->dev, "wrong device subtype in %s\n", function);
  590. return -EINVAL;
  591. }
  592. return 0;
  593. }
  594. int coresight_enable(struct coresight_device *csdev)
  595. {
  596. int cpu, ret = 0;
  597. struct coresight_device *sink;
  598. struct list_head *path;
  599. enum coresight_dev_subtype_source subtype;
  600. subtype = csdev->subtype.source_subtype;
  601. mutex_lock(&coresight_mutex);
  602. ret = coresight_validate_source(csdev, __func__);
  603. if (ret)
  604. goto out;
  605. if (csdev->enable) {
  606. /*
  607. * There could be multiple applications driving the software
  608. * source. So keep the refcount for each such user when the
  609. * source is already enabled.
  610. */
  611. if (subtype == CORESIGHT_DEV_SUBTYPE_SOURCE_SOFTWARE)
  612. atomic_inc(csdev->refcnt);
  613. goto out;
  614. }
  615. /*
  616. * Search for a valid sink for this session but don't reset the
  617. * "enable_sink" flag in sysFS. Users get to do that explicitly.
  618. */
  619. sink = coresight_get_enabled_sink(false);
  620. if (!sink) {
  621. ret = -EINVAL;
  622. goto out;
  623. }
  624. path = coresight_build_path(csdev, sink);
  625. if (IS_ERR(path)) {
  626. pr_err("building path(s) failed\n");
  627. ret = PTR_ERR(path);
  628. goto out;
  629. }
  630. ret = coresight_enable_path(path, CS_MODE_SYSFS, NULL);
  631. if (ret)
  632. goto err_path;
  633. ret = coresight_enable_source(csdev, CS_MODE_SYSFS);
  634. if (ret)
  635. goto err_source;
  636. switch (subtype) {
  637. case CORESIGHT_DEV_SUBTYPE_SOURCE_PROC:
  638. /*
  639. * When working from sysFS it is important to keep track
  640. * of the paths that were created so that they can be
  641. * undone in 'coresight_disable()'. Since there can only
  642. * be a single session per tracer (when working from sysFS)
  643. * a per-cpu variable will do just fine.
  644. */
  645. cpu = source_ops(csdev)->cpu_id(csdev);
  646. per_cpu(tracer_path, cpu) = path;
  647. break;
  648. case CORESIGHT_DEV_SUBTYPE_SOURCE_SOFTWARE:
  649. stm_path = path;
  650. break;
  651. default:
  652. /* We can't be here */
  653. break;
  654. }
  655. out:
  656. mutex_unlock(&coresight_mutex);
  657. return ret;
  658. err_source:
  659. coresight_disable_path(path);
  660. err_path:
  661. coresight_release_path(path);
  662. goto out;
  663. }
  664. EXPORT_SYMBOL_GPL(coresight_enable);
  665. void coresight_disable(struct coresight_device *csdev)
  666. {
  667. int cpu, ret;
  668. struct list_head *path = NULL;
  669. mutex_lock(&coresight_mutex);
  670. ret = coresight_validate_source(csdev, __func__);
  671. if (ret)
  672. goto out;
  673. if (!csdev->enable || !coresight_disable_source(csdev))
  674. goto out;
  675. switch (csdev->subtype.source_subtype) {
  676. case CORESIGHT_DEV_SUBTYPE_SOURCE_PROC:
  677. cpu = source_ops(csdev)->cpu_id(csdev);
  678. path = per_cpu(tracer_path, cpu);
  679. per_cpu(tracer_path, cpu) = NULL;
  680. break;
  681. case CORESIGHT_DEV_SUBTYPE_SOURCE_SOFTWARE:
  682. path = stm_path;
  683. stm_path = NULL;
  684. break;
  685. default:
  686. /* We can't be here */
  687. break;
  688. }
  689. coresight_disable_path(path);
  690. coresight_release_path(path);
  691. out:
  692. mutex_unlock(&coresight_mutex);
  693. }
  694. EXPORT_SYMBOL_GPL(coresight_disable);
  695. static ssize_t enable_sink_show(struct device *dev,
  696. struct device_attribute *attr, char *buf)
  697. {
  698. struct coresight_device *csdev = to_coresight_device(dev);
  699. return scnprintf(buf, PAGE_SIZE, "%u\n", csdev->activated);
  700. }
  701. static ssize_t enable_sink_store(struct device *dev,
  702. struct device_attribute *attr,
  703. const char *buf, size_t size)
  704. {
  705. int ret;
  706. unsigned long val;
  707. struct coresight_device *csdev = to_coresight_device(dev);
  708. ret = kstrtoul(buf, 10, &val);
  709. if (ret)
  710. return ret;
  711. if (val)
  712. csdev->activated = true;
  713. else
  714. csdev->activated = false;
  715. return size;
  716. }
  717. static DEVICE_ATTR_RW(enable_sink);
  718. static ssize_t enable_source_show(struct device *dev,
  719. struct device_attribute *attr, char *buf)
  720. {
  721. struct coresight_device *csdev = to_coresight_device(dev);
  722. return scnprintf(buf, PAGE_SIZE, "%u\n", csdev->enable);
  723. }
  724. static ssize_t enable_source_store(struct device *dev,
  725. struct device_attribute *attr,
  726. const char *buf, size_t size)
  727. {
  728. int ret = 0;
  729. unsigned long val;
  730. struct coresight_device *csdev = to_coresight_device(dev);
  731. ret = kstrtoul(buf, 10, &val);
  732. if (ret)
  733. return ret;
  734. if (val) {
  735. ret = coresight_enable(csdev);
  736. if (ret)
  737. return ret;
  738. } else {
  739. coresight_disable(csdev);
  740. }
  741. return size;
  742. }
  743. static DEVICE_ATTR_RW(enable_source);
  744. static struct attribute *coresight_sink_attrs[] = {
  745. &dev_attr_enable_sink.attr,
  746. NULL,
  747. };
  748. ATTRIBUTE_GROUPS(coresight_sink);
  749. static struct attribute *coresight_source_attrs[] = {
  750. &dev_attr_enable_source.attr,
  751. NULL,
  752. };
  753. ATTRIBUTE_GROUPS(coresight_source);
  754. static struct device_type coresight_dev_type[] = {
  755. {
  756. .name = "none",
  757. },
  758. {
  759. .name = "sink",
  760. .groups = coresight_sink_groups,
  761. },
  762. {
  763. .name = "link",
  764. },
  765. {
  766. .name = "linksink",
  767. .groups = coresight_sink_groups,
  768. },
  769. {
  770. .name = "source",
  771. .groups = coresight_source_groups,
  772. },
  773. {
  774. .name = "helper",
  775. },
  776. };
  777. static void coresight_device_release(struct device *dev)
  778. {
  779. struct coresight_device *csdev = to_coresight_device(dev);
  780. kfree(csdev->conns);
  781. kfree(csdev->refcnt);
  782. kfree(csdev);
  783. }
  784. static int coresight_orphan_match(struct device *dev, void *data)
  785. {
  786. int i;
  787. bool still_orphan = false;
  788. struct coresight_device *csdev, *i_csdev;
  789. struct coresight_connection *conn;
  790. csdev = data;
  791. i_csdev = to_coresight_device(dev);
  792. /* No need to check oneself */
  793. if (csdev == i_csdev)
  794. return 0;
  795. /* Move on to another component if no connection is orphan */
  796. if (!i_csdev->orphan)
  797. return 0;
  798. /*
  799. * Circle throuch all the connection of that component. If we find
  800. * an orphan connection whose name matches @csdev, link it.
  801. */
  802. for (i = 0; i < i_csdev->nr_outport; i++) {
  803. conn = &i_csdev->conns[i];
  804. /* We have found at least one orphan connection */
  805. if (conn->child_dev == NULL) {
  806. /* Does it match this newly added device? */
  807. if (conn->child_name &&
  808. !strcmp(dev_name(&csdev->dev), conn->child_name)) {
  809. conn->child_dev = csdev;
  810. } else {
  811. /* This component still has an orphan */
  812. still_orphan = true;
  813. }
  814. }
  815. }
  816. i_csdev->orphan = still_orphan;
  817. /*
  818. * Returning '0' ensures that all known component on the
  819. * bus will be checked.
  820. */
  821. return 0;
  822. }
  823. static void coresight_fixup_orphan_conns(struct coresight_device *csdev)
  824. {
  825. /*
  826. * No need to check for a return value as orphan connection(s)
  827. * are hooked-up with each newly added component.
  828. */
  829. bus_for_each_dev(&coresight_bustype, NULL,
  830. csdev, coresight_orphan_match);
  831. }
  832. static void coresight_fixup_device_conns(struct coresight_device *csdev)
  833. {
  834. int i;
  835. for (i = 0; i < csdev->nr_outport; i++) {
  836. struct coresight_connection *conn = &csdev->conns[i];
  837. struct device *dev = NULL;
  838. if (conn->child_name)
  839. dev = bus_find_device_by_name(&coresight_bustype, NULL,
  840. conn->child_name);
  841. if (dev) {
  842. conn->child_dev = to_coresight_device(dev);
  843. /* and put reference from 'bus_find_device()' */
  844. put_device(dev);
  845. } else {
  846. csdev->orphan = true;
  847. conn->child_dev = NULL;
  848. }
  849. }
  850. }
  851. static int coresight_remove_match(struct device *dev, void *data)
  852. {
  853. int i;
  854. struct coresight_device *csdev, *iterator;
  855. struct coresight_connection *conn;
  856. csdev = data;
  857. iterator = to_coresight_device(dev);
  858. /* No need to check oneself */
  859. if (csdev == iterator)
  860. return 0;
  861. /*
  862. * Circle throuch all the connection of that component. If we find
  863. * a connection whose name matches @csdev, remove it.
  864. */
  865. for (i = 0; i < iterator->nr_outport; i++) {
  866. conn = &iterator->conns[i];
  867. if (conn->child_dev == NULL)
  868. continue;
  869. if (!strcmp(dev_name(&csdev->dev), conn->child_name)) {
  870. iterator->orphan = true;
  871. conn->child_dev = NULL;
  872. /* No need to continue */
  873. break;
  874. }
  875. }
  876. /*
  877. * Returning '0' ensures that all known component on the
  878. * bus will be checked.
  879. */
  880. return 0;
  881. }
  882. static void coresight_remove_conns(struct coresight_device *csdev)
  883. {
  884. bus_for_each_dev(&coresight_bustype, NULL,
  885. csdev, coresight_remove_match);
  886. }
  887. /**
  888. * coresight_timeout - loop until a bit has changed to a specific state.
  889. * @addr: base address of the area of interest.
  890. * @offset: address of a register, starting from @addr.
  891. * @position: the position of the bit of interest.
  892. * @value: the value the bit should have.
  893. *
  894. * Return: 0 as soon as the bit has taken the desired state or -EAGAIN if
  895. * TIMEOUT_US has elapsed, which ever happens first.
  896. */
  897. int coresight_timeout(void __iomem *addr, u32 offset, int position, int value)
  898. {
  899. int i;
  900. u32 val;
  901. for (i = TIMEOUT_US; i > 0; i--) {
  902. val = __raw_readl(addr + offset);
  903. /* waiting on the bit to go from 0 to 1 */
  904. if (value) {
  905. if (val & BIT(position))
  906. return 0;
  907. /* waiting on the bit to go from 1 to 0 */
  908. } else {
  909. if (!(val & BIT(position)))
  910. return 0;
  911. }
  912. /*
  913. * Delay is arbitrary - the specification doesn't say how long
  914. * we are expected to wait. Extra check required to make sure
  915. * we don't wait needlessly on the last iteration.
  916. */
  917. if (i - 1)
  918. udelay(1);
  919. }
  920. return -EAGAIN;
  921. }
  922. struct bus_type coresight_bustype = {
  923. .name = "coresight",
  924. };
  925. static int __init coresight_init(void)
  926. {
  927. return bus_register(&coresight_bustype);
  928. }
  929. postcore_initcall(coresight_init);
  930. struct coresight_device *coresight_register(struct coresight_desc *desc)
  931. {
  932. int ret;
  933. int link_subtype;
  934. int nr_refcnts = 1;
  935. atomic_t *refcnts = NULL;
  936. struct coresight_device *csdev;
  937. csdev = kzalloc(sizeof(*csdev), GFP_KERNEL);
  938. if (!csdev) {
  939. ret = -ENOMEM;
  940. goto err_out;
  941. }
  942. if (desc->type == CORESIGHT_DEV_TYPE_LINK ||
  943. desc->type == CORESIGHT_DEV_TYPE_LINKSINK) {
  944. link_subtype = desc->subtype.link_subtype;
  945. if (link_subtype == CORESIGHT_DEV_SUBTYPE_LINK_MERG)
  946. nr_refcnts = desc->pdata->nr_inport;
  947. else if (link_subtype == CORESIGHT_DEV_SUBTYPE_LINK_SPLIT)
  948. nr_refcnts = desc->pdata->nr_outport;
  949. }
  950. refcnts = kcalloc(nr_refcnts, sizeof(*refcnts), GFP_KERNEL);
  951. if (!refcnts) {
  952. ret = -ENOMEM;
  953. goto err_free_csdev;
  954. }
  955. csdev->refcnt = refcnts;
  956. csdev->nr_inport = desc->pdata->nr_inport;
  957. csdev->nr_outport = desc->pdata->nr_outport;
  958. csdev->conns = desc->pdata->conns;
  959. csdev->type = desc->type;
  960. csdev->subtype = desc->subtype;
  961. csdev->ops = desc->ops;
  962. csdev->orphan = false;
  963. csdev->dev.type = &coresight_dev_type[desc->type];
  964. csdev->dev.groups = desc->groups;
  965. csdev->dev.parent = desc->dev;
  966. csdev->dev.release = coresight_device_release;
  967. csdev->dev.bus = &coresight_bustype;
  968. dev_set_name(&csdev->dev, "%s", desc->pdata->name);
  969. ret = device_register(&csdev->dev);
  970. if (ret) {
  971. put_device(&csdev->dev);
  972. /*
  973. * All resources are free'd explicitly via
  974. * coresight_device_release(), triggered from put_device().
  975. */
  976. goto err_out;
  977. }
  978. mutex_lock(&coresight_mutex);
  979. coresight_fixup_device_conns(csdev);
  980. coresight_fixup_orphan_conns(csdev);
  981. mutex_unlock(&coresight_mutex);
  982. return csdev;
  983. err_free_csdev:
  984. kfree(csdev);
  985. err_out:
  986. return ERR_PTR(ret);
  987. }
  988. EXPORT_SYMBOL_GPL(coresight_register);
  989. void coresight_unregister(struct coresight_device *csdev)
  990. {
  991. /* Remove references of that device in the topology */
  992. coresight_remove_conns(csdev);
  993. device_unregister(&csdev->dev);
  994. }
  995. EXPORT_SYMBOL_GPL(coresight_unregister);