vmwgfx_stdu.c 45 KB

12345678910111213141516171819202122232425262728293031323334353637383940414243444546474849505152535455565758596061626364656667686970717273747576777879808182838485868788899091929394959697989910010110210310410510610710810911011111211311411511611711811912012112212312412512612712812913013113213313413513613713813914014114214314414514614714814915015115215315415515615715815916016116216316416516616716816917017117217317417517617717817918018118218318418518618718818919019119219319419519619719819920020120220320420520620720820921021121221321421521621721821922022122222322422522622722822923023123223323423523623723823924024124224324424524624724824925025125225325425525625725825926026126226326426526626726826927027127227327427527627727827928028128228328428528628728828929029129229329429529629729829930030130230330430530630730830931031131231331431531631731831932032132232332432532632732832933033133233333433533633733833934034134234334434534634734834935035135235335435535635735835936036136236336436536636736836937037137237337437537637737837938038138238338438538638738838939039139239339439539639739839940040140240340440540640740840941041141241341441541641741841942042142242342442542642742842943043143243343443543643743843944044144244344444544644744844945045145245345445545645745845946046146246346446546646746846947047147247347447547647747847948048148248348448548648748848949049149249349449549649749849950050150250350450550650750850951051151251351451551651751851952052152252352452552652752852953053153253353453553653753853954054154254354454554654754854955055155255355455555655755855956056156256356456556656756856957057157257357457557657757857958058158258358458558658758858959059159259359459559659759859960060160260360460560660760860961061161261361461561661761861962062162262362462562662762862963063163263363463563663763863964064164264364464564664764864965065165265365465565665765865966066166266366466566666766866967067167267367467567667767867968068168268368468568668768868969069169269369469569669769869970070170270370470570670770870971071171271371471571671771871972072172272372472572672772872973073173273373473573673773873974074174274374474574674774874975075175275375475575675775875976076176276376476576676776876977077177277377477577677777877978078178278378478578678778878979079179279379479579679779879980080180280380480580680780880981081181281381481581681781881982082182282382482582682782882983083183283383483583683783883984084184284384484584684784884985085185285385485585685785885986086186286386486586686786886987087187287387487587687787887988088188288388488588688788888989089189289389489589689789889990090190290390490590690790890991091191291391491591691791891992092192292392492592692792892993093193293393493593693793893994094194294394494594694794894995095195295395495595695795895996096196296396496596696796896997097197297397497597697797897998098198298398498598698798898999099199299399499599699799899910001001100210031004100510061007100810091010101110121013101410151016101710181019102010211022102310241025102610271028102910301031103210331034103510361037103810391040104110421043104410451046104710481049105010511052105310541055105610571058105910601061106210631064106510661067106810691070107110721073107410751076107710781079108010811082108310841085108610871088108910901091109210931094109510961097109810991100110111021103110411051106110711081109111011111112111311141115111611171118111911201121112211231124112511261127112811291130113111321133113411351136113711381139114011411142114311441145114611471148114911501151115211531154115511561157115811591160116111621163116411651166116711681169117011711172117311741175117611771178117911801181118211831184118511861187118811891190119111921193119411951196119711981199120012011202120312041205120612071208120912101211121212131214121512161217121812191220122112221223122412251226122712281229123012311232123312341235123612371238123912401241124212431244124512461247124812491250125112521253125412551256125712581259126012611262126312641265126612671268126912701271127212731274127512761277127812791280128112821283128412851286128712881289129012911292129312941295129612971298129913001301130213031304130513061307130813091310131113121313131413151316131713181319132013211322132313241325132613271328132913301331133213331334133513361337133813391340134113421343134413451346134713481349135013511352135313541355135613571358135913601361136213631364136513661367136813691370137113721373137413751376137713781379138013811382138313841385138613871388138913901391139213931394139513961397139813991400140114021403140414051406140714081409141014111412141314141415141614171418141914201421142214231424142514261427142814291430143114321433143414351436143714381439144014411442144314441445144614471448144914501451145214531454145514561457145814591460146114621463146414651466146714681469147014711472147314741475147614771478147914801481148214831484148514861487148814891490149114921493149414951496149714981499150015011502150315041505150615071508150915101511151215131514151515161517151815191520152115221523152415251526152715281529153015311532153315341535153615371538153915401541154215431544154515461547154815491550155115521553155415551556155715581559156015611562156315641565156615671568156915701571157215731574157515761577157815791580158115821583158415851586158715881589159015911592159315941595159615971598159916001601160216031604160516061607160816091610161116121613161416151616161716181619162016211622162316241625162616271628162916301631163216331634
  1. // SPDX-License-Identifier: GPL-2.0 OR MIT
  2. /******************************************************************************
  3. *
  4. * COPYRIGHT (C) 2014-2015 VMware, Inc., Palo Alto, CA., USA
  5. *
  6. * Permission is hereby granted, free of charge, to any person obtaining a
  7. * copy of this software and associated documentation files (the
  8. * "Software"), to deal in the Software without restriction, including
  9. * without limitation the rights to use, copy, modify, merge, publish,
  10. * distribute, sub license, and/or sell copies of the Software, and to
  11. * permit persons to whom the Software is furnished to do so, subject to
  12. * the following conditions:
  13. *
  14. * The above copyright notice and this permission notice (including the
  15. * next paragraph) shall be included in all copies or substantial portions
  16. * of the Software.
  17. *
  18. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  19. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  20. * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
  21. * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
  22. * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
  23. * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
  24. * USE OR OTHER DEALINGS IN THE SOFTWARE.
  25. *
  26. ******************************************************************************/
  27. #include "vmwgfx_kms.h"
  28. #include "device_include/svga3d_surfacedefs.h"
  29. #include <drm/drm_plane_helper.h>
  30. #include <drm/drm_atomic.h>
  31. #include <drm/drm_atomic_helper.h>
  32. #define vmw_crtc_to_stdu(x) \
  33. container_of(x, struct vmw_screen_target_display_unit, base.crtc)
  34. #define vmw_encoder_to_stdu(x) \
  35. container_of(x, struct vmw_screen_target_display_unit, base.encoder)
  36. #define vmw_connector_to_stdu(x) \
  37. container_of(x, struct vmw_screen_target_display_unit, base.connector)
  38. enum stdu_content_type {
  39. SAME_AS_DISPLAY = 0,
  40. SEPARATE_SURFACE,
  41. SEPARATE_BO
  42. };
  43. /**
  44. * struct vmw_stdu_dirty - closure structure for the update functions
  45. *
  46. * @base: The base type we derive from. Used by vmw_kms_helper_dirty().
  47. * @transfer: Transfer direction for DMA command.
  48. * @left: Left side of bounding box.
  49. * @right: Right side of bounding box.
  50. * @top: Top side of bounding box.
  51. * @bottom: Bottom side of bounding box.
  52. * @fb_left: Left side of the framebuffer/content bounding box
  53. * @fb_top: Top of the framebuffer/content bounding box
  54. * @buf: buffer object when DMA-ing between buffer and screen targets.
  55. * @sid: Surface ID when copying between surface and screen targets.
  56. */
  57. struct vmw_stdu_dirty {
  58. struct vmw_kms_dirty base;
  59. SVGA3dTransferType transfer;
  60. s32 left, right, top, bottom;
  61. s32 fb_left, fb_top;
  62. u32 pitch;
  63. union {
  64. struct vmw_buffer_object *buf;
  65. u32 sid;
  66. };
  67. };
  68. /*
  69. * SVGA commands that are used by this code. Please see the device headers
  70. * for explanation.
  71. */
  72. struct vmw_stdu_update {
  73. SVGA3dCmdHeader header;
  74. SVGA3dCmdUpdateGBScreenTarget body;
  75. };
  76. struct vmw_stdu_dma {
  77. SVGA3dCmdHeader header;
  78. SVGA3dCmdSurfaceDMA body;
  79. };
  80. struct vmw_stdu_surface_copy {
  81. SVGA3dCmdHeader header;
  82. SVGA3dCmdSurfaceCopy body;
  83. };
  84. /**
  85. * struct vmw_screen_target_display_unit
  86. *
  87. * @base: VMW specific DU structure
  88. * @display_srf: surface to be displayed. The dimension of this will always
  89. * match the display mode. If the display mode matches
  90. * content_vfbs dimensions, then this is a pointer into the
  91. * corresponding field in content_vfbs. If not, then this
  92. * is a separate buffer to which content_vfbs will blit to.
  93. * @content_type: content_fb type
  94. * @defined: true if the current display unit has been initialized
  95. */
  96. struct vmw_screen_target_display_unit {
  97. struct vmw_display_unit base;
  98. const struct vmw_surface *display_srf;
  99. enum stdu_content_type content_fb_type;
  100. s32 display_width, display_height;
  101. bool defined;
  102. /* For CPU Blit */
  103. unsigned int cpp;
  104. };
  105. static void vmw_stdu_destroy(struct vmw_screen_target_display_unit *stdu);
  106. /******************************************************************************
  107. * Screen Target Display Unit CRTC Functions
  108. *****************************************************************************/
  109. /**
  110. * vmw_stdu_crtc_destroy - cleans up the STDU
  111. *
  112. * @crtc: used to get a reference to the containing STDU
  113. */
  114. static void vmw_stdu_crtc_destroy(struct drm_crtc *crtc)
  115. {
  116. vmw_stdu_destroy(vmw_crtc_to_stdu(crtc));
  117. }
  118. /**
  119. * vmw_stdu_define_st - Defines a Screen Target
  120. *
  121. * @dev_priv: VMW DRM device
  122. * @stdu: display unit to create a Screen Target for
  123. * @mode: The mode to set.
  124. * @crtc_x: X coordinate of screen target relative to framebuffer origin.
  125. * @crtc_y: Y coordinate of screen target relative to framebuffer origin.
  126. *
  127. * Creates a STDU that we can used later. This function is called whenever the
  128. * framebuffer size changes.
  129. *
  130. * RETURNs:
  131. * 0 on success, error code on failure
  132. */
  133. static int vmw_stdu_define_st(struct vmw_private *dev_priv,
  134. struct vmw_screen_target_display_unit *stdu,
  135. struct drm_display_mode *mode,
  136. int crtc_x, int crtc_y)
  137. {
  138. struct {
  139. SVGA3dCmdHeader header;
  140. SVGA3dCmdDefineGBScreenTarget body;
  141. } *cmd;
  142. cmd = vmw_fifo_reserve(dev_priv, sizeof(*cmd));
  143. if (unlikely(cmd == NULL)) {
  144. DRM_ERROR("Out of FIFO space defining Screen Target\n");
  145. return -ENOMEM;
  146. }
  147. cmd->header.id = SVGA_3D_CMD_DEFINE_GB_SCREENTARGET;
  148. cmd->header.size = sizeof(cmd->body);
  149. cmd->body.stid = stdu->base.unit;
  150. cmd->body.width = mode->hdisplay;
  151. cmd->body.height = mode->vdisplay;
  152. cmd->body.flags = (0 == cmd->body.stid) ? SVGA_STFLAG_PRIMARY : 0;
  153. cmd->body.dpi = 0;
  154. cmd->body.xRoot = crtc_x;
  155. cmd->body.yRoot = crtc_y;
  156. stdu->base.set_gui_x = cmd->body.xRoot;
  157. stdu->base.set_gui_y = cmd->body.yRoot;
  158. vmw_fifo_commit(dev_priv, sizeof(*cmd));
  159. stdu->defined = true;
  160. stdu->display_width = mode->hdisplay;
  161. stdu->display_height = mode->vdisplay;
  162. return 0;
  163. }
  164. /**
  165. * vmw_stdu_bind_st - Binds a surface to a Screen Target
  166. *
  167. * @dev_priv: VMW DRM device
  168. * @stdu: display unit affected
  169. * @res: Buffer to bind to the screen target. Set to NULL to blank screen.
  170. *
  171. * Binding a surface to a Screen Target the same as flipping
  172. */
  173. static int vmw_stdu_bind_st(struct vmw_private *dev_priv,
  174. struct vmw_screen_target_display_unit *stdu,
  175. const struct vmw_resource *res)
  176. {
  177. SVGA3dSurfaceImageId image;
  178. struct {
  179. SVGA3dCmdHeader header;
  180. SVGA3dCmdBindGBScreenTarget body;
  181. } *cmd;
  182. if (!stdu->defined) {
  183. DRM_ERROR("No screen target defined\n");
  184. return -EINVAL;
  185. }
  186. /* Set up image using information in vfb */
  187. memset(&image, 0, sizeof(image));
  188. image.sid = res ? res->id : SVGA3D_INVALID_ID;
  189. cmd = vmw_fifo_reserve(dev_priv, sizeof(*cmd));
  190. if (unlikely(cmd == NULL)) {
  191. DRM_ERROR("Out of FIFO space binding a screen target\n");
  192. return -ENOMEM;
  193. }
  194. cmd->header.id = SVGA_3D_CMD_BIND_GB_SCREENTARGET;
  195. cmd->header.size = sizeof(cmd->body);
  196. cmd->body.stid = stdu->base.unit;
  197. cmd->body.image = image;
  198. vmw_fifo_commit(dev_priv, sizeof(*cmd));
  199. return 0;
  200. }
  201. /**
  202. * vmw_stdu_populate_update - populate an UPDATE_GB_SCREENTARGET command with a
  203. * bounding box.
  204. *
  205. * @cmd: Pointer to command stream.
  206. * @unit: Screen target unit.
  207. * @left: Left side of bounding box.
  208. * @right: Right side of bounding box.
  209. * @top: Top side of bounding box.
  210. * @bottom: Bottom side of bounding box.
  211. */
  212. static void vmw_stdu_populate_update(void *cmd, int unit,
  213. s32 left, s32 right, s32 top, s32 bottom)
  214. {
  215. struct vmw_stdu_update *update = cmd;
  216. update->header.id = SVGA_3D_CMD_UPDATE_GB_SCREENTARGET;
  217. update->header.size = sizeof(update->body);
  218. update->body.stid = unit;
  219. update->body.rect.x = left;
  220. update->body.rect.y = top;
  221. update->body.rect.w = right - left;
  222. update->body.rect.h = bottom - top;
  223. }
  224. /**
  225. * vmw_stdu_update_st - Full update of a Screen Target
  226. *
  227. * @dev_priv: VMW DRM device
  228. * @stdu: display unit affected
  229. *
  230. * This function needs to be called whenever the content of a screen
  231. * target has changed completely. Typically as a result of a backing
  232. * surface change.
  233. *
  234. * RETURNS:
  235. * 0 on success, error code on failure
  236. */
  237. static int vmw_stdu_update_st(struct vmw_private *dev_priv,
  238. struct vmw_screen_target_display_unit *stdu)
  239. {
  240. struct vmw_stdu_update *cmd;
  241. if (!stdu->defined) {
  242. DRM_ERROR("No screen target defined");
  243. return -EINVAL;
  244. }
  245. cmd = vmw_fifo_reserve(dev_priv, sizeof(*cmd));
  246. if (unlikely(cmd == NULL)) {
  247. DRM_ERROR("Out of FIFO space updating a Screen Target\n");
  248. return -ENOMEM;
  249. }
  250. vmw_stdu_populate_update(cmd, stdu->base.unit,
  251. 0, stdu->display_width,
  252. 0, stdu->display_height);
  253. vmw_fifo_commit(dev_priv, sizeof(*cmd));
  254. return 0;
  255. }
  256. /**
  257. * vmw_stdu_destroy_st - Destroy a Screen Target
  258. *
  259. * @dev_priv: VMW DRM device
  260. * @stdu: display unit to destroy
  261. */
  262. static int vmw_stdu_destroy_st(struct vmw_private *dev_priv,
  263. struct vmw_screen_target_display_unit *stdu)
  264. {
  265. int ret;
  266. struct {
  267. SVGA3dCmdHeader header;
  268. SVGA3dCmdDestroyGBScreenTarget body;
  269. } *cmd;
  270. /* Nothing to do if not successfully defined */
  271. if (unlikely(!stdu->defined))
  272. return 0;
  273. cmd = vmw_fifo_reserve(dev_priv, sizeof(*cmd));
  274. if (unlikely(cmd == NULL)) {
  275. DRM_ERROR("Out of FIFO space, screen target not destroyed\n");
  276. return -ENOMEM;
  277. }
  278. cmd->header.id = SVGA_3D_CMD_DESTROY_GB_SCREENTARGET;
  279. cmd->header.size = sizeof(cmd->body);
  280. cmd->body.stid = stdu->base.unit;
  281. vmw_fifo_commit(dev_priv, sizeof(*cmd));
  282. /* Force sync */
  283. ret = vmw_fallback_wait(dev_priv, false, true, 0, false, 3*HZ);
  284. if (unlikely(ret != 0))
  285. DRM_ERROR("Failed to sync with HW");
  286. stdu->defined = false;
  287. stdu->display_width = 0;
  288. stdu->display_height = 0;
  289. return ret;
  290. }
  291. /**
  292. * vmw_stdu_crtc_mode_set_nofb - Updates screen target size
  293. *
  294. * @crtc: CRTC associated with the screen target
  295. *
  296. * This function defines/destroys a screen target
  297. *
  298. */
  299. static void vmw_stdu_crtc_mode_set_nofb(struct drm_crtc *crtc)
  300. {
  301. struct vmw_private *dev_priv;
  302. struct vmw_screen_target_display_unit *stdu;
  303. struct drm_connector_state *conn_state;
  304. struct vmw_connector_state *vmw_conn_state;
  305. int x, y, ret;
  306. stdu = vmw_crtc_to_stdu(crtc);
  307. dev_priv = vmw_priv(crtc->dev);
  308. conn_state = stdu->base.connector.state;
  309. vmw_conn_state = vmw_connector_state_to_vcs(conn_state);
  310. if (stdu->defined) {
  311. ret = vmw_stdu_bind_st(dev_priv, stdu, NULL);
  312. if (ret)
  313. DRM_ERROR("Failed to blank CRTC\n");
  314. (void) vmw_stdu_update_st(dev_priv, stdu);
  315. ret = vmw_stdu_destroy_st(dev_priv, stdu);
  316. if (ret)
  317. DRM_ERROR("Failed to destroy Screen Target\n");
  318. stdu->content_fb_type = SAME_AS_DISPLAY;
  319. }
  320. if (!crtc->state->enable)
  321. return;
  322. if (stdu->base.is_implicit) {
  323. x = crtc->x;
  324. y = crtc->y;
  325. } else {
  326. x = vmw_conn_state->gui_x;
  327. y = vmw_conn_state->gui_y;
  328. }
  329. vmw_svga_enable(dev_priv);
  330. ret = vmw_stdu_define_st(dev_priv, stdu, &crtc->mode, x, y);
  331. if (ret)
  332. DRM_ERROR("Failed to define Screen Target of size %dx%d\n",
  333. crtc->x, crtc->y);
  334. }
  335. static void vmw_stdu_crtc_helper_prepare(struct drm_crtc *crtc)
  336. {
  337. }
  338. static void vmw_stdu_crtc_atomic_enable(struct drm_crtc *crtc,
  339. struct drm_crtc_state *old_state)
  340. {
  341. struct drm_plane_state *plane_state = crtc->primary->state;
  342. struct vmw_private *dev_priv;
  343. struct vmw_screen_target_display_unit *stdu;
  344. struct vmw_framebuffer *vfb;
  345. struct drm_framebuffer *fb;
  346. stdu = vmw_crtc_to_stdu(crtc);
  347. dev_priv = vmw_priv(crtc->dev);
  348. fb = plane_state->fb;
  349. vfb = (fb) ? vmw_framebuffer_to_vfb(fb) : NULL;
  350. if (vfb)
  351. vmw_kms_add_active(dev_priv, &stdu->base, vfb);
  352. else
  353. vmw_kms_del_active(dev_priv, &stdu->base);
  354. }
  355. static void vmw_stdu_crtc_atomic_disable(struct drm_crtc *crtc,
  356. struct drm_crtc_state *old_state)
  357. {
  358. struct vmw_private *dev_priv;
  359. struct vmw_screen_target_display_unit *stdu;
  360. int ret;
  361. if (!crtc) {
  362. DRM_ERROR("CRTC is NULL\n");
  363. return;
  364. }
  365. stdu = vmw_crtc_to_stdu(crtc);
  366. dev_priv = vmw_priv(crtc->dev);
  367. if (stdu->defined) {
  368. ret = vmw_stdu_bind_st(dev_priv, stdu, NULL);
  369. if (ret)
  370. DRM_ERROR("Failed to blank CRTC\n");
  371. (void) vmw_stdu_update_st(dev_priv, stdu);
  372. ret = vmw_stdu_destroy_st(dev_priv, stdu);
  373. if (ret)
  374. DRM_ERROR("Failed to destroy Screen Target\n");
  375. stdu->content_fb_type = SAME_AS_DISPLAY;
  376. }
  377. }
  378. /**
  379. * vmw_stdu_crtc_page_flip - Binds a buffer to a screen target
  380. *
  381. * @crtc: CRTC to attach FB to
  382. * @fb: FB to attach
  383. * @event: Event to be posted. This event should've been alloced
  384. * using k[mz]alloc, and should've been completely initialized.
  385. * @page_flip_flags: Input flags.
  386. *
  387. * If the STDU uses the same display and content buffers, i.e. a true flip,
  388. * this function will replace the existing display buffer with the new content
  389. * buffer.
  390. *
  391. * If the STDU uses different display and content buffers, i.e. a blit, then
  392. * only the content buffer will be updated.
  393. *
  394. * RETURNS:
  395. * 0 on success, error code on failure
  396. */
  397. static int vmw_stdu_crtc_page_flip(struct drm_crtc *crtc,
  398. struct drm_framebuffer *new_fb,
  399. struct drm_pending_vblank_event *event,
  400. uint32_t flags,
  401. struct drm_modeset_acquire_ctx *ctx)
  402. {
  403. struct vmw_private *dev_priv = vmw_priv(crtc->dev);
  404. struct vmw_screen_target_display_unit *stdu = vmw_crtc_to_stdu(crtc);
  405. int ret;
  406. if (!stdu->defined || !vmw_kms_crtc_flippable(dev_priv, crtc))
  407. return -EINVAL;
  408. ret = drm_atomic_helper_page_flip(crtc, new_fb, event, flags, ctx);
  409. if (ret) {
  410. DRM_ERROR("Page flip error %d.\n", ret);
  411. return ret;
  412. }
  413. return 0;
  414. }
  415. /**
  416. * vmw_stdu_bo_clip - Callback to encode a suface DMA command cliprect
  417. *
  418. * @dirty: The closure structure.
  419. *
  420. * Encodes a surface DMA command cliprect and updates the bounding box
  421. * for the DMA.
  422. */
  423. static void vmw_stdu_bo_clip(struct vmw_kms_dirty *dirty)
  424. {
  425. struct vmw_stdu_dirty *ddirty =
  426. container_of(dirty, struct vmw_stdu_dirty, base);
  427. struct vmw_stdu_dma *cmd = dirty->cmd;
  428. struct SVGA3dCopyBox *blit = (struct SVGA3dCopyBox *) &cmd[1];
  429. blit += dirty->num_hits;
  430. blit->srcx = dirty->fb_x;
  431. blit->srcy = dirty->fb_y;
  432. blit->x = dirty->unit_x1;
  433. blit->y = dirty->unit_y1;
  434. blit->d = 1;
  435. blit->w = dirty->unit_x2 - dirty->unit_x1;
  436. blit->h = dirty->unit_y2 - dirty->unit_y1;
  437. dirty->num_hits++;
  438. if (ddirty->transfer != SVGA3D_WRITE_HOST_VRAM)
  439. return;
  440. /* Destination bounding box */
  441. ddirty->left = min_t(s32, ddirty->left, dirty->unit_x1);
  442. ddirty->top = min_t(s32, ddirty->top, dirty->unit_y1);
  443. ddirty->right = max_t(s32, ddirty->right, dirty->unit_x2);
  444. ddirty->bottom = max_t(s32, ddirty->bottom, dirty->unit_y2);
  445. }
  446. /**
  447. * vmw_stdu_bo_fifo_commit - Callback to fill in and submit a DMA command.
  448. *
  449. * @dirty: The closure structure.
  450. *
  451. * Fills in the missing fields in a DMA command, and optionally encodes
  452. * a screen target update command, depending on transfer direction.
  453. */
  454. static void vmw_stdu_bo_fifo_commit(struct vmw_kms_dirty *dirty)
  455. {
  456. struct vmw_stdu_dirty *ddirty =
  457. container_of(dirty, struct vmw_stdu_dirty, base);
  458. struct vmw_screen_target_display_unit *stdu =
  459. container_of(dirty->unit, typeof(*stdu), base);
  460. struct vmw_stdu_dma *cmd = dirty->cmd;
  461. struct SVGA3dCopyBox *blit = (struct SVGA3dCopyBox *) &cmd[1];
  462. SVGA3dCmdSurfaceDMASuffix *suffix =
  463. (SVGA3dCmdSurfaceDMASuffix *) &blit[dirty->num_hits];
  464. size_t blit_size = sizeof(*blit) * dirty->num_hits + sizeof(*suffix);
  465. if (!dirty->num_hits) {
  466. vmw_fifo_commit(dirty->dev_priv, 0);
  467. return;
  468. }
  469. cmd->header.id = SVGA_3D_CMD_SURFACE_DMA;
  470. cmd->header.size = sizeof(cmd->body) + blit_size;
  471. vmw_bo_get_guest_ptr(&ddirty->buf->base, &cmd->body.guest.ptr);
  472. cmd->body.guest.pitch = ddirty->pitch;
  473. cmd->body.host.sid = stdu->display_srf->res.id;
  474. cmd->body.host.face = 0;
  475. cmd->body.host.mipmap = 0;
  476. cmd->body.transfer = ddirty->transfer;
  477. suffix->suffixSize = sizeof(*suffix);
  478. suffix->maximumOffset = ddirty->buf->base.num_pages * PAGE_SIZE;
  479. if (ddirty->transfer == SVGA3D_WRITE_HOST_VRAM) {
  480. blit_size += sizeof(struct vmw_stdu_update);
  481. vmw_stdu_populate_update(&suffix[1], stdu->base.unit,
  482. ddirty->left, ddirty->right,
  483. ddirty->top, ddirty->bottom);
  484. }
  485. vmw_fifo_commit(dirty->dev_priv, sizeof(*cmd) + blit_size);
  486. ddirty->left = ddirty->top = S32_MAX;
  487. ddirty->right = ddirty->bottom = S32_MIN;
  488. }
  489. /**
  490. * vmw_stdu_bo_cpu_clip - Callback to encode a CPU blit
  491. *
  492. * @dirty: The closure structure.
  493. *
  494. * This function calculates the bounding box for all the incoming clips.
  495. */
  496. static void vmw_stdu_bo_cpu_clip(struct vmw_kms_dirty *dirty)
  497. {
  498. struct vmw_stdu_dirty *ddirty =
  499. container_of(dirty, struct vmw_stdu_dirty, base);
  500. dirty->num_hits = 1;
  501. /* Calculate destination bounding box */
  502. ddirty->left = min_t(s32, ddirty->left, dirty->unit_x1);
  503. ddirty->top = min_t(s32, ddirty->top, dirty->unit_y1);
  504. ddirty->right = max_t(s32, ddirty->right, dirty->unit_x2);
  505. ddirty->bottom = max_t(s32, ddirty->bottom, dirty->unit_y2);
  506. /*
  507. * Calculate content bounding box. We only need the top-left
  508. * coordinate because width and height will be the same as the
  509. * destination bounding box above
  510. */
  511. ddirty->fb_left = min_t(s32, ddirty->fb_left, dirty->fb_x);
  512. ddirty->fb_top = min_t(s32, ddirty->fb_top, dirty->fb_y);
  513. }
  514. /**
  515. * vmw_stdu_bo_cpu_commit - Callback to do a CPU blit from buffer object
  516. *
  517. * @dirty: The closure structure.
  518. *
  519. * For the special case when we cannot create a proxy surface in a
  520. * 2D VM, we have to do a CPU blit ourselves.
  521. */
  522. static void vmw_stdu_bo_cpu_commit(struct vmw_kms_dirty *dirty)
  523. {
  524. struct vmw_stdu_dirty *ddirty =
  525. container_of(dirty, struct vmw_stdu_dirty, base);
  526. struct vmw_screen_target_display_unit *stdu =
  527. container_of(dirty->unit, typeof(*stdu), base);
  528. s32 width, height;
  529. s32 src_pitch, dst_pitch;
  530. struct ttm_buffer_object *src_bo, *dst_bo;
  531. u32 src_offset, dst_offset;
  532. struct vmw_diff_cpy diff = VMW_CPU_BLIT_DIFF_INITIALIZER(stdu->cpp);
  533. if (!dirty->num_hits)
  534. return;
  535. width = ddirty->right - ddirty->left;
  536. height = ddirty->bottom - ddirty->top;
  537. if (width == 0 || height == 0)
  538. return;
  539. /* Assume we are blitting from Guest (bo) to Host (display_srf) */
  540. dst_pitch = stdu->display_srf->base_size.width * stdu->cpp;
  541. dst_bo = &stdu->display_srf->res.backup->base;
  542. dst_offset = ddirty->top * dst_pitch + ddirty->left * stdu->cpp;
  543. src_pitch = ddirty->pitch;
  544. src_bo = &ddirty->buf->base;
  545. src_offset = ddirty->fb_top * src_pitch + ddirty->fb_left * stdu->cpp;
  546. /* Swap src and dst if the assumption was wrong. */
  547. if (ddirty->transfer != SVGA3D_WRITE_HOST_VRAM) {
  548. swap(dst_pitch, src_pitch);
  549. swap(dst_bo, src_bo);
  550. swap(src_offset, dst_offset);
  551. }
  552. (void) vmw_bo_cpu_blit(dst_bo, dst_offset, dst_pitch,
  553. src_bo, src_offset, src_pitch,
  554. width * stdu->cpp, height, &diff);
  555. if (ddirty->transfer == SVGA3D_WRITE_HOST_VRAM &&
  556. drm_rect_visible(&diff.rect)) {
  557. struct vmw_private *dev_priv;
  558. struct vmw_stdu_update *cmd;
  559. struct drm_clip_rect region;
  560. int ret;
  561. /* We are updating the actual surface, not a proxy */
  562. region.x1 = diff.rect.x1;
  563. region.x2 = diff.rect.x2;
  564. region.y1 = diff.rect.y1;
  565. region.y2 = diff.rect.y2;
  566. ret = vmw_kms_update_proxy(
  567. (struct vmw_resource *) &stdu->display_srf->res,
  568. (const struct drm_clip_rect *) &region, 1, 1);
  569. if (ret)
  570. goto out_cleanup;
  571. dev_priv = vmw_priv(stdu->base.crtc.dev);
  572. cmd = vmw_fifo_reserve(dev_priv, sizeof(*cmd));
  573. if (!cmd) {
  574. DRM_ERROR("Cannot reserve FIFO space to update STDU");
  575. goto out_cleanup;
  576. }
  577. vmw_stdu_populate_update(cmd, stdu->base.unit,
  578. region.x1, region.x2,
  579. region.y1, region.y2);
  580. vmw_fifo_commit(dev_priv, sizeof(*cmd));
  581. }
  582. out_cleanup:
  583. ddirty->left = ddirty->top = ddirty->fb_left = ddirty->fb_top = S32_MAX;
  584. ddirty->right = ddirty->bottom = S32_MIN;
  585. }
  586. /**
  587. * vmw_kms_stdu_dma - Perform a DMA transfer between a buffer-object backed
  588. * framebuffer and the screen target system.
  589. *
  590. * @dev_priv: Pointer to the device private structure.
  591. * @file_priv: Pointer to a struct drm-file identifying the caller. May be
  592. * set to NULL, but then @user_fence_rep must also be set to NULL.
  593. * @vfb: Pointer to the buffer-object backed framebuffer.
  594. * @clips: Array of clip rects. Either @clips or @vclips must be NULL.
  595. * @vclips: Alternate array of clip rects. Either @clips or @vclips must
  596. * be NULL.
  597. * @num_clips: Number of clip rects in @clips or @vclips.
  598. * @increment: Increment to use when looping over @clips or @vclips.
  599. * @to_surface: Whether to DMA to the screen target system as opposed to
  600. * from the screen target system.
  601. * @interruptible: Whether to perform waits interruptible if possible.
  602. * @crtc: If crtc is passed, perform stdu dma on that crtc only.
  603. *
  604. * If DMA-ing till the screen target system, the function will also notify
  605. * the screen target system that a bounding box of the cliprects has been
  606. * updated.
  607. * Returns 0 on success, negative error code on failure. -ERESTARTSYS if
  608. * interrupted.
  609. */
  610. int vmw_kms_stdu_dma(struct vmw_private *dev_priv,
  611. struct drm_file *file_priv,
  612. struct vmw_framebuffer *vfb,
  613. struct drm_vmw_fence_rep __user *user_fence_rep,
  614. struct drm_clip_rect *clips,
  615. struct drm_vmw_rect *vclips,
  616. uint32_t num_clips,
  617. int increment,
  618. bool to_surface,
  619. bool interruptible,
  620. struct drm_crtc *crtc)
  621. {
  622. struct vmw_buffer_object *buf =
  623. container_of(vfb, struct vmw_framebuffer_bo, base)->buffer;
  624. struct vmw_stdu_dirty ddirty;
  625. int ret;
  626. bool cpu_blit = !(dev_priv->capabilities & SVGA_CAP_3D);
  627. DECLARE_VAL_CONTEXT(val_ctx, NULL, 0);
  628. /*
  629. * VMs without 3D support don't have the surface DMA command and
  630. * we'll be using a CPU blit, and the framebuffer should be moved out
  631. * of VRAM.
  632. */
  633. ret = vmw_validation_add_bo(&val_ctx, buf, false, cpu_blit);
  634. if (ret)
  635. return ret;
  636. ret = vmw_validation_prepare(&val_ctx, NULL, interruptible);
  637. if (ret)
  638. goto out_unref;
  639. ddirty.transfer = (to_surface) ? SVGA3D_WRITE_HOST_VRAM :
  640. SVGA3D_READ_HOST_VRAM;
  641. ddirty.left = ddirty.top = S32_MAX;
  642. ddirty.right = ddirty.bottom = S32_MIN;
  643. ddirty.fb_left = ddirty.fb_top = S32_MAX;
  644. ddirty.pitch = vfb->base.pitches[0];
  645. ddirty.buf = buf;
  646. ddirty.base.fifo_commit = vmw_stdu_bo_fifo_commit;
  647. ddirty.base.clip = vmw_stdu_bo_clip;
  648. ddirty.base.fifo_reserve_size = sizeof(struct vmw_stdu_dma) +
  649. num_clips * sizeof(SVGA3dCopyBox) +
  650. sizeof(SVGA3dCmdSurfaceDMASuffix);
  651. if (to_surface)
  652. ddirty.base.fifo_reserve_size += sizeof(struct vmw_stdu_update);
  653. if (cpu_blit) {
  654. ddirty.base.fifo_commit = vmw_stdu_bo_cpu_commit;
  655. ddirty.base.clip = vmw_stdu_bo_cpu_clip;
  656. ddirty.base.fifo_reserve_size = 0;
  657. }
  658. ddirty.base.crtc = crtc;
  659. ret = vmw_kms_helper_dirty(dev_priv, vfb, clips, vclips,
  660. 0, 0, num_clips, increment, &ddirty.base);
  661. vmw_kms_helper_validation_finish(dev_priv, file_priv, &val_ctx, NULL,
  662. user_fence_rep);
  663. return ret;
  664. out_unref:
  665. vmw_validation_unref_lists(&val_ctx);
  666. return ret;
  667. }
  668. /**
  669. * vmw_stdu_surface_clip - Callback to encode a surface copy command cliprect
  670. *
  671. * @dirty: The closure structure.
  672. *
  673. * Encodes a surface copy command cliprect and updates the bounding box
  674. * for the copy.
  675. */
  676. static void vmw_kms_stdu_surface_clip(struct vmw_kms_dirty *dirty)
  677. {
  678. struct vmw_stdu_dirty *sdirty =
  679. container_of(dirty, struct vmw_stdu_dirty, base);
  680. struct vmw_stdu_surface_copy *cmd = dirty->cmd;
  681. struct vmw_screen_target_display_unit *stdu =
  682. container_of(dirty->unit, typeof(*stdu), base);
  683. if (sdirty->sid != stdu->display_srf->res.id) {
  684. struct SVGA3dCopyBox *blit = (struct SVGA3dCopyBox *) &cmd[1];
  685. blit += dirty->num_hits;
  686. blit->srcx = dirty->fb_x;
  687. blit->srcy = dirty->fb_y;
  688. blit->x = dirty->unit_x1;
  689. blit->y = dirty->unit_y1;
  690. blit->d = 1;
  691. blit->w = dirty->unit_x2 - dirty->unit_x1;
  692. blit->h = dirty->unit_y2 - dirty->unit_y1;
  693. }
  694. dirty->num_hits++;
  695. /* Destination bounding box */
  696. sdirty->left = min_t(s32, sdirty->left, dirty->unit_x1);
  697. sdirty->top = min_t(s32, sdirty->top, dirty->unit_y1);
  698. sdirty->right = max_t(s32, sdirty->right, dirty->unit_x2);
  699. sdirty->bottom = max_t(s32, sdirty->bottom, dirty->unit_y2);
  700. }
  701. /**
  702. * vmw_stdu_surface_fifo_commit - Callback to fill in and submit a surface
  703. * copy command.
  704. *
  705. * @dirty: The closure structure.
  706. *
  707. * Fills in the missing fields in a surface copy command, and encodes a screen
  708. * target update command.
  709. */
  710. static void vmw_kms_stdu_surface_fifo_commit(struct vmw_kms_dirty *dirty)
  711. {
  712. struct vmw_stdu_dirty *sdirty =
  713. container_of(dirty, struct vmw_stdu_dirty, base);
  714. struct vmw_screen_target_display_unit *stdu =
  715. container_of(dirty->unit, typeof(*stdu), base);
  716. struct vmw_stdu_surface_copy *cmd = dirty->cmd;
  717. struct vmw_stdu_update *update;
  718. size_t blit_size = sizeof(SVGA3dCopyBox) * dirty->num_hits;
  719. size_t commit_size;
  720. if (!dirty->num_hits) {
  721. vmw_fifo_commit(dirty->dev_priv, 0);
  722. return;
  723. }
  724. if (sdirty->sid != stdu->display_srf->res.id) {
  725. struct SVGA3dCopyBox *blit = (struct SVGA3dCopyBox *) &cmd[1];
  726. cmd->header.id = SVGA_3D_CMD_SURFACE_COPY;
  727. cmd->header.size = sizeof(cmd->body) + blit_size;
  728. cmd->body.src.sid = sdirty->sid;
  729. cmd->body.dest.sid = stdu->display_srf->res.id;
  730. update = (struct vmw_stdu_update *) &blit[dirty->num_hits];
  731. commit_size = sizeof(*cmd) + blit_size + sizeof(*update);
  732. } else {
  733. update = dirty->cmd;
  734. commit_size = sizeof(*update);
  735. }
  736. vmw_stdu_populate_update(update, stdu->base.unit, sdirty->left,
  737. sdirty->right, sdirty->top, sdirty->bottom);
  738. vmw_fifo_commit(dirty->dev_priv, commit_size);
  739. sdirty->left = sdirty->top = S32_MAX;
  740. sdirty->right = sdirty->bottom = S32_MIN;
  741. }
  742. /**
  743. * vmw_kms_stdu_surface_dirty - Dirty part of a surface backed framebuffer
  744. *
  745. * @dev_priv: Pointer to the device private structure.
  746. * @framebuffer: Pointer to the surface-buffer backed framebuffer.
  747. * @clips: Array of clip rects. Either @clips or @vclips must be NULL.
  748. * @vclips: Alternate array of clip rects. Either @clips or @vclips must
  749. * be NULL.
  750. * @srf: Pointer to surface to blit from. If NULL, the surface attached
  751. * to @framebuffer will be used.
  752. * @dest_x: X coordinate offset to align @srf with framebuffer coordinates.
  753. * @dest_y: Y coordinate offset to align @srf with framebuffer coordinates.
  754. * @num_clips: Number of clip rects in @clips.
  755. * @inc: Increment to use when looping over @clips.
  756. * @out_fence: If non-NULL, will return a ref-counted pointer to a
  757. * struct vmw_fence_obj. The returned fence pointer may be NULL in which
  758. * case the device has already synchronized.
  759. * @crtc: If crtc is passed, perform surface dirty on that crtc only.
  760. *
  761. * Returns 0 on success, negative error code on failure. -ERESTARTSYS if
  762. * interrupted.
  763. */
  764. int vmw_kms_stdu_surface_dirty(struct vmw_private *dev_priv,
  765. struct vmw_framebuffer *framebuffer,
  766. struct drm_clip_rect *clips,
  767. struct drm_vmw_rect *vclips,
  768. struct vmw_resource *srf,
  769. s32 dest_x,
  770. s32 dest_y,
  771. unsigned num_clips, int inc,
  772. struct vmw_fence_obj **out_fence,
  773. struct drm_crtc *crtc)
  774. {
  775. struct vmw_framebuffer_surface *vfbs =
  776. container_of(framebuffer, typeof(*vfbs), base);
  777. struct vmw_stdu_dirty sdirty;
  778. DECLARE_VAL_CONTEXT(val_ctx, NULL, 0);
  779. int ret;
  780. if (!srf)
  781. srf = &vfbs->surface->res;
  782. ret = vmw_validation_add_resource(&val_ctx, srf, 0, NULL, NULL);
  783. if (ret)
  784. return ret;
  785. ret = vmw_validation_prepare(&val_ctx, &dev_priv->cmdbuf_mutex, true);
  786. if (ret)
  787. goto out_unref;
  788. if (vfbs->is_bo_proxy) {
  789. ret = vmw_kms_update_proxy(srf, clips, num_clips, inc);
  790. if (ret)
  791. goto out_finish;
  792. }
  793. sdirty.base.fifo_commit = vmw_kms_stdu_surface_fifo_commit;
  794. sdirty.base.clip = vmw_kms_stdu_surface_clip;
  795. sdirty.base.fifo_reserve_size = sizeof(struct vmw_stdu_surface_copy) +
  796. sizeof(SVGA3dCopyBox) * num_clips +
  797. sizeof(struct vmw_stdu_update);
  798. sdirty.base.crtc = crtc;
  799. sdirty.sid = srf->id;
  800. sdirty.left = sdirty.top = S32_MAX;
  801. sdirty.right = sdirty.bottom = S32_MIN;
  802. ret = vmw_kms_helper_dirty(dev_priv, framebuffer, clips, vclips,
  803. dest_x, dest_y, num_clips, inc,
  804. &sdirty.base);
  805. out_finish:
  806. vmw_kms_helper_validation_finish(dev_priv, NULL, &val_ctx, out_fence,
  807. NULL);
  808. return ret;
  809. out_unref:
  810. vmw_validation_unref_lists(&val_ctx);
  811. return ret;
  812. }
  813. /*
  814. * Screen Target CRTC dispatch table
  815. */
  816. static const struct drm_crtc_funcs vmw_stdu_crtc_funcs = {
  817. .gamma_set = vmw_du_crtc_gamma_set,
  818. .destroy = vmw_stdu_crtc_destroy,
  819. .reset = vmw_du_crtc_reset,
  820. .atomic_duplicate_state = vmw_du_crtc_duplicate_state,
  821. .atomic_destroy_state = vmw_du_crtc_destroy_state,
  822. .set_config = vmw_kms_set_config,
  823. .page_flip = vmw_stdu_crtc_page_flip,
  824. };
  825. /******************************************************************************
  826. * Screen Target Display Unit Encoder Functions
  827. *****************************************************************************/
  828. /**
  829. * vmw_stdu_encoder_destroy - cleans up the STDU
  830. *
  831. * @encoder: used the get the containing STDU
  832. *
  833. * vmwgfx cleans up crtc/encoder/connector all at the same time so technically
  834. * this can be a no-op. Nevertheless, it doesn't hurt of have this in case
  835. * the common KMS code changes and somehow vmw_stdu_crtc_destroy() doesn't
  836. * get called.
  837. */
  838. static void vmw_stdu_encoder_destroy(struct drm_encoder *encoder)
  839. {
  840. vmw_stdu_destroy(vmw_encoder_to_stdu(encoder));
  841. }
  842. static const struct drm_encoder_funcs vmw_stdu_encoder_funcs = {
  843. .destroy = vmw_stdu_encoder_destroy,
  844. };
  845. /******************************************************************************
  846. * Screen Target Display Unit Connector Functions
  847. *****************************************************************************/
  848. /**
  849. * vmw_stdu_connector_destroy - cleans up the STDU
  850. *
  851. * @connector: used to get the containing STDU
  852. *
  853. * vmwgfx cleans up crtc/encoder/connector all at the same time so technically
  854. * this can be a no-op. Nevertheless, it doesn't hurt of have this in case
  855. * the common KMS code changes and somehow vmw_stdu_crtc_destroy() doesn't
  856. * get called.
  857. */
  858. static void vmw_stdu_connector_destroy(struct drm_connector *connector)
  859. {
  860. vmw_stdu_destroy(vmw_connector_to_stdu(connector));
  861. }
  862. static const struct drm_connector_funcs vmw_stdu_connector_funcs = {
  863. .dpms = vmw_du_connector_dpms,
  864. .detect = vmw_du_connector_detect,
  865. .fill_modes = vmw_du_connector_fill_modes,
  866. .set_property = vmw_du_connector_set_property,
  867. .destroy = vmw_stdu_connector_destroy,
  868. .reset = vmw_du_connector_reset,
  869. .atomic_duplicate_state = vmw_du_connector_duplicate_state,
  870. .atomic_destroy_state = vmw_du_connector_destroy_state,
  871. .atomic_set_property = vmw_du_connector_atomic_set_property,
  872. .atomic_get_property = vmw_du_connector_atomic_get_property,
  873. };
  874. static const struct
  875. drm_connector_helper_funcs vmw_stdu_connector_helper_funcs = {
  876. .best_encoder = drm_atomic_helper_best_encoder,
  877. };
  878. /******************************************************************************
  879. * Screen Target Display Plane Functions
  880. *****************************************************************************/
  881. /**
  882. * vmw_stdu_primary_plane_cleanup_fb - Unpins the display surface
  883. *
  884. * @plane: display plane
  885. * @old_state: Contains the FB to clean up
  886. *
  887. * Unpins the display surface
  888. *
  889. * Returns 0 on success
  890. */
  891. static void
  892. vmw_stdu_primary_plane_cleanup_fb(struct drm_plane *plane,
  893. struct drm_plane_state *old_state)
  894. {
  895. struct vmw_plane_state *vps = vmw_plane_state_to_vps(old_state);
  896. if (vps->surf)
  897. WARN_ON(!vps->pinned);
  898. vmw_du_plane_cleanup_fb(plane, old_state);
  899. vps->content_fb_type = SAME_AS_DISPLAY;
  900. vps->cpp = 0;
  901. }
  902. /**
  903. * vmw_stdu_primary_plane_prepare_fb - Readies the display surface
  904. *
  905. * @plane: display plane
  906. * @new_state: info on the new plane state, including the FB
  907. *
  908. * This function allocates a new display surface if the content is
  909. * backed by a buffer object. The display surface is pinned here, and it'll
  910. * be unpinned in .cleanup_fb()
  911. *
  912. * Returns 0 on success
  913. */
  914. static int
  915. vmw_stdu_primary_plane_prepare_fb(struct drm_plane *plane,
  916. struct drm_plane_state *new_state)
  917. {
  918. struct vmw_private *dev_priv = vmw_priv(plane->dev);
  919. struct drm_framebuffer *new_fb = new_state->fb;
  920. struct vmw_framebuffer *vfb;
  921. struct vmw_plane_state *vps = vmw_plane_state_to_vps(new_state);
  922. enum stdu_content_type new_content_type;
  923. struct vmw_framebuffer_surface *new_vfbs;
  924. struct drm_crtc *crtc = new_state->crtc;
  925. uint32_t hdisplay = new_state->crtc_w, vdisplay = new_state->crtc_h;
  926. int ret;
  927. /* No FB to prepare */
  928. if (!new_fb) {
  929. if (vps->surf) {
  930. WARN_ON(vps->pinned != 0);
  931. vmw_surface_unreference(&vps->surf);
  932. }
  933. return 0;
  934. }
  935. vfb = vmw_framebuffer_to_vfb(new_fb);
  936. new_vfbs = (vfb->bo) ? NULL : vmw_framebuffer_to_vfbs(new_fb);
  937. if (new_vfbs && new_vfbs->surface->base_size.width == hdisplay &&
  938. new_vfbs->surface->base_size.height == vdisplay)
  939. new_content_type = SAME_AS_DISPLAY;
  940. else if (vfb->bo)
  941. new_content_type = SEPARATE_BO;
  942. else
  943. new_content_type = SEPARATE_SURFACE;
  944. if (new_content_type != SAME_AS_DISPLAY) {
  945. struct vmw_surface content_srf;
  946. struct drm_vmw_size display_base_size = {0};
  947. display_base_size.width = hdisplay;
  948. display_base_size.height = vdisplay;
  949. display_base_size.depth = 1;
  950. /*
  951. * If content buffer is a buffer object, then we have to
  952. * construct surface info
  953. */
  954. if (new_content_type == SEPARATE_BO) {
  955. switch (new_fb->format->cpp[0]*8) {
  956. case 32:
  957. content_srf.format = SVGA3D_X8R8G8B8;
  958. break;
  959. case 16:
  960. content_srf.format = SVGA3D_R5G6B5;
  961. break;
  962. case 8:
  963. content_srf.format = SVGA3D_P8;
  964. break;
  965. default:
  966. DRM_ERROR("Invalid format\n");
  967. return -EINVAL;
  968. }
  969. content_srf.flags = 0;
  970. content_srf.mip_levels[0] = 1;
  971. content_srf.multisample_count = 0;
  972. content_srf.multisample_pattern =
  973. SVGA3D_MS_PATTERN_NONE;
  974. content_srf.quality_level = SVGA3D_MS_QUALITY_NONE;
  975. } else {
  976. content_srf = *new_vfbs->surface;
  977. }
  978. if (vps->surf) {
  979. struct drm_vmw_size cur_base_size = vps->surf->base_size;
  980. if (cur_base_size.width != display_base_size.width ||
  981. cur_base_size.height != display_base_size.height ||
  982. vps->surf->format != content_srf.format) {
  983. WARN_ON(vps->pinned != 0);
  984. vmw_surface_unreference(&vps->surf);
  985. }
  986. }
  987. if (!vps->surf) {
  988. ret = vmw_surface_gb_priv_define
  989. (crtc->dev,
  990. /* Kernel visible only */
  991. 0,
  992. content_srf.flags,
  993. content_srf.format,
  994. true, /* a scanout buffer */
  995. content_srf.mip_levels[0],
  996. content_srf.multisample_count,
  997. 0,
  998. display_base_size,
  999. content_srf.multisample_pattern,
  1000. content_srf.quality_level,
  1001. &vps->surf);
  1002. if (ret != 0) {
  1003. DRM_ERROR("Couldn't allocate STDU surface.\n");
  1004. return ret;
  1005. }
  1006. }
  1007. } else {
  1008. /*
  1009. * prepare_fb and clean_fb should only take care of pinning
  1010. * and unpinning. References are tracked by state objects.
  1011. * The only time we add a reference in prepare_fb is if the
  1012. * state object doesn't have a reference to begin with
  1013. */
  1014. if (vps->surf) {
  1015. WARN_ON(vps->pinned != 0);
  1016. vmw_surface_unreference(&vps->surf);
  1017. }
  1018. vps->surf = vmw_surface_reference(new_vfbs->surface);
  1019. }
  1020. if (vps->surf) {
  1021. /* Pin new surface before flipping */
  1022. ret = vmw_resource_pin(&vps->surf->res, false);
  1023. if (ret)
  1024. goto out_srf_unref;
  1025. vps->pinned++;
  1026. }
  1027. vps->content_fb_type = new_content_type;
  1028. /*
  1029. * This should only happen if the buffer object is too large to create a
  1030. * proxy surface for.
  1031. * If we are a 2D VM with a buffer object then we have to use CPU blit
  1032. * so cache these mappings
  1033. */
  1034. if (vps->content_fb_type == SEPARATE_BO &&
  1035. !(dev_priv->capabilities & SVGA_CAP_3D))
  1036. vps->cpp = new_fb->pitches[0] / new_fb->width;
  1037. return 0;
  1038. out_srf_unref:
  1039. vmw_surface_unreference(&vps->surf);
  1040. return ret;
  1041. }
  1042. /**
  1043. * vmw_stdu_primary_plane_atomic_update - formally switches STDU to new plane
  1044. *
  1045. * @plane: display plane
  1046. * @old_state: Only used to get crtc info
  1047. *
  1048. * Formally update stdu->display_srf to the new plane, and bind the new
  1049. * plane STDU. This function is called during the commit phase when
  1050. * all the preparation have been done and all the configurations have
  1051. * been checked.
  1052. */
  1053. static void
  1054. vmw_stdu_primary_plane_atomic_update(struct drm_plane *plane,
  1055. struct drm_plane_state *old_state)
  1056. {
  1057. struct vmw_plane_state *vps = vmw_plane_state_to_vps(plane->state);
  1058. struct drm_crtc *crtc = plane->state->crtc;
  1059. struct vmw_screen_target_display_unit *stdu;
  1060. struct drm_pending_vblank_event *event;
  1061. struct vmw_private *dev_priv;
  1062. int ret;
  1063. /*
  1064. * We cannot really fail this function, so if we do, then output an
  1065. * error and maintain consistent atomic state.
  1066. */
  1067. if (crtc && plane->state->fb) {
  1068. struct vmw_framebuffer *vfb =
  1069. vmw_framebuffer_to_vfb(plane->state->fb);
  1070. struct drm_vmw_rect vclips;
  1071. stdu = vmw_crtc_to_stdu(crtc);
  1072. dev_priv = vmw_priv(crtc->dev);
  1073. stdu->display_srf = vps->surf;
  1074. stdu->content_fb_type = vps->content_fb_type;
  1075. stdu->cpp = vps->cpp;
  1076. vclips.x = crtc->x;
  1077. vclips.y = crtc->y;
  1078. vclips.w = crtc->mode.hdisplay;
  1079. vclips.h = crtc->mode.vdisplay;
  1080. ret = vmw_stdu_bind_st(dev_priv, stdu, &stdu->display_srf->res);
  1081. if (ret)
  1082. DRM_ERROR("Failed to bind surface to STDU.\n");
  1083. if (vfb->bo)
  1084. ret = vmw_kms_stdu_dma(dev_priv, NULL, vfb, NULL, NULL,
  1085. &vclips, 1, 1, true, false,
  1086. crtc);
  1087. else
  1088. ret = vmw_kms_stdu_surface_dirty(dev_priv, vfb, NULL,
  1089. &vclips, NULL, 0, 0,
  1090. 1, 1, NULL, crtc);
  1091. if (ret)
  1092. DRM_ERROR("Failed to update STDU.\n");
  1093. } else {
  1094. crtc = old_state->crtc;
  1095. stdu = vmw_crtc_to_stdu(crtc);
  1096. dev_priv = vmw_priv(crtc->dev);
  1097. /*
  1098. * When disabling a plane, CRTC and FB should always be NULL
  1099. * together, otherwise it's an error.
  1100. * Here primary plane is being disable so blank the screen
  1101. * target display unit, if not already done.
  1102. */
  1103. if (!stdu->defined)
  1104. return;
  1105. ret = vmw_stdu_bind_st(dev_priv, stdu, NULL);
  1106. if (ret)
  1107. DRM_ERROR("Failed to blank STDU\n");
  1108. ret = vmw_stdu_update_st(dev_priv, stdu);
  1109. if (ret)
  1110. DRM_ERROR("Failed to update STDU.\n");
  1111. return;
  1112. }
  1113. event = crtc->state->event;
  1114. /*
  1115. * In case of failure and other cases, vblank event will be sent in
  1116. * vmw_du_crtc_atomic_flush.
  1117. */
  1118. if (event && (ret == 0)) {
  1119. struct vmw_fence_obj *fence = NULL;
  1120. struct drm_file *file_priv = event->base.file_priv;
  1121. vmw_execbuf_fence_commands(NULL, dev_priv, &fence, NULL);
  1122. /*
  1123. * If fence is NULL, then already sync.
  1124. */
  1125. if (fence) {
  1126. ret = vmw_event_fence_action_queue(
  1127. file_priv, fence, &event->base,
  1128. &event->event.vbl.tv_sec,
  1129. &event->event.vbl.tv_usec,
  1130. true);
  1131. if (ret)
  1132. DRM_ERROR("Failed to queue event on fence.\n");
  1133. else
  1134. crtc->state->event = NULL;
  1135. vmw_fence_obj_unreference(&fence);
  1136. }
  1137. } else {
  1138. (void) vmw_fifo_flush(dev_priv, false);
  1139. }
  1140. }
  1141. static const struct drm_plane_funcs vmw_stdu_plane_funcs = {
  1142. .update_plane = drm_atomic_helper_update_plane,
  1143. .disable_plane = drm_atomic_helper_disable_plane,
  1144. .destroy = vmw_du_primary_plane_destroy,
  1145. .reset = vmw_du_plane_reset,
  1146. .atomic_duplicate_state = vmw_du_plane_duplicate_state,
  1147. .atomic_destroy_state = vmw_du_plane_destroy_state,
  1148. };
  1149. static const struct drm_plane_funcs vmw_stdu_cursor_funcs = {
  1150. .update_plane = drm_atomic_helper_update_plane,
  1151. .disable_plane = drm_atomic_helper_disable_plane,
  1152. .destroy = vmw_du_cursor_plane_destroy,
  1153. .reset = vmw_du_plane_reset,
  1154. .atomic_duplicate_state = vmw_du_plane_duplicate_state,
  1155. .atomic_destroy_state = vmw_du_plane_destroy_state,
  1156. };
  1157. /*
  1158. * Atomic Helpers
  1159. */
  1160. static const struct
  1161. drm_plane_helper_funcs vmw_stdu_cursor_plane_helper_funcs = {
  1162. .atomic_check = vmw_du_cursor_plane_atomic_check,
  1163. .atomic_update = vmw_du_cursor_plane_atomic_update,
  1164. .prepare_fb = vmw_du_cursor_plane_prepare_fb,
  1165. .cleanup_fb = vmw_du_plane_cleanup_fb,
  1166. };
  1167. static const struct
  1168. drm_plane_helper_funcs vmw_stdu_primary_plane_helper_funcs = {
  1169. .atomic_check = vmw_du_primary_plane_atomic_check,
  1170. .atomic_update = vmw_stdu_primary_plane_atomic_update,
  1171. .prepare_fb = vmw_stdu_primary_plane_prepare_fb,
  1172. .cleanup_fb = vmw_stdu_primary_plane_cleanup_fb,
  1173. };
  1174. static const struct drm_crtc_helper_funcs vmw_stdu_crtc_helper_funcs = {
  1175. .prepare = vmw_stdu_crtc_helper_prepare,
  1176. .mode_set_nofb = vmw_stdu_crtc_mode_set_nofb,
  1177. .atomic_check = vmw_du_crtc_atomic_check,
  1178. .atomic_begin = vmw_du_crtc_atomic_begin,
  1179. .atomic_flush = vmw_du_crtc_atomic_flush,
  1180. .atomic_enable = vmw_stdu_crtc_atomic_enable,
  1181. .atomic_disable = vmw_stdu_crtc_atomic_disable,
  1182. };
  1183. /**
  1184. * vmw_stdu_init - Sets up a Screen Target Display Unit
  1185. *
  1186. * @dev_priv: VMW DRM device
  1187. * @unit: unit number range from 0 to VMWGFX_NUM_DISPLAY_UNITS
  1188. *
  1189. * This function is called once per CRTC, and allocates one Screen Target
  1190. * display unit to represent that CRTC. Since the SVGA device does not separate
  1191. * out encoder and connector, they are represented as part of the STDU as well.
  1192. */
  1193. static int vmw_stdu_init(struct vmw_private *dev_priv, unsigned unit)
  1194. {
  1195. struct vmw_screen_target_display_unit *stdu;
  1196. struct drm_device *dev = dev_priv->dev;
  1197. struct drm_connector *connector;
  1198. struct drm_encoder *encoder;
  1199. struct drm_plane *primary, *cursor;
  1200. struct drm_crtc *crtc;
  1201. int ret;
  1202. stdu = kzalloc(sizeof(*stdu), GFP_KERNEL);
  1203. if (!stdu)
  1204. return -ENOMEM;
  1205. stdu->base.unit = unit;
  1206. crtc = &stdu->base.crtc;
  1207. encoder = &stdu->base.encoder;
  1208. connector = &stdu->base.connector;
  1209. primary = &stdu->base.primary;
  1210. cursor = &stdu->base.cursor;
  1211. stdu->base.pref_active = (unit == 0);
  1212. stdu->base.pref_width = dev_priv->initial_width;
  1213. stdu->base.pref_height = dev_priv->initial_height;
  1214. /*
  1215. * Remove this after enabling atomic because property values can
  1216. * only exist in a state object
  1217. */
  1218. stdu->base.is_implicit = false;
  1219. /* Initialize primary plane */
  1220. vmw_du_plane_reset(primary);
  1221. ret = drm_universal_plane_init(dev, primary,
  1222. 0, &vmw_stdu_plane_funcs,
  1223. vmw_primary_plane_formats,
  1224. ARRAY_SIZE(vmw_primary_plane_formats),
  1225. NULL, DRM_PLANE_TYPE_PRIMARY, NULL);
  1226. if (ret) {
  1227. DRM_ERROR("Failed to initialize primary plane");
  1228. goto err_free;
  1229. }
  1230. drm_plane_helper_add(primary, &vmw_stdu_primary_plane_helper_funcs);
  1231. /* Initialize cursor plane */
  1232. vmw_du_plane_reset(cursor);
  1233. ret = drm_universal_plane_init(dev, cursor,
  1234. 0, &vmw_stdu_cursor_funcs,
  1235. vmw_cursor_plane_formats,
  1236. ARRAY_SIZE(vmw_cursor_plane_formats),
  1237. NULL, DRM_PLANE_TYPE_CURSOR, NULL);
  1238. if (ret) {
  1239. DRM_ERROR("Failed to initialize cursor plane");
  1240. drm_plane_cleanup(&stdu->base.primary);
  1241. goto err_free;
  1242. }
  1243. drm_plane_helper_add(cursor, &vmw_stdu_cursor_plane_helper_funcs);
  1244. vmw_du_connector_reset(connector);
  1245. ret = drm_connector_init(dev, connector, &vmw_stdu_connector_funcs,
  1246. DRM_MODE_CONNECTOR_VIRTUAL);
  1247. if (ret) {
  1248. DRM_ERROR("Failed to initialize connector\n");
  1249. goto err_free;
  1250. }
  1251. drm_connector_helper_add(connector, &vmw_stdu_connector_helper_funcs);
  1252. connector->status = vmw_du_connector_detect(connector, false);
  1253. vmw_connector_state_to_vcs(connector->state)->is_implicit = false;
  1254. ret = drm_encoder_init(dev, encoder, &vmw_stdu_encoder_funcs,
  1255. DRM_MODE_ENCODER_VIRTUAL, NULL);
  1256. if (ret) {
  1257. DRM_ERROR("Failed to initialize encoder\n");
  1258. goto err_free_connector;
  1259. }
  1260. (void) drm_connector_attach_encoder(connector, encoder);
  1261. encoder->possible_crtcs = (1 << unit);
  1262. encoder->possible_clones = 0;
  1263. ret = drm_connector_register(connector);
  1264. if (ret) {
  1265. DRM_ERROR("Failed to register connector\n");
  1266. goto err_free_encoder;
  1267. }
  1268. vmw_du_crtc_reset(crtc);
  1269. ret = drm_crtc_init_with_planes(dev, crtc, &stdu->base.primary,
  1270. &stdu->base.cursor,
  1271. &vmw_stdu_crtc_funcs, NULL);
  1272. if (ret) {
  1273. DRM_ERROR("Failed to initialize CRTC\n");
  1274. goto err_free_unregister;
  1275. }
  1276. drm_crtc_helper_add(crtc, &vmw_stdu_crtc_helper_funcs);
  1277. drm_mode_crtc_set_gamma_size(crtc, 256);
  1278. drm_object_attach_property(&connector->base,
  1279. dev_priv->hotplug_mode_update_property, 1);
  1280. drm_object_attach_property(&connector->base,
  1281. dev->mode_config.suggested_x_property, 0);
  1282. drm_object_attach_property(&connector->base,
  1283. dev->mode_config.suggested_y_property, 0);
  1284. if (dev_priv->implicit_placement_property)
  1285. drm_object_attach_property
  1286. (&connector->base,
  1287. dev_priv->implicit_placement_property,
  1288. stdu->base.is_implicit);
  1289. return 0;
  1290. err_free_unregister:
  1291. drm_connector_unregister(connector);
  1292. err_free_encoder:
  1293. drm_encoder_cleanup(encoder);
  1294. err_free_connector:
  1295. drm_connector_cleanup(connector);
  1296. err_free:
  1297. kfree(stdu);
  1298. return ret;
  1299. }
  1300. /**
  1301. * vmw_stdu_destroy - Cleans up a vmw_screen_target_display_unit
  1302. *
  1303. * @stdu: Screen Target Display Unit to be destroyed
  1304. *
  1305. * Clean up after vmw_stdu_init
  1306. */
  1307. static void vmw_stdu_destroy(struct vmw_screen_target_display_unit *stdu)
  1308. {
  1309. vmw_du_cleanup(&stdu->base);
  1310. kfree(stdu);
  1311. }
  1312. /******************************************************************************
  1313. * Screen Target Display KMS Functions
  1314. *
  1315. * These functions are called by the common KMS code in vmwgfx_kms.c
  1316. *****************************************************************************/
  1317. /**
  1318. * vmw_kms_stdu_init_display - Initializes a Screen Target based display
  1319. *
  1320. * @dev_priv: VMW DRM device
  1321. *
  1322. * This function initialize a Screen Target based display device. It checks
  1323. * the capability bits to make sure the underlying hardware can support
  1324. * screen targets, and then creates the maximum number of CRTCs, a.k.a Display
  1325. * Units, as supported by the display hardware.
  1326. *
  1327. * RETURNS:
  1328. * 0 on success, error code otherwise
  1329. */
  1330. int vmw_kms_stdu_init_display(struct vmw_private *dev_priv)
  1331. {
  1332. struct drm_device *dev = dev_priv->dev;
  1333. int i, ret;
  1334. /* Do nothing if Screen Target support is turned off */
  1335. if (!VMWGFX_ENABLE_SCREEN_TARGET_OTABLE)
  1336. return -ENOSYS;
  1337. if (!(dev_priv->capabilities & SVGA_CAP_GBOBJECTS))
  1338. return -ENOSYS;
  1339. ret = drm_vblank_init(dev, VMWGFX_NUM_DISPLAY_UNITS);
  1340. if (unlikely(ret != 0))
  1341. return ret;
  1342. dev_priv->active_display_unit = vmw_du_screen_target;
  1343. vmw_kms_create_implicit_placement_property(dev_priv, false);
  1344. for (i = 0; i < VMWGFX_NUM_DISPLAY_UNITS; ++i) {
  1345. ret = vmw_stdu_init(dev_priv, i);
  1346. if (unlikely(ret != 0)) {
  1347. DRM_ERROR("Failed to initialize STDU %d", i);
  1348. return ret;
  1349. }
  1350. }
  1351. DRM_INFO("Screen Target Display device initialized\n");
  1352. return 0;
  1353. }