virtgpu_display.c 11 KB

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  1. /*
  2. * Copyright (C) 2015 Red Hat, Inc.
  3. * All Rights Reserved.
  4. *
  5. * Authors:
  6. * Dave Airlie
  7. * Alon Levy
  8. *
  9. * Permission is hereby granted, free of charge, to any person obtaining a
  10. * copy of this software and associated documentation files (the "Software"),
  11. * to deal in the Software without restriction, including without limitation
  12. * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  13. * and/or sell copies of the Software, and to permit persons to whom the
  14. * Software is furnished to do so, subject to the following conditions:
  15. *
  16. * The above copyright notice and this permission notice shall be included in
  17. * all copies or substantial portions of the Software.
  18. *
  19. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  20. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  21. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  22. * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  23. * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  24. * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  25. * OTHER DEALINGS IN THE SOFTWARE.
  26. */
  27. #include "virtgpu_drv.h"
  28. #include <drm/drm_crtc_helper.h>
  29. #include <drm/drm_atomic_helper.h>
  30. #include <drm/drm_gem_framebuffer_helper.h>
  31. #define XRES_MIN 32
  32. #define YRES_MIN 32
  33. #define XRES_DEF 1024
  34. #define YRES_DEF 768
  35. #define XRES_MAX 8192
  36. #define YRES_MAX 8192
  37. static const struct drm_crtc_funcs virtio_gpu_crtc_funcs = {
  38. .set_config = drm_atomic_helper_set_config,
  39. .destroy = drm_crtc_cleanup,
  40. .page_flip = drm_atomic_helper_page_flip,
  41. .reset = drm_atomic_helper_crtc_reset,
  42. .atomic_duplicate_state = drm_atomic_helper_crtc_duplicate_state,
  43. .atomic_destroy_state = drm_atomic_helper_crtc_destroy_state,
  44. };
  45. static int
  46. virtio_gpu_framebuffer_surface_dirty(struct drm_framebuffer *fb,
  47. struct drm_file *file_priv,
  48. unsigned int flags, unsigned int color,
  49. struct drm_clip_rect *clips,
  50. unsigned int num_clips)
  51. {
  52. struct virtio_gpu_framebuffer *virtio_gpu_fb
  53. = to_virtio_gpu_framebuffer(fb);
  54. return virtio_gpu_surface_dirty(virtio_gpu_fb, clips, num_clips);
  55. }
  56. static const struct drm_framebuffer_funcs virtio_gpu_fb_funcs = {
  57. .create_handle = drm_gem_fb_create_handle,
  58. .destroy = drm_gem_fb_destroy,
  59. .dirty = virtio_gpu_framebuffer_surface_dirty,
  60. };
  61. int
  62. virtio_gpu_framebuffer_init(struct drm_device *dev,
  63. struct virtio_gpu_framebuffer *vgfb,
  64. const struct drm_mode_fb_cmd2 *mode_cmd,
  65. struct drm_gem_object *obj)
  66. {
  67. int ret;
  68. vgfb->base.obj[0] = obj;
  69. drm_helper_mode_fill_fb_struct(dev, &vgfb->base, mode_cmd);
  70. ret = drm_framebuffer_init(dev, &vgfb->base, &virtio_gpu_fb_funcs);
  71. if (ret) {
  72. vgfb->base.obj[0] = NULL;
  73. return ret;
  74. }
  75. spin_lock_init(&vgfb->dirty_lock);
  76. vgfb->x1 = vgfb->y1 = INT_MAX;
  77. vgfb->x2 = vgfb->y2 = 0;
  78. return 0;
  79. }
  80. static void virtio_gpu_crtc_mode_set_nofb(struct drm_crtc *crtc)
  81. {
  82. struct drm_device *dev = crtc->dev;
  83. struct virtio_gpu_device *vgdev = dev->dev_private;
  84. struct virtio_gpu_output *output = drm_crtc_to_virtio_gpu_output(crtc);
  85. virtio_gpu_cmd_set_scanout(vgdev, output->index, 0,
  86. crtc->mode.hdisplay,
  87. crtc->mode.vdisplay, 0, 0);
  88. }
  89. static void virtio_gpu_crtc_atomic_enable(struct drm_crtc *crtc,
  90. struct drm_crtc_state *old_state)
  91. {
  92. struct virtio_gpu_output *output = drm_crtc_to_virtio_gpu_output(crtc);
  93. output->enabled = true;
  94. }
  95. static void virtio_gpu_crtc_atomic_disable(struct drm_crtc *crtc,
  96. struct drm_crtc_state *old_state)
  97. {
  98. struct drm_device *dev = crtc->dev;
  99. struct virtio_gpu_device *vgdev = dev->dev_private;
  100. struct virtio_gpu_output *output = drm_crtc_to_virtio_gpu_output(crtc);
  101. virtio_gpu_cmd_set_scanout(vgdev, output->index, 0, 0, 0, 0, 0);
  102. output->enabled = false;
  103. }
  104. static int virtio_gpu_crtc_atomic_check(struct drm_crtc *crtc,
  105. struct drm_crtc_state *state)
  106. {
  107. return 0;
  108. }
  109. static void virtio_gpu_crtc_atomic_flush(struct drm_crtc *crtc,
  110. struct drm_crtc_state *old_state)
  111. {
  112. unsigned long flags;
  113. spin_lock_irqsave(&crtc->dev->event_lock, flags);
  114. if (crtc->state->event)
  115. drm_crtc_send_vblank_event(crtc, crtc->state->event);
  116. crtc->state->event = NULL;
  117. spin_unlock_irqrestore(&crtc->dev->event_lock, flags);
  118. }
  119. static const struct drm_crtc_helper_funcs virtio_gpu_crtc_helper_funcs = {
  120. .mode_set_nofb = virtio_gpu_crtc_mode_set_nofb,
  121. .atomic_check = virtio_gpu_crtc_atomic_check,
  122. .atomic_flush = virtio_gpu_crtc_atomic_flush,
  123. .atomic_enable = virtio_gpu_crtc_atomic_enable,
  124. .atomic_disable = virtio_gpu_crtc_atomic_disable,
  125. };
  126. static void virtio_gpu_enc_mode_set(struct drm_encoder *encoder,
  127. struct drm_display_mode *mode,
  128. struct drm_display_mode *adjusted_mode)
  129. {
  130. }
  131. static void virtio_gpu_enc_enable(struct drm_encoder *encoder)
  132. {
  133. }
  134. static void virtio_gpu_enc_disable(struct drm_encoder *encoder)
  135. {
  136. }
  137. static int virtio_gpu_conn_get_modes(struct drm_connector *connector)
  138. {
  139. struct virtio_gpu_output *output =
  140. drm_connector_to_virtio_gpu_output(connector);
  141. struct drm_display_mode *mode = NULL;
  142. int count, width, height;
  143. width = le32_to_cpu(output->info.r.width);
  144. height = le32_to_cpu(output->info.r.height);
  145. count = drm_add_modes_noedid(connector, XRES_MAX, YRES_MAX);
  146. if (width == 0 || height == 0) {
  147. width = XRES_DEF;
  148. height = YRES_DEF;
  149. drm_set_preferred_mode(connector, XRES_DEF, YRES_DEF);
  150. } else {
  151. DRM_DEBUG("add mode: %dx%d\n", width, height);
  152. mode = drm_cvt_mode(connector->dev, width, height, 60,
  153. false, false, false);
  154. mode->type |= DRM_MODE_TYPE_PREFERRED;
  155. drm_mode_probed_add(connector, mode);
  156. count++;
  157. }
  158. return count;
  159. }
  160. static enum drm_mode_status virtio_gpu_conn_mode_valid(struct drm_connector *connector,
  161. struct drm_display_mode *mode)
  162. {
  163. struct virtio_gpu_output *output =
  164. drm_connector_to_virtio_gpu_output(connector);
  165. int width, height;
  166. width = le32_to_cpu(output->info.r.width);
  167. height = le32_to_cpu(output->info.r.height);
  168. if (!(mode->type & DRM_MODE_TYPE_PREFERRED))
  169. return MODE_OK;
  170. if (mode->hdisplay == XRES_DEF && mode->vdisplay == YRES_DEF)
  171. return MODE_OK;
  172. if (mode->hdisplay <= width && mode->hdisplay >= width - 16 &&
  173. mode->vdisplay <= height && mode->vdisplay >= height - 16)
  174. return MODE_OK;
  175. DRM_DEBUG("del mode: %dx%d\n", mode->hdisplay, mode->vdisplay);
  176. return MODE_BAD;
  177. }
  178. static const struct drm_encoder_helper_funcs virtio_gpu_enc_helper_funcs = {
  179. .mode_set = virtio_gpu_enc_mode_set,
  180. .enable = virtio_gpu_enc_enable,
  181. .disable = virtio_gpu_enc_disable,
  182. };
  183. static const struct drm_connector_helper_funcs virtio_gpu_conn_helper_funcs = {
  184. .get_modes = virtio_gpu_conn_get_modes,
  185. .mode_valid = virtio_gpu_conn_mode_valid,
  186. };
  187. static enum drm_connector_status virtio_gpu_conn_detect(
  188. struct drm_connector *connector,
  189. bool force)
  190. {
  191. struct virtio_gpu_output *output =
  192. drm_connector_to_virtio_gpu_output(connector);
  193. if (output->info.enabled)
  194. return connector_status_connected;
  195. else
  196. return connector_status_disconnected;
  197. }
  198. static void virtio_gpu_conn_destroy(struct drm_connector *connector)
  199. {
  200. struct virtio_gpu_output *virtio_gpu_output =
  201. drm_connector_to_virtio_gpu_output(connector);
  202. drm_connector_unregister(connector);
  203. drm_connector_cleanup(connector);
  204. kfree(virtio_gpu_output);
  205. }
  206. static const struct drm_connector_funcs virtio_gpu_connector_funcs = {
  207. .detect = virtio_gpu_conn_detect,
  208. .fill_modes = drm_helper_probe_single_connector_modes,
  209. .destroy = virtio_gpu_conn_destroy,
  210. .reset = drm_atomic_helper_connector_reset,
  211. .atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state,
  212. .atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
  213. };
  214. static const struct drm_encoder_funcs virtio_gpu_enc_funcs = {
  215. .destroy = drm_encoder_cleanup,
  216. };
  217. static int vgdev_output_init(struct virtio_gpu_device *vgdev, int index)
  218. {
  219. struct drm_device *dev = vgdev->ddev;
  220. struct virtio_gpu_output *output = vgdev->outputs + index;
  221. struct drm_connector *connector = &output->conn;
  222. struct drm_encoder *encoder = &output->enc;
  223. struct drm_crtc *crtc = &output->crtc;
  224. struct drm_plane *primary, *cursor;
  225. output->index = index;
  226. if (index == 0) {
  227. output->info.enabled = cpu_to_le32(true);
  228. output->info.r.width = cpu_to_le32(XRES_DEF);
  229. output->info.r.height = cpu_to_le32(YRES_DEF);
  230. }
  231. primary = virtio_gpu_plane_init(vgdev, DRM_PLANE_TYPE_PRIMARY, index);
  232. if (IS_ERR(primary))
  233. return PTR_ERR(primary);
  234. cursor = virtio_gpu_plane_init(vgdev, DRM_PLANE_TYPE_CURSOR, index);
  235. if (IS_ERR(cursor))
  236. return PTR_ERR(cursor);
  237. drm_crtc_init_with_planes(dev, crtc, primary, cursor,
  238. &virtio_gpu_crtc_funcs, NULL);
  239. drm_crtc_helper_add(crtc, &virtio_gpu_crtc_helper_funcs);
  240. drm_connector_init(dev, connector, &virtio_gpu_connector_funcs,
  241. DRM_MODE_CONNECTOR_VIRTUAL);
  242. drm_connector_helper_add(connector, &virtio_gpu_conn_helper_funcs);
  243. drm_encoder_init(dev, encoder, &virtio_gpu_enc_funcs,
  244. DRM_MODE_ENCODER_VIRTUAL, NULL);
  245. drm_encoder_helper_add(encoder, &virtio_gpu_enc_helper_funcs);
  246. encoder->possible_crtcs = 1 << index;
  247. drm_connector_attach_encoder(connector, encoder);
  248. drm_connector_register(connector);
  249. return 0;
  250. }
  251. static struct drm_framebuffer *
  252. virtio_gpu_user_framebuffer_create(struct drm_device *dev,
  253. struct drm_file *file_priv,
  254. const struct drm_mode_fb_cmd2 *mode_cmd)
  255. {
  256. struct drm_gem_object *obj = NULL;
  257. struct virtio_gpu_framebuffer *virtio_gpu_fb;
  258. int ret;
  259. if (mode_cmd->pixel_format != DRM_FORMAT_HOST_XRGB8888 &&
  260. mode_cmd->pixel_format != DRM_FORMAT_HOST_ARGB8888)
  261. return ERR_PTR(-ENOENT);
  262. /* lookup object associated with res handle */
  263. obj = drm_gem_object_lookup(file_priv, mode_cmd->handles[0]);
  264. if (!obj)
  265. return ERR_PTR(-EINVAL);
  266. virtio_gpu_fb = kzalloc(sizeof(*virtio_gpu_fb), GFP_KERNEL);
  267. if (virtio_gpu_fb == NULL)
  268. return ERR_PTR(-ENOMEM);
  269. ret = virtio_gpu_framebuffer_init(dev, virtio_gpu_fb, mode_cmd, obj);
  270. if (ret) {
  271. kfree(virtio_gpu_fb);
  272. drm_gem_object_put_unlocked(obj);
  273. return NULL;
  274. }
  275. return &virtio_gpu_fb->base;
  276. }
  277. static void vgdev_atomic_commit_tail(struct drm_atomic_state *state)
  278. {
  279. struct drm_device *dev = state->dev;
  280. drm_atomic_helper_commit_modeset_disables(dev, state);
  281. drm_atomic_helper_commit_modeset_enables(dev, state);
  282. drm_atomic_helper_commit_planes(dev, state, 0);
  283. drm_atomic_helper_commit_hw_done(state);
  284. drm_atomic_helper_wait_for_vblanks(dev, state);
  285. drm_atomic_helper_cleanup_planes(dev, state);
  286. }
  287. static const struct drm_mode_config_helper_funcs virtio_mode_config_helpers = {
  288. .atomic_commit_tail = vgdev_atomic_commit_tail,
  289. };
  290. static const struct drm_mode_config_funcs virtio_gpu_mode_funcs = {
  291. .fb_create = virtio_gpu_user_framebuffer_create,
  292. .atomic_check = drm_atomic_helper_check,
  293. .atomic_commit = drm_atomic_helper_commit,
  294. };
  295. int virtio_gpu_modeset_init(struct virtio_gpu_device *vgdev)
  296. {
  297. int i;
  298. drm_mode_config_init(vgdev->ddev);
  299. vgdev->ddev->mode_config.quirk_addfb_prefer_host_byte_order = true;
  300. vgdev->ddev->mode_config.funcs = &virtio_gpu_mode_funcs;
  301. vgdev->ddev->mode_config.helper_private = &virtio_mode_config_helpers;
  302. /* modes will be validated against the framebuffer size */
  303. vgdev->ddev->mode_config.min_width = XRES_MIN;
  304. vgdev->ddev->mode_config.min_height = YRES_MIN;
  305. vgdev->ddev->mode_config.max_width = XRES_MAX;
  306. vgdev->ddev->mode_config.max_height = YRES_MAX;
  307. for (i = 0 ; i < vgdev->num_scanouts; ++i)
  308. vgdev_output_init(vgdev, i);
  309. drm_mode_config_reset(vgdev->ddev);
  310. return 0;
  311. }
  312. void virtio_gpu_modeset_fini(struct virtio_gpu_device *vgdev)
  313. {
  314. virtio_gpu_fbdev_fini(vgdev);
  315. drm_mode_config_cleanup(vgdev->ddev);
  316. }