vc4_kms.c 11 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443
  1. /*
  2. * Copyright (C) 2015 Broadcom
  3. *
  4. * This program is free software; you can redistribute it and/or modify
  5. * it under the terms of the GNU General Public License version 2 as
  6. * published by the Free Software Foundation.
  7. */
  8. /**
  9. * DOC: VC4 KMS
  10. *
  11. * This is the general code for implementing KMS mode setting that
  12. * doesn't clearly associate with any of the other objects (plane,
  13. * crtc, HDMI encoder).
  14. */
  15. #include <drm/drm_crtc.h>
  16. #include <drm/drm_atomic.h>
  17. #include <drm/drm_atomic_helper.h>
  18. #include <drm/drm_crtc_helper.h>
  19. #include <drm/drm_plane_helper.h>
  20. #include <drm/drm_gem_framebuffer_helper.h>
  21. #include "vc4_drv.h"
  22. #include "vc4_regs.h"
  23. struct vc4_ctm_state {
  24. struct drm_private_state base;
  25. struct drm_color_ctm *ctm;
  26. int fifo;
  27. };
  28. static struct vc4_ctm_state *to_vc4_ctm_state(struct drm_private_state *priv)
  29. {
  30. return container_of(priv, struct vc4_ctm_state, base);
  31. }
  32. static struct vc4_ctm_state *vc4_get_ctm_state(struct drm_atomic_state *state,
  33. struct drm_private_obj *manager)
  34. {
  35. struct drm_device *dev = state->dev;
  36. struct vc4_dev *vc4 = dev->dev_private;
  37. struct drm_private_state *priv_state;
  38. int ret;
  39. ret = drm_modeset_lock(&vc4->ctm_state_lock, state->acquire_ctx);
  40. if (ret)
  41. return ERR_PTR(ret);
  42. priv_state = drm_atomic_get_private_obj_state(state, manager);
  43. if (IS_ERR(priv_state))
  44. return ERR_CAST(priv_state);
  45. return to_vc4_ctm_state(priv_state);
  46. }
  47. static struct drm_private_state *
  48. vc4_ctm_duplicate_state(struct drm_private_obj *obj)
  49. {
  50. struct vc4_ctm_state *state;
  51. state = kmemdup(obj->state, sizeof(*state), GFP_KERNEL);
  52. if (!state)
  53. return NULL;
  54. __drm_atomic_helper_private_obj_duplicate_state(obj, &state->base);
  55. return &state->base;
  56. }
  57. static void vc4_ctm_destroy_state(struct drm_private_obj *obj,
  58. struct drm_private_state *state)
  59. {
  60. struct vc4_ctm_state *ctm_state = to_vc4_ctm_state(state);
  61. kfree(ctm_state);
  62. }
  63. static const struct drm_private_state_funcs vc4_ctm_state_funcs = {
  64. .atomic_duplicate_state = vc4_ctm_duplicate_state,
  65. .atomic_destroy_state = vc4_ctm_destroy_state,
  66. };
  67. /* Converts a DRM S31.32 value to the HW S0.9 format. */
  68. static u16 vc4_ctm_s31_32_to_s0_9(u64 in)
  69. {
  70. u16 r;
  71. /* Sign bit. */
  72. r = in & BIT_ULL(63) ? BIT(9) : 0;
  73. if ((in & GENMASK_ULL(62, 32)) > 0) {
  74. /* We have zero integer bits so we can only saturate here. */
  75. r |= GENMASK(8, 0);
  76. } else {
  77. /* Otherwise take the 9 most important fractional bits. */
  78. r |= (in >> 23) & GENMASK(8, 0);
  79. }
  80. return r;
  81. }
  82. static void
  83. vc4_ctm_commit(struct vc4_dev *vc4, struct drm_atomic_state *state)
  84. {
  85. struct vc4_ctm_state *ctm_state = to_vc4_ctm_state(vc4->ctm_manager.state);
  86. struct drm_color_ctm *ctm = ctm_state->ctm;
  87. if (ctm_state->fifo) {
  88. HVS_WRITE(SCALER_OLEDCOEF2,
  89. VC4_SET_FIELD(vc4_ctm_s31_32_to_s0_9(ctm->matrix[0]),
  90. SCALER_OLEDCOEF2_R_TO_R) |
  91. VC4_SET_FIELD(vc4_ctm_s31_32_to_s0_9(ctm->matrix[3]),
  92. SCALER_OLEDCOEF2_R_TO_G) |
  93. VC4_SET_FIELD(vc4_ctm_s31_32_to_s0_9(ctm->matrix[6]),
  94. SCALER_OLEDCOEF2_R_TO_B));
  95. HVS_WRITE(SCALER_OLEDCOEF1,
  96. VC4_SET_FIELD(vc4_ctm_s31_32_to_s0_9(ctm->matrix[1]),
  97. SCALER_OLEDCOEF1_G_TO_R) |
  98. VC4_SET_FIELD(vc4_ctm_s31_32_to_s0_9(ctm->matrix[4]),
  99. SCALER_OLEDCOEF1_G_TO_G) |
  100. VC4_SET_FIELD(vc4_ctm_s31_32_to_s0_9(ctm->matrix[7]),
  101. SCALER_OLEDCOEF1_G_TO_B));
  102. HVS_WRITE(SCALER_OLEDCOEF0,
  103. VC4_SET_FIELD(vc4_ctm_s31_32_to_s0_9(ctm->matrix[2]),
  104. SCALER_OLEDCOEF0_B_TO_R) |
  105. VC4_SET_FIELD(vc4_ctm_s31_32_to_s0_9(ctm->matrix[5]),
  106. SCALER_OLEDCOEF0_B_TO_G) |
  107. VC4_SET_FIELD(vc4_ctm_s31_32_to_s0_9(ctm->matrix[8]),
  108. SCALER_OLEDCOEF0_B_TO_B));
  109. }
  110. HVS_WRITE(SCALER_OLEDOFFS,
  111. VC4_SET_FIELD(ctm_state->fifo, SCALER_OLEDOFFS_DISPFIFO));
  112. }
  113. static void
  114. vc4_atomic_complete_commit(struct drm_atomic_state *state)
  115. {
  116. struct drm_device *dev = state->dev;
  117. struct vc4_dev *vc4 = to_vc4_dev(dev);
  118. drm_atomic_helper_wait_for_fences(dev, state, false);
  119. drm_atomic_helper_wait_for_dependencies(state);
  120. drm_atomic_helper_commit_modeset_disables(dev, state);
  121. vc4_ctm_commit(vc4, state);
  122. drm_atomic_helper_commit_planes(dev, state, 0);
  123. drm_atomic_helper_commit_modeset_enables(dev, state);
  124. drm_atomic_helper_fake_vblank(state);
  125. drm_atomic_helper_commit_hw_done(state);
  126. drm_atomic_helper_wait_for_flip_done(dev, state);
  127. drm_atomic_helper_cleanup_planes(dev, state);
  128. drm_atomic_helper_commit_cleanup_done(state);
  129. drm_atomic_state_put(state);
  130. up(&vc4->async_modeset);
  131. }
  132. static void commit_work(struct work_struct *work)
  133. {
  134. struct drm_atomic_state *state = container_of(work,
  135. struct drm_atomic_state,
  136. commit_work);
  137. vc4_atomic_complete_commit(state);
  138. }
  139. /**
  140. * vc4_atomic_commit - commit validated state object
  141. * @dev: DRM device
  142. * @state: the driver state object
  143. * @nonblock: nonblocking commit
  144. *
  145. * This function commits a with drm_atomic_helper_check() pre-validated state
  146. * object. This can still fail when e.g. the framebuffer reservation fails. For
  147. * now this doesn't implement asynchronous commits.
  148. *
  149. * RETURNS
  150. * Zero for success or -errno.
  151. */
  152. static int vc4_atomic_commit(struct drm_device *dev,
  153. struct drm_atomic_state *state,
  154. bool nonblock)
  155. {
  156. struct vc4_dev *vc4 = to_vc4_dev(dev);
  157. int ret;
  158. if (state->async_update) {
  159. ret = down_interruptible(&vc4->async_modeset);
  160. if (ret)
  161. return ret;
  162. ret = drm_atomic_helper_prepare_planes(dev, state);
  163. if (ret) {
  164. up(&vc4->async_modeset);
  165. return ret;
  166. }
  167. drm_atomic_helper_async_commit(dev, state);
  168. drm_atomic_helper_cleanup_planes(dev, state);
  169. up(&vc4->async_modeset);
  170. return 0;
  171. }
  172. /* We know for sure we don't want an async update here. Set
  173. * state->legacy_cursor_update to false to prevent
  174. * drm_atomic_helper_setup_commit() from auto-completing
  175. * commit->flip_done.
  176. */
  177. state->legacy_cursor_update = false;
  178. ret = drm_atomic_helper_setup_commit(state, nonblock);
  179. if (ret)
  180. return ret;
  181. INIT_WORK(&state->commit_work, commit_work);
  182. ret = down_interruptible(&vc4->async_modeset);
  183. if (ret)
  184. return ret;
  185. ret = drm_atomic_helper_prepare_planes(dev, state);
  186. if (ret) {
  187. up(&vc4->async_modeset);
  188. return ret;
  189. }
  190. if (!nonblock) {
  191. ret = drm_atomic_helper_wait_for_fences(dev, state, true);
  192. if (ret) {
  193. drm_atomic_helper_cleanup_planes(dev, state);
  194. up(&vc4->async_modeset);
  195. return ret;
  196. }
  197. }
  198. /*
  199. * This is the point of no return - everything below never fails except
  200. * when the hw goes bonghits. Which means we can commit the new state on
  201. * the software side now.
  202. */
  203. BUG_ON(drm_atomic_helper_swap_state(state, false) < 0);
  204. /*
  205. * Everything below can be run asynchronously without the need to grab
  206. * any modeset locks at all under one condition: It must be guaranteed
  207. * that the asynchronous work has either been cancelled (if the driver
  208. * supports it, which at least requires that the framebuffers get
  209. * cleaned up with drm_atomic_helper_cleanup_planes()) or completed
  210. * before the new state gets committed on the software side with
  211. * drm_atomic_helper_swap_state().
  212. *
  213. * This scheme allows new atomic state updates to be prepared and
  214. * checked in parallel to the asynchronous completion of the previous
  215. * update. Which is important since compositors need to figure out the
  216. * composition of the next frame right after having submitted the
  217. * current layout.
  218. */
  219. drm_atomic_state_get(state);
  220. if (nonblock)
  221. queue_work(system_unbound_wq, &state->commit_work);
  222. else
  223. vc4_atomic_complete_commit(state);
  224. return 0;
  225. }
  226. static struct drm_framebuffer *vc4_fb_create(struct drm_device *dev,
  227. struct drm_file *file_priv,
  228. const struct drm_mode_fb_cmd2 *mode_cmd)
  229. {
  230. struct drm_mode_fb_cmd2 mode_cmd_local;
  231. /* If the user didn't specify a modifier, use the
  232. * vc4_set_tiling_ioctl() state for the BO.
  233. */
  234. if (!(mode_cmd->flags & DRM_MODE_FB_MODIFIERS)) {
  235. struct drm_gem_object *gem_obj;
  236. struct vc4_bo *bo;
  237. gem_obj = drm_gem_object_lookup(file_priv,
  238. mode_cmd->handles[0]);
  239. if (!gem_obj) {
  240. DRM_DEBUG("Failed to look up GEM BO %d\n",
  241. mode_cmd->handles[0]);
  242. return ERR_PTR(-ENOENT);
  243. }
  244. bo = to_vc4_bo(gem_obj);
  245. mode_cmd_local = *mode_cmd;
  246. if (bo->t_format) {
  247. mode_cmd_local.modifier[0] =
  248. DRM_FORMAT_MOD_BROADCOM_VC4_T_TILED;
  249. } else {
  250. mode_cmd_local.modifier[0] = DRM_FORMAT_MOD_NONE;
  251. }
  252. drm_gem_object_put_unlocked(gem_obj);
  253. mode_cmd = &mode_cmd_local;
  254. }
  255. return drm_gem_fb_create(dev, file_priv, mode_cmd);
  256. }
  257. /* Our CTM has some peculiar limitations: we can only enable it for one CRTC
  258. * at a time and the HW only supports S0.9 scalars. To account for the latter,
  259. * we don't allow userland to set a CTM that we have no hope of approximating.
  260. */
  261. static int
  262. vc4_ctm_atomic_check(struct drm_device *dev, struct drm_atomic_state *state)
  263. {
  264. struct vc4_dev *vc4 = to_vc4_dev(dev);
  265. struct vc4_ctm_state *ctm_state = NULL;
  266. struct drm_crtc *crtc;
  267. struct drm_crtc_state *old_crtc_state, *new_crtc_state;
  268. struct drm_color_ctm *ctm;
  269. int i;
  270. for_each_oldnew_crtc_in_state(state, crtc, old_crtc_state, new_crtc_state, i) {
  271. /* CTM is being disabled. */
  272. if (!new_crtc_state->ctm && old_crtc_state->ctm) {
  273. ctm_state = vc4_get_ctm_state(state, &vc4->ctm_manager);
  274. if (IS_ERR(ctm_state))
  275. return PTR_ERR(ctm_state);
  276. ctm_state->fifo = 0;
  277. }
  278. }
  279. for_each_oldnew_crtc_in_state(state, crtc, old_crtc_state, new_crtc_state, i) {
  280. if (new_crtc_state->ctm == old_crtc_state->ctm)
  281. continue;
  282. if (!ctm_state) {
  283. ctm_state = vc4_get_ctm_state(state, &vc4->ctm_manager);
  284. if (IS_ERR(ctm_state))
  285. return PTR_ERR(ctm_state);
  286. }
  287. /* CTM is being enabled or the matrix changed. */
  288. if (new_crtc_state->ctm) {
  289. /* fifo is 1-based since 0 disables CTM. */
  290. int fifo = to_vc4_crtc(crtc)->channel + 1;
  291. /* Check userland isn't trying to turn on CTM for more
  292. * than one CRTC at a time.
  293. */
  294. if (ctm_state->fifo && ctm_state->fifo != fifo) {
  295. DRM_DEBUG_DRIVER("Too many CTM configured\n");
  296. return -EINVAL;
  297. }
  298. /* Check we can approximate the specified CTM.
  299. * We disallow scalars |c| > 1.0 since the HW has
  300. * no integer bits.
  301. */
  302. ctm = new_crtc_state->ctm->data;
  303. for (i = 0; i < ARRAY_SIZE(ctm->matrix); i++) {
  304. u64 val = ctm->matrix[i];
  305. val &= ~BIT_ULL(63);
  306. if (val > BIT_ULL(32))
  307. return -EINVAL;
  308. }
  309. ctm_state->fifo = fifo;
  310. ctm_state->ctm = ctm;
  311. }
  312. }
  313. return 0;
  314. }
  315. static int
  316. vc4_atomic_check(struct drm_device *dev, struct drm_atomic_state *state)
  317. {
  318. int ret;
  319. ret = vc4_ctm_atomic_check(dev, state);
  320. if (ret < 0)
  321. return ret;
  322. return drm_atomic_helper_check(dev, state);
  323. }
  324. static const struct drm_mode_config_funcs vc4_mode_funcs = {
  325. .atomic_check = vc4_atomic_check,
  326. .atomic_commit = vc4_atomic_commit,
  327. .fb_create = vc4_fb_create,
  328. };
  329. int vc4_kms_load(struct drm_device *dev)
  330. {
  331. struct vc4_dev *vc4 = to_vc4_dev(dev);
  332. struct vc4_ctm_state *ctm_state;
  333. int ret;
  334. sema_init(&vc4->async_modeset, 1);
  335. /* Set support for vblank irq fast disable, before drm_vblank_init() */
  336. dev->vblank_disable_immediate = true;
  337. ret = drm_vblank_init(dev, dev->mode_config.num_crtc);
  338. if (ret < 0) {
  339. dev_err(dev->dev, "failed to initialize vblank\n");
  340. return ret;
  341. }
  342. dev->mode_config.max_width = 2048;
  343. dev->mode_config.max_height = 2048;
  344. dev->mode_config.funcs = &vc4_mode_funcs;
  345. dev->mode_config.preferred_depth = 24;
  346. dev->mode_config.async_page_flip = true;
  347. dev->mode_config.allow_fb_modifiers = true;
  348. drm_modeset_lock_init(&vc4->ctm_state_lock);
  349. ctm_state = kzalloc(sizeof(*ctm_state), GFP_KERNEL);
  350. if (!ctm_state)
  351. return -ENOMEM;
  352. drm_atomic_private_obj_init(&vc4->ctm_manager, &ctm_state->base,
  353. &vc4_ctm_state_funcs);
  354. drm_mode_config_reset(dev);
  355. drm_kms_helper_poll_init(dev);
  356. return 0;
  357. }