hub.h 2.3 KB

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  1. /*
  2. * Copyright (C) 2017 NVIDIA CORPORATION. All rights reserved.
  3. *
  4. * This program is free software; you can redistribute it and/or modify
  5. * it under the terms of the GNU General Public License version 2 as
  6. * published by the Free Software Foundation.
  7. */
  8. #ifndef TEGRA_HUB_H
  9. #define TEGRA_HUB_H 1
  10. #include <drm/drmP.h>
  11. #include <drm/drm_plane.h>
  12. #include "plane.h"
  13. struct tegra_dc;
  14. struct tegra_windowgroup {
  15. unsigned int usecount;
  16. struct mutex lock;
  17. unsigned int index;
  18. struct device *parent;
  19. struct reset_control *rst;
  20. };
  21. struct tegra_shared_plane {
  22. struct tegra_plane base;
  23. struct tegra_windowgroup *wgrp;
  24. };
  25. static inline struct tegra_shared_plane *
  26. to_tegra_shared_plane(struct drm_plane *plane)
  27. {
  28. return container_of(plane, struct tegra_shared_plane, base.base);
  29. }
  30. struct tegra_display_hub_soc {
  31. unsigned int num_wgrps;
  32. bool supports_dsc;
  33. };
  34. struct tegra_display_hub {
  35. struct drm_private_obj base;
  36. struct host1x_client client;
  37. struct clk *clk_disp;
  38. struct clk *clk_dsc;
  39. struct clk *clk_hub;
  40. struct reset_control *rst;
  41. const struct tegra_display_hub_soc *soc;
  42. struct tegra_windowgroup *wgrps;
  43. };
  44. static inline struct tegra_display_hub *
  45. to_tegra_display_hub(struct host1x_client *client)
  46. {
  47. return container_of(client, struct tegra_display_hub, client);
  48. }
  49. struct tegra_display_hub_state {
  50. struct drm_private_state base;
  51. struct tegra_dc *dc;
  52. unsigned long rate;
  53. struct clk *clk;
  54. };
  55. static inline struct tegra_display_hub_state *
  56. to_tegra_display_hub_state(struct drm_private_state *priv)
  57. {
  58. return container_of(priv, struct tegra_display_hub_state, base);
  59. }
  60. struct tegra_dc;
  61. struct tegra_plane;
  62. int tegra_display_hub_prepare(struct tegra_display_hub *hub);
  63. void tegra_display_hub_cleanup(struct tegra_display_hub *hub);
  64. struct drm_plane *tegra_shared_plane_create(struct drm_device *drm,
  65. struct tegra_dc *dc,
  66. unsigned int wgrp,
  67. unsigned int index);
  68. int tegra_display_hub_atomic_check(struct drm_device *drm,
  69. struct drm_atomic_state *state);
  70. void tegra_display_hub_atomic_commit(struct drm_device *drm,
  71. struct drm_atomic_state *state);
  72. #define DC_CMD_IHUB_COMMON_MISC_CTL 0x068
  73. #define LATENCY_EVENT (1 << 3)
  74. #define DC_DISP_IHUB_COMMON_DISPLAY_FETCH_METER 0x451
  75. #define CURS_SLOTS(x) (((x) & 0xff) << 8)
  76. #define WGRP_SLOTS(x) (((x) & 0xff) << 0)
  77. #endif /* TEGRA_HUB_H */