sched_main.c 17 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638
  1. /*
  2. * Copyright 2015 Advanced Micro Devices, Inc.
  3. *
  4. * Permission is hereby granted, free of charge, to any person obtaining a
  5. * copy of this software and associated documentation files (the "Software"),
  6. * to deal in the Software without restriction, including without limitation
  7. * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  8. * and/or sell copies of the Software, and to permit persons to whom the
  9. * Software is furnished to do so, subject to the following conditions:
  10. *
  11. * The above copyright notice and this permission notice shall be included in
  12. * all copies or substantial portions of the Software.
  13. *
  14. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  17. * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  18. * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  19. * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  20. * OTHER DEALINGS IN THE SOFTWARE.
  21. *
  22. */
  23. /**
  24. * DOC: Overview
  25. *
  26. * The GPU scheduler provides entities which allow userspace to push jobs
  27. * into software queues which are then scheduled on a hardware run queue.
  28. * The software queues have a priority among them. The scheduler selects the entities
  29. * from the run queue using a FIFO. The scheduler provides dependency handling
  30. * features among jobs. The driver is supposed to provide callback functions for
  31. * backend operations to the scheduler like submitting a job to hardware run queue,
  32. * returning the dependencies of a job etc.
  33. *
  34. * The organisation of the scheduler is the following:
  35. *
  36. * 1. Each hw run queue has one scheduler
  37. * 2. Each scheduler has multiple run queues with different priorities
  38. * (e.g., HIGH_HW,HIGH_SW, KERNEL, NORMAL)
  39. * 3. Each scheduler run queue has a queue of entities to schedule
  40. * 4. Entities themselves maintain a queue of jobs that will be scheduled on
  41. * the hardware.
  42. *
  43. * The jobs in a entity are always scheduled in the order that they were pushed.
  44. */
  45. #include <linux/kthread.h>
  46. #include <linux/wait.h>
  47. #include <linux/sched.h>
  48. #include <uapi/linux/sched/types.h>
  49. #include <drm/drmP.h>
  50. #include <drm/gpu_scheduler.h>
  51. #include <drm/spsc_queue.h>
  52. #define CREATE_TRACE_POINTS
  53. #include "gpu_scheduler_trace.h"
  54. #define to_drm_sched_job(sched_job) \
  55. container_of((sched_job), struct drm_sched_job, queue_node)
  56. static void drm_sched_process_job(struct dma_fence *f, struct dma_fence_cb *cb);
  57. /**
  58. * drm_sched_rq_init - initialize a given run queue struct
  59. *
  60. * @rq: scheduler run queue
  61. *
  62. * Initializes a scheduler runqueue.
  63. */
  64. static void drm_sched_rq_init(struct drm_gpu_scheduler *sched,
  65. struct drm_sched_rq *rq)
  66. {
  67. spin_lock_init(&rq->lock);
  68. INIT_LIST_HEAD(&rq->entities);
  69. rq->current_entity = NULL;
  70. rq->sched = sched;
  71. }
  72. /**
  73. * drm_sched_rq_add_entity - add an entity
  74. *
  75. * @rq: scheduler run queue
  76. * @entity: scheduler entity
  77. *
  78. * Adds a scheduler entity to the run queue.
  79. */
  80. void drm_sched_rq_add_entity(struct drm_sched_rq *rq,
  81. struct drm_sched_entity *entity)
  82. {
  83. if (!list_empty(&entity->list))
  84. return;
  85. spin_lock(&rq->lock);
  86. list_add_tail(&entity->list, &rq->entities);
  87. spin_unlock(&rq->lock);
  88. }
  89. /**
  90. * drm_sched_rq_remove_entity - remove an entity
  91. *
  92. * @rq: scheduler run queue
  93. * @entity: scheduler entity
  94. *
  95. * Removes a scheduler entity from the run queue.
  96. */
  97. void drm_sched_rq_remove_entity(struct drm_sched_rq *rq,
  98. struct drm_sched_entity *entity)
  99. {
  100. if (list_empty(&entity->list))
  101. return;
  102. spin_lock(&rq->lock);
  103. list_del_init(&entity->list);
  104. if (rq->current_entity == entity)
  105. rq->current_entity = NULL;
  106. spin_unlock(&rq->lock);
  107. }
  108. /**
  109. * drm_sched_rq_select_entity - Select an entity which could provide a job to run
  110. *
  111. * @rq: scheduler run queue to check.
  112. *
  113. * Try to find a ready entity, returns NULL if none found.
  114. */
  115. static struct drm_sched_entity *
  116. drm_sched_rq_select_entity(struct drm_sched_rq *rq)
  117. {
  118. struct drm_sched_entity *entity;
  119. spin_lock(&rq->lock);
  120. entity = rq->current_entity;
  121. if (entity) {
  122. list_for_each_entry_continue(entity, &rq->entities, list) {
  123. if (drm_sched_entity_is_ready(entity)) {
  124. rq->current_entity = entity;
  125. spin_unlock(&rq->lock);
  126. return entity;
  127. }
  128. }
  129. }
  130. list_for_each_entry(entity, &rq->entities, list) {
  131. if (drm_sched_entity_is_ready(entity)) {
  132. rq->current_entity = entity;
  133. spin_unlock(&rq->lock);
  134. return entity;
  135. }
  136. if (entity == rq->current_entity)
  137. break;
  138. }
  139. spin_unlock(&rq->lock);
  140. return NULL;
  141. }
  142. /**
  143. * drm_sched_dependency_optimized
  144. *
  145. * @fence: the dependency fence
  146. * @entity: the entity which depends on the above fence
  147. *
  148. * Returns true if the dependency can be optimized and false otherwise
  149. */
  150. bool drm_sched_dependency_optimized(struct dma_fence* fence,
  151. struct drm_sched_entity *entity)
  152. {
  153. struct drm_gpu_scheduler *sched = entity->rq->sched;
  154. struct drm_sched_fence *s_fence;
  155. if (!fence || dma_fence_is_signaled(fence))
  156. return false;
  157. if (fence->context == entity->fence_context)
  158. return true;
  159. s_fence = to_drm_sched_fence(fence);
  160. if (s_fence && s_fence->sched == sched)
  161. return true;
  162. return false;
  163. }
  164. EXPORT_SYMBOL(drm_sched_dependency_optimized);
  165. /**
  166. * drm_sched_start_timeout - start timeout for reset worker
  167. *
  168. * @sched: scheduler instance to start the worker for
  169. *
  170. * Start the timeout for the given scheduler.
  171. */
  172. static void drm_sched_start_timeout(struct drm_gpu_scheduler *sched)
  173. {
  174. if (sched->timeout != MAX_SCHEDULE_TIMEOUT &&
  175. !list_empty(&sched->ring_mirror_list))
  176. schedule_delayed_work(&sched->work_tdr, sched->timeout);
  177. }
  178. /* job_finish is called after hw fence signaled
  179. */
  180. static void drm_sched_job_finish(struct work_struct *work)
  181. {
  182. struct drm_sched_job *s_job = container_of(work, struct drm_sched_job,
  183. finish_work);
  184. struct drm_gpu_scheduler *sched = s_job->sched;
  185. /*
  186. * Canceling the timeout without removing our job from the ring mirror
  187. * list is safe, as we will only end up in this worker if our jobs
  188. * finished fence has been signaled. So even if some another worker
  189. * manages to find this job as the next job in the list, the fence
  190. * signaled check below will prevent the timeout to be restarted.
  191. */
  192. cancel_delayed_work_sync(&sched->work_tdr);
  193. spin_lock(&sched->job_list_lock);
  194. /* remove job from ring_mirror_list */
  195. list_del(&s_job->node);
  196. /* queue TDR for next job */
  197. drm_sched_start_timeout(sched);
  198. spin_unlock(&sched->job_list_lock);
  199. dma_fence_put(&s_job->s_fence->finished);
  200. sched->ops->free_job(s_job);
  201. }
  202. static void drm_sched_job_finish_cb(struct dma_fence *f,
  203. struct dma_fence_cb *cb)
  204. {
  205. struct drm_sched_job *job = container_of(cb, struct drm_sched_job,
  206. finish_cb);
  207. schedule_work(&job->finish_work);
  208. }
  209. static void drm_sched_job_begin(struct drm_sched_job *s_job)
  210. {
  211. struct drm_gpu_scheduler *sched = s_job->sched;
  212. dma_fence_add_callback(&s_job->s_fence->finished, &s_job->finish_cb,
  213. drm_sched_job_finish_cb);
  214. spin_lock(&sched->job_list_lock);
  215. list_add_tail(&s_job->node, &sched->ring_mirror_list);
  216. drm_sched_start_timeout(sched);
  217. spin_unlock(&sched->job_list_lock);
  218. }
  219. static void drm_sched_job_timedout(struct work_struct *work)
  220. {
  221. struct drm_gpu_scheduler *sched;
  222. struct drm_sched_job *job;
  223. int r;
  224. sched = container_of(work, struct drm_gpu_scheduler, work_tdr.work);
  225. spin_lock(&sched->job_list_lock);
  226. list_for_each_entry_reverse(job, &sched->ring_mirror_list, node) {
  227. struct drm_sched_fence *fence = job->s_fence;
  228. if (!dma_fence_remove_callback(fence->parent, &fence->cb))
  229. goto already_signaled;
  230. }
  231. job = list_first_entry_or_null(&sched->ring_mirror_list,
  232. struct drm_sched_job, node);
  233. spin_unlock(&sched->job_list_lock);
  234. if (job)
  235. sched->ops->timedout_job(job);
  236. spin_lock(&sched->job_list_lock);
  237. list_for_each_entry(job, &sched->ring_mirror_list, node) {
  238. struct drm_sched_fence *fence = job->s_fence;
  239. if (!fence->parent || !list_empty(&fence->cb.node))
  240. continue;
  241. r = dma_fence_add_callback(fence->parent, &fence->cb,
  242. drm_sched_process_job);
  243. if (r)
  244. drm_sched_process_job(fence->parent, &fence->cb);
  245. already_signaled:
  246. ;
  247. }
  248. spin_unlock(&sched->job_list_lock);
  249. }
  250. /**
  251. * drm_sched_hw_job_reset - stop the scheduler if it contains the bad job
  252. *
  253. * @sched: scheduler instance
  254. * @bad: bad scheduler job
  255. *
  256. */
  257. void drm_sched_hw_job_reset(struct drm_gpu_scheduler *sched, struct drm_sched_job *bad)
  258. {
  259. struct drm_sched_job *s_job;
  260. struct drm_sched_entity *entity, *tmp;
  261. int i;
  262. spin_lock(&sched->job_list_lock);
  263. list_for_each_entry_reverse(s_job, &sched->ring_mirror_list, node) {
  264. if (s_job->s_fence->parent &&
  265. dma_fence_remove_callback(s_job->s_fence->parent,
  266. &s_job->s_fence->cb)) {
  267. dma_fence_put(s_job->s_fence->parent);
  268. s_job->s_fence->parent = NULL;
  269. atomic_dec(&sched->hw_rq_count);
  270. }
  271. }
  272. spin_unlock(&sched->job_list_lock);
  273. if (bad && bad->s_priority != DRM_SCHED_PRIORITY_KERNEL) {
  274. atomic_inc(&bad->karma);
  275. /* don't increase @bad's karma if it's from KERNEL RQ,
  276. * becuase sometimes GPU hang would cause kernel jobs (like VM updating jobs)
  277. * corrupt but keep in mind that kernel jobs always considered good.
  278. */
  279. for (i = DRM_SCHED_PRIORITY_MIN; i < DRM_SCHED_PRIORITY_KERNEL; i++ ) {
  280. struct drm_sched_rq *rq = &sched->sched_rq[i];
  281. spin_lock(&rq->lock);
  282. list_for_each_entry_safe(entity, tmp, &rq->entities, list) {
  283. if (bad->s_fence->scheduled.context == entity->fence_context) {
  284. if (atomic_read(&bad->karma) > bad->sched->hang_limit)
  285. if (entity->guilty)
  286. atomic_set(entity->guilty, 1);
  287. break;
  288. }
  289. }
  290. spin_unlock(&rq->lock);
  291. if (&entity->list != &rq->entities)
  292. break;
  293. }
  294. }
  295. }
  296. EXPORT_SYMBOL(drm_sched_hw_job_reset);
  297. /**
  298. * drm_sched_job_recovery - recover jobs after a reset
  299. *
  300. * @sched: scheduler instance
  301. *
  302. */
  303. void drm_sched_job_recovery(struct drm_gpu_scheduler *sched)
  304. {
  305. struct drm_sched_job *s_job, *tmp;
  306. bool found_guilty = false;
  307. int r;
  308. spin_lock(&sched->job_list_lock);
  309. list_for_each_entry_safe(s_job, tmp, &sched->ring_mirror_list, node) {
  310. struct drm_sched_fence *s_fence = s_job->s_fence;
  311. struct dma_fence *fence;
  312. uint64_t guilty_context;
  313. if (!found_guilty && atomic_read(&s_job->karma) > sched->hang_limit) {
  314. found_guilty = true;
  315. guilty_context = s_job->s_fence->scheduled.context;
  316. }
  317. if (found_guilty && s_job->s_fence->scheduled.context == guilty_context)
  318. dma_fence_set_error(&s_fence->finished, -ECANCELED);
  319. spin_unlock(&sched->job_list_lock);
  320. fence = sched->ops->run_job(s_job);
  321. atomic_inc(&sched->hw_rq_count);
  322. if (fence) {
  323. s_fence->parent = dma_fence_get(fence);
  324. r = dma_fence_add_callback(fence, &s_fence->cb,
  325. drm_sched_process_job);
  326. if (r == -ENOENT)
  327. drm_sched_process_job(fence, &s_fence->cb);
  328. else if (r)
  329. DRM_ERROR("fence add callback failed (%d)\n",
  330. r);
  331. dma_fence_put(fence);
  332. } else {
  333. drm_sched_process_job(NULL, &s_fence->cb);
  334. }
  335. spin_lock(&sched->job_list_lock);
  336. }
  337. drm_sched_start_timeout(sched);
  338. spin_unlock(&sched->job_list_lock);
  339. }
  340. EXPORT_SYMBOL(drm_sched_job_recovery);
  341. /**
  342. * drm_sched_job_init - init a scheduler job
  343. *
  344. * @job: scheduler job to init
  345. * @entity: scheduler entity to use
  346. * @owner: job owner for debugging
  347. *
  348. * Refer to drm_sched_entity_push_job() documentation
  349. * for locking considerations.
  350. *
  351. * Returns 0 for success, negative error code otherwise.
  352. */
  353. int drm_sched_job_init(struct drm_sched_job *job,
  354. struct drm_sched_entity *entity,
  355. void *owner)
  356. {
  357. struct drm_gpu_scheduler *sched;
  358. drm_sched_entity_select_rq(entity);
  359. sched = entity->rq->sched;
  360. job->sched = sched;
  361. job->entity = entity;
  362. job->s_priority = entity->rq - sched->sched_rq;
  363. job->s_fence = drm_sched_fence_create(entity, owner);
  364. if (!job->s_fence)
  365. return -ENOMEM;
  366. job->id = atomic64_inc_return(&sched->job_id_count);
  367. INIT_WORK(&job->finish_work, drm_sched_job_finish);
  368. INIT_LIST_HEAD(&job->node);
  369. return 0;
  370. }
  371. EXPORT_SYMBOL(drm_sched_job_init);
  372. /**
  373. * drm_sched_ready - is the scheduler ready
  374. *
  375. * @sched: scheduler instance
  376. *
  377. * Return true if we can push more jobs to the hw, otherwise false.
  378. */
  379. static bool drm_sched_ready(struct drm_gpu_scheduler *sched)
  380. {
  381. return atomic_read(&sched->hw_rq_count) <
  382. sched->hw_submission_limit;
  383. }
  384. /**
  385. * drm_sched_wakeup - Wake up the scheduler when it is ready
  386. *
  387. * @sched: scheduler instance
  388. *
  389. */
  390. void drm_sched_wakeup(struct drm_gpu_scheduler *sched)
  391. {
  392. if (drm_sched_ready(sched))
  393. wake_up_interruptible(&sched->wake_up_worker);
  394. }
  395. /**
  396. * drm_sched_select_entity - Select next entity to process
  397. *
  398. * @sched: scheduler instance
  399. *
  400. * Returns the entity to process or NULL if none are found.
  401. */
  402. static struct drm_sched_entity *
  403. drm_sched_select_entity(struct drm_gpu_scheduler *sched)
  404. {
  405. struct drm_sched_entity *entity;
  406. int i;
  407. if (!drm_sched_ready(sched))
  408. return NULL;
  409. /* Kernel run queue has higher priority than normal run queue*/
  410. for (i = DRM_SCHED_PRIORITY_MAX - 1; i >= DRM_SCHED_PRIORITY_MIN; i--) {
  411. entity = drm_sched_rq_select_entity(&sched->sched_rq[i]);
  412. if (entity)
  413. break;
  414. }
  415. return entity;
  416. }
  417. /**
  418. * drm_sched_process_job - process a job
  419. *
  420. * @f: fence
  421. * @cb: fence callbacks
  422. *
  423. * Called after job has finished execution.
  424. */
  425. static void drm_sched_process_job(struct dma_fence *f, struct dma_fence_cb *cb)
  426. {
  427. struct drm_sched_fence *s_fence =
  428. container_of(cb, struct drm_sched_fence, cb);
  429. struct drm_gpu_scheduler *sched = s_fence->sched;
  430. dma_fence_get(&s_fence->finished);
  431. atomic_dec(&sched->hw_rq_count);
  432. atomic_dec(&sched->num_jobs);
  433. drm_sched_fence_finished(s_fence);
  434. trace_drm_sched_process_job(s_fence);
  435. dma_fence_put(&s_fence->finished);
  436. wake_up_interruptible(&sched->wake_up_worker);
  437. }
  438. /**
  439. * drm_sched_blocked - check if the scheduler is blocked
  440. *
  441. * @sched: scheduler instance
  442. *
  443. * Returns true if blocked, otherwise false.
  444. */
  445. static bool drm_sched_blocked(struct drm_gpu_scheduler *sched)
  446. {
  447. if (kthread_should_park()) {
  448. kthread_parkme();
  449. return true;
  450. }
  451. return false;
  452. }
  453. /**
  454. * drm_sched_main - main scheduler thread
  455. *
  456. * @param: scheduler instance
  457. *
  458. * Returns 0.
  459. */
  460. static int drm_sched_main(void *param)
  461. {
  462. struct sched_param sparam = {.sched_priority = 1};
  463. struct drm_gpu_scheduler *sched = (struct drm_gpu_scheduler *)param;
  464. int r;
  465. sched_setscheduler(current, SCHED_FIFO, &sparam);
  466. while (!kthread_should_stop()) {
  467. struct drm_sched_entity *entity = NULL;
  468. struct drm_sched_fence *s_fence;
  469. struct drm_sched_job *sched_job;
  470. struct dma_fence *fence;
  471. wait_event_interruptible(sched->wake_up_worker,
  472. (!drm_sched_blocked(sched) &&
  473. (entity = drm_sched_select_entity(sched))) ||
  474. kthread_should_stop());
  475. if (!entity)
  476. continue;
  477. sched_job = drm_sched_entity_pop_job(entity);
  478. if (!sched_job)
  479. continue;
  480. s_fence = sched_job->s_fence;
  481. atomic_inc(&sched->hw_rq_count);
  482. drm_sched_job_begin(sched_job);
  483. fence = sched->ops->run_job(sched_job);
  484. drm_sched_fence_scheduled(s_fence);
  485. if (fence) {
  486. s_fence->parent = dma_fence_get(fence);
  487. r = dma_fence_add_callback(fence, &s_fence->cb,
  488. drm_sched_process_job);
  489. if (r == -ENOENT)
  490. drm_sched_process_job(fence, &s_fence->cb);
  491. else if (r)
  492. DRM_ERROR("fence add callback failed (%d)\n",
  493. r);
  494. dma_fence_put(fence);
  495. } else {
  496. drm_sched_process_job(NULL, &s_fence->cb);
  497. }
  498. wake_up(&sched->job_scheduled);
  499. }
  500. return 0;
  501. }
  502. /**
  503. * drm_sched_init - Init a gpu scheduler instance
  504. *
  505. * @sched: scheduler instance
  506. * @ops: backend operations for this scheduler
  507. * @hw_submission: number of hw submissions that can be in flight
  508. * @hang_limit: number of times to allow a job to hang before dropping it
  509. * @timeout: timeout value in jiffies for the scheduler
  510. * @name: name used for debugging
  511. *
  512. * Return 0 on success, otherwise error code.
  513. */
  514. int drm_sched_init(struct drm_gpu_scheduler *sched,
  515. const struct drm_sched_backend_ops *ops,
  516. unsigned hw_submission,
  517. unsigned hang_limit,
  518. long timeout,
  519. const char *name)
  520. {
  521. int i;
  522. sched->ops = ops;
  523. sched->hw_submission_limit = hw_submission;
  524. sched->name = name;
  525. sched->timeout = timeout;
  526. sched->hang_limit = hang_limit;
  527. for (i = DRM_SCHED_PRIORITY_MIN; i < DRM_SCHED_PRIORITY_MAX; i++)
  528. drm_sched_rq_init(sched, &sched->sched_rq[i]);
  529. init_waitqueue_head(&sched->wake_up_worker);
  530. init_waitqueue_head(&sched->job_scheduled);
  531. INIT_LIST_HEAD(&sched->ring_mirror_list);
  532. spin_lock_init(&sched->job_list_lock);
  533. atomic_set(&sched->hw_rq_count, 0);
  534. INIT_DELAYED_WORK(&sched->work_tdr, drm_sched_job_timedout);
  535. atomic_set(&sched->num_jobs, 0);
  536. atomic64_set(&sched->job_id_count, 0);
  537. /* Each scheduler will run on a seperate kernel thread */
  538. sched->thread = kthread_run(drm_sched_main, sched, sched->name);
  539. if (IS_ERR(sched->thread)) {
  540. DRM_ERROR("Failed to create scheduler for %s.\n", name);
  541. return PTR_ERR(sched->thread);
  542. }
  543. return 0;
  544. }
  545. EXPORT_SYMBOL(drm_sched_init);
  546. /**
  547. * drm_sched_fini - Destroy a gpu scheduler
  548. *
  549. * @sched: scheduler instance
  550. *
  551. * Tears down and cleans up the scheduler.
  552. */
  553. void drm_sched_fini(struct drm_gpu_scheduler *sched)
  554. {
  555. if (sched->thread)
  556. kthread_stop(sched->thread);
  557. }
  558. EXPORT_SYMBOL(drm_sched_fini);