qxl_cmd.c 16 KB

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  1. /*
  2. * Copyright 2013 Red Hat Inc.
  3. *
  4. * Permission is hereby granted, free of charge, to any person obtaining a
  5. * copy of this software and associated documentation files (the "Software"),
  6. * to deal in the Software without restriction, including without limitation
  7. * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  8. * and/or sell copies of the Software, and to permit persons to whom the
  9. * Software is furnished to do so, subject to the following conditions:
  10. *
  11. * The above copyright notice and this permission notice shall be included in
  12. * all copies or substantial portions of the Software.
  13. *
  14. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  17. * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  18. * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  19. * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  20. * OTHER DEALINGS IN THE SOFTWARE.
  21. *
  22. * Authors: Dave Airlie
  23. * Alon Levy
  24. */
  25. /* QXL cmd/ring handling */
  26. #include "qxl_drv.h"
  27. #include "qxl_object.h"
  28. static int qxl_reap_surface_id(struct qxl_device *qdev, int max_to_reap);
  29. struct ring {
  30. struct qxl_ring_header header;
  31. uint8_t elements[0];
  32. };
  33. struct qxl_ring {
  34. struct ring *ring;
  35. int element_size;
  36. int n_elements;
  37. int prod_notify;
  38. wait_queue_head_t *push_event;
  39. spinlock_t lock;
  40. };
  41. void qxl_ring_free(struct qxl_ring *ring)
  42. {
  43. kfree(ring);
  44. }
  45. void qxl_ring_init_hdr(struct qxl_ring *ring)
  46. {
  47. ring->ring->header.notify_on_prod = ring->n_elements;
  48. }
  49. struct qxl_ring *
  50. qxl_ring_create(struct qxl_ring_header *header,
  51. int element_size,
  52. int n_elements,
  53. int prod_notify,
  54. bool set_prod_notify,
  55. wait_queue_head_t *push_event)
  56. {
  57. struct qxl_ring *ring;
  58. ring = kmalloc(sizeof(*ring), GFP_KERNEL);
  59. if (!ring)
  60. return NULL;
  61. ring->ring = (struct ring *)header;
  62. ring->element_size = element_size;
  63. ring->n_elements = n_elements;
  64. ring->prod_notify = prod_notify;
  65. ring->push_event = push_event;
  66. if (set_prod_notify)
  67. qxl_ring_init_hdr(ring);
  68. spin_lock_init(&ring->lock);
  69. return ring;
  70. }
  71. static int qxl_check_header(struct qxl_ring *ring)
  72. {
  73. int ret;
  74. struct qxl_ring_header *header = &(ring->ring->header);
  75. unsigned long flags;
  76. spin_lock_irqsave(&ring->lock, flags);
  77. ret = header->prod - header->cons < header->num_items;
  78. if (ret == 0)
  79. header->notify_on_cons = header->cons + 1;
  80. spin_unlock_irqrestore(&ring->lock, flags);
  81. return ret;
  82. }
  83. int qxl_check_idle(struct qxl_ring *ring)
  84. {
  85. int ret;
  86. struct qxl_ring_header *header = &(ring->ring->header);
  87. unsigned long flags;
  88. spin_lock_irqsave(&ring->lock, flags);
  89. ret = header->prod == header->cons;
  90. spin_unlock_irqrestore(&ring->lock, flags);
  91. return ret;
  92. }
  93. int qxl_ring_push(struct qxl_ring *ring,
  94. const void *new_elt, bool interruptible)
  95. {
  96. struct qxl_ring_header *header = &(ring->ring->header);
  97. uint8_t *elt;
  98. int idx, ret;
  99. unsigned long flags;
  100. spin_lock_irqsave(&ring->lock, flags);
  101. if (header->prod - header->cons == header->num_items) {
  102. header->notify_on_cons = header->cons + 1;
  103. mb();
  104. spin_unlock_irqrestore(&ring->lock, flags);
  105. if (!drm_can_sleep()) {
  106. while (!qxl_check_header(ring))
  107. udelay(1);
  108. } else {
  109. if (interruptible) {
  110. ret = wait_event_interruptible(*ring->push_event,
  111. qxl_check_header(ring));
  112. if (ret)
  113. return ret;
  114. } else {
  115. wait_event(*ring->push_event,
  116. qxl_check_header(ring));
  117. }
  118. }
  119. spin_lock_irqsave(&ring->lock, flags);
  120. }
  121. idx = header->prod & (ring->n_elements - 1);
  122. elt = ring->ring->elements + idx * ring->element_size;
  123. memcpy((void *)elt, new_elt, ring->element_size);
  124. header->prod++;
  125. mb();
  126. if (header->prod == header->notify_on_prod)
  127. outb(0, ring->prod_notify);
  128. spin_unlock_irqrestore(&ring->lock, flags);
  129. return 0;
  130. }
  131. static bool qxl_ring_pop(struct qxl_ring *ring,
  132. void *element)
  133. {
  134. volatile struct qxl_ring_header *header = &(ring->ring->header);
  135. volatile uint8_t *ring_elt;
  136. int idx;
  137. unsigned long flags;
  138. spin_lock_irqsave(&ring->lock, flags);
  139. if (header->cons == header->prod) {
  140. header->notify_on_prod = header->cons + 1;
  141. spin_unlock_irqrestore(&ring->lock, flags);
  142. return false;
  143. }
  144. idx = header->cons & (ring->n_elements - 1);
  145. ring_elt = ring->ring->elements + idx * ring->element_size;
  146. memcpy(element, (void *)ring_elt, ring->element_size);
  147. header->cons++;
  148. spin_unlock_irqrestore(&ring->lock, flags);
  149. return true;
  150. }
  151. int
  152. qxl_push_command_ring_release(struct qxl_device *qdev, struct qxl_release *release,
  153. uint32_t type, bool interruptible)
  154. {
  155. struct qxl_command cmd;
  156. cmd.type = type;
  157. cmd.data = qxl_bo_physical_address(qdev, release->release_bo, release->release_offset);
  158. return qxl_ring_push(qdev->command_ring, &cmd, interruptible);
  159. }
  160. int
  161. qxl_push_cursor_ring_release(struct qxl_device *qdev, struct qxl_release *release,
  162. uint32_t type, bool interruptible)
  163. {
  164. struct qxl_command cmd;
  165. cmd.type = type;
  166. cmd.data = qxl_bo_physical_address(qdev, release->release_bo, release->release_offset);
  167. return qxl_ring_push(qdev->cursor_ring, &cmd, interruptible);
  168. }
  169. bool qxl_queue_garbage_collect(struct qxl_device *qdev, bool flush)
  170. {
  171. if (!qxl_check_idle(qdev->release_ring)) {
  172. schedule_work(&qdev->gc_work);
  173. if (flush)
  174. flush_work(&qdev->gc_work);
  175. return true;
  176. }
  177. return false;
  178. }
  179. int qxl_garbage_collect(struct qxl_device *qdev)
  180. {
  181. struct qxl_release *release;
  182. uint64_t id, next_id;
  183. int i = 0;
  184. union qxl_release_info *info;
  185. while (qxl_ring_pop(qdev->release_ring, &id)) {
  186. DRM_DEBUG_DRIVER("popped %lld\n", id);
  187. while (id) {
  188. release = qxl_release_from_id_locked(qdev, id);
  189. if (release == NULL)
  190. break;
  191. info = qxl_release_map(qdev, release);
  192. next_id = info->next;
  193. qxl_release_unmap(qdev, release, info);
  194. DRM_DEBUG_DRIVER("popped %lld, next %lld\n", id,
  195. next_id);
  196. switch (release->type) {
  197. case QXL_RELEASE_DRAWABLE:
  198. case QXL_RELEASE_SURFACE_CMD:
  199. case QXL_RELEASE_CURSOR_CMD:
  200. break;
  201. default:
  202. DRM_ERROR("unexpected release type\n");
  203. break;
  204. }
  205. id = next_id;
  206. qxl_release_free(qdev, release);
  207. ++i;
  208. }
  209. }
  210. DRM_DEBUG_DRIVER("%d\n", i);
  211. return i;
  212. }
  213. int qxl_alloc_bo_reserved(struct qxl_device *qdev,
  214. struct qxl_release *release,
  215. unsigned long size,
  216. struct qxl_bo **_bo)
  217. {
  218. struct qxl_bo *bo;
  219. int ret;
  220. ret = qxl_bo_create(qdev, size, false /* not kernel - device */,
  221. false, QXL_GEM_DOMAIN_VRAM, NULL, &bo);
  222. if (ret) {
  223. DRM_ERROR("failed to allocate VRAM BO\n");
  224. return ret;
  225. }
  226. ret = qxl_release_list_add(release, bo);
  227. if (ret)
  228. goto out_unref;
  229. *_bo = bo;
  230. return 0;
  231. out_unref:
  232. qxl_bo_unref(&bo);
  233. return ret;
  234. }
  235. static int wait_for_io_cmd_user(struct qxl_device *qdev, uint8_t val, long port, bool intr)
  236. {
  237. int irq_num;
  238. long addr = qdev->io_base + port;
  239. int ret;
  240. mutex_lock(&qdev->async_io_mutex);
  241. irq_num = atomic_read(&qdev->irq_received_io_cmd);
  242. if (qdev->last_sent_io_cmd > irq_num) {
  243. if (intr)
  244. ret = wait_event_interruptible_timeout(qdev->io_cmd_event,
  245. atomic_read(&qdev->irq_received_io_cmd) > irq_num, 5*HZ);
  246. else
  247. ret = wait_event_timeout(qdev->io_cmd_event,
  248. atomic_read(&qdev->irq_received_io_cmd) > irq_num, 5*HZ);
  249. /* 0 is timeout, just bail the "hw" has gone away */
  250. if (ret <= 0)
  251. goto out;
  252. irq_num = atomic_read(&qdev->irq_received_io_cmd);
  253. }
  254. outb(val, addr);
  255. qdev->last_sent_io_cmd = irq_num + 1;
  256. if (intr)
  257. ret = wait_event_interruptible_timeout(qdev->io_cmd_event,
  258. atomic_read(&qdev->irq_received_io_cmd) > irq_num, 5*HZ);
  259. else
  260. ret = wait_event_timeout(qdev->io_cmd_event,
  261. atomic_read(&qdev->irq_received_io_cmd) > irq_num, 5*HZ);
  262. out:
  263. if (ret > 0)
  264. ret = 0;
  265. mutex_unlock(&qdev->async_io_mutex);
  266. return ret;
  267. }
  268. static void wait_for_io_cmd(struct qxl_device *qdev, uint8_t val, long port)
  269. {
  270. int ret;
  271. restart:
  272. ret = wait_for_io_cmd_user(qdev, val, port, false);
  273. if (ret == -ERESTARTSYS)
  274. goto restart;
  275. }
  276. int qxl_io_update_area(struct qxl_device *qdev, struct qxl_bo *surf,
  277. const struct qxl_rect *area)
  278. {
  279. int surface_id;
  280. uint32_t surface_width, surface_height;
  281. int ret;
  282. if (!surf->hw_surf_alloc)
  283. DRM_ERROR("got io update area with no hw surface\n");
  284. if (surf->is_primary)
  285. surface_id = 0;
  286. else
  287. surface_id = surf->surface_id;
  288. surface_width = surf->surf.width;
  289. surface_height = surf->surf.height;
  290. if (area->left < 0 || area->top < 0 ||
  291. area->right > surface_width || area->bottom > surface_height)
  292. return -EINVAL;
  293. mutex_lock(&qdev->update_area_mutex);
  294. qdev->ram_header->update_area = *area;
  295. qdev->ram_header->update_surface = surface_id;
  296. ret = wait_for_io_cmd_user(qdev, 0, QXL_IO_UPDATE_AREA_ASYNC, true);
  297. mutex_unlock(&qdev->update_area_mutex);
  298. return ret;
  299. }
  300. void qxl_io_notify_oom(struct qxl_device *qdev)
  301. {
  302. outb(0, qdev->io_base + QXL_IO_NOTIFY_OOM);
  303. }
  304. void qxl_io_flush_release(struct qxl_device *qdev)
  305. {
  306. outb(0, qdev->io_base + QXL_IO_FLUSH_RELEASE);
  307. }
  308. void qxl_io_flush_surfaces(struct qxl_device *qdev)
  309. {
  310. wait_for_io_cmd(qdev, 0, QXL_IO_FLUSH_SURFACES_ASYNC);
  311. }
  312. void qxl_io_destroy_primary(struct qxl_device *qdev)
  313. {
  314. wait_for_io_cmd(qdev, 0, QXL_IO_DESTROY_PRIMARY_ASYNC);
  315. qdev->primary_created = false;
  316. }
  317. void qxl_io_create_primary(struct qxl_device *qdev,
  318. unsigned offset, struct qxl_bo *bo)
  319. {
  320. struct qxl_surface_create *create;
  321. DRM_DEBUG_DRIVER("qdev %p, ram_header %p\n", qdev, qdev->ram_header);
  322. create = &qdev->ram_header->create_surface;
  323. create->format = bo->surf.format;
  324. create->width = bo->surf.width;
  325. create->height = bo->surf.height;
  326. create->stride = bo->surf.stride;
  327. if (bo->shadow) {
  328. create->mem = qxl_bo_physical_address(qdev, bo->shadow, offset);
  329. } else {
  330. create->mem = qxl_bo_physical_address(qdev, bo, offset);
  331. }
  332. DRM_DEBUG_DRIVER("mem = %llx, from %p\n", create->mem, bo->kptr);
  333. create->flags = QXL_SURF_FLAG_KEEP_DATA;
  334. create->type = QXL_SURF_TYPE_PRIMARY;
  335. wait_for_io_cmd(qdev, 0, QXL_IO_CREATE_PRIMARY_ASYNC);
  336. qdev->primary_created = true;
  337. }
  338. void qxl_io_memslot_add(struct qxl_device *qdev, uint8_t id)
  339. {
  340. DRM_DEBUG_DRIVER("qxl_memslot_add %d\n", id);
  341. wait_for_io_cmd(qdev, id, QXL_IO_MEMSLOT_ADD_ASYNC);
  342. }
  343. void qxl_io_reset(struct qxl_device *qdev)
  344. {
  345. outb(0, qdev->io_base + QXL_IO_RESET);
  346. }
  347. void qxl_io_monitors_config(struct qxl_device *qdev)
  348. {
  349. wait_for_io_cmd(qdev, 0, QXL_IO_MONITORS_CONFIG_ASYNC);
  350. }
  351. int qxl_surface_id_alloc(struct qxl_device *qdev,
  352. struct qxl_bo *surf)
  353. {
  354. uint32_t handle;
  355. int idr_ret;
  356. int count = 0;
  357. again:
  358. idr_preload(GFP_ATOMIC);
  359. spin_lock(&qdev->surf_id_idr_lock);
  360. idr_ret = idr_alloc(&qdev->surf_id_idr, NULL, 1, 0, GFP_NOWAIT);
  361. spin_unlock(&qdev->surf_id_idr_lock);
  362. idr_preload_end();
  363. if (idr_ret < 0)
  364. return idr_ret;
  365. handle = idr_ret;
  366. if (handle >= qdev->rom->n_surfaces) {
  367. count++;
  368. spin_lock(&qdev->surf_id_idr_lock);
  369. idr_remove(&qdev->surf_id_idr, handle);
  370. spin_unlock(&qdev->surf_id_idr_lock);
  371. qxl_reap_surface_id(qdev, 2);
  372. goto again;
  373. }
  374. surf->surface_id = handle;
  375. spin_lock(&qdev->surf_id_idr_lock);
  376. qdev->last_alloced_surf_id = handle;
  377. spin_unlock(&qdev->surf_id_idr_lock);
  378. return 0;
  379. }
  380. void qxl_surface_id_dealloc(struct qxl_device *qdev,
  381. uint32_t surface_id)
  382. {
  383. spin_lock(&qdev->surf_id_idr_lock);
  384. idr_remove(&qdev->surf_id_idr, surface_id);
  385. spin_unlock(&qdev->surf_id_idr_lock);
  386. }
  387. int qxl_hw_surface_alloc(struct qxl_device *qdev,
  388. struct qxl_bo *surf,
  389. struct ttm_mem_reg *new_mem)
  390. {
  391. struct qxl_surface_cmd *cmd;
  392. struct qxl_release *release;
  393. int ret;
  394. if (surf->hw_surf_alloc)
  395. return 0;
  396. ret = qxl_alloc_surface_release_reserved(qdev, QXL_SURFACE_CMD_CREATE,
  397. NULL,
  398. &release);
  399. if (ret)
  400. return ret;
  401. ret = qxl_release_reserve_list(release, true);
  402. if (ret)
  403. return ret;
  404. cmd = (struct qxl_surface_cmd *)qxl_release_map(qdev, release);
  405. cmd->type = QXL_SURFACE_CMD_CREATE;
  406. cmd->flags = QXL_SURF_FLAG_KEEP_DATA;
  407. cmd->u.surface_create.format = surf->surf.format;
  408. cmd->u.surface_create.width = surf->surf.width;
  409. cmd->u.surface_create.height = surf->surf.height;
  410. cmd->u.surface_create.stride = surf->surf.stride;
  411. if (new_mem) {
  412. int slot_id = surf->type == QXL_GEM_DOMAIN_VRAM ? qdev->main_mem_slot : qdev->surfaces_mem_slot;
  413. struct qxl_memslot *slot = &(qdev->mem_slots[slot_id]);
  414. /* TODO - need to hold one of the locks to read tbo.offset */
  415. cmd->u.surface_create.data = slot->high_bits;
  416. cmd->u.surface_create.data |= (new_mem->start << PAGE_SHIFT) + surf->tbo.bdev->man[new_mem->mem_type].gpu_offset;
  417. } else
  418. cmd->u.surface_create.data = qxl_bo_physical_address(qdev, surf, 0);
  419. cmd->surface_id = surf->surface_id;
  420. qxl_release_unmap(qdev, release, &cmd->release_info);
  421. surf->surf_create = release;
  422. /* no need to add a release to the fence for this surface bo,
  423. since it is only released when we ask to destroy the surface
  424. and it would never signal otherwise */
  425. qxl_push_command_ring_release(qdev, release, QXL_CMD_SURFACE, false);
  426. qxl_release_fence_buffer_objects(release);
  427. surf->hw_surf_alloc = true;
  428. spin_lock(&qdev->surf_id_idr_lock);
  429. idr_replace(&qdev->surf_id_idr, surf, surf->surface_id);
  430. spin_unlock(&qdev->surf_id_idr_lock);
  431. return 0;
  432. }
  433. int qxl_hw_surface_dealloc(struct qxl_device *qdev,
  434. struct qxl_bo *surf)
  435. {
  436. struct qxl_surface_cmd *cmd;
  437. struct qxl_release *release;
  438. int ret;
  439. int id;
  440. if (!surf->hw_surf_alloc)
  441. return 0;
  442. ret = qxl_alloc_surface_release_reserved(qdev, QXL_SURFACE_CMD_DESTROY,
  443. surf->surf_create,
  444. &release);
  445. if (ret)
  446. return ret;
  447. surf->surf_create = NULL;
  448. /* remove the surface from the idr, but not the surface id yet */
  449. spin_lock(&qdev->surf_id_idr_lock);
  450. idr_replace(&qdev->surf_id_idr, NULL, surf->surface_id);
  451. spin_unlock(&qdev->surf_id_idr_lock);
  452. surf->hw_surf_alloc = false;
  453. id = surf->surface_id;
  454. surf->surface_id = 0;
  455. release->surface_release_id = id;
  456. cmd = (struct qxl_surface_cmd *)qxl_release_map(qdev, release);
  457. cmd->type = QXL_SURFACE_CMD_DESTROY;
  458. cmd->surface_id = id;
  459. qxl_release_unmap(qdev, release, &cmd->release_info);
  460. qxl_push_command_ring_release(qdev, release, QXL_CMD_SURFACE, false);
  461. qxl_release_fence_buffer_objects(release);
  462. return 0;
  463. }
  464. static int qxl_update_surface(struct qxl_device *qdev, struct qxl_bo *surf)
  465. {
  466. struct qxl_rect rect;
  467. int ret;
  468. /* if we are evicting, we need to make sure the surface is up
  469. to date */
  470. rect.left = 0;
  471. rect.right = surf->surf.width;
  472. rect.top = 0;
  473. rect.bottom = surf->surf.height;
  474. retry:
  475. ret = qxl_io_update_area(qdev, surf, &rect);
  476. if (ret == -ERESTARTSYS)
  477. goto retry;
  478. return ret;
  479. }
  480. static void qxl_surface_evict_locked(struct qxl_device *qdev, struct qxl_bo *surf, bool do_update_area)
  481. {
  482. /* no need to update area if we are just freeing the surface normally */
  483. if (do_update_area)
  484. qxl_update_surface(qdev, surf);
  485. /* nuke the surface id at the hw */
  486. qxl_hw_surface_dealloc(qdev, surf);
  487. }
  488. void qxl_surface_evict(struct qxl_device *qdev, struct qxl_bo *surf, bool do_update_area)
  489. {
  490. mutex_lock(&qdev->surf_evict_mutex);
  491. qxl_surface_evict_locked(qdev, surf, do_update_area);
  492. mutex_unlock(&qdev->surf_evict_mutex);
  493. }
  494. static int qxl_reap_surf(struct qxl_device *qdev, struct qxl_bo *surf, bool stall)
  495. {
  496. int ret;
  497. ret = qxl_bo_reserve(surf, false);
  498. if (ret)
  499. return ret;
  500. if (stall)
  501. mutex_unlock(&qdev->surf_evict_mutex);
  502. ret = ttm_bo_wait(&surf->tbo, true, !stall);
  503. if (stall)
  504. mutex_lock(&qdev->surf_evict_mutex);
  505. if (ret) {
  506. qxl_bo_unreserve(surf);
  507. return ret;
  508. }
  509. qxl_surface_evict_locked(qdev, surf, true);
  510. qxl_bo_unreserve(surf);
  511. return 0;
  512. }
  513. static int qxl_reap_surface_id(struct qxl_device *qdev, int max_to_reap)
  514. {
  515. int num_reaped = 0;
  516. int i, ret;
  517. bool stall = false;
  518. int start = 0;
  519. mutex_lock(&qdev->surf_evict_mutex);
  520. again:
  521. spin_lock(&qdev->surf_id_idr_lock);
  522. start = qdev->last_alloced_surf_id + 1;
  523. spin_unlock(&qdev->surf_id_idr_lock);
  524. for (i = start; i < start + qdev->rom->n_surfaces; i++) {
  525. void *objptr;
  526. int surfid = i % qdev->rom->n_surfaces;
  527. /* this avoids the case where the objects is in the
  528. idr but has been evicted half way - its makes
  529. the idr lookup atomic with the eviction */
  530. spin_lock(&qdev->surf_id_idr_lock);
  531. objptr = idr_find(&qdev->surf_id_idr, surfid);
  532. spin_unlock(&qdev->surf_id_idr_lock);
  533. if (!objptr)
  534. continue;
  535. ret = qxl_reap_surf(qdev, objptr, stall);
  536. if (ret == 0)
  537. num_reaped++;
  538. if (num_reaped >= max_to_reap)
  539. break;
  540. }
  541. if (num_reaped == 0 && stall == false) {
  542. stall = true;
  543. goto again;
  544. }
  545. mutex_unlock(&qdev->surf_evict_mutex);
  546. if (num_reaped) {
  547. usleep_range(500, 1000);
  548. qxl_queue_garbage_collect(qdev, true);
  549. }
  550. return 0;
  551. }