hdmi5.c 18 KB

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  1. /*
  2. * HDMI driver for OMAP5
  3. *
  4. * Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com/
  5. *
  6. * Authors:
  7. * Yong Zhi
  8. * Mythri pk
  9. * Archit Taneja <archit@ti.com>
  10. * Tomi Valkeinen <tomi.valkeinen@ti.com>
  11. *
  12. * This program is free software; you can redistribute it and/or modify it
  13. * under the terms of the GNU General Public License version 2 as published by
  14. * the Free Software Foundation.
  15. *
  16. * This program is distributed in the hope that it will be useful, but WITHOUT
  17. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  18. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  19. * more details.
  20. *
  21. * You should have received a copy of the GNU General Public License along with
  22. * this program. If not, see <http://www.gnu.org/licenses/>.
  23. */
  24. #define DSS_SUBSYS_NAME "HDMI"
  25. #include <linux/kernel.h>
  26. #include <linux/module.h>
  27. #include <linux/err.h>
  28. #include <linux/io.h>
  29. #include <linux/interrupt.h>
  30. #include <linux/mutex.h>
  31. #include <linux/delay.h>
  32. #include <linux/string.h>
  33. #include <linux/platform_device.h>
  34. #include <linux/pm_runtime.h>
  35. #include <linux/clk.h>
  36. #include <linux/gpio.h>
  37. #include <linux/regulator/consumer.h>
  38. #include <linux/component.h>
  39. #include <linux/of.h>
  40. #include <linux/of_graph.h>
  41. #include <sound/omap-hdmi-audio.h>
  42. #include "omapdss.h"
  43. #include "hdmi5_core.h"
  44. #include "dss.h"
  45. static int hdmi_runtime_get(struct omap_hdmi *hdmi)
  46. {
  47. int r;
  48. DSSDBG("hdmi_runtime_get\n");
  49. r = pm_runtime_get_sync(&hdmi->pdev->dev);
  50. WARN_ON(r < 0);
  51. if (r < 0)
  52. return r;
  53. return 0;
  54. }
  55. static void hdmi_runtime_put(struct omap_hdmi *hdmi)
  56. {
  57. int r;
  58. DSSDBG("hdmi_runtime_put\n");
  59. r = pm_runtime_put_sync(&hdmi->pdev->dev);
  60. WARN_ON(r < 0 && r != -ENOSYS);
  61. }
  62. static irqreturn_t hdmi_irq_handler(int irq, void *data)
  63. {
  64. struct omap_hdmi *hdmi = data;
  65. struct hdmi_wp_data *wp = &hdmi->wp;
  66. u32 irqstatus;
  67. irqstatus = hdmi_wp_get_irqstatus(wp);
  68. hdmi_wp_set_irqstatus(wp, irqstatus);
  69. if ((irqstatus & HDMI_IRQ_LINK_CONNECT) &&
  70. irqstatus & HDMI_IRQ_LINK_DISCONNECT) {
  71. u32 v;
  72. /*
  73. * If we get both connect and disconnect interrupts at the same
  74. * time, turn off the PHY, clear interrupts, and restart, which
  75. * raises connect interrupt if a cable is connected, or nothing
  76. * if cable is not connected.
  77. */
  78. hdmi_wp_set_phy_pwr(wp, HDMI_PHYPWRCMD_OFF);
  79. /*
  80. * We always get bogus CONNECT & DISCONNECT interrupts when
  81. * setting the PHY to LDOON. To ignore those, we force the RXDET
  82. * line to 0 until the PHY power state has been changed.
  83. */
  84. v = hdmi_read_reg(hdmi->phy.base, HDMI_TXPHY_PAD_CFG_CTRL);
  85. v = FLD_MOD(v, 1, 15, 15); /* FORCE_RXDET_HIGH */
  86. v = FLD_MOD(v, 0, 14, 7); /* RXDET_LINE */
  87. hdmi_write_reg(hdmi->phy.base, HDMI_TXPHY_PAD_CFG_CTRL, v);
  88. hdmi_wp_set_irqstatus(wp, HDMI_IRQ_LINK_CONNECT |
  89. HDMI_IRQ_LINK_DISCONNECT);
  90. hdmi_wp_set_phy_pwr(wp, HDMI_PHYPWRCMD_LDOON);
  91. REG_FLD_MOD(hdmi->phy.base, HDMI_TXPHY_PAD_CFG_CTRL, 0, 15, 15);
  92. } else if (irqstatus & HDMI_IRQ_LINK_CONNECT) {
  93. hdmi_wp_set_phy_pwr(wp, HDMI_PHYPWRCMD_TXON);
  94. } else if (irqstatus & HDMI_IRQ_LINK_DISCONNECT) {
  95. hdmi_wp_set_phy_pwr(wp, HDMI_PHYPWRCMD_LDOON);
  96. }
  97. return IRQ_HANDLED;
  98. }
  99. static int hdmi_power_on_core(struct omap_hdmi *hdmi)
  100. {
  101. int r;
  102. r = regulator_enable(hdmi->vdda_reg);
  103. if (r)
  104. return r;
  105. r = hdmi_runtime_get(hdmi);
  106. if (r)
  107. goto err_runtime_get;
  108. /* Make selection of HDMI in DSS */
  109. dss_select_hdmi_venc_clk_source(hdmi->dss, DSS_HDMI_M_PCLK);
  110. hdmi->core_enabled = true;
  111. return 0;
  112. err_runtime_get:
  113. regulator_disable(hdmi->vdda_reg);
  114. return r;
  115. }
  116. static void hdmi_power_off_core(struct omap_hdmi *hdmi)
  117. {
  118. hdmi->core_enabled = false;
  119. hdmi_runtime_put(hdmi);
  120. regulator_disable(hdmi->vdda_reg);
  121. }
  122. static int hdmi_power_on_full(struct omap_hdmi *hdmi)
  123. {
  124. int r;
  125. const struct videomode *vm;
  126. struct dss_pll_clock_info hdmi_cinfo = { 0 };
  127. unsigned int pc;
  128. r = hdmi_power_on_core(hdmi);
  129. if (r)
  130. return r;
  131. vm = &hdmi->cfg.vm;
  132. DSSDBG("hdmi_power_on hactive= %d vactive = %d\n", vm->hactive,
  133. vm->vactive);
  134. pc = vm->pixelclock;
  135. if (vm->flags & DISPLAY_FLAGS_DOUBLECLK)
  136. pc *= 2;
  137. /* DSS_HDMI_TCLK is bitclk / 10 */
  138. pc *= 10;
  139. dss_pll_calc_b(&hdmi->pll.pll, clk_get_rate(hdmi->pll.pll.clkin),
  140. pc, &hdmi_cinfo);
  141. /* disable and clear irqs */
  142. hdmi_wp_clear_irqenable(&hdmi->wp, 0xffffffff);
  143. hdmi_wp_set_irqstatus(&hdmi->wp,
  144. hdmi_wp_get_irqstatus(&hdmi->wp));
  145. r = dss_pll_enable(&hdmi->pll.pll);
  146. if (r) {
  147. DSSERR("Failed to enable PLL\n");
  148. goto err_pll_enable;
  149. }
  150. r = dss_pll_set_config(&hdmi->pll.pll, &hdmi_cinfo);
  151. if (r) {
  152. DSSERR("Failed to configure PLL\n");
  153. goto err_pll_cfg;
  154. }
  155. r = hdmi_phy_configure(&hdmi->phy, hdmi_cinfo.clkdco,
  156. hdmi_cinfo.clkout[0]);
  157. if (r) {
  158. DSSDBG("Failed to start PHY\n");
  159. goto err_phy_cfg;
  160. }
  161. r = hdmi_wp_set_phy_pwr(&hdmi->wp, HDMI_PHYPWRCMD_LDOON);
  162. if (r)
  163. goto err_phy_pwr;
  164. hdmi5_configure(&hdmi->core, &hdmi->wp, &hdmi->cfg);
  165. r = dss_mgr_enable(&hdmi->output);
  166. if (r)
  167. goto err_mgr_enable;
  168. r = hdmi_wp_video_start(&hdmi->wp);
  169. if (r)
  170. goto err_vid_enable;
  171. hdmi_wp_set_irqenable(&hdmi->wp,
  172. HDMI_IRQ_LINK_CONNECT | HDMI_IRQ_LINK_DISCONNECT);
  173. return 0;
  174. err_vid_enable:
  175. dss_mgr_disable(&hdmi->output);
  176. err_mgr_enable:
  177. hdmi_wp_set_phy_pwr(&hdmi->wp, HDMI_PHYPWRCMD_OFF);
  178. err_phy_pwr:
  179. err_phy_cfg:
  180. err_pll_cfg:
  181. dss_pll_disable(&hdmi->pll.pll);
  182. err_pll_enable:
  183. hdmi_power_off_core(hdmi);
  184. return -EIO;
  185. }
  186. static void hdmi_power_off_full(struct omap_hdmi *hdmi)
  187. {
  188. hdmi_wp_clear_irqenable(&hdmi->wp, 0xffffffff);
  189. hdmi_wp_video_stop(&hdmi->wp);
  190. dss_mgr_disable(&hdmi->output);
  191. hdmi_wp_set_phy_pwr(&hdmi->wp, HDMI_PHYPWRCMD_OFF);
  192. dss_pll_disable(&hdmi->pll.pll);
  193. hdmi_power_off_core(hdmi);
  194. }
  195. static void hdmi_display_set_timings(struct omap_dss_device *dssdev,
  196. const struct videomode *vm)
  197. {
  198. struct omap_hdmi *hdmi = dssdev_to_hdmi(dssdev);
  199. mutex_lock(&hdmi->lock);
  200. hdmi->cfg.vm = *vm;
  201. dispc_set_tv_pclk(hdmi->dss->dispc, vm->pixelclock);
  202. mutex_unlock(&hdmi->lock);
  203. }
  204. static int hdmi_dump_regs(struct seq_file *s, void *p)
  205. {
  206. struct omap_hdmi *hdmi = s->private;
  207. mutex_lock(&hdmi->lock);
  208. if (hdmi_runtime_get(hdmi)) {
  209. mutex_unlock(&hdmi->lock);
  210. return 0;
  211. }
  212. hdmi_wp_dump(&hdmi->wp, s);
  213. hdmi_pll_dump(&hdmi->pll, s);
  214. hdmi_phy_dump(&hdmi->phy, s);
  215. hdmi5_core_dump(&hdmi->core, s);
  216. hdmi_runtime_put(hdmi);
  217. mutex_unlock(&hdmi->lock);
  218. return 0;
  219. }
  220. static int read_edid(struct omap_hdmi *hdmi, u8 *buf, int len)
  221. {
  222. int r;
  223. int idlemode;
  224. mutex_lock(&hdmi->lock);
  225. r = hdmi_runtime_get(hdmi);
  226. BUG_ON(r);
  227. idlemode = REG_GET(hdmi->wp.base, HDMI_WP_SYSCONFIG, 3, 2);
  228. /* No-idle mode */
  229. REG_FLD_MOD(hdmi->wp.base, HDMI_WP_SYSCONFIG, 1, 3, 2);
  230. r = hdmi5_read_edid(&hdmi->core, buf, len);
  231. REG_FLD_MOD(hdmi->wp.base, HDMI_WP_SYSCONFIG, idlemode, 3, 2);
  232. hdmi_runtime_put(hdmi);
  233. mutex_unlock(&hdmi->lock);
  234. return r;
  235. }
  236. static void hdmi_start_audio_stream(struct omap_hdmi *hd)
  237. {
  238. REG_FLD_MOD(hd->wp.base, HDMI_WP_SYSCONFIG, 1, 3, 2);
  239. hdmi_wp_audio_enable(&hd->wp, true);
  240. hdmi_wp_audio_core_req_enable(&hd->wp, true);
  241. }
  242. static void hdmi_stop_audio_stream(struct omap_hdmi *hd)
  243. {
  244. hdmi_wp_audio_core_req_enable(&hd->wp, false);
  245. hdmi_wp_audio_enable(&hd->wp, false);
  246. REG_FLD_MOD(hd->wp.base, HDMI_WP_SYSCONFIG, hd->wp_idlemode, 3, 2);
  247. }
  248. static int hdmi_display_enable(struct omap_dss_device *dssdev)
  249. {
  250. struct omap_hdmi *hdmi = dssdev_to_hdmi(dssdev);
  251. unsigned long flags;
  252. int r = 0;
  253. DSSDBG("ENTER hdmi_display_enable\n");
  254. mutex_lock(&hdmi->lock);
  255. if (!dssdev->dispc_channel_connected) {
  256. DSSERR("failed to enable display: no output/manager\n");
  257. r = -ENODEV;
  258. goto err0;
  259. }
  260. r = hdmi_power_on_full(hdmi);
  261. if (r) {
  262. DSSERR("failed to power on device\n");
  263. goto err0;
  264. }
  265. if (hdmi->audio_configured) {
  266. r = hdmi5_audio_config(&hdmi->core, &hdmi->wp,
  267. &hdmi->audio_config,
  268. hdmi->cfg.vm.pixelclock);
  269. if (r) {
  270. DSSERR("Error restoring audio configuration: %d", r);
  271. hdmi->audio_abort_cb(&hdmi->pdev->dev);
  272. hdmi->audio_configured = false;
  273. }
  274. }
  275. spin_lock_irqsave(&hdmi->audio_playing_lock, flags);
  276. if (hdmi->audio_configured && hdmi->audio_playing)
  277. hdmi_start_audio_stream(hdmi);
  278. hdmi->display_enabled = true;
  279. spin_unlock_irqrestore(&hdmi->audio_playing_lock, flags);
  280. mutex_unlock(&hdmi->lock);
  281. return 0;
  282. err0:
  283. mutex_unlock(&hdmi->lock);
  284. return r;
  285. }
  286. static void hdmi_display_disable(struct omap_dss_device *dssdev)
  287. {
  288. struct omap_hdmi *hdmi = dssdev_to_hdmi(dssdev);
  289. unsigned long flags;
  290. DSSDBG("Enter hdmi_display_disable\n");
  291. mutex_lock(&hdmi->lock);
  292. spin_lock_irqsave(&hdmi->audio_playing_lock, flags);
  293. hdmi_stop_audio_stream(hdmi);
  294. hdmi->display_enabled = false;
  295. spin_unlock_irqrestore(&hdmi->audio_playing_lock, flags);
  296. hdmi_power_off_full(hdmi);
  297. mutex_unlock(&hdmi->lock);
  298. }
  299. static int hdmi_core_enable(struct omap_hdmi *hdmi)
  300. {
  301. int r = 0;
  302. DSSDBG("ENTER omapdss_hdmi_core_enable\n");
  303. mutex_lock(&hdmi->lock);
  304. r = hdmi_power_on_core(hdmi);
  305. if (r) {
  306. DSSERR("failed to power on device\n");
  307. goto err0;
  308. }
  309. mutex_unlock(&hdmi->lock);
  310. return 0;
  311. err0:
  312. mutex_unlock(&hdmi->lock);
  313. return r;
  314. }
  315. static void hdmi_core_disable(struct omap_hdmi *hdmi)
  316. {
  317. DSSDBG("Enter omapdss_hdmi_core_disable\n");
  318. mutex_lock(&hdmi->lock);
  319. hdmi_power_off_core(hdmi);
  320. mutex_unlock(&hdmi->lock);
  321. }
  322. static int hdmi_connect(struct omap_dss_device *src,
  323. struct omap_dss_device *dst)
  324. {
  325. int r;
  326. r = omapdss_device_connect(dst->dss, dst, dst->next);
  327. if (r)
  328. return r;
  329. dst->dispc_channel_connected = true;
  330. return 0;
  331. }
  332. static void hdmi_disconnect(struct omap_dss_device *src,
  333. struct omap_dss_device *dst)
  334. {
  335. dst->dispc_channel_connected = false;
  336. omapdss_device_disconnect(dst, dst->next);
  337. }
  338. static int hdmi_read_edid(struct omap_dss_device *dssdev,
  339. u8 *edid, int len)
  340. {
  341. struct omap_hdmi *hdmi = dssdev_to_hdmi(dssdev);
  342. bool need_enable;
  343. int r;
  344. need_enable = hdmi->core_enabled == false;
  345. if (need_enable) {
  346. r = hdmi_core_enable(hdmi);
  347. if (r)
  348. return r;
  349. }
  350. r = read_edid(hdmi, edid, len);
  351. if (need_enable)
  352. hdmi_core_disable(hdmi);
  353. return r;
  354. }
  355. static int hdmi_set_infoframe(struct omap_dss_device *dssdev,
  356. const struct hdmi_avi_infoframe *avi)
  357. {
  358. struct omap_hdmi *hdmi = dssdev_to_hdmi(dssdev);
  359. hdmi->cfg.infoframe = *avi;
  360. return 0;
  361. }
  362. static int hdmi_set_hdmi_mode(struct omap_dss_device *dssdev,
  363. bool hdmi_mode)
  364. {
  365. struct omap_hdmi *hdmi = dssdev_to_hdmi(dssdev);
  366. hdmi->cfg.hdmi_dvi_mode = hdmi_mode ? HDMI_HDMI : HDMI_DVI;
  367. return 0;
  368. }
  369. static const struct omap_dss_device_ops hdmi_ops = {
  370. .connect = hdmi_connect,
  371. .disconnect = hdmi_disconnect,
  372. .enable = hdmi_display_enable,
  373. .disable = hdmi_display_disable,
  374. .set_timings = hdmi_display_set_timings,
  375. .read_edid = hdmi_read_edid,
  376. .hdmi = {
  377. .set_infoframe = hdmi_set_infoframe,
  378. .set_hdmi_mode = hdmi_set_hdmi_mode,
  379. },
  380. };
  381. /* -----------------------------------------------------------------------------
  382. * Audio Callbacks
  383. */
  384. static int hdmi_audio_startup(struct device *dev,
  385. void (*abort_cb)(struct device *dev))
  386. {
  387. struct omap_hdmi *hd = dev_get_drvdata(dev);
  388. mutex_lock(&hd->lock);
  389. WARN_ON(hd->audio_abort_cb != NULL);
  390. hd->audio_abort_cb = abort_cb;
  391. mutex_unlock(&hd->lock);
  392. return 0;
  393. }
  394. static int hdmi_audio_shutdown(struct device *dev)
  395. {
  396. struct omap_hdmi *hd = dev_get_drvdata(dev);
  397. mutex_lock(&hd->lock);
  398. hd->audio_abort_cb = NULL;
  399. hd->audio_configured = false;
  400. hd->audio_playing = false;
  401. mutex_unlock(&hd->lock);
  402. return 0;
  403. }
  404. static int hdmi_audio_start(struct device *dev)
  405. {
  406. struct omap_hdmi *hd = dev_get_drvdata(dev);
  407. unsigned long flags;
  408. spin_lock_irqsave(&hd->audio_playing_lock, flags);
  409. if (hd->display_enabled) {
  410. if (!hdmi_mode_has_audio(&hd->cfg))
  411. DSSERR("%s: Video mode does not support audio\n",
  412. __func__);
  413. hdmi_start_audio_stream(hd);
  414. }
  415. hd->audio_playing = true;
  416. spin_unlock_irqrestore(&hd->audio_playing_lock, flags);
  417. return 0;
  418. }
  419. static void hdmi_audio_stop(struct device *dev)
  420. {
  421. struct omap_hdmi *hd = dev_get_drvdata(dev);
  422. unsigned long flags;
  423. if (!hdmi_mode_has_audio(&hd->cfg))
  424. DSSERR("%s: Video mode does not support audio\n", __func__);
  425. spin_lock_irqsave(&hd->audio_playing_lock, flags);
  426. if (hd->display_enabled)
  427. hdmi_stop_audio_stream(hd);
  428. hd->audio_playing = false;
  429. spin_unlock_irqrestore(&hd->audio_playing_lock, flags);
  430. }
  431. static int hdmi_audio_config(struct device *dev,
  432. struct omap_dss_audio *dss_audio)
  433. {
  434. struct omap_hdmi *hd = dev_get_drvdata(dev);
  435. int ret = 0;
  436. mutex_lock(&hd->lock);
  437. if (hd->display_enabled) {
  438. ret = hdmi5_audio_config(&hd->core, &hd->wp, dss_audio,
  439. hd->cfg.vm.pixelclock);
  440. if (ret)
  441. goto out;
  442. }
  443. hd->audio_configured = true;
  444. hd->audio_config = *dss_audio;
  445. out:
  446. mutex_unlock(&hd->lock);
  447. return ret;
  448. }
  449. static const struct omap_hdmi_audio_ops hdmi_audio_ops = {
  450. .audio_startup = hdmi_audio_startup,
  451. .audio_shutdown = hdmi_audio_shutdown,
  452. .audio_start = hdmi_audio_start,
  453. .audio_stop = hdmi_audio_stop,
  454. .audio_config = hdmi_audio_config,
  455. };
  456. static int hdmi_audio_register(struct omap_hdmi *hdmi)
  457. {
  458. struct omap_hdmi_audio_pdata pdata = {
  459. .dev = &hdmi->pdev->dev,
  460. .version = 5,
  461. .audio_dma_addr = hdmi_wp_get_audio_dma_addr(&hdmi->wp),
  462. .ops = &hdmi_audio_ops,
  463. };
  464. hdmi->audio_pdev = platform_device_register_data(
  465. &hdmi->pdev->dev, "omap-hdmi-audio", PLATFORM_DEVID_AUTO,
  466. &pdata, sizeof(pdata));
  467. if (IS_ERR(hdmi->audio_pdev))
  468. return PTR_ERR(hdmi->audio_pdev);
  469. hdmi_runtime_get(hdmi);
  470. hdmi->wp_idlemode =
  471. REG_GET(hdmi->wp.base, HDMI_WP_SYSCONFIG, 3, 2);
  472. hdmi_runtime_put(hdmi);
  473. return 0;
  474. }
  475. /* -----------------------------------------------------------------------------
  476. * Component Bind & Unbind
  477. */
  478. static int hdmi5_bind(struct device *dev, struct device *master, void *data)
  479. {
  480. struct dss_device *dss = dss_get_device(master);
  481. struct omap_hdmi *hdmi = dev_get_drvdata(dev);
  482. int r;
  483. hdmi->dss = dss;
  484. r = hdmi_pll_init(dss, hdmi->pdev, &hdmi->pll, &hdmi->wp);
  485. if (r)
  486. return r;
  487. r = hdmi_audio_register(hdmi);
  488. if (r) {
  489. DSSERR("Registering HDMI audio failed %d\n", r);
  490. goto err_pll_uninit;
  491. }
  492. hdmi->debugfs = dss_debugfs_create_file(dss, "hdmi", hdmi_dump_regs,
  493. hdmi);
  494. return 0;
  495. err_pll_uninit:
  496. hdmi_pll_uninit(&hdmi->pll);
  497. return r;
  498. }
  499. static void hdmi5_unbind(struct device *dev, struct device *master, void *data)
  500. {
  501. struct omap_hdmi *hdmi = dev_get_drvdata(dev);
  502. dss_debugfs_remove_file(hdmi->debugfs);
  503. if (hdmi->audio_pdev)
  504. platform_device_unregister(hdmi->audio_pdev);
  505. hdmi_pll_uninit(&hdmi->pll);
  506. }
  507. static const struct component_ops hdmi5_component_ops = {
  508. .bind = hdmi5_bind,
  509. .unbind = hdmi5_unbind,
  510. };
  511. /* -----------------------------------------------------------------------------
  512. * Probe & Remove, Suspend & Resume
  513. */
  514. static int hdmi5_init_output(struct omap_hdmi *hdmi)
  515. {
  516. struct omap_dss_device *out = &hdmi->output;
  517. int r;
  518. out->dev = &hdmi->pdev->dev;
  519. out->id = OMAP_DSS_OUTPUT_HDMI;
  520. out->output_type = OMAP_DISPLAY_TYPE_HDMI;
  521. out->name = "hdmi.0";
  522. out->dispc_channel = OMAP_DSS_CHANNEL_DIGIT;
  523. out->ops = &hdmi_ops;
  524. out->owner = THIS_MODULE;
  525. out->of_ports = BIT(0);
  526. out->ops_flags = OMAP_DSS_DEVICE_OP_EDID;
  527. out->next = omapdss_of_find_connected_device(out->dev->of_node, 0);
  528. if (IS_ERR(out->next)) {
  529. if (PTR_ERR(out->next) != -EPROBE_DEFER)
  530. dev_err(out->dev, "failed to find video sink\n");
  531. return PTR_ERR(out->next);
  532. }
  533. r = omapdss_output_validate(out);
  534. if (r) {
  535. omapdss_device_put(out->next);
  536. out->next = NULL;
  537. return r;
  538. }
  539. omapdss_device_register(out);
  540. return 0;
  541. }
  542. static void hdmi5_uninit_output(struct omap_hdmi *hdmi)
  543. {
  544. struct omap_dss_device *out = &hdmi->output;
  545. if (out->next)
  546. omapdss_device_put(out->next);
  547. omapdss_device_unregister(out);
  548. }
  549. static int hdmi5_probe_of(struct omap_hdmi *hdmi)
  550. {
  551. struct platform_device *pdev = hdmi->pdev;
  552. struct device_node *node = pdev->dev.of_node;
  553. struct device_node *ep;
  554. int r;
  555. ep = of_graph_get_endpoint_by_regs(node, 0, 0);
  556. if (!ep)
  557. return 0;
  558. r = hdmi_parse_lanes_of(pdev, ep, &hdmi->phy);
  559. of_node_put(ep);
  560. return r;
  561. }
  562. static int hdmi5_probe(struct platform_device *pdev)
  563. {
  564. struct omap_hdmi *hdmi;
  565. int irq;
  566. int r;
  567. hdmi = kzalloc(sizeof(*hdmi), GFP_KERNEL);
  568. if (!hdmi)
  569. return -ENOMEM;
  570. hdmi->pdev = pdev;
  571. dev_set_drvdata(&pdev->dev, hdmi);
  572. mutex_init(&hdmi->lock);
  573. spin_lock_init(&hdmi->audio_playing_lock);
  574. r = hdmi5_probe_of(hdmi);
  575. if (r)
  576. goto err_free;
  577. r = hdmi_wp_init(pdev, &hdmi->wp, 5);
  578. if (r)
  579. goto err_free;
  580. r = hdmi_phy_init(pdev, &hdmi->phy, 5);
  581. if (r)
  582. goto err_free;
  583. r = hdmi5_core_init(pdev, &hdmi->core);
  584. if (r)
  585. goto err_free;
  586. irq = platform_get_irq(pdev, 0);
  587. if (irq < 0) {
  588. DSSERR("platform_get_irq failed\n");
  589. r = -ENODEV;
  590. goto err_free;
  591. }
  592. r = devm_request_threaded_irq(&pdev->dev, irq,
  593. NULL, hdmi_irq_handler,
  594. IRQF_ONESHOT, "OMAP HDMI", hdmi);
  595. if (r) {
  596. DSSERR("HDMI IRQ request failed\n");
  597. goto err_free;
  598. }
  599. hdmi->vdda_reg = devm_regulator_get(&pdev->dev, "vdda");
  600. if (IS_ERR(hdmi->vdda_reg)) {
  601. r = PTR_ERR(hdmi->vdda_reg);
  602. if (r != -EPROBE_DEFER)
  603. DSSERR("can't get VDDA regulator\n");
  604. goto err_free;
  605. }
  606. pm_runtime_enable(&pdev->dev);
  607. r = hdmi5_init_output(hdmi);
  608. if (r)
  609. goto err_pm_disable;
  610. r = component_add(&pdev->dev, &hdmi5_component_ops);
  611. if (r)
  612. goto err_uninit_output;
  613. return 0;
  614. err_uninit_output:
  615. hdmi5_uninit_output(hdmi);
  616. err_pm_disable:
  617. pm_runtime_disable(&pdev->dev);
  618. err_free:
  619. kfree(hdmi);
  620. return r;
  621. }
  622. static int hdmi5_remove(struct platform_device *pdev)
  623. {
  624. struct omap_hdmi *hdmi = platform_get_drvdata(pdev);
  625. component_del(&pdev->dev, &hdmi5_component_ops);
  626. hdmi5_uninit_output(hdmi);
  627. pm_runtime_disable(&pdev->dev);
  628. kfree(hdmi);
  629. return 0;
  630. }
  631. static const struct of_device_id hdmi_of_match[] = {
  632. { .compatible = "ti,omap5-hdmi", },
  633. { .compatible = "ti,dra7-hdmi", },
  634. {},
  635. };
  636. struct platform_driver omapdss_hdmi5hw_driver = {
  637. .probe = hdmi5_probe,
  638. .remove = hdmi5_remove,
  639. .driver = {
  640. .name = "omapdss_hdmi5",
  641. .of_match_table = hdmi_of_match,
  642. .suppress_bind_attrs = true,
  643. },
  644. };