wndw.c 17 KB

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  1. /*
  2. * Copyright 2018 Red Hat Inc.
  3. *
  4. * Permission is hereby granted, free of charge, to any person obtaining a
  5. * copy of this software and associated documentation files (the "Software"),
  6. * to deal in the Software without restriction, including without limitation
  7. * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  8. * and/or sell copies of the Software, and to permit persons to whom the
  9. * Software is furnished to do so, subject to the following conditions:
  10. *
  11. * The above copyright notice and this permission notice shall be included in
  12. * all copies or substantial portions of the Software.
  13. *
  14. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  17. * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  18. * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  19. * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  20. * OTHER DEALINGS IN THE SOFTWARE.
  21. */
  22. #include "wndw.h"
  23. #include "wimm.h"
  24. #include <nvif/class.h>
  25. #include <nvif/cl0002.h>
  26. #include <drm/drm_atomic_helper.h>
  27. #include "nouveau_bo.h"
  28. static void
  29. nv50_wndw_ctxdma_del(struct nv50_wndw_ctxdma *ctxdma)
  30. {
  31. nvif_object_fini(&ctxdma->object);
  32. list_del(&ctxdma->head);
  33. kfree(ctxdma);
  34. }
  35. static struct nv50_wndw_ctxdma *
  36. nv50_wndw_ctxdma_new(struct nv50_wndw *wndw, struct nouveau_framebuffer *fb)
  37. {
  38. struct nouveau_drm *drm = nouveau_drm(fb->base.dev);
  39. struct nv50_wndw_ctxdma *ctxdma;
  40. const u8 kind = fb->nvbo->kind;
  41. const u32 handle = 0xfb000000 | kind;
  42. struct {
  43. struct nv_dma_v0 base;
  44. union {
  45. struct nv50_dma_v0 nv50;
  46. struct gf100_dma_v0 gf100;
  47. struct gf119_dma_v0 gf119;
  48. };
  49. } args = {};
  50. u32 argc = sizeof(args.base);
  51. int ret;
  52. list_for_each_entry(ctxdma, &wndw->ctxdma.list, head) {
  53. if (ctxdma->object.handle == handle)
  54. return ctxdma;
  55. }
  56. if (!(ctxdma = kzalloc(sizeof(*ctxdma), GFP_KERNEL)))
  57. return ERR_PTR(-ENOMEM);
  58. list_add(&ctxdma->head, &wndw->ctxdma.list);
  59. args.base.target = NV_DMA_V0_TARGET_VRAM;
  60. args.base.access = NV_DMA_V0_ACCESS_RDWR;
  61. args.base.start = 0;
  62. args.base.limit = drm->client.device.info.ram_user - 1;
  63. if (drm->client.device.info.chipset < 0x80) {
  64. args.nv50.part = NV50_DMA_V0_PART_256;
  65. argc += sizeof(args.nv50);
  66. } else
  67. if (drm->client.device.info.chipset < 0xc0) {
  68. args.nv50.part = NV50_DMA_V0_PART_256;
  69. args.nv50.kind = kind;
  70. argc += sizeof(args.nv50);
  71. } else
  72. if (drm->client.device.info.chipset < 0xd0) {
  73. args.gf100.kind = kind;
  74. argc += sizeof(args.gf100);
  75. } else {
  76. args.gf119.page = GF119_DMA_V0_PAGE_LP;
  77. args.gf119.kind = kind;
  78. argc += sizeof(args.gf119);
  79. }
  80. ret = nvif_object_init(wndw->ctxdma.parent, handle, NV_DMA_IN_MEMORY,
  81. &args, argc, &ctxdma->object);
  82. if (ret) {
  83. nv50_wndw_ctxdma_del(ctxdma);
  84. return ERR_PTR(ret);
  85. }
  86. return ctxdma;
  87. }
  88. int
  89. nv50_wndw_wait_armed(struct nv50_wndw *wndw, struct nv50_wndw_atom *asyw)
  90. {
  91. struct nv50_disp *disp = nv50_disp(wndw->plane.dev);
  92. if (asyw->set.ntfy) {
  93. return wndw->func->ntfy_wait_begun(disp->sync,
  94. asyw->ntfy.offset,
  95. wndw->wndw.base.device);
  96. }
  97. return 0;
  98. }
  99. void
  100. nv50_wndw_flush_clr(struct nv50_wndw *wndw, u32 *interlock, bool flush,
  101. struct nv50_wndw_atom *asyw)
  102. {
  103. union nv50_wndw_atom_mask clr = {
  104. .mask = asyw->clr.mask & ~(flush ? 0 : asyw->set.mask),
  105. };
  106. if (clr.sema ) wndw->func-> sema_clr(wndw);
  107. if (clr.ntfy ) wndw->func-> ntfy_clr(wndw);
  108. if (clr.xlut ) wndw->func-> xlut_clr(wndw);
  109. if (clr.image) wndw->func->image_clr(wndw);
  110. interlock[wndw->interlock.type] |= wndw->interlock.data;
  111. }
  112. void
  113. nv50_wndw_flush_set(struct nv50_wndw *wndw, u32 *interlock,
  114. struct nv50_wndw_atom *asyw)
  115. {
  116. if (interlock) {
  117. asyw->image.mode = 0;
  118. asyw->image.interval = 1;
  119. }
  120. if (asyw->set.sema ) wndw->func->sema_set (wndw, asyw);
  121. if (asyw->set.ntfy ) wndw->func->ntfy_set (wndw, asyw);
  122. if (asyw->set.image) wndw->func->image_set(wndw, asyw);
  123. if (asyw->set.xlut ) {
  124. if (asyw->ilut) {
  125. asyw->xlut.i.offset =
  126. nv50_lut_load(&wndw->ilut,
  127. asyw->xlut.i.mode <= 1,
  128. asyw->xlut.i.buffer,
  129. asyw->ilut);
  130. }
  131. wndw->func->xlut_set(wndw, asyw);
  132. }
  133. if (asyw->set.scale) wndw->func->scale_set(wndw, asyw);
  134. if (asyw->set.point) {
  135. if (asyw->set.point = false, asyw->set.mask)
  136. interlock[wndw->interlock.type] |= wndw->interlock.data;
  137. interlock[NV50_DISP_INTERLOCK_WIMM] |= wndw->interlock.data;
  138. wndw->immd->point(wndw, asyw);
  139. wndw->immd->update(wndw, interlock);
  140. } else {
  141. interlock[wndw->interlock.type] |= wndw->interlock.data;
  142. }
  143. }
  144. void
  145. nv50_wndw_ntfy_enable(struct nv50_wndw *wndw, struct nv50_wndw_atom *asyw)
  146. {
  147. struct nv50_disp *disp = nv50_disp(wndw->plane.dev);
  148. asyw->ntfy.handle = wndw->wndw.sync.handle;
  149. asyw->ntfy.offset = wndw->ntfy;
  150. asyw->ntfy.awaken = false;
  151. asyw->set.ntfy = true;
  152. wndw->func->ntfy_reset(disp->sync, wndw->ntfy);
  153. wndw->ntfy ^= 0x10;
  154. }
  155. static void
  156. nv50_wndw_atomic_check_release(struct nv50_wndw *wndw,
  157. struct nv50_wndw_atom *asyw,
  158. struct nv50_head_atom *asyh)
  159. {
  160. struct nouveau_drm *drm = nouveau_drm(wndw->plane.dev);
  161. NV_ATOMIC(drm, "%s release\n", wndw->plane.name);
  162. wndw->func->release(wndw, asyw, asyh);
  163. asyw->ntfy.handle = 0;
  164. asyw->sema.handle = 0;
  165. }
  166. static int
  167. nv50_wndw_atomic_check_acquire_yuv(struct nv50_wndw_atom *asyw)
  168. {
  169. switch (asyw->state.fb->format->format) {
  170. case DRM_FORMAT_YUYV: asyw->image.format = 0x28; break;
  171. case DRM_FORMAT_UYVY: asyw->image.format = 0x29; break;
  172. default:
  173. WARN_ON(1);
  174. return -EINVAL;
  175. }
  176. asyw->image.colorspace = 1;
  177. return 0;
  178. }
  179. static int
  180. nv50_wndw_atomic_check_acquire_rgb(struct nv50_wndw_atom *asyw)
  181. {
  182. switch (asyw->state.fb->format->format) {
  183. case DRM_FORMAT_C8 : asyw->image.format = 0x1e; break;
  184. case DRM_FORMAT_XRGB8888 :
  185. case DRM_FORMAT_ARGB8888 : asyw->image.format = 0xcf; break;
  186. case DRM_FORMAT_RGB565 : asyw->image.format = 0xe8; break;
  187. case DRM_FORMAT_XRGB1555 :
  188. case DRM_FORMAT_ARGB1555 : asyw->image.format = 0xe9; break;
  189. case DRM_FORMAT_XBGR2101010:
  190. case DRM_FORMAT_ABGR2101010: asyw->image.format = 0xd1; break;
  191. case DRM_FORMAT_XBGR8888 :
  192. case DRM_FORMAT_ABGR8888 : asyw->image.format = 0xd5; break;
  193. case DRM_FORMAT_XRGB2101010:
  194. case DRM_FORMAT_ARGB2101010: asyw->image.format = 0xdf; break;
  195. default:
  196. return -EINVAL;
  197. }
  198. asyw->image.colorspace = 0;
  199. return 0;
  200. }
  201. static int
  202. nv50_wndw_atomic_check_acquire(struct nv50_wndw *wndw, bool modeset,
  203. struct nv50_wndw_atom *armw,
  204. struct nv50_wndw_atom *asyw,
  205. struct nv50_head_atom *asyh)
  206. {
  207. struct nouveau_framebuffer *fb = nouveau_framebuffer(asyw->state.fb);
  208. struct nouveau_drm *drm = nouveau_drm(wndw->plane.dev);
  209. int ret;
  210. NV_ATOMIC(drm, "%s acquire\n", wndw->plane.name);
  211. if (asyw->state.fb != armw->state.fb || !armw->visible || modeset) {
  212. asyw->image.w = fb->base.width;
  213. asyw->image.h = fb->base.height;
  214. asyw->image.kind = fb->nvbo->kind;
  215. ret = nv50_wndw_atomic_check_acquire_rgb(asyw);
  216. if (ret) {
  217. ret = nv50_wndw_atomic_check_acquire_yuv(asyw);
  218. if (ret)
  219. return ret;
  220. }
  221. if (asyw->image.kind) {
  222. asyw->image.layout = 0;
  223. if (drm->client.device.info.chipset >= 0xc0)
  224. asyw->image.blockh = fb->nvbo->mode >> 4;
  225. else
  226. asyw->image.blockh = fb->nvbo->mode;
  227. asyw->image.blocks[0] = fb->base.pitches[0] / 64;
  228. asyw->image.pitch[0] = 0;
  229. } else {
  230. asyw->image.layout = 1;
  231. asyw->image.blockh = 0;
  232. asyw->image.blocks[0] = 0;
  233. asyw->image.pitch[0] = fb->base.pitches[0];
  234. }
  235. if (!(asyh->state.pageflip_flags & DRM_MODE_PAGE_FLIP_ASYNC))
  236. asyw->image.interval = 1;
  237. else
  238. asyw->image.interval = 0;
  239. asyw->image.mode = asyw->image.interval ? 0 : 1;
  240. asyw->set.image = wndw->func->image_set != NULL;
  241. }
  242. if (wndw->func->scale_set) {
  243. asyw->scale.sx = asyw->state.src_x >> 16;
  244. asyw->scale.sy = asyw->state.src_y >> 16;
  245. asyw->scale.sw = asyw->state.src_w >> 16;
  246. asyw->scale.sh = asyw->state.src_h >> 16;
  247. asyw->scale.dw = asyw->state.crtc_w;
  248. asyw->scale.dh = asyw->state.crtc_h;
  249. if (memcmp(&armw->scale, &asyw->scale, sizeof(asyw->scale)))
  250. asyw->set.scale = true;
  251. }
  252. if (wndw->immd) {
  253. asyw->point.x = asyw->state.crtc_x;
  254. asyw->point.y = asyw->state.crtc_y;
  255. if (memcmp(&armw->point, &asyw->point, sizeof(asyw->point)))
  256. asyw->set.point = true;
  257. }
  258. return wndw->func->acquire(wndw, asyw, asyh);
  259. }
  260. static void
  261. nv50_wndw_atomic_check_lut(struct nv50_wndw *wndw,
  262. struct nv50_wndw_atom *armw,
  263. struct nv50_wndw_atom *asyw,
  264. struct nv50_head_atom *asyh)
  265. {
  266. struct drm_property_blob *ilut = asyh->state.degamma_lut;
  267. /* I8 format without an input LUT makes no sense, and the
  268. * HW error-checks for this.
  269. *
  270. * In order to handle legacy gamma, when there's no input
  271. * LUT we need to steal the output LUT and use it instead.
  272. */
  273. if (!ilut && asyw->state.fb->format->format == DRM_FORMAT_C8) {
  274. /* This should be an error, but there's legacy clients
  275. * that do a modeset before providing a gamma table.
  276. *
  277. * We keep the window disabled to avoid angering HW.
  278. */
  279. if (!(ilut = asyh->state.gamma_lut)) {
  280. asyw->visible = false;
  281. return;
  282. }
  283. if (wndw->func->ilut)
  284. asyh->wndw.olut |= BIT(wndw->id);
  285. } else {
  286. asyh->wndw.olut &= ~BIT(wndw->id);
  287. }
  288. /* Recalculate LUT state. */
  289. memset(&asyw->xlut, 0x00, sizeof(asyw->xlut));
  290. if ((asyw->ilut = wndw->func->ilut ? ilut : NULL)) {
  291. wndw->func->ilut(wndw, asyw);
  292. asyw->xlut.handle = wndw->wndw.vram.handle;
  293. asyw->xlut.i.buffer = !asyw->xlut.i.buffer;
  294. asyw->set.xlut = true;
  295. }
  296. /* Handle setting base SET_OUTPUT_LUT_LO_ENABLE_USE_CORE_LUT. */
  297. if (wndw->func->olut_core &&
  298. (!armw->visible || (armw->xlut.handle && !asyw->xlut.handle)))
  299. asyw->set.xlut = true;
  300. /* Can't do an immediate flip while changing the LUT. */
  301. asyh->state.pageflip_flags &= ~DRM_MODE_PAGE_FLIP_ASYNC;
  302. }
  303. static int
  304. nv50_wndw_atomic_check(struct drm_plane *plane, struct drm_plane_state *state)
  305. {
  306. struct nouveau_drm *drm = nouveau_drm(plane->dev);
  307. struct nv50_wndw *wndw = nv50_wndw(plane);
  308. struct nv50_wndw_atom *armw = nv50_wndw_atom(wndw->plane.state);
  309. struct nv50_wndw_atom *asyw = nv50_wndw_atom(state);
  310. struct nv50_head_atom *harm = NULL, *asyh = NULL;
  311. bool modeset = false;
  312. int ret;
  313. NV_ATOMIC(drm, "%s atomic_check\n", plane->name);
  314. /* Fetch the assembly state for the head the window will belong to,
  315. * and determine whether the window will be visible.
  316. */
  317. if (asyw->state.crtc) {
  318. asyh = nv50_head_atom_get(asyw->state.state, asyw->state.crtc);
  319. if (IS_ERR(asyh))
  320. return PTR_ERR(asyh);
  321. modeset = drm_atomic_crtc_needs_modeset(&asyh->state);
  322. asyw->visible = asyh->state.active;
  323. } else {
  324. asyw->visible = false;
  325. }
  326. /* Fetch assembly state for the head the window used to belong to. */
  327. if (armw->state.crtc) {
  328. harm = nv50_head_atom_get(asyw->state.state, armw->state.crtc);
  329. if (IS_ERR(harm))
  330. return PTR_ERR(harm);
  331. }
  332. /* LUT configuration can potentially cause the window to be disabled. */
  333. if (asyw->visible && wndw->func->xlut_set &&
  334. (!armw->visible ||
  335. asyh->state.color_mgmt_changed ||
  336. asyw->state.fb->format->format !=
  337. armw->state.fb->format->format))
  338. nv50_wndw_atomic_check_lut(wndw, armw, asyw, asyh);
  339. /* Calculate new window state. */
  340. if (asyw->visible) {
  341. ret = nv50_wndw_atomic_check_acquire(wndw, modeset,
  342. armw, asyw, asyh);
  343. if (ret)
  344. return ret;
  345. asyh->wndw.mask |= BIT(wndw->id);
  346. } else
  347. if (armw->visible) {
  348. nv50_wndw_atomic_check_release(wndw, asyw, harm);
  349. harm->wndw.mask &= ~BIT(wndw->id);
  350. } else {
  351. return 0;
  352. }
  353. /* Aside from the obvious case where the window is actively being
  354. * disabled, we might also need to temporarily disable the window
  355. * when performing certain modeset operations.
  356. */
  357. if (!asyw->visible || modeset) {
  358. asyw->clr.ntfy = armw->ntfy.handle != 0;
  359. asyw->clr.sema = armw->sema.handle != 0;
  360. asyw->clr.xlut = armw->xlut.handle != 0;
  361. if (wndw->func->image_clr)
  362. asyw->clr.image = armw->image.handle[0] != 0;
  363. }
  364. return 0;
  365. }
  366. static void
  367. nv50_wndw_cleanup_fb(struct drm_plane *plane, struct drm_plane_state *old_state)
  368. {
  369. struct nouveau_framebuffer *fb = nouveau_framebuffer(old_state->fb);
  370. struct nouveau_drm *drm = nouveau_drm(plane->dev);
  371. NV_ATOMIC(drm, "%s cleanup: %p\n", plane->name, old_state->fb);
  372. if (!old_state->fb)
  373. return;
  374. nouveau_bo_unpin(fb->nvbo);
  375. }
  376. static int
  377. nv50_wndw_prepare_fb(struct drm_plane *plane, struct drm_plane_state *state)
  378. {
  379. struct nouveau_framebuffer *fb = nouveau_framebuffer(state->fb);
  380. struct nouveau_drm *drm = nouveau_drm(plane->dev);
  381. struct nv50_wndw *wndw = nv50_wndw(plane);
  382. struct nv50_wndw_atom *asyw = nv50_wndw_atom(state);
  383. struct nv50_head_atom *asyh;
  384. struct nv50_wndw_ctxdma *ctxdma;
  385. int ret;
  386. NV_ATOMIC(drm, "%s prepare: %p\n", plane->name, state->fb);
  387. if (!asyw->state.fb)
  388. return 0;
  389. ret = nouveau_bo_pin(fb->nvbo, TTM_PL_FLAG_VRAM, true);
  390. if (ret)
  391. return ret;
  392. if (wndw->ctxdma.parent) {
  393. ctxdma = nv50_wndw_ctxdma_new(wndw, fb);
  394. if (IS_ERR(ctxdma)) {
  395. nouveau_bo_unpin(fb->nvbo);
  396. return PTR_ERR(ctxdma);
  397. }
  398. asyw->image.handle[0] = ctxdma->object.handle;
  399. }
  400. asyw->state.fence = reservation_object_get_excl_rcu(fb->nvbo->bo.resv);
  401. asyw->image.offset[0] = fb->nvbo->bo.offset;
  402. if (wndw->func->prepare) {
  403. asyh = nv50_head_atom_get(asyw->state.state, asyw->state.crtc);
  404. if (IS_ERR(asyh))
  405. return PTR_ERR(asyh);
  406. wndw->func->prepare(wndw, asyh, asyw);
  407. }
  408. return 0;
  409. }
  410. static const struct drm_plane_helper_funcs
  411. nv50_wndw_helper = {
  412. .prepare_fb = nv50_wndw_prepare_fb,
  413. .cleanup_fb = nv50_wndw_cleanup_fb,
  414. .atomic_check = nv50_wndw_atomic_check,
  415. };
  416. static void
  417. nv50_wndw_atomic_destroy_state(struct drm_plane *plane,
  418. struct drm_plane_state *state)
  419. {
  420. struct nv50_wndw_atom *asyw = nv50_wndw_atom(state);
  421. __drm_atomic_helper_plane_destroy_state(&asyw->state);
  422. kfree(asyw);
  423. }
  424. static struct drm_plane_state *
  425. nv50_wndw_atomic_duplicate_state(struct drm_plane *plane)
  426. {
  427. struct nv50_wndw_atom *armw = nv50_wndw_atom(plane->state);
  428. struct nv50_wndw_atom *asyw;
  429. if (!(asyw = kmalloc(sizeof(*asyw), GFP_KERNEL)))
  430. return NULL;
  431. __drm_atomic_helper_plane_duplicate_state(plane, &asyw->state);
  432. asyw->sema = armw->sema;
  433. asyw->ntfy = armw->ntfy;
  434. asyw->ilut = NULL;
  435. asyw->xlut = armw->xlut;
  436. asyw->image = armw->image;
  437. asyw->point = armw->point;
  438. asyw->clr.mask = 0;
  439. asyw->set.mask = 0;
  440. return &asyw->state;
  441. }
  442. static void
  443. nv50_wndw_reset(struct drm_plane *plane)
  444. {
  445. struct nv50_wndw_atom *asyw;
  446. if (WARN_ON(!(asyw = kzalloc(sizeof(*asyw), GFP_KERNEL))))
  447. return;
  448. if (plane->state)
  449. plane->funcs->atomic_destroy_state(plane, plane->state);
  450. plane->state = &asyw->state;
  451. plane->state->plane = plane;
  452. plane->state->rotation = DRM_MODE_ROTATE_0;
  453. }
  454. static void
  455. nv50_wndw_destroy(struct drm_plane *plane)
  456. {
  457. struct nv50_wndw *wndw = nv50_wndw(plane);
  458. struct nv50_wndw_ctxdma *ctxdma, *ctxtmp;
  459. list_for_each_entry_safe(ctxdma, ctxtmp, &wndw->ctxdma.list, head) {
  460. nv50_wndw_ctxdma_del(ctxdma);
  461. }
  462. nvif_notify_fini(&wndw->notify);
  463. nv50_dmac_destroy(&wndw->wimm);
  464. nv50_dmac_destroy(&wndw->wndw);
  465. nv50_lut_fini(&wndw->ilut);
  466. drm_plane_cleanup(&wndw->plane);
  467. kfree(wndw);
  468. }
  469. const struct drm_plane_funcs
  470. nv50_wndw = {
  471. .update_plane = drm_atomic_helper_update_plane,
  472. .disable_plane = drm_atomic_helper_disable_plane,
  473. .destroy = nv50_wndw_destroy,
  474. .reset = nv50_wndw_reset,
  475. .atomic_duplicate_state = nv50_wndw_atomic_duplicate_state,
  476. .atomic_destroy_state = nv50_wndw_atomic_destroy_state,
  477. };
  478. static int
  479. nv50_wndw_notify(struct nvif_notify *notify)
  480. {
  481. return NVIF_NOTIFY_KEEP;
  482. }
  483. void
  484. nv50_wndw_fini(struct nv50_wndw *wndw)
  485. {
  486. nvif_notify_put(&wndw->notify);
  487. }
  488. void
  489. nv50_wndw_init(struct nv50_wndw *wndw)
  490. {
  491. nvif_notify_get(&wndw->notify);
  492. }
  493. int
  494. nv50_wndw_new_(const struct nv50_wndw_func *func, struct drm_device *dev,
  495. enum drm_plane_type type, const char *name, int index,
  496. const u32 *format, u32 heads,
  497. enum nv50_disp_interlock_type interlock_type, u32 interlock_data,
  498. struct nv50_wndw **pwndw)
  499. {
  500. struct nouveau_drm *drm = nouveau_drm(dev);
  501. struct nvif_mmu *mmu = &drm->client.mmu;
  502. struct nv50_disp *disp = nv50_disp(dev);
  503. struct nv50_wndw *wndw;
  504. int nformat;
  505. int ret;
  506. if (!(wndw = *pwndw = kzalloc(sizeof(*wndw), GFP_KERNEL)))
  507. return -ENOMEM;
  508. wndw->func = func;
  509. wndw->id = index;
  510. wndw->interlock.type = interlock_type;
  511. wndw->interlock.data = interlock_data;
  512. wndw->ctxdma.parent = &wndw->wndw.base.user;
  513. INIT_LIST_HEAD(&wndw->ctxdma.list);
  514. for (nformat = 0; format[nformat]; nformat++);
  515. ret = drm_universal_plane_init(dev, &wndw->plane, heads, &nv50_wndw,
  516. format, nformat, NULL,
  517. type, "%s-%d", name, index);
  518. if (ret) {
  519. kfree(*pwndw);
  520. *pwndw = NULL;
  521. return ret;
  522. }
  523. drm_plane_helper_add(&wndw->plane, &nv50_wndw_helper);
  524. if (wndw->func->ilut) {
  525. ret = nv50_lut_init(disp, mmu, &wndw->ilut);
  526. if (ret)
  527. return ret;
  528. }
  529. wndw->notify.func = nv50_wndw_notify;
  530. return 0;
  531. }
  532. int
  533. nv50_wndw_new(struct nouveau_drm *drm, enum drm_plane_type type, int index,
  534. struct nv50_wndw **pwndw)
  535. {
  536. struct {
  537. s32 oclass;
  538. int version;
  539. int (*new)(struct nouveau_drm *, enum drm_plane_type,
  540. int, s32, struct nv50_wndw **);
  541. } wndws[] = {
  542. { GV100_DISP_WINDOW_CHANNEL_DMA, 0, wndwc37e_new },
  543. {}
  544. };
  545. struct nv50_disp *disp = nv50_disp(drm->dev);
  546. int cid, ret;
  547. cid = nvif_mclass(&disp->disp->object, wndws);
  548. if (cid < 0) {
  549. NV_ERROR(drm, "No supported window class\n");
  550. return cid;
  551. }
  552. ret = wndws[cid].new(drm, type, index, wndws[cid].oclass, pwndw);
  553. if (ret)
  554. return ret;
  555. return nv50_wimm_init(drm, *pwndw);
  556. }