dpu_trace.h 29 KB

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  1. /* Copyright (c) 2014-2018, The Linux Foundation. All rights reserved.
  2. *
  3. * This program is free software; you can redistribute it and/or modify
  4. * it under the terms of the GNU General Public License version 2 and
  5. * only version 2 as published by the Free Software Foundation.
  6. *
  7. * This program is distributed in the hope that it will be useful,
  8. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  9. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  10. * GNU General Public License for more details.
  11. */
  12. #if !defined(_DPU_TRACE_H_) || defined(TRACE_HEADER_MULTI_READ)
  13. #define _DPU_TRACE_H_
  14. #include <linux/stringify.h>
  15. #include <linux/types.h>
  16. #include <linux/tracepoint.h>
  17. #include <drm/drm_rect.h>
  18. #include "dpu_crtc.h"
  19. #include "dpu_encoder_phys.h"
  20. #include "dpu_hw_mdss.h"
  21. #include "dpu_hw_vbif.h"
  22. #include "dpu_plane.h"
  23. #undef TRACE_SYSTEM
  24. #define TRACE_SYSTEM dpu
  25. #undef TRACE_INCLUDE_FILE
  26. #define TRACE_INCLUDE_FILE dpu_trace
  27. TRACE_EVENT(dpu_perf_set_qos_luts,
  28. TP_PROTO(u32 pnum, u32 fmt, bool rt, u32 fl,
  29. u32 lut, u32 lut_usage),
  30. TP_ARGS(pnum, fmt, rt, fl, lut, lut_usage),
  31. TP_STRUCT__entry(
  32. __field(u32, pnum)
  33. __field(u32, fmt)
  34. __field(bool, rt)
  35. __field(u32, fl)
  36. __field(u64, lut)
  37. __field(u32, lut_usage)
  38. ),
  39. TP_fast_assign(
  40. __entry->pnum = pnum;
  41. __entry->fmt = fmt;
  42. __entry->rt = rt;
  43. __entry->fl = fl;
  44. __entry->lut = lut;
  45. __entry->lut_usage = lut_usage;
  46. ),
  47. TP_printk("pnum=%d fmt=%x rt=%d fl=%d lut=0x%llx lut_usage=%d",
  48. __entry->pnum, __entry->fmt,
  49. __entry->rt, __entry->fl,
  50. __entry->lut, __entry->lut_usage)
  51. );
  52. TRACE_EVENT(dpu_perf_set_danger_luts,
  53. TP_PROTO(u32 pnum, u32 fmt, u32 mode, u32 danger_lut,
  54. u32 safe_lut),
  55. TP_ARGS(pnum, fmt, mode, danger_lut, safe_lut),
  56. TP_STRUCT__entry(
  57. __field(u32, pnum)
  58. __field(u32, fmt)
  59. __field(u32, mode)
  60. __field(u32, danger_lut)
  61. __field(u32, safe_lut)
  62. ),
  63. TP_fast_assign(
  64. __entry->pnum = pnum;
  65. __entry->fmt = fmt;
  66. __entry->mode = mode;
  67. __entry->danger_lut = danger_lut;
  68. __entry->safe_lut = safe_lut;
  69. ),
  70. TP_printk("pnum=%d fmt=%x mode=%d luts[0x%x, 0x%x]",
  71. __entry->pnum, __entry->fmt,
  72. __entry->mode, __entry->danger_lut,
  73. __entry->safe_lut)
  74. );
  75. TRACE_EVENT(dpu_perf_set_ot,
  76. TP_PROTO(u32 pnum, u32 xin_id, u32 rd_lim, u32 vbif_idx),
  77. TP_ARGS(pnum, xin_id, rd_lim, vbif_idx),
  78. TP_STRUCT__entry(
  79. __field(u32, pnum)
  80. __field(u32, xin_id)
  81. __field(u32, rd_lim)
  82. __field(u32, vbif_idx)
  83. ),
  84. TP_fast_assign(
  85. __entry->pnum = pnum;
  86. __entry->xin_id = xin_id;
  87. __entry->rd_lim = rd_lim;
  88. __entry->vbif_idx = vbif_idx;
  89. ),
  90. TP_printk("pnum:%d xin_id:%d ot:%d vbif:%d",
  91. __entry->pnum, __entry->xin_id, __entry->rd_lim,
  92. __entry->vbif_idx)
  93. )
  94. TRACE_EVENT(dpu_perf_update_bus,
  95. TP_PROTO(int client, unsigned long long ab_quota,
  96. unsigned long long ib_quota),
  97. TP_ARGS(client, ab_quota, ib_quota),
  98. TP_STRUCT__entry(
  99. __field(int, client)
  100. __field(u64, ab_quota)
  101. __field(u64, ib_quota)
  102. ),
  103. TP_fast_assign(
  104. __entry->client = client;
  105. __entry->ab_quota = ab_quota;
  106. __entry->ib_quota = ib_quota;
  107. ),
  108. TP_printk("Request client:%d ab=%llu ib=%llu",
  109. __entry->client,
  110. __entry->ab_quota,
  111. __entry->ib_quota)
  112. )
  113. TRACE_EVENT(dpu_cmd_release_bw,
  114. TP_PROTO(u32 crtc_id),
  115. TP_ARGS(crtc_id),
  116. TP_STRUCT__entry(
  117. __field(u32, crtc_id)
  118. ),
  119. TP_fast_assign(
  120. __entry->crtc_id = crtc_id;
  121. ),
  122. TP_printk("crtc:%d", __entry->crtc_id)
  123. );
  124. TRACE_EVENT(tracing_mark_write,
  125. TP_PROTO(int pid, const char *name, bool trace_begin),
  126. TP_ARGS(pid, name, trace_begin),
  127. TP_STRUCT__entry(
  128. __field(int, pid)
  129. __string(trace_name, name)
  130. __field(bool, trace_begin)
  131. ),
  132. TP_fast_assign(
  133. __entry->pid = pid;
  134. __assign_str(trace_name, name);
  135. __entry->trace_begin = trace_begin;
  136. ),
  137. TP_printk("%s|%d|%s", __entry->trace_begin ? "B" : "E",
  138. __entry->pid, __get_str(trace_name))
  139. )
  140. TRACE_EVENT(dpu_trace_counter,
  141. TP_PROTO(int pid, char *name, int value),
  142. TP_ARGS(pid, name, value),
  143. TP_STRUCT__entry(
  144. __field(int, pid)
  145. __string(counter_name, name)
  146. __field(int, value)
  147. ),
  148. TP_fast_assign(
  149. __entry->pid = current->tgid;
  150. __assign_str(counter_name, name);
  151. __entry->value = value;
  152. ),
  153. TP_printk("%d|%s|%d", __entry->pid,
  154. __get_str(counter_name), __entry->value)
  155. )
  156. TRACE_EVENT(dpu_perf_crtc_update,
  157. TP_PROTO(u32 crtc, u64 bw_ctl_mnoc, u64 bw_ctl_llcc,
  158. u64 bw_ctl_ebi, u32 core_clk_rate,
  159. bool stop_req, u32 update_bus, u32 update_clk),
  160. TP_ARGS(crtc, bw_ctl_mnoc, bw_ctl_llcc, bw_ctl_ebi, core_clk_rate,
  161. stop_req, update_bus, update_clk),
  162. TP_STRUCT__entry(
  163. __field(u32, crtc)
  164. __field(u64, bw_ctl_mnoc)
  165. __field(u64, bw_ctl_llcc)
  166. __field(u64, bw_ctl_ebi)
  167. __field(u32, core_clk_rate)
  168. __field(bool, stop_req)
  169. __field(u32, update_bus)
  170. __field(u32, update_clk)
  171. ),
  172. TP_fast_assign(
  173. __entry->crtc = crtc;
  174. __entry->bw_ctl_mnoc = bw_ctl_mnoc;
  175. __entry->bw_ctl_llcc = bw_ctl_llcc;
  176. __entry->bw_ctl_ebi = bw_ctl_ebi;
  177. __entry->core_clk_rate = core_clk_rate;
  178. __entry->stop_req = stop_req;
  179. __entry->update_bus = update_bus;
  180. __entry->update_clk = update_clk;
  181. ),
  182. TP_printk(
  183. "crtc=%d bw_mnoc=%llu bw_llcc=%llu bw_ebi=%llu clk_rate=%u stop_req=%d u_bus=%d u_clk=%d",
  184. __entry->crtc,
  185. __entry->bw_ctl_mnoc,
  186. __entry->bw_ctl_llcc,
  187. __entry->bw_ctl_ebi,
  188. __entry->core_clk_rate,
  189. __entry->stop_req,
  190. __entry->update_bus,
  191. __entry->update_clk)
  192. );
  193. DECLARE_EVENT_CLASS(dpu_enc_irq_template,
  194. TP_PROTO(uint32_t drm_id, enum dpu_intr_idx intr_idx, int hw_idx,
  195. int irq_idx),
  196. TP_ARGS(drm_id, intr_idx, hw_idx, irq_idx),
  197. TP_STRUCT__entry(
  198. __field( uint32_t, drm_id )
  199. __field( enum dpu_intr_idx, intr_idx )
  200. __field( int, hw_idx )
  201. __field( int, irq_idx )
  202. ),
  203. TP_fast_assign(
  204. __entry->drm_id = drm_id;
  205. __entry->intr_idx = intr_idx;
  206. __entry->hw_idx = hw_idx;
  207. __entry->irq_idx = irq_idx;
  208. ),
  209. TP_printk("id=%u, intr=%d, hw=%d, irq=%d",
  210. __entry->drm_id, __entry->intr_idx, __entry->hw_idx,
  211. __entry->irq_idx)
  212. );
  213. DEFINE_EVENT(dpu_enc_irq_template, dpu_enc_irq_register_success,
  214. TP_PROTO(uint32_t drm_id, enum dpu_intr_idx intr_idx, int hw_idx,
  215. int irq_idx),
  216. TP_ARGS(drm_id, intr_idx, hw_idx, irq_idx)
  217. );
  218. DEFINE_EVENT(dpu_enc_irq_template, dpu_enc_irq_unregister_success,
  219. TP_PROTO(uint32_t drm_id, enum dpu_intr_idx intr_idx, int hw_idx,
  220. int irq_idx),
  221. TP_ARGS(drm_id, intr_idx, hw_idx, irq_idx)
  222. );
  223. TRACE_EVENT(dpu_enc_irq_wait_success,
  224. TP_PROTO(uint32_t drm_id, enum dpu_intr_idx intr_idx, int hw_idx,
  225. int irq_idx, enum dpu_pingpong pp_idx, int atomic_cnt),
  226. TP_ARGS(drm_id, intr_idx, hw_idx, irq_idx, pp_idx, atomic_cnt),
  227. TP_STRUCT__entry(
  228. __field( uint32_t, drm_id )
  229. __field( enum dpu_intr_idx, intr_idx )
  230. __field( int, hw_idx )
  231. __field( int, irq_idx )
  232. __field( enum dpu_pingpong, pp_idx )
  233. __field( int, atomic_cnt )
  234. ),
  235. TP_fast_assign(
  236. __entry->drm_id = drm_id;
  237. __entry->intr_idx = intr_idx;
  238. __entry->hw_idx = hw_idx;
  239. __entry->irq_idx = irq_idx;
  240. __entry->pp_idx = pp_idx;
  241. __entry->atomic_cnt = atomic_cnt;
  242. ),
  243. TP_printk("id=%u, intr=%d, hw=%d, irq=%d, pp=%d, atomic_cnt=%d",
  244. __entry->drm_id, __entry->intr_idx, __entry->hw_idx,
  245. __entry->irq_idx, __entry->pp_idx, __entry->atomic_cnt)
  246. );
  247. DECLARE_EVENT_CLASS(dpu_drm_obj_template,
  248. TP_PROTO(uint32_t drm_id),
  249. TP_ARGS(drm_id),
  250. TP_STRUCT__entry(
  251. __field( uint32_t, drm_id )
  252. ),
  253. TP_fast_assign(
  254. __entry->drm_id = drm_id;
  255. ),
  256. TP_printk("id=%u", __entry->drm_id)
  257. );
  258. DEFINE_EVENT(dpu_drm_obj_template, dpu_enc_atomic_check,
  259. TP_PROTO(uint32_t drm_id),
  260. TP_ARGS(drm_id)
  261. );
  262. DEFINE_EVENT(dpu_drm_obj_template, dpu_enc_mode_set,
  263. TP_PROTO(uint32_t drm_id),
  264. TP_ARGS(drm_id)
  265. );
  266. DEFINE_EVENT(dpu_drm_obj_template, dpu_enc_disable,
  267. TP_PROTO(uint32_t drm_id),
  268. TP_ARGS(drm_id)
  269. );
  270. DEFINE_EVENT(dpu_drm_obj_template, dpu_enc_kickoff,
  271. TP_PROTO(uint32_t drm_id),
  272. TP_ARGS(drm_id)
  273. );
  274. DEFINE_EVENT(dpu_drm_obj_template, dpu_enc_prepare_kickoff,
  275. TP_PROTO(uint32_t drm_id),
  276. TP_ARGS(drm_id)
  277. );
  278. DEFINE_EVENT(dpu_drm_obj_template, dpu_enc_prepare_kickoff_reset,
  279. TP_PROTO(uint32_t drm_id),
  280. TP_ARGS(drm_id)
  281. );
  282. DEFINE_EVENT(dpu_drm_obj_template, dpu_crtc_complete_flip,
  283. TP_PROTO(uint32_t drm_id),
  284. TP_ARGS(drm_id)
  285. );
  286. DEFINE_EVENT(dpu_drm_obj_template, dpu_crtc_vblank_cb,
  287. TP_PROTO(uint32_t drm_id),
  288. TP_ARGS(drm_id)
  289. );
  290. DEFINE_EVENT(dpu_drm_obj_template, dpu_crtc_complete_commit,
  291. TP_PROTO(uint32_t drm_id),
  292. TP_ARGS(drm_id)
  293. );
  294. DEFINE_EVENT(dpu_drm_obj_template, dpu_kms_enc_enable,
  295. TP_PROTO(uint32_t drm_id),
  296. TP_ARGS(drm_id)
  297. );
  298. DEFINE_EVENT(dpu_drm_obj_template, dpu_kms_commit,
  299. TP_PROTO(uint32_t drm_id),
  300. TP_ARGS(drm_id)
  301. );
  302. DEFINE_EVENT(dpu_drm_obj_template, dpu_kms_wait_for_commit_done,
  303. TP_PROTO(uint32_t drm_id),
  304. TP_ARGS(drm_id)
  305. );
  306. TRACE_EVENT(dpu_enc_enable,
  307. TP_PROTO(uint32_t drm_id, int hdisplay, int vdisplay),
  308. TP_ARGS(drm_id, hdisplay, vdisplay),
  309. TP_STRUCT__entry(
  310. __field( uint32_t, drm_id )
  311. __field( int, hdisplay )
  312. __field( int, vdisplay )
  313. ),
  314. TP_fast_assign(
  315. __entry->drm_id = drm_id;
  316. __entry->hdisplay = hdisplay;
  317. __entry->vdisplay = vdisplay;
  318. ),
  319. TP_printk("id=%u, mode=%dx%d",
  320. __entry->drm_id, __entry->hdisplay, __entry->vdisplay)
  321. );
  322. DECLARE_EVENT_CLASS(dpu_enc_keyval_template,
  323. TP_PROTO(uint32_t drm_id, int val),
  324. TP_ARGS(drm_id, val),
  325. TP_STRUCT__entry(
  326. __field( uint32_t, drm_id )
  327. __field( int, val )
  328. ),
  329. TP_fast_assign(
  330. __entry->drm_id = drm_id;
  331. __entry->val = val;
  332. ),
  333. TP_printk("id=%u, val=%d", __entry->drm_id, __entry->val)
  334. );
  335. DEFINE_EVENT(dpu_enc_keyval_template, dpu_enc_underrun_cb,
  336. TP_PROTO(uint32_t drm_id, int count),
  337. TP_ARGS(drm_id, count)
  338. );
  339. DEFINE_EVENT(dpu_enc_keyval_template, dpu_enc_trigger_start,
  340. TP_PROTO(uint32_t drm_id, int ctl_idx),
  341. TP_ARGS(drm_id, ctl_idx)
  342. );
  343. TRACE_EVENT(dpu_enc_atomic_check_flags,
  344. TP_PROTO(uint32_t drm_id, unsigned int flags, int private_flags),
  345. TP_ARGS(drm_id, flags, private_flags),
  346. TP_STRUCT__entry(
  347. __field( uint32_t, drm_id )
  348. __field( unsigned int, flags )
  349. __field( int, private_flags )
  350. ),
  351. TP_fast_assign(
  352. __entry->drm_id = drm_id;
  353. __entry->flags = flags;
  354. __entry->private_flags = private_flags;
  355. ),
  356. TP_printk("id=%u, flags=%u, private_flags=%d",
  357. __entry->drm_id, __entry->flags, __entry->private_flags)
  358. );
  359. DECLARE_EVENT_CLASS(dpu_enc_id_enable_template,
  360. TP_PROTO(uint32_t drm_id, bool enable),
  361. TP_ARGS(drm_id, enable),
  362. TP_STRUCT__entry(
  363. __field( uint32_t, drm_id )
  364. __field( bool, enable )
  365. ),
  366. TP_fast_assign(
  367. __entry->drm_id = drm_id;
  368. __entry->enable = enable;
  369. ),
  370. TP_printk("id=%u, enable=%s",
  371. __entry->drm_id, __entry->enable ? "true" : "false")
  372. );
  373. DEFINE_EVENT(dpu_enc_id_enable_template, dpu_enc_rc_helper,
  374. TP_PROTO(uint32_t drm_id, bool enable),
  375. TP_ARGS(drm_id, enable)
  376. );
  377. DEFINE_EVENT(dpu_enc_id_enable_template, dpu_enc_vblank_cb,
  378. TP_PROTO(uint32_t drm_id, bool enable),
  379. TP_ARGS(drm_id, enable)
  380. );
  381. DEFINE_EVENT(dpu_enc_id_enable_template, dpu_enc_frame_event_cb,
  382. TP_PROTO(uint32_t drm_id, bool enable),
  383. TP_ARGS(drm_id, enable)
  384. );
  385. DEFINE_EVENT(dpu_enc_id_enable_template, dpu_enc_phys_cmd_connect_te,
  386. TP_PROTO(uint32_t drm_id, bool enable),
  387. TP_ARGS(drm_id, enable)
  388. );
  389. TRACE_EVENT(dpu_enc_rc,
  390. TP_PROTO(uint32_t drm_id, u32 sw_event, bool idle_pc_supported,
  391. int rc_state, const char *stage),
  392. TP_ARGS(drm_id, sw_event, idle_pc_supported, rc_state, stage),
  393. TP_STRUCT__entry(
  394. __field( uint32_t, drm_id )
  395. __field( u32, sw_event )
  396. __field( bool, idle_pc_supported )
  397. __field( int, rc_state )
  398. __string( stage_str, stage )
  399. ),
  400. TP_fast_assign(
  401. __entry->drm_id = drm_id;
  402. __entry->sw_event = sw_event;
  403. __entry->idle_pc_supported = idle_pc_supported;
  404. __entry->rc_state = rc_state;
  405. __assign_str(stage_str, stage);
  406. ),
  407. TP_printk("%s: id:%u, sw_event:%d, idle_pc_supported:%s, rc_state:%d\n",
  408. __get_str(stage_str), __entry->drm_id, __entry->sw_event,
  409. __entry->idle_pc_supported ? "true" : "false",
  410. __entry->rc_state)
  411. );
  412. TRACE_EVENT(dpu_enc_frame_done_cb_not_busy,
  413. TP_PROTO(uint32_t drm_id, u32 event, enum dpu_intf intf_idx),
  414. TP_ARGS(drm_id, event, intf_idx),
  415. TP_STRUCT__entry(
  416. __field( uint32_t, drm_id )
  417. __field( u32, event )
  418. __field( enum dpu_intf, intf_idx )
  419. ),
  420. TP_fast_assign(
  421. __entry->drm_id = drm_id;
  422. __entry->event = event;
  423. __entry->intf_idx = intf_idx;
  424. ),
  425. TP_printk("id=%u, event=%u, intf=%d", __entry->drm_id, __entry->event,
  426. __entry->intf_idx)
  427. );
  428. TRACE_EVENT(dpu_enc_frame_done_cb,
  429. TP_PROTO(uint32_t drm_id, unsigned int idx,
  430. unsigned long frame_busy_mask),
  431. TP_ARGS(drm_id, idx, frame_busy_mask),
  432. TP_STRUCT__entry(
  433. __field( uint32_t, drm_id )
  434. __field( unsigned int, idx )
  435. __field( unsigned long, frame_busy_mask )
  436. ),
  437. TP_fast_assign(
  438. __entry->drm_id = drm_id;
  439. __entry->idx = idx;
  440. __entry->frame_busy_mask = frame_busy_mask;
  441. ),
  442. TP_printk("id=%u, idx=%u, frame_busy_mask=%lx", __entry->drm_id,
  443. __entry->idx, __entry->frame_busy_mask)
  444. );
  445. TRACE_EVENT(dpu_enc_trigger_flush,
  446. TP_PROTO(uint32_t drm_id, enum dpu_intf intf_idx,
  447. int pending_kickoff_cnt, int ctl_idx, u32 extra_flush_bits,
  448. u32 pending_flush_ret),
  449. TP_ARGS(drm_id, intf_idx, pending_kickoff_cnt, ctl_idx,
  450. extra_flush_bits, pending_flush_ret),
  451. TP_STRUCT__entry(
  452. __field( uint32_t, drm_id )
  453. __field( enum dpu_intf, intf_idx )
  454. __field( int, pending_kickoff_cnt )
  455. __field( int, ctl_idx )
  456. __field( u32, extra_flush_bits )
  457. __field( u32, pending_flush_ret )
  458. ),
  459. TP_fast_assign(
  460. __entry->drm_id = drm_id;
  461. __entry->intf_idx = intf_idx;
  462. __entry->pending_kickoff_cnt = pending_kickoff_cnt;
  463. __entry->ctl_idx = ctl_idx;
  464. __entry->extra_flush_bits = extra_flush_bits;
  465. __entry->pending_flush_ret = pending_flush_ret;
  466. ),
  467. TP_printk("id=%u, intf_idx=%d, pending_kickoff_cnt=%d ctl_idx=%d "
  468. "extra_flush_bits=0x%x pending_flush_ret=0x%x",
  469. __entry->drm_id, __entry->intf_idx,
  470. __entry->pending_kickoff_cnt, __entry->ctl_idx,
  471. __entry->extra_flush_bits, __entry->pending_flush_ret)
  472. );
  473. DECLARE_EVENT_CLASS(dpu_enc_ktime_template,
  474. TP_PROTO(uint32_t drm_id, ktime_t time),
  475. TP_ARGS(drm_id, time),
  476. TP_STRUCT__entry(
  477. __field( uint32_t, drm_id )
  478. __field( ktime_t, time )
  479. ),
  480. TP_fast_assign(
  481. __entry->drm_id = drm_id;
  482. __entry->time = time;
  483. ),
  484. TP_printk("id=%u, time=%lld", __entry->drm_id,
  485. ktime_to_ms(__entry->time))
  486. );
  487. DEFINE_EVENT(dpu_enc_ktime_template, dpu_enc_vsync_event_work,
  488. TP_PROTO(uint32_t drm_id, ktime_t time),
  489. TP_ARGS(drm_id, time)
  490. );
  491. DEFINE_EVENT(dpu_enc_ktime_template, dpu_enc_early_kickoff,
  492. TP_PROTO(uint32_t drm_id, ktime_t time),
  493. TP_ARGS(drm_id, time)
  494. );
  495. DECLARE_EVENT_CLASS(dpu_id_event_template,
  496. TP_PROTO(uint32_t drm_id, u32 event),
  497. TP_ARGS(drm_id, event),
  498. TP_STRUCT__entry(
  499. __field( uint32_t, drm_id )
  500. __field( u32, event )
  501. ),
  502. TP_fast_assign(
  503. __entry->drm_id = drm_id;
  504. __entry->event = event;
  505. ),
  506. TP_printk("id=%u, event=%u", __entry->drm_id, __entry->event)
  507. );
  508. DEFINE_EVENT(dpu_id_event_template, dpu_enc_frame_done_timeout,
  509. TP_PROTO(uint32_t drm_id, u32 event),
  510. TP_ARGS(drm_id, event)
  511. );
  512. DEFINE_EVENT(dpu_id_event_template, dpu_crtc_frame_event_cb,
  513. TP_PROTO(uint32_t drm_id, u32 event),
  514. TP_ARGS(drm_id, event)
  515. );
  516. DEFINE_EVENT(dpu_id_event_template, dpu_crtc_handle_power_event,
  517. TP_PROTO(uint32_t drm_id, u32 event),
  518. TP_ARGS(drm_id, event)
  519. );
  520. DEFINE_EVENT(dpu_id_event_template, dpu_crtc_frame_event_done,
  521. TP_PROTO(uint32_t drm_id, u32 event),
  522. TP_ARGS(drm_id, event)
  523. );
  524. DEFINE_EVENT(dpu_id_event_template, dpu_crtc_frame_event_more_pending,
  525. TP_PROTO(uint32_t drm_id, u32 event),
  526. TP_ARGS(drm_id, event)
  527. );
  528. TRACE_EVENT(dpu_enc_wait_event_timeout,
  529. TP_PROTO(uint32_t drm_id, int32_t hw_id, int rc, s64 time,
  530. s64 expected_time, int atomic_cnt),
  531. TP_ARGS(drm_id, hw_id, rc, time, expected_time, atomic_cnt),
  532. TP_STRUCT__entry(
  533. __field( uint32_t, drm_id )
  534. __field( int32_t, hw_id )
  535. __field( int, rc )
  536. __field( s64, time )
  537. __field( s64, expected_time )
  538. __field( int, atomic_cnt )
  539. ),
  540. TP_fast_assign(
  541. __entry->drm_id = drm_id;
  542. __entry->hw_id = hw_id;
  543. __entry->rc = rc;
  544. __entry->time = time;
  545. __entry->expected_time = expected_time;
  546. __entry->atomic_cnt = atomic_cnt;
  547. ),
  548. TP_printk("id=%u, hw_id=%d, rc=%d, time=%lld, expected=%lld cnt=%d",
  549. __entry->drm_id, __entry->hw_id, __entry->rc, __entry->time,
  550. __entry->expected_time, __entry->atomic_cnt)
  551. );
  552. TRACE_EVENT(dpu_enc_phys_cmd_irq_ctrl,
  553. TP_PROTO(uint32_t drm_id, enum dpu_pingpong pp, bool enable,
  554. int refcnt),
  555. TP_ARGS(drm_id, pp, enable, refcnt),
  556. TP_STRUCT__entry(
  557. __field( uint32_t, drm_id )
  558. __field( enum dpu_pingpong, pp )
  559. __field( bool, enable )
  560. __field( int, refcnt )
  561. ),
  562. TP_fast_assign(
  563. __entry->drm_id = drm_id;
  564. __entry->pp = pp;
  565. __entry->enable = enable;
  566. __entry->refcnt = refcnt;
  567. ),
  568. TP_printk("id=%u, pp=%d, enable=%s, refcnt=%d", __entry->drm_id,
  569. __entry->pp, __entry->enable ? "true" : "false",
  570. __entry->refcnt)
  571. );
  572. TRACE_EVENT(dpu_enc_phys_cmd_pp_tx_done,
  573. TP_PROTO(uint32_t drm_id, enum dpu_pingpong pp, int new_count,
  574. u32 event),
  575. TP_ARGS(drm_id, pp, new_count, event),
  576. TP_STRUCT__entry(
  577. __field( uint32_t, drm_id )
  578. __field( enum dpu_pingpong, pp )
  579. __field( int, new_count )
  580. __field( u32, event )
  581. ),
  582. TP_fast_assign(
  583. __entry->drm_id = drm_id;
  584. __entry->pp = pp;
  585. __entry->new_count = new_count;
  586. __entry->event = event;
  587. ),
  588. TP_printk("id=%u, pp=%d, new_count=%d, event=%u", __entry->drm_id,
  589. __entry->pp, __entry->new_count, __entry->event)
  590. );
  591. TRACE_EVENT(dpu_enc_phys_cmd_pdone_timeout,
  592. TP_PROTO(uint32_t drm_id, enum dpu_pingpong pp, int timeout_count,
  593. int kickoff_count, u32 event),
  594. TP_ARGS(drm_id, pp, timeout_count, kickoff_count, event),
  595. TP_STRUCT__entry(
  596. __field( uint32_t, drm_id )
  597. __field( enum dpu_pingpong, pp )
  598. __field( int, timeout_count )
  599. __field( int, kickoff_count )
  600. __field( u32, event )
  601. ),
  602. TP_fast_assign(
  603. __entry->drm_id = drm_id;
  604. __entry->pp = pp;
  605. __entry->timeout_count = timeout_count;
  606. __entry->kickoff_count = kickoff_count;
  607. __entry->event = event;
  608. ),
  609. TP_printk("id=%u, pp=%d, timeout_count=%d, kickoff_count=%d, event=%u",
  610. __entry->drm_id, __entry->pp, __entry->timeout_count,
  611. __entry->kickoff_count, __entry->event)
  612. );
  613. TRACE_EVENT(dpu_enc_phys_vid_post_kickoff,
  614. TP_PROTO(uint32_t drm_id, enum dpu_intf intf_idx),
  615. TP_ARGS(drm_id, intf_idx),
  616. TP_STRUCT__entry(
  617. __field( uint32_t, drm_id )
  618. __field( enum dpu_intf, intf_idx )
  619. ),
  620. TP_fast_assign(
  621. __entry->drm_id = drm_id;
  622. __entry->intf_idx = intf_idx;
  623. ),
  624. TP_printk("id=%u, intf_idx=%d", __entry->drm_id, __entry->intf_idx)
  625. );
  626. TRACE_EVENT(dpu_enc_phys_vid_irq_ctrl,
  627. TP_PROTO(uint32_t drm_id, enum dpu_intf intf_idx, bool enable,
  628. int refcnt),
  629. TP_ARGS(drm_id, intf_idx, enable, refcnt),
  630. TP_STRUCT__entry(
  631. __field( uint32_t, drm_id )
  632. __field( enum dpu_intf, intf_idx )
  633. __field( bool, enable )
  634. __field( int, refcnt )
  635. ),
  636. TP_fast_assign(
  637. __entry->drm_id = drm_id;
  638. __entry->intf_idx = intf_idx;
  639. __entry->enable = enable;
  640. __entry->refcnt = refcnt;
  641. ),
  642. TP_printk("id=%u, intf_idx=%d enable=%s refcnt=%d", __entry->drm_id,
  643. __entry->intf_idx, __entry->enable ? "true" : "false",
  644. __entry->drm_id)
  645. );
  646. TRACE_EVENT(dpu_crtc_setup_mixer,
  647. TP_PROTO(uint32_t crtc_id, uint32_t plane_id,
  648. struct drm_plane_state *state, struct dpu_plane_state *pstate,
  649. uint32_t stage_idx, enum dpu_sspp sspp, uint32_t pixel_format,
  650. uint64_t modifier),
  651. TP_ARGS(crtc_id, plane_id, state, pstate, stage_idx, sspp,
  652. pixel_format, modifier),
  653. TP_STRUCT__entry(
  654. __field( uint32_t, crtc_id )
  655. __field( uint32_t, plane_id )
  656. __field( uint32_t, fb_id )
  657. __field_struct( struct drm_rect, src_rect )
  658. __field_struct( struct drm_rect, dst_rect )
  659. __field( uint32_t, stage_idx )
  660. __field( enum dpu_stage, stage )
  661. __field( enum dpu_sspp, sspp )
  662. __field( uint32_t, multirect_idx )
  663. __field( uint32_t, multirect_mode )
  664. __field( uint32_t, pixel_format )
  665. __field( uint64_t, modifier )
  666. ),
  667. TP_fast_assign(
  668. __entry->crtc_id = crtc_id;
  669. __entry->plane_id = plane_id;
  670. __entry->fb_id = state ? state->fb->base.id : 0;
  671. __entry->src_rect = drm_plane_state_src(state);
  672. __entry->dst_rect = drm_plane_state_dest(state);
  673. __entry->stage_idx = stage_idx;
  674. __entry->stage = pstate->stage;
  675. __entry->sspp = sspp;
  676. __entry->multirect_idx = pstate->multirect_index;
  677. __entry->multirect_mode = pstate->multirect_mode;
  678. __entry->pixel_format = pixel_format;
  679. __entry->modifier = modifier;
  680. ),
  681. TP_printk("crtc_id:%u plane_id:%u fb_id:%u src:" DRM_RECT_FP_FMT
  682. " dst:" DRM_RECT_FMT " stage_idx:%u stage:%d, sspp:%d "
  683. "multirect_index:%d multirect_mode:%u pix_format:%u "
  684. "modifier:%llu",
  685. __entry->crtc_id, __entry->plane_id, __entry->fb_id,
  686. DRM_RECT_FP_ARG(&__entry->src_rect),
  687. DRM_RECT_ARG(&__entry->dst_rect),
  688. __entry->stage_idx, __entry->stage, __entry->sspp,
  689. __entry->multirect_idx, __entry->multirect_mode,
  690. __entry->pixel_format, __entry->modifier)
  691. );
  692. TRACE_EVENT(dpu_crtc_setup_lm_bounds,
  693. TP_PROTO(uint32_t drm_id, int mixer, struct drm_rect *bounds),
  694. TP_ARGS(drm_id, mixer, bounds),
  695. TP_STRUCT__entry(
  696. __field( uint32_t, drm_id )
  697. __field( int, mixer )
  698. __field_struct( struct drm_rect, bounds )
  699. ),
  700. TP_fast_assign(
  701. __entry->drm_id = drm_id;
  702. __entry->mixer = mixer;
  703. __entry->bounds = *bounds;
  704. ),
  705. TP_printk("id:%u mixer:%d bounds:" DRM_RECT_FMT, __entry->drm_id,
  706. __entry->mixer, DRM_RECT_ARG(&__entry->bounds))
  707. );
  708. TRACE_EVENT(dpu_crtc_vblank_enable,
  709. TP_PROTO(uint32_t drm_id, uint32_t enc_id, bool enable,
  710. struct dpu_crtc *crtc),
  711. TP_ARGS(drm_id, enc_id, enable, crtc),
  712. TP_STRUCT__entry(
  713. __field( uint32_t, drm_id )
  714. __field( uint32_t, enc_id )
  715. __field( bool, enable )
  716. __field( bool, enabled )
  717. __field( bool, suspend )
  718. __field( bool, vblank_requested )
  719. ),
  720. TP_fast_assign(
  721. __entry->drm_id = drm_id;
  722. __entry->enc_id = enc_id;
  723. __entry->enable = enable;
  724. __entry->enabled = crtc->enabled;
  725. __entry->suspend = crtc->suspend;
  726. __entry->vblank_requested = crtc->vblank_requested;
  727. ),
  728. TP_printk("id:%u encoder:%u enable:%s state{enabled:%s suspend:%s "
  729. "vblank_req:%s}",
  730. __entry->drm_id, __entry->enc_id,
  731. __entry->enable ? "true" : "false",
  732. __entry->enabled ? "true" : "false",
  733. __entry->suspend ? "true" : "false",
  734. __entry->vblank_requested ? "true" : "false")
  735. );
  736. DECLARE_EVENT_CLASS(dpu_crtc_enable_template,
  737. TP_PROTO(uint32_t drm_id, bool enable, struct dpu_crtc *crtc),
  738. TP_ARGS(drm_id, enable, crtc),
  739. TP_STRUCT__entry(
  740. __field( uint32_t, drm_id )
  741. __field( bool, enable )
  742. __field( bool, enabled )
  743. __field( bool, suspend )
  744. __field( bool, vblank_requested )
  745. ),
  746. TP_fast_assign(
  747. __entry->drm_id = drm_id;
  748. __entry->enable = enable;
  749. __entry->enabled = crtc->enabled;
  750. __entry->suspend = crtc->suspend;
  751. __entry->vblank_requested = crtc->vblank_requested;
  752. ),
  753. TP_printk("id:%u enable:%s state{enabled:%s suspend:%s vblank_req:%s}",
  754. __entry->drm_id, __entry->enable ? "true" : "false",
  755. __entry->enabled ? "true" : "false",
  756. __entry->suspend ? "true" : "false",
  757. __entry->vblank_requested ? "true" : "false")
  758. );
  759. DEFINE_EVENT(dpu_crtc_enable_template, dpu_crtc_set_suspend,
  760. TP_PROTO(uint32_t drm_id, bool enable, struct dpu_crtc *crtc),
  761. TP_ARGS(drm_id, enable, crtc)
  762. );
  763. DEFINE_EVENT(dpu_crtc_enable_template, dpu_crtc_enable,
  764. TP_PROTO(uint32_t drm_id, bool enable, struct dpu_crtc *crtc),
  765. TP_ARGS(drm_id, enable, crtc)
  766. );
  767. DEFINE_EVENT(dpu_crtc_enable_template, dpu_crtc_disable,
  768. TP_PROTO(uint32_t drm_id, bool enable, struct dpu_crtc *crtc),
  769. TP_ARGS(drm_id, enable, crtc)
  770. );
  771. DEFINE_EVENT(dpu_crtc_enable_template, dpu_crtc_vblank,
  772. TP_PROTO(uint32_t drm_id, bool enable, struct dpu_crtc *crtc),
  773. TP_ARGS(drm_id, enable, crtc)
  774. );
  775. TRACE_EVENT(dpu_crtc_disable_frame_pending,
  776. TP_PROTO(uint32_t drm_id, int frame_pending),
  777. TP_ARGS(drm_id, frame_pending),
  778. TP_STRUCT__entry(
  779. __field( uint32_t, drm_id )
  780. __field( int, frame_pending )
  781. ),
  782. TP_fast_assign(
  783. __entry->drm_id = drm_id;
  784. __entry->frame_pending = frame_pending;
  785. ),
  786. TP_printk("id:%u frame_pending:%d", __entry->drm_id,
  787. __entry->frame_pending)
  788. );
  789. TRACE_EVENT(dpu_plane_set_scanout,
  790. TP_PROTO(enum dpu_sspp index, struct dpu_hw_fmt_layout *layout,
  791. enum dpu_sspp_multirect_index multirect_index),
  792. TP_ARGS(index, layout, multirect_index),
  793. TP_STRUCT__entry(
  794. __field( enum dpu_sspp, index )
  795. __field_struct( struct dpu_hw_fmt_layout, layout )
  796. __field( enum dpu_sspp_multirect_index, multirect_index)
  797. ),
  798. TP_fast_assign(
  799. __entry->index = index;
  800. __entry->layout = *layout;
  801. __entry->multirect_index = multirect_index;
  802. ),
  803. TP_printk("index:%d layout:{%ux%u @ [%u/%u, %u/%u, %u/%u, %u/%u]} "
  804. "multirect_index:%d", __entry->index, __entry->layout.width,
  805. __entry->layout.height, __entry->layout.plane_addr[0],
  806. __entry->layout.plane_size[0],
  807. __entry->layout.plane_addr[1],
  808. __entry->layout.plane_size[1],
  809. __entry->layout.plane_addr[2],
  810. __entry->layout.plane_size[2],
  811. __entry->layout.plane_addr[3],
  812. __entry->layout.plane_size[3], __entry->multirect_index)
  813. );
  814. TRACE_EVENT(dpu_plane_disable,
  815. TP_PROTO(uint32_t drm_id, bool is_virtual, uint32_t multirect_mode),
  816. TP_ARGS(drm_id, is_virtual, multirect_mode),
  817. TP_STRUCT__entry(
  818. __field( uint32_t, drm_id )
  819. __field( bool, is_virtual )
  820. __field( uint32_t, multirect_mode )
  821. ),
  822. TP_fast_assign(
  823. __entry->drm_id = drm_id;
  824. __entry->is_virtual = is_virtual;
  825. __entry->multirect_mode = multirect_mode;
  826. ),
  827. TP_printk("id:%u is_virtual:%s multirect_mode:%u", __entry->drm_id,
  828. __entry->is_virtual ? "true" : "false",
  829. __entry->multirect_mode)
  830. );
  831. DECLARE_EVENT_CLASS(dpu_rm_iter_template,
  832. TP_PROTO(uint32_t id, enum dpu_hw_blk_type type, uint32_t enc_id),
  833. TP_ARGS(id, type, enc_id),
  834. TP_STRUCT__entry(
  835. __field( uint32_t, id )
  836. __field( enum dpu_hw_blk_type, type )
  837. __field( uint32_t, enc_id )
  838. ),
  839. TP_fast_assign(
  840. __entry->id = id;
  841. __entry->type = type;
  842. __entry->enc_id = enc_id;
  843. ),
  844. TP_printk("id:%d type:%d enc_id:%u", __entry->id, __entry->type,
  845. __entry->enc_id)
  846. );
  847. DEFINE_EVENT(dpu_rm_iter_template, dpu_rm_reserve_intf,
  848. TP_PROTO(uint32_t id, enum dpu_hw_blk_type type, uint32_t enc_id),
  849. TP_ARGS(id, type, enc_id)
  850. );
  851. DEFINE_EVENT(dpu_rm_iter_template, dpu_rm_reserve_ctls,
  852. TP_PROTO(uint32_t id, enum dpu_hw_blk_type type, uint32_t enc_id),
  853. TP_ARGS(id, type, enc_id)
  854. );
  855. TRACE_EVENT(dpu_rm_reserve_lms,
  856. TP_PROTO(uint32_t id, enum dpu_hw_blk_type type, uint32_t enc_id,
  857. uint32_t pp_id),
  858. TP_ARGS(id, type, enc_id, pp_id),
  859. TP_STRUCT__entry(
  860. __field( uint32_t, id )
  861. __field( enum dpu_hw_blk_type, type )
  862. __field( uint32_t, enc_id )
  863. __field( uint32_t, pp_id )
  864. ),
  865. TP_fast_assign(
  866. __entry->id = id;
  867. __entry->type = type;
  868. __entry->enc_id = enc_id;
  869. __entry->pp_id = pp_id;
  870. ),
  871. TP_printk("id:%d type:%d enc_id:%u pp_id:%u", __entry->id,
  872. __entry->type, __entry->enc_id, __entry->pp_id)
  873. );
  874. TRACE_EVENT(dpu_vbif_wait_xin_halt_fail,
  875. TP_PROTO(enum dpu_vbif index, u32 xin_id),
  876. TP_ARGS(index, xin_id),
  877. TP_STRUCT__entry(
  878. __field( enum dpu_vbif, index )
  879. __field( u32, xin_id )
  880. ),
  881. TP_fast_assign(
  882. __entry->index = index;
  883. __entry->xin_id = xin_id;
  884. ),
  885. TP_printk("index:%d xin_id:%u", __entry->index, __entry->xin_id)
  886. );
  887. TRACE_EVENT(dpu_pp_connect_ext_te,
  888. TP_PROTO(enum dpu_pingpong pp, u32 cfg),
  889. TP_ARGS(pp, cfg),
  890. TP_STRUCT__entry(
  891. __field( enum dpu_pingpong, pp )
  892. __field( u32, cfg )
  893. ),
  894. TP_fast_assign(
  895. __entry->pp = pp;
  896. __entry->cfg = cfg;
  897. ),
  898. TP_printk("pp:%d cfg:%u", __entry->pp, __entry->cfg)
  899. );
  900. DECLARE_EVENT_CLASS(dpu_core_irq_idx_cnt_template,
  901. TP_PROTO(int irq_idx, int enable_count),
  902. TP_ARGS(irq_idx, enable_count),
  903. TP_STRUCT__entry(
  904. __field( int, irq_idx )
  905. __field( int, enable_count )
  906. ),
  907. TP_fast_assign(
  908. __entry->irq_idx = irq_idx;
  909. __entry->enable_count = enable_count;
  910. ),
  911. TP_printk("irq_idx:%d enable_count:%u", __entry->irq_idx,
  912. __entry->enable_count)
  913. );
  914. DEFINE_EVENT(dpu_core_irq_idx_cnt_template, dpu_core_irq_enable_idx,
  915. TP_PROTO(int irq_idx, int enable_count),
  916. TP_ARGS(irq_idx, enable_count)
  917. );
  918. DEFINE_EVENT(dpu_core_irq_idx_cnt_template, dpu_core_irq_disable_idx,
  919. TP_PROTO(int irq_idx, int enable_count),
  920. TP_ARGS(irq_idx, enable_count)
  921. );
  922. DECLARE_EVENT_CLASS(dpu_core_irq_callback_template,
  923. TP_PROTO(int irq_idx, struct dpu_irq_callback *callback),
  924. TP_ARGS(irq_idx, callback),
  925. TP_STRUCT__entry(
  926. __field( int, irq_idx )
  927. __field( struct dpu_irq_callback *, callback)
  928. ),
  929. TP_fast_assign(
  930. __entry->irq_idx = irq_idx;
  931. __entry->callback = callback;
  932. ),
  933. TP_printk("irq_idx:%d callback:%pK", __entry->irq_idx,
  934. __entry->callback)
  935. );
  936. DEFINE_EVENT(dpu_core_irq_callback_template, dpu_core_irq_register_callback,
  937. TP_PROTO(int irq_idx, struct dpu_irq_callback *callback),
  938. TP_ARGS(irq_idx, callback)
  939. );
  940. DEFINE_EVENT(dpu_core_irq_callback_template, dpu_core_irq_unregister_callback,
  941. TP_PROTO(int irq_idx, struct dpu_irq_callback *callback),
  942. TP_ARGS(irq_idx, callback)
  943. );
  944. TRACE_EVENT(dpu_core_perf_update_clk,
  945. TP_PROTO(struct drm_device *dev, bool stop_req, u64 clk_rate),
  946. TP_ARGS(dev, stop_req, clk_rate),
  947. TP_STRUCT__entry(
  948. __string( dev_name, dev->unique )
  949. __field( bool, stop_req )
  950. __field( u64, clk_rate )
  951. ),
  952. TP_fast_assign(
  953. __assign_str(dev_name, dev->unique);
  954. __entry->stop_req = stop_req;
  955. __entry->clk_rate = clk_rate;
  956. ),
  957. TP_printk("dev:%s stop_req:%s clk_rate:%llu", __get_str(dev_name),
  958. __entry->stop_req ? "true" : "false", __entry->clk_rate)
  959. );
  960. #define DPU_ATRACE_END(name) trace_tracing_mark_write(current->tgid, name, 0)
  961. #define DPU_ATRACE_BEGIN(name) trace_tracing_mark_write(current->tgid, name, 1)
  962. #define DPU_ATRACE_FUNC() DPU_ATRACE_BEGIN(__func__)
  963. #define DPU_ATRACE_INT(name, value) \
  964. trace_dpu_trace_counter(current->tgid, name, value)
  965. #endif /* _DPU_TRACE_H_ */
  966. /* This part must be outside protection */
  967. #undef TRACE_INCLUDE_PATH
  968. #define TRACE_INCLUDE_PATH .
  969. #include <trace/define_trace.h>