ipuv3-plane.c 23 KB

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  1. /*
  2. * i.MX IPUv3 DP Overlay Planes
  3. *
  4. * Copyright (C) 2013 Philipp Zabel, Pengutronix
  5. *
  6. * This program is free software; you can redistribute it and/or
  7. * modify it under the terms of the GNU General Public License
  8. * as published by the Free Software Foundation; either version 2
  9. * of the License, or (at your option) any later version.
  10. * This program is distributed in the hope that it will be useful,
  11. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  12. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  13. * GNU General Public License for more details.
  14. */
  15. #include <drm/drmP.h>
  16. #include <drm/drm_atomic.h>
  17. #include <drm/drm_atomic_helper.h>
  18. #include <drm/drm_fb_cma_helper.h>
  19. #include <drm/drm_gem_cma_helper.h>
  20. #include <drm/drm_gem_framebuffer_helper.h>
  21. #include <drm/drm_plane_helper.h>
  22. #include "video/imx-ipu-v3.h"
  23. #include "imx-drm.h"
  24. #include "ipuv3-plane.h"
  25. struct ipu_plane_state {
  26. struct drm_plane_state base;
  27. bool use_pre;
  28. };
  29. static inline struct ipu_plane_state *
  30. to_ipu_plane_state(struct drm_plane_state *p)
  31. {
  32. return container_of(p, struct ipu_plane_state, base);
  33. }
  34. static inline struct ipu_plane *to_ipu_plane(struct drm_plane *p)
  35. {
  36. return container_of(p, struct ipu_plane, base);
  37. }
  38. static const uint32_t ipu_plane_formats[] = {
  39. DRM_FORMAT_ARGB1555,
  40. DRM_FORMAT_XRGB1555,
  41. DRM_FORMAT_ABGR1555,
  42. DRM_FORMAT_XBGR1555,
  43. DRM_FORMAT_RGBA5551,
  44. DRM_FORMAT_BGRA5551,
  45. DRM_FORMAT_ARGB4444,
  46. DRM_FORMAT_ARGB8888,
  47. DRM_FORMAT_XRGB8888,
  48. DRM_FORMAT_ABGR8888,
  49. DRM_FORMAT_XBGR8888,
  50. DRM_FORMAT_RGBA8888,
  51. DRM_FORMAT_RGBX8888,
  52. DRM_FORMAT_BGRA8888,
  53. DRM_FORMAT_BGRX8888,
  54. DRM_FORMAT_UYVY,
  55. DRM_FORMAT_VYUY,
  56. DRM_FORMAT_YUYV,
  57. DRM_FORMAT_YVYU,
  58. DRM_FORMAT_YUV420,
  59. DRM_FORMAT_YVU420,
  60. DRM_FORMAT_YUV422,
  61. DRM_FORMAT_YVU422,
  62. DRM_FORMAT_YUV444,
  63. DRM_FORMAT_YVU444,
  64. DRM_FORMAT_NV12,
  65. DRM_FORMAT_NV16,
  66. DRM_FORMAT_RGB565,
  67. DRM_FORMAT_RGB565_A8,
  68. DRM_FORMAT_BGR565_A8,
  69. DRM_FORMAT_RGB888_A8,
  70. DRM_FORMAT_BGR888_A8,
  71. DRM_FORMAT_RGBX8888_A8,
  72. DRM_FORMAT_BGRX8888_A8,
  73. };
  74. static const uint64_t ipu_format_modifiers[] = {
  75. DRM_FORMAT_MOD_LINEAR,
  76. DRM_FORMAT_MOD_INVALID
  77. };
  78. static const uint64_t pre_format_modifiers[] = {
  79. DRM_FORMAT_MOD_LINEAR,
  80. DRM_FORMAT_MOD_VIVANTE_TILED,
  81. DRM_FORMAT_MOD_VIVANTE_SUPER_TILED,
  82. DRM_FORMAT_MOD_INVALID
  83. };
  84. int ipu_plane_irq(struct ipu_plane *ipu_plane)
  85. {
  86. return ipu_idmac_channel_irq(ipu_plane->ipu, ipu_plane->ipu_ch,
  87. IPU_IRQ_EOF);
  88. }
  89. static inline unsigned long
  90. drm_plane_state_to_eba(struct drm_plane_state *state, int plane)
  91. {
  92. struct drm_framebuffer *fb = state->fb;
  93. struct drm_gem_cma_object *cma_obj;
  94. int x = state->src.x1 >> 16;
  95. int y = state->src.y1 >> 16;
  96. cma_obj = drm_fb_cma_get_gem_obj(fb, plane);
  97. BUG_ON(!cma_obj);
  98. return cma_obj->paddr + fb->offsets[plane] + fb->pitches[plane] * y +
  99. fb->format->cpp[plane] * x;
  100. }
  101. static inline unsigned long
  102. drm_plane_state_to_ubo(struct drm_plane_state *state)
  103. {
  104. struct drm_framebuffer *fb = state->fb;
  105. struct drm_gem_cma_object *cma_obj;
  106. unsigned long eba = drm_plane_state_to_eba(state, 0);
  107. int x = state->src.x1 >> 16;
  108. int y = state->src.y1 >> 16;
  109. cma_obj = drm_fb_cma_get_gem_obj(fb, 1);
  110. BUG_ON(!cma_obj);
  111. x /= drm_format_horz_chroma_subsampling(fb->format->format);
  112. y /= drm_format_vert_chroma_subsampling(fb->format->format);
  113. return cma_obj->paddr + fb->offsets[1] + fb->pitches[1] * y +
  114. fb->format->cpp[1] * x - eba;
  115. }
  116. static inline unsigned long
  117. drm_plane_state_to_vbo(struct drm_plane_state *state)
  118. {
  119. struct drm_framebuffer *fb = state->fb;
  120. struct drm_gem_cma_object *cma_obj;
  121. unsigned long eba = drm_plane_state_to_eba(state, 0);
  122. int x = state->src.x1 >> 16;
  123. int y = state->src.y1 >> 16;
  124. cma_obj = drm_fb_cma_get_gem_obj(fb, 2);
  125. BUG_ON(!cma_obj);
  126. x /= drm_format_horz_chroma_subsampling(fb->format->format);
  127. y /= drm_format_vert_chroma_subsampling(fb->format->format);
  128. return cma_obj->paddr + fb->offsets[2] + fb->pitches[2] * y +
  129. fb->format->cpp[2] * x - eba;
  130. }
  131. void ipu_plane_put_resources(struct ipu_plane *ipu_plane)
  132. {
  133. if (!IS_ERR_OR_NULL(ipu_plane->dp))
  134. ipu_dp_put(ipu_plane->dp);
  135. if (!IS_ERR_OR_NULL(ipu_plane->dmfc))
  136. ipu_dmfc_put(ipu_plane->dmfc);
  137. if (!IS_ERR_OR_NULL(ipu_plane->ipu_ch))
  138. ipu_idmac_put(ipu_plane->ipu_ch);
  139. if (!IS_ERR_OR_NULL(ipu_plane->alpha_ch))
  140. ipu_idmac_put(ipu_plane->alpha_ch);
  141. }
  142. int ipu_plane_get_resources(struct ipu_plane *ipu_plane)
  143. {
  144. int ret;
  145. int alpha_ch;
  146. ipu_plane->ipu_ch = ipu_idmac_get(ipu_plane->ipu, ipu_plane->dma);
  147. if (IS_ERR(ipu_plane->ipu_ch)) {
  148. ret = PTR_ERR(ipu_plane->ipu_ch);
  149. DRM_ERROR("failed to get idmac channel: %d\n", ret);
  150. return ret;
  151. }
  152. alpha_ch = ipu_channel_alpha_channel(ipu_plane->dma);
  153. if (alpha_ch >= 0) {
  154. ipu_plane->alpha_ch = ipu_idmac_get(ipu_plane->ipu, alpha_ch);
  155. if (IS_ERR(ipu_plane->alpha_ch)) {
  156. ret = PTR_ERR(ipu_plane->alpha_ch);
  157. DRM_ERROR("failed to get alpha idmac channel %d: %d\n",
  158. alpha_ch, ret);
  159. return ret;
  160. }
  161. }
  162. ipu_plane->dmfc = ipu_dmfc_get(ipu_plane->ipu, ipu_plane->dma);
  163. if (IS_ERR(ipu_plane->dmfc)) {
  164. ret = PTR_ERR(ipu_plane->dmfc);
  165. DRM_ERROR("failed to get dmfc: ret %d\n", ret);
  166. goto err_out;
  167. }
  168. if (ipu_plane->dp_flow >= 0) {
  169. ipu_plane->dp = ipu_dp_get(ipu_plane->ipu, ipu_plane->dp_flow);
  170. if (IS_ERR(ipu_plane->dp)) {
  171. ret = PTR_ERR(ipu_plane->dp);
  172. DRM_ERROR("failed to get dp flow: %d\n", ret);
  173. goto err_out;
  174. }
  175. }
  176. return 0;
  177. err_out:
  178. ipu_plane_put_resources(ipu_plane);
  179. return ret;
  180. }
  181. static bool ipu_plane_separate_alpha(struct ipu_plane *ipu_plane)
  182. {
  183. switch (ipu_plane->base.state->fb->format->format) {
  184. case DRM_FORMAT_RGB565_A8:
  185. case DRM_FORMAT_BGR565_A8:
  186. case DRM_FORMAT_RGB888_A8:
  187. case DRM_FORMAT_BGR888_A8:
  188. case DRM_FORMAT_RGBX8888_A8:
  189. case DRM_FORMAT_BGRX8888_A8:
  190. return true;
  191. default:
  192. return false;
  193. }
  194. }
  195. static void ipu_plane_enable(struct ipu_plane *ipu_plane)
  196. {
  197. if (ipu_plane->dp)
  198. ipu_dp_enable(ipu_plane->ipu);
  199. ipu_dmfc_enable_channel(ipu_plane->dmfc);
  200. ipu_idmac_enable_channel(ipu_plane->ipu_ch);
  201. if (ipu_plane_separate_alpha(ipu_plane))
  202. ipu_idmac_enable_channel(ipu_plane->alpha_ch);
  203. if (ipu_plane->dp)
  204. ipu_dp_enable_channel(ipu_plane->dp);
  205. }
  206. void ipu_plane_disable(struct ipu_plane *ipu_plane, bool disable_dp_channel)
  207. {
  208. DRM_DEBUG_KMS("[%d] %s\n", __LINE__, __func__);
  209. ipu_idmac_wait_busy(ipu_plane->ipu_ch, 50);
  210. if (ipu_plane->dp && disable_dp_channel)
  211. ipu_dp_disable_channel(ipu_plane->dp, false);
  212. ipu_idmac_disable_channel(ipu_plane->ipu_ch);
  213. if (ipu_plane->alpha_ch)
  214. ipu_idmac_disable_channel(ipu_plane->alpha_ch);
  215. ipu_dmfc_disable_channel(ipu_plane->dmfc);
  216. if (ipu_plane->dp)
  217. ipu_dp_disable(ipu_plane->ipu);
  218. if (ipu_prg_present(ipu_plane->ipu))
  219. ipu_prg_channel_disable(ipu_plane->ipu_ch);
  220. }
  221. void ipu_plane_disable_deferred(struct drm_plane *plane)
  222. {
  223. struct ipu_plane *ipu_plane = to_ipu_plane(plane);
  224. if (ipu_plane->disabling) {
  225. ipu_plane->disabling = false;
  226. ipu_plane_disable(ipu_plane, false);
  227. }
  228. }
  229. EXPORT_SYMBOL_GPL(ipu_plane_disable_deferred);
  230. static void ipu_plane_destroy(struct drm_plane *plane)
  231. {
  232. struct ipu_plane *ipu_plane = to_ipu_plane(plane);
  233. DRM_DEBUG_KMS("[%d] %s\n", __LINE__, __func__);
  234. drm_plane_cleanup(plane);
  235. kfree(ipu_plane);
  236. }
  237. static void ipu_plane_state_reset(struct drm_plane *plane)
  238. {
  239. struct ipu_plane_state *ipu_state;
  240. if (plane->state) {
  241. ipu_state = to_ipu_plane_state(plane->state);
  242. __drm_atomic_helper_plane_destroy_state(plane->state);
  243. kfree(ipu_state);
  244. plane->state = NULL;
  245. }
  246. ipu_state = kzalloc(sizeof(*ipu_state), GFP_KERNEL);
  247. if (ipu_state)
  248. __drm_atomic_helper_plane_reset(plane, &ipu_state->base);
  249. }
  250. static struct drm_plane_state *
  251. ipu_plane_duplicate_state(struct drm_plane *plane)
  252. {
  253. struct ipu_plane_state *state;
  254. if (WARN_ON(!plane->state))
  255. return NULL;
  256. state = kmalloc(sizeof(*state), GFP_KERNEL);
  257. if (state)
  258. __drm_atomic_helper_plane_duplicate_state(plane, &state->base);
  259. return &state->base;
  260. }
  261. static void ipu_plane_destroy_state(struct drm_plane *plane,
  262. struct drm_plane_state *state)
  263. {
  264. struct ipu_plane_state *ipu_state = to_ipu_plane_state(state);
  265. __drm_atomic_helper_plane_destroy_state(state);
  266. kfree(ipu_state);
  267. }
  268. static bool ipu_plane_format_mod_supported(struct drm_plane *plane,
  269. uint32_t format, uint64_t modifier)
  270. {
  271. struct ipu_soc *ipu = to_ipu_plane(plane)->ipu;
  272. /* linear is supported for all planes and formats */
  273. if (modifier == DRM_FORMAT_MOD_LINEAR)
  274. return true;
  275. /* without a PRG there are no supported modifiers */
  276. if (!ipu_prg_present(ipu))
  277. return false;
  278. return ipu_prg_format_supported(ipu, format, modifier);
  279. }
  280. static const struct drm_plane_funcs ipu_plane_funcs = {
  281. .update_plane = drm_atomic_helper_update_plane,
  282. .disable_plane = drm_atomic_helper_disable_plane,
  283. .destroy = ipu_plane_destroy,
  284. .reset = ipu_plane_state_reset,
  285. .atomic_duplicate_state = ipu_plane_duplicate_state,
  286. .atomic_destroy_state = ipu_plane_destroy_state,
  287. .format_mod_supported = ipu_plane_format_mod_supported,
  288. };
  289. static int ipu_plane_atomic_check(struct drm_plane *plane,
  290. struct drm_plane_state *state)
  291. {
  292. struct drm_plane_state *old_state = plane->state;
  293. struct drm_crtc_state *crtc_state;
  294. struct device *dev = plane->dev->dev;
  295. struct drm_framebuffer *fb = state->fb;
  296. struct drm_framebuffer *old_fb = old_state->fb;
  297. unsigned long eba, ubo, vbo, old_ubo, old_vbo, alpha_eba;
  298. bool can_position = (plane->type == DRM_PLANE_TYPE_OVERLAY);
  299. int hsub, vsub;
  300. int ret;
  301. /* Ok to disable */
  302. if (!fb)
  303. return 0;
  304. if (!state->crtc)
  305. return -EINVAL;
  306. crtc_state =
  307. drm_atomic_get_existing_crtc_state(state->state, state->crtc);
  308. if (WARN_ON(!crtc_state))
  309. return -EINVAL;
  310. ret = drm_atomic_helper_check_plane_state(state, crtc_state,
  311. DRM_PLANE_HELPER_NO_SCALING,
  312. DRM_PLANE_HELPER_NO_SCALING,
  313. can_position, true);
  314. if (ret)
  315. return ret;
  316. /* CRTC should be enabled */
  317. if (!crtc_state->enable)
  318. return -EINVAL;
  319. switch (plane->type) {
  320. case DRM_PLANE_TYPE_PRIMARY:
  321. /* full plane minimum width is 13 pixels */
  322. if (drm_rect_width(&state->dst) < 13)
  323. return -EINVAL;
  324. break;
  325. case DRM_PLANE_TYPE_OVERLAY:
  326. break;
  327. default:
  328. dev_warn(dev, "Unsupported plane type %d\n", plane->type);
  329. return -EINVAL;
  330. }
  331. if (drm_rect_height(&state->dst) < 2)
  332. return -EINVAL;
  333. /*
  334. * We support resizing active plane or changing its format by
  335. * forcing CRTC mode change in plane's ->atomic_check callback
  336. * and disabling all affected active planes in CRTC's ->atomic_disable
  337. * callback. The planes will be reenabled in plane's ->atomic_update
  338. * callback.
  339. */
  340. if (old_fb &&
  341. (drm_rect_width(&state->dst) != drm_rect_width(&old_state->dst) ||
  342. drm_rect_height(&state->dst) != drm_rect_height(&old_state->dst) ||
  343. fb->format != old_fb->format))
  344. crtc_state->mode_changed = true;
  345. eba = drm_plane_state_to_eba(state, 0);
  346. if (eba & 0x7)
  347. return -EINVAL;
  348. if (fb->pitches[0] < 1 || fb->pitches[0] > 16384)
  349. return -EINVAL;
  350. if (old_fb && fb->pitches[0] != old_fb->pitches[0])
  351. crtc_state->mode_changed = true;
  352. switch (fb->format->format) {
  353. case DRM_FORMAT_YUV420:
  354. case DRM_FORMAT_YVU420:
  355. case DRM_FORMAT_YUV422:
  356. case DRM_FORMAT_YVU422:
  357. case DRM_FORMAT_YUV444:
  358. case DRM_FORMAT_YVU444:
  359. /*
  360. * Multiplanar formats have to meet the following restrictions:
  361. * - The (up to) three plane addresses are EBA, EBA+UBO, EBA+VBO
  362. * - EBA, UBO and VBO are a multiple of 8
  363. * - UBO and VBO are unsigned and not larger than 0xfffff8
  364. * - Only EBA may be changed while scanout is active
  365. * - The strides of U and V planes must be identical.
  366. */
  367. vbo = drm_plane_state_to_vbo(state);
  368. if (vbo & 0x7 || vbo > 0xfffff8)
  369. return -EINVAL;
  370. if (old_fb && (fb->format == old_fb->format)) {
  371. old_vbo = drm_plane_state_to_vbo(old_state);
  372. if (vbo != old_vbo)
  373. crtc_state->mode_changed = true;
  374. }
  375. if (fb->pitches[1] != fb->pitches[2])
  376. return -EINVAL;
  377. /* fall-through */
  378. case DRM_FORMAT_NV12:
  379. case DRM_FORMAT_NV16:
  380. ubo = drm_plane_state_to_ubo(state);
  381. if (ubo & 0x7 || ubo > 0xfffff8)
  382. return -EINVAL;
  383. if (old_fb && (fb->format == old_fb->format)) {
  384. old_ubo = drm_plane_state_to_ubo(old_state);
  385. if (ubo != old_ubo)
  386. crtc_state->mode_changed = true;
  387. }
  388. if (fb->pitches[1] < 1 || fb->pitches[1] > 16384)
  389. return -EINVAL;
  390. if (old_fb && old_fb->pitches[1] != fb->pitches[1])
  391. crtc_state->mode_changed = true;
  392. /*
  393. * The x/y offsets must be even in case of horizontal/vertical
  394. * chroma subsampling.
  395. */
  396. hsub = drm_format_horz_chroma_subsampling(fb->format->format);
  397. vsub = drm_format_vert_chroma_subsampling(fb->format->format);
  398. if (((state->src.x1 >> 16) & (hsub - 1)) ||
  399. ((state->src.y1 >> 16) & (vsub - 1)))
  400. return -EINVAL;
  401. break;
  402. case DRM_FORMAT_RGB565_A8:
  403. case DRM_FORMAT_BGR565_A8:
  404. case DRM_FORMAT_RGB888_A8:
  405. case DRM_FORMAT_BGR888_A8:
  406. case DRM_FORMAT_RGBX8888_A8:
  407. case DRM_FORMAT_BGRX8888_A8:
  408. alpha_eba = drm_plane_state_to_eba(state, 1);
  409. if (alpha_eba & 0x7)
  410. return -EINVAL;
  411. if (fb->pitches[1] < 1 || fb->pitches[1] > 16384)
  412. return -EINVAL;
  413. if (old_fb && old_fb->pitches[1] != fb->pitches[1])
  414. crtc_state->mode_changed = true;
  415. break;
  416. }
  417. return 0;
  418. }
  419. static void ipu_plane_atomic_disable(struct drm_plane *plane,
  420. struct drm_plane_state *old_state)
  421. {
  422. struct ipu_plane *ipu_plane = to_ipu_plane(plane);
  423. if (ipu_plane->dp)
  424. ipu_dp_disable_channel(ipu_plane->dp, true);
  425. ipu_plane->disabling = true;
  426. }
  427. static int ipu_chan_assign_axi_id(int ipu_chan)
  428. {
  429. switch (ipu_chan) {
  430. case IPUV3_CHANNEL_MEM_BG_SYNC:
  431. return 1;
  432. case IPUV3_CHANNEL_MEM_FG_SYNC:
  433. return 2;
  434. case IPUV3_CHANNEL_MEM_DC_SYNC:
  435. return 3;
  436. default:
  437. return 0;
  438. }
  439. }
  440. static void ipu_calculate_bursts(u32 width, u32 cpp, u32 stride,
  441. u8 *burstsize, u8 *num_bursts)
  442. {
  443. const unsigned int width_bytes = width * cpp;
  444. unsigned int npb, bursts;
  445. /* Maximum number of pixels per burst without overshooting stride */
  446. for (npb = 64 / cpp; npb > 0; --npb) {
  447. if (round_up(width_bytes, npb * cpp) <= stride)
  448. break;
  449. }
  450. *burstsize = npb;
  451. /* Maximum number of consecutive bursts without overshooting stride */
  452. for (bursts = 8; bursts > 1; bursts /= 2) {
  453. if (round_up(width_bytes, npb * cpp * bursts) <= stride)
  454. break;
  455. }
  456. *num_bursts = bursts;
  457. }
  458. static void ipu_plane_atomic_update(struct drm_plane *plane,
  459. struct drm_plane_state *old_state)
  460. {
  461. struct ipu_plane *ipu_plane = to_ipu_plane(plane);
  462. struct drm_plane_state *state = plane->state;
  463. struct ipu_plane_state *ipu_state = to_ipu_plane_state(state);
  464. struct drm_crtc_state *crtc_state = state->crtc->state;
  465. struct drm_framebuffer *fb = state->fb;
  466. struct drm_rect *dst = &state->dst;
  467. unsigned long eba, ubo, vbo;
  468. unsigned long alpha_eba = 0;
  469. enum ipu_color_space ics;
  470. unsigned int axi_id = 0;
  471. const struct drm_format_info *info;
  472. u8 burstsize, num_bursts;
  473. u32 width, height;
  474. int active;
  475. if (ipu_plane->dp_flow == IPU_DP_FLOW_SYNC_FG)
  476. ipu_dp_set_window_pos(ipu_plane->dp, dst->x1, dst->y1);
  477. eba = drm_plane_state_to_eba(state, 0);
  478. /*
  479. * Configure PRG channel and attached PRE, this changes the EBA to an
  480. * internal SRAM location.
  481. */
  482. if (ipu_state->use_pre) {
  483. axi_id = ipu_chan_assign_axi_id(ipu_plane->dma);
  484. ipu_prg_channel_configure(ipu_plane->ipu_ch, axi_id,
  485. drm_rect_width(&state->src) >> 16,
  486. drm_rect_height(&state->src) >> 16,
  487. fb->pitches[0], fb->format->format,
  488. fb->modifier, &eba);
  489. }
  490. if (old_state->fb && !drm_atomic_crtc_needs_modeset(crtc_state)) {
  491. /* nothing to do if PRE is used */
  492. if (ipu_state->use_pre)
  493. return;
  494. active = ipu_idmac_get_current_buffer(ipu_plane->ipu_ch);
  495. ipu_cpmem_set_buffer(ipu_plane->ipu_ch, !active, eba);
  496. ipu_idmac_select_buffer(ipu_plane->ipu_ch, !active);
  497. if (ipu_plane_separate_alpha(ipu_plane)) {
  498. active = ipu_idmac_get_current_buffer(ipu_plane->alpha_ch);
  499. ipu_cpmem_set_buffer(ipu_plane->alpha_ch, !active,
  500. alpha_eba);
  501. ipu_idmac_select_buffer(ipu_plane->alpha_ch, !active);
  502. }
  503. return;
  504. }
  505. ics = ipu_drm_fourcc_to_colorspace(fb->format->format);
  506. switch (ipu_plane->dp_flow) {
  507. case IPU_DP_FLOW_SYNC_BG:
  508. ipu_dp_setup_channel(ipu_plane->dp, ics, IPUV3_COLORSPACE_RGB);
  509. ipu_dp_set_global_alpha(ipu_plane->dp, true, 0, true);
  510. break;
  511. case IPU_DP_FLOW_SYNC_FG:
  512. ipu_dp_setup_channel(ipu_plane->dp, ics,
  513. IPUV3_COLORSPACE_UNKNOWN);
  514. /* Enable local alpha on partial plane */
  515. switch (fb->format->format) {
  516. case DRM_FORMAT_ARGB1555:
  517. case DRM_FORMAT_ABGR1555:
  518. case DRM_FORMAT_RGBA5551:
  519. case DRM_FORMAT_BGRA5551:
  520. case DRM_FORMAT_ARGB4444:
  521. case DRM_FORMAT_ARGB8888:
  522. case DRM_FORMAT_ABGR8888:
  523. case DRM_FORMAT_RGBA8888:
  524. case DRM_FORMAT_BGRA8888:
  525. case DRM_FORMAT_RGB565_A8:
  526. case DRM_FORMAT_BGR565_A8:
  527. case DRM_FORMAT_RGB888_A8:
  528. case DRM_FORMAT_BGR888_A8:
  529. case DRM_FORMAT_RGBX8888_A8:
  530. case DRM_FORMAT_BGRX8888_A8:
  531. ipu_dp_set_global_alpha(ipu_plane->dp, false, 0, false);
  532. break;
  533. default:
  534. ipu_dp_set_global_alpha(ipu_plane->dp, true, 0, true);
  535. break;
  536. }
  537. }
  538. ipu_dmfc_config_wait4eot(ipu_plane->dmfc, drm_rect_width(dst));
  539. width = drm_rect_width(&state->src) >> 16;
  540. height = drm_rect_height(&state->src) >> 16;
  541. info = drm_format_info(fb->format->format);
  542. ipu_calculate_bursts(width, info->cpp[0], fb->pitches[0],
  543. &burstsize, &num_bursts);
  544. ipu_cpmem_zero(ipu_plane->ipu_ch);
  545. ipu_cpmem_set_resolution(ipu_plane->ipu_ch, width, height);
  546. ipu_cpmem_set_fmt(ipu_plane->ipu_ch, fb->format->format);
  547. ipu_cpmem_set_burstsize(ipu_plane->ipu_ch, burstsize);
  548. ipu_cpmem_set_high_priority(ipu_plane->ipu_ch);
  549. ipu_idmac_set_double_buffer(ipu_plane->ipu_ch, 1);
  550. ipu_cpmem_set_stride(ipu_plane->ipu_ch, fb->pitches[0]);
  551. ipu_cpmem_set_axi_id(ipu_plane->ipu_ch, axi_id);
  552. switch (fb->format->format) {
  553. case DRM_FORMAT_YUV420:
  554. case DRM_FORMAT_YVU420:
  555. case DRM_FORMAT_YUV422:
  556. case DRM_FORMAT_YVU422:
  557. case DRM_FORMAT_YUV444:
  558. case DRM_FORMAT_YVU444:
  559. ubo = drm_plane_state_to_ubo(state);
  560. vbo = drm_plane_state_to_vbo(state);
  561. if (fb->format->format == DRM_FORMAT_YVU420 ||
  562. fb->format->format == DRM_FORMAT_YVU422 ||
  563. fb->format->format == DRM_FORMAT_YVU444)
  564. swap(ubo, vbo);
  565. ipu_cpmem_set_yuv_planar_full(ipu_plane->ipu_ch,
  566. fb->pitches[1], ubo, vbo);
  567. dev_dbg(ipu_plane->base.dev->dev,
  568. "phy = %lu %lu %lu, x = %d, y = %d", eba, ubo, vbo,
  569. state->src.x1 >> 16, state->src.y1 >> 16);
  570. break;
  571. case DRM_FORMAT_NV12:
  572. case DRM_FORMAT_NV16:
  573. ubo = drm_plane_state_to_ubo(state);
  574. ipu_cpmem_set_yuv_planar_full(ipu_plane->ipu_ch,
  575. fb->pitches[1], ubo, ubo);
  576. dev_dbg(ipu_plane->base.dev->dev,
  577. "phy = %lu %lu, x = %d, y = %d", eba, ubo,
  578. state->src.x1 >> 16, state->src.y1 >> 16);
  579. break;
  580. case DRM_FORMAT_RGB565_A8:
  581. case DRM_FORMAT_BGR565_A8:
  582. case DRM_FORMAT_RGB888_A8:
  583. case DRM_FORMAT_BGR888_A8:
  584. case DRM_FORMAT_RGBX8888_A8:
  585. case DRM_FORMAT_BGRX8888_A8:
  586. alpha_eba = drm_plane_state_to_eba(state, 1);
  587. num_bursts = 0;
  588. dev_dbg(ipu_plane->base.dev->dev, "phys = %lu %lu, x = %d, y = %d",
  589. eba, alpha_eba, state->src.x1 >> 16, state->src.y1 >> 16);
  590. ipu_cpmem_set_burstsize(ipu_plane->ipu_ch, 16);
  591. ipu_cpmem_zero(ipu_plane->alpha_ch);
  592. ipu_cpmem_set_resolution(ipu_plane->alpha_ch,
  593. drm_rect_width(&state->src) >> 16,
  594. drm_rect_height(&state->src) >> 16);
  595. ipu_cpmem_set_format_passthrough(ipu_plane->alpha_ch, 8);
  596. ipu_cpmem_set_high_priority(ipu_plane->alpha_ch);
  597. ipu_idmac_set_double_buffer(ipu_plane->alpha_ch, 1);
  598. ipu_cpmem_set_stride(ipu_plane->alpha_ch, fb->pitches[1]);
  599. ipu_cpmem_set_burstsize(ipu_plane->alpha_ch, 16);
  600. ipu_cpmem_set_buffer(ipu_plane->alpha_ch, 0, alpha_eba);
  601. ipu_cpmem_set_buffer(ipu_plane->alpha_ch, 1, alpha_eba);
  602. break;
  603. default:
  604. dev_dbg(ipu_plane->base.dev->dev, "phys = %lu, x = %d, y = %d",
  605. eba, state->src.x1 >> 16, state->src.y1 >> 16);
  606. break;
  607. }
  608. ipu_cpmem_set_buffer(ipu_plane->ipu_ch, 0, eba);
  609. ipu_cpmem_set_buffer(ipu_plane->ipu_ch, 1, eba);
  610. ipu_idmac_lock_enable(ipu_plane->ipu_ch, num_bursts);
  611. ipu_plane_enable(ipu_plane);
  612. }
  613. static const struct drm_plane_helper_funcs ipu_plane_helper_funcs = {
  614. .prepare_fb = drm_gem_fb_prepare_fb,
  615. .atomic_check = ipu_plane_atomic_check,
  616. .atomic_disable = ipu_plane_atomic_disable,
  617. .atomic_update = ipu_plane_atomic_update,
  618. };
  619. int ipu_planes_assign_pre(struct drm_device *dev,
  620. struct drm_atomic_state *state)
  621. {
  622. struct drm_crtc_state *old_crtc_state, *crtc_state;
  623. struct drm_plane_state *plane_state;
  624. struct ipu_plane_state *ipu_state;
  625. struct ipu_plane *ipu_plane;
  626. struct drm_plane *plane;
  627. struct drm_crtc *crtc;
  628. int available_pres = ipu_prg_max_active_channels();
  629. int ret, i;
  630. for_each_oldnew_crtc_in_state(state, crtc, old_crtc_state, crtc_state, i) {
  631. ret = drm_atomic_add_affected_planes(state, crtc);
  632. if (ret)
  633. return ret;
  634. }
  635. /*
  636. * We are going over the planes in 2 passes: first we assign PREs to
  637. * planes with a tiling modifier, which need the PREs to resolve into
  638. * linear. Any failure to assign a PRE there is fatal. In the second
  639. * pass we try to assign PREs to linear FBs, to improve memory access
  640. * patterns for them. Failure at this point is non-fatal, as we can
  641. * scan out linear FBs without a PRE.
  642. */
  643. for_each_new_plane_in_state(state, plane, plane_state, i) {
  644. ipu_state = to_ipu_plane_state(plane_state);
  645. ipu_plane = to_ipu_plane(plane);
  646. if (!plane_state->fb) {
  647. ipu_state->use_pre = false;
  648. continue;
  649. }
  650. if (!(plane_state->fb->flags & DRM_MODE_FB_MODIFIERS) ||
  651. plane_state->fb->modifier == DRM_FORMAT_MOD_LINEAR)
  652. continue;
  653. if (!ipu_prg_present(ipu_plane->ipu) || !available_pres)
  654. return -EINVAL;
  655. if (!ipu_prg_format_supported(ipu_plane->ipu,
  656. plane_state->fb->format->format,
  657. plane_state->fb->modifier))
  658. return -EINVAL;
  659. ipu_state->use_pre = true;
  660. available_pres--;
  661. }
  662. for_each_new_plane_in_state(state, plane, plane_state, i) {
  663. ipu_state = to_ipu_plane_state(plane_state);
  664. ipu_plane = to_ipu_plane(plane);
  665. if (!plane_state->fb) {
  666. ipu_state->use_pre = false;
  667. continue;
  668. }
  669. if ((plane_state->fb->flags & DRM_MODE_FB_MODIFIERS) &&
  670. plane_state->fb->modifier != DRM_FORMAT_MOD_LINEAR)
  671. continue;
  672. /* make sure that modifier is initialized */
  673. plane_state->fb->modifier = DRM_FORMAT_MOD_LINEAR;
  674. if (ipu_prg_present(ipu_plane->ipu) && available_pres &&
  675. ipu_prg_format_supported(ipu_plane->ipu,
  676. plane_state->fb->format->format,
  677. plane_state->fb->modifier)) {
  678. ipu_state->use_pre = true;
  679. available_pres--;
  680. } else {
  681. ipu_state->use_pre = false;
  682. }
  683. }
  684. return 0;
  685. }
  686. EXPORT_SYMBOL_GPL(ipu_planes_assign_pre);
  687. struct ipu_plane *ipu_plane_init(struct drm_device *dev, struct ipu_soc *ipu,
  688. int dma, int dp, unsigned int possible_crtcs,
  689. enum drm_plane_type type)
  690. {
  691. struct ipu_plane *ipu_plane;
  692. const uint64_t *modifiers = ipu_format_modifiers;
  693. int ret;
  694. DRM_DEBUG_KMS("channel %d, dp flow %d, possible_crtcs=0x%x\n",
  695. dma, dp, possible_crtcs);
  696. ipu_plane = kzalloc(sizeof(*ipu_plane), GFP_KERNEL);
  697. if (!ipu_plane) {
  698. DRM_ERROR("failed to allocate plane\n");
  699. return ERR_PTR(-ENOMEM);
  700. }
  701. ipu_plane->ipu = ipu;
  702. ipu_plane->dma = dma;
  703. ipu_plane->dp_flow = dp;
  704. if (ipu_prg_present(ipu))
  705. modifiers = pre_format_modifiers;
  706. ret = drm_universal_plane_init(dev, &ipu_plane->base, possible_crtcs,
  707. &ipu_plane_funcs, ipu_plane_formats,
  708. ARRAY_SIZE(ipu_plane_formats),
  709. modifiers, type, NULL);
  710. if (ret) {
  711. DRM_ERROR("failed to initialize plane\n");
  712. kfree(ipu_plane);
  713. return ERR_PTR(ret);
  714. }
  715. drm_plane_helper_add(&ipu_plane->base, &ipu_plane_helper_funcs);
  716. return ipu_plane;
  717. }