intel_panel.c 59 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764765766767768769770771772773774775776777778779780781782783784785786787788789790791792793794795796797798799800801802803804805806807808809810811812813814815816817818819820821822823824825826827828829830831832833834835836837838839840841842843844845846847848849850851852853854855856857858859860861862863864865866867868869870871872873874875876877878879880881882883884885886887888889890891892893894895896897898899900901902903904905906907908909910911912913914915916917918919920921922923924925926927928929930931932933934935936937938939940941942943944945946947948949950951952953954955956957958959960961962963964965966967968969970971972973974975976977978979980981982983984985986987988989990991992993994995996997998999100010011002100310041005100610071008100910101011101210131014101510161017101810191020102110221023102410251026102710281029103010311032103310341035103610371038103910401041104210431044104510461047104810491050105110521053105410551056105710581059106010611062106310641065106610671068106910701071107210731074107510761077107810791080108110821083108410851086108710881089109010911092109310941095109610971098109911001101110211031104110511061107110811091110111111121113111411151116111711181119112011211122112311241125112611271128112911301131113211331134113511361137113811391140114111421143114411451146114711481149115011511152115311541155115611571158115911601161116211631164116511661167116811691170117111721173117411751176117711781179118011811182118311841185118611871188118911901191119211931194119511961197119811991200120112021203120412051206120712081209121012111212121312141215121612171218121912201221122212231224122512261227122812291230123112321233123412351236123712381239124012411242124312441245124612471248124912501251125212531254125512561257125812591260126112621263126412651266126712681269127012711272127312741275127612771278127912801281128212831284128512861287128812891290129112921293129412951296129712981299130013011302130313041305130613071308130913101311131213131314131513161317131813191320132113221323132413251326132713281329133013311332133313341335133613371338133913401341134213431344134513461347134813491350135113521353135413551356135713581359136013611362136313641365136613671368136913701371137213731374137513761377137813791380138113821383138413851386138713881389139013911392139313941395139613971398139914001401140214031404140514061407140814091410141114121413141414151416141714181419142014211422142314241425142614271428142914301431143214331434143514361437143814391440144114421443144414451446144714481449145014511452145314541455145614571458145914601461146214631464146514661467146814691470147114721473147414751476147714781479148014811482148314841485148614871488148914901491149214931494149514961497149814991500150115021503150415051506150715081509151015111512151315141515151615171518151915201521152215231524152515261527152815291530153115321533153415351536153715381539154015411542154315441545154615471548154915501551155215531554155515561557155815591560156115621563156415651566156715681569157015711572157315741575157615771578157915801581158215831584158515861587158815891590159115921593159415951596159715981599160016011602160316041605160616071608160916101611161216131614161516161617161816191620162116221623162416251626162716281629163016311632163316341635163616371638163916401641164216431644164516461647164816491650165116521653165416551656165716581659166016611662166316641665166616671668166916701671167216731674167516761677167816791680168116821683168416851686168716881689169016911692169316941695169616971698169917001701170217031704170517061707170817091710171117121713171417151716171717181719172017211722172317241725172617271728172917301731173217331734173517361737173817391740174117421743174417451746174717481749175017511752175317541755175617571758175917601761176217631764176517661767176817691770177117721773177417751776177717781779178017811782178317841785178617871788178917901791179217931794179517961797179817991800180118021803180418051806180718081809181018111812181318141815181618171818181918201821182218231824182518261827182818291830183118321833183418351836183718381839184018411842184318441845184618471848184918501851185218531854185518561857185818591860186118621863186418651866186718681869187018711872187318741875187618771878187918801881188218831884188518861887188818891890189118921893189418951896189718981899190019011902190319041905190619071908190919101911191219131914191519161917191819191920192119221923192419251926192719281929193019311932
  1. /*
  2. * Copyright © 2006-2010 Intel Corporation
  3. * Copyright (c) 2006 Dave Airlie <airlied@linux.ie>
  4. *
  5. * Permission is hereby granted, free of charge, to any person obtaining a
  6. * copy of this software and associated documentation files (the "Software"),
  7. * to deal in the Software without restriction, including without limitation
  8. * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  9. * and/or sell copies of the Software, and to permit persons to whom the
  10. * Software is furnished to do so, subject to the following conditions:
  11. *
  12. * The above copyright notice and this permission notice (including the next
  13. * paragraph) shall be included in all copies or substantial portions of the
  14. * Software.
  15. *
  16. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  19. * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  20. * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  21. * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  22. * DEALINGS IN THE SOFTWARE.
  23. *
  24. * Authors:
  25. * Eric Anholt <eric@anholt.net>
  26. * Dave Airlie <airlied@linux.ie>
  27. * Jesse Barnes <jesse.barnes@intel.com>
  28. * Chris Wilson <chris@chris-wilson.co.uk>
  29. */
  30. #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  31. #include <linux/kernel.h>
  32. #include <linux/moduleparam.h>
  33. #include <linux/pwm.h>
  34. #include "intel_drv.h"
  35. #define CRC_PMIC_PWM_PERIOD_NS 21333
  36. void
  37. intel_fixed_panel_mode(const struct drm_display_mode *fixed_mode,
  38. struct drm_display_mode *adjusted_mode)
  39. {
  40. drm_mode_copy(adjusted_mode, fixed_mode);
  41. drm_mode_set_crtcinfo(adjusted_mode, 0);
  42. }
  43. /**
  44. * intel_find_panel_downclock - find the reduced downclock for LVDS in EDID
  45. * @dev_priv: i915 device instance
  46. * @fixed_mode : panel native mode
  47. * @connector: LVDS/eDP connector
  48. *
  49. * Return downclock_avail
  50. * Find the reduced downclock for LVDS/eDP in EDID.
  51. */
  52. struct drm_display_mode *
  53. intel_find_panel_downclock(struct drm_i915_private *dev_priv,
  54. struct drm_display_mode *fixed_mode,
  55. struct drm_connector *connector)
  56. {
  57. struct drm_display_mode *scan, *tmp_mode;
  58. int temp_downclock;
  59. temp_downclock = fixed_mode->clock;
  60. tmp_mode = NULL;
  61. list_for_each_entry(scan, &connector->probed_modes, head) {
  62. /*
  63. * If one mode has the same resolution with the fixed_panel
  64. * mode while they have the different refresh rate, it means
  65. * that the reduced downclock is found. In such
  66. * case we can set the different FPx0/1 to dynamically select
  67. * between low and high frequency.
  68. */
  69. if (scan->hdisplay == fixed_mode->hdisplay &&
  70. scan->hsync_start == fixed_mode->hsync_start &&
  71. scan->hsync_end == fixed_mode->hsync_end &&
  72. scan->htotal == fixed_mode->htotal &&
  73. scan->vdisplay == fixed_mode->vdisplay &&
  74. scan->vsync_start == fixed_mode->vsync_start &&
  75. scan->vsync_end == fixed_mode->vsync_end &&
  76. scan->vtotal == fixed_mode->vtotal) {
  77. if (scan->clock < temp_downclock) {
  78. /*
  79. * The downclock is already found. But we
  80. * expect to find the lower downclock.
  81. */
  82. temp_downclock = scan->clock;
  83. tmp_mode = scan;
  84. }
  85. }
  86. }
  87. if (temp_downclock < fixed_mode->clock)
  88. return drm_mode_duplicate(&dev_priv->drm, tmp_mode);
  89. else
  90. return NULL;
  91. }
  92. /* adjusted_mode has been preset to be the panel's fixed mode */
  93. void
  94. intel_pch_panel_fitting(struct intel_crtc *intel_crtc,
  95. struct intel_crtc_state *pipe_config,
  96. int fitting_mode)
  97. {
  98. const struct drm_display_mode *adjusted_mode = &pipe_config->base.adjusted_mode;
  99. int x = 0, y = 0, width = 0, height = 0;
  100. /* Native modes don't need fitting */
  101. if (adjusted_mode->crtc_hdisplay == pipe_config->pipe_src_w &&
  102. adjusted_mode->crtc_vdisplay == pipe_config->pipe_src_h &&
  103. !pipe_config->ycbcr420)
  104. goto done;
  105. switch (fitting_mode) {
  106. case DRM_MODE_SCALE_CENTER:
  107. width = pipe_config->pipe_src_w;
  108. height = pipe_config->pipe_src_h;
  109. x = (adjusted_mode->crtc_hdisplay - width + 1)/2;
  110. y = (adjusted_mode->crtc_vdisplay - height + 1)/2;
  111. break;
  112. case DRM_MODE_SCALE_ASPECT:
  113. /* Scale but preserve the aspect ratio */
  114. {
  115. u32 scaled_width = adjusted_mode->crtc_hdisplay
  116. * pipe_config->pipe_src_h;
  117. u32 scaled_height = pipe_config->pipe_src_w
  118. * adjusted_mode->crtc_vdisplay;
  119. if (scaled_width > scaled_height) { /* pillar */
  120. width = scaled_height / pipe_config->pipe_src_h;
  121. if (width & 1)
  122. width++;
  123. x = (adjusted_mode->crtc_hdisplay - width + 1) / 2;
  124. y = 0;
  125. height = adjusted_mode->crtc_vdisplay;
  126. } else if (scaled_width < scaled_height) { /* letter */
  127. height = scaled_width / pipe_config->pipe_src_w;
  128. if (height & 1)
  129. height++;
  130. y = (adjusted_mode->crtc_vdisplay - height + 1) / 2;
  131. x = 0;
  132. width = adjusted_mode->crtc_hdisplay;
  133. } else {
  134. x = y = 0;
  135. width = adjusted_mode->crtc_hdisplay;
  136. height = adjusted_mode->crtc_vdisplay;
  137. }
  138. }
  139. break;
  140. case DRM_MODE_SCALE_FULLSCREEN:
  141. x = y = 0;
  142. width = adjusted_mode->crtc_hdisplay;
  143. height = adjusted_mode->crtc_vdisplay;
  144. break;
  145. default:
  146. WARN(1, "bad panel fit mode: %d\n", fitting_mode);
  147. return;
  148. }
  149. done:
  150. pipe_config->pch_pfit.pos = (x << 16) | y;
  151. pipe_config->pch_pfit.size = (width << 16) | height;
  152. pipe_config->pch_pfit.enabled = pipe_config->pch_pfit.size != 0;
  153. }
  154. static void
  155. centre_horizontally(struct drm_display_mode *adjusted_mode,
  156. int width)
  157. {
  158. u32 border, sync_pos, blank_width, sync_width;
  159. /* keep the hsync and hblank widths constant */
  160. sync_width = adjusted_mode->crtc_hsync_end - adjusted_mode->crtc_hsync_start;
  161. blank_width = adjusted_mode->crtc_hblank_end - adjusted_mode->crtc_hblank_start;
  162. sync_pos = (blank_width - sync_width + 1) / 2;
  163. border = (adjusted_mode->crtc_hdisplay - width + 1) / 2;
  164. border += border & 1; /* make the border even */
  165. adjusted_mode->crtc_hdisplay = width;
  166. adjusted_mode->crtc_hblank_start = width + border;
  167. adjusted_mode->crtc_hblank_end = adjusted_mode->crtc_hblank_start + blank_width;
  168. adjusted_mode->crtc_hsync_start = adjusted_mode->crtc_hblank_start + sync_pos;
  169. adjusted_mode->crtc_hsync_end = adjusted_mode->crtc_hsync_start + sync_width;
  170. }
  171. static void
  172. centre_vertically(struct drm_display_mode *adjusted_mode,
  173. int height)
  174. {
  175. u32 border, sync_pos, blank_width, sync_width;
  176. /* keep the vsync and vblank widths constant */
  177. sync_width = adjusted_mode->crtc_vsync_end - adjusted_mode->crtc_vsync_start;
  178. blank_width = adjusted_mode->crtc_vblank_end - adjusted_mode->crtc_vblank_start;
  179. sync_pos = (blank_width - sync_width + 1) / 2;
  180. border = (adjusted_mode->crtc_vdisplay - height + 1) / 2;
  181. adjusted_mode->crtc_vdisplay = height;
  182. adjusted_mode->crtc_vblank_start = height + border;
  183. adjusted_mode->crtc_vblank_end = adjusted_mode->crtc_vblank_start + blank_width;
  184. adjusted_mode->crtc_vsync_start = adjusted_mode->crtc_vblank_start + sync_pos;
  185. adjusted_mode->crtc_vsync_end = adjusted_mode->crtc_vsync_start + sync_width;
  186. }
  187. static inline u32 panel_fitter_scaling(u32 source, u32 target)
  188. {
  189. /*
  190. * Floating point operation is not supported. So the FACTOR
  191. * is defined, which can avoid the floating point computation
  192. * when calculating the panel ratio.
  193. */
  194. #define ACCURACY 12
  195. #define FACTOR (1 << ACCURACY)
  196. u32 ratio = source * FACTOR / target;
  197. return (FACTOR * ratio + FACTOR/2) / FACTOR;
  198. }
  199. static void i965_scale_aspect(struct intel_crtc_state *pipe_config,
  200. u32 *pfit_control)
  201. {
  202. const struct drm_display_mode *adjusted_mode = &pipe_config->base.adjusted_mode;
  203. u32 scaled_width = adjusted_mode->crtc_hdisplay *
  204. pipe_config->pipe_src_h;
  205. u32 scaled_height = pipe_config->pipe_src_w *
  206. adjusted_mode->crtc_vdisplay;
  207. /* 965+ is easy, it does everything in hw */
  208. if (scaled_width > scaled_height)
  209. *pfit_control |= PFIT_ENABLE |
  210. PFIT_SCALING_PILLAR;
  211. else if (scaled_width < scaled_height)
  212. *pfit_control |= PFIT_ENABLE |
  213. PFIT_SCALING_LETTER;
  214. else if (adjusted_mode->crtc_hdisplay != pipe_config->pipe_src_w)
  215. *pfit_control |= PFIT_ENABLE | PFIT_SCALING_AUTO;
  216. }
  217. static void i9xx_scale_aspect(struct intel_crtc_state *pipe_config,
  218. u32 *pfit_control, u32 *pfit_pgm_ratios,
  219. u32 *border)
  220. {
  221. struct drm_display_mode *adjusted_mode = &pipe_config->base.adjusted_mode;
  222. u32 scaled_width = adjusted_mode->crtc_hdisplay *
  223. pipe_config->pipe_src_h;
  224. u32 scaled_height = pipe_config->pipe_src_w *
  225. adjusted_mode->crtc_vdisplay;
  226. u32 bits;
  227. /*
  228. * For earlier chips we have to calculate the scaling
  229. * ratio by hand and program it into the
  230. * PFIT_PGM_RATIO register
  231. */
  232. if (scaled_width > scaled_height) { /* pillar */
  233. centre_horizontally(adjusted_mode,
  234. scaled_height /
  235. pipe_config->pipe_src_h);
  236. *border = LVDS_BORDER_ENABLE;
  237. if (pipe_config->pipe_src_h != adjusted_mode->crtc_vdisplay) {
  238. bits = panel_fitter_scaling(pipe_config->pipe_src_h,
  239. adjusted_mode->crtc_vdisplay);
  240. *pfit_pgm_ratios |= (bits << PFIT_HORIZ_SCALE_SHIFT |
  241. bits << PFIT_VERT_SCALE_SHIFT);
  242. *pfit_control |= (PFIT_ENABLE |
  243. VERT_INTERP_BILINEAR |
  244. HORIZ_INTERP_BILINEAR);
  245. }
  246. } else if (scaled_width < scaled_height) { /* letter */
  247. centre_vertically(adjusted_mode,
  248. scaled_width /
  249. pipe_config->pipe_src_w);
  250. *border = LVDS_BORDER_ENABLE;
  251. if (pipe_config->pipe_src_w != adjusted_mode->crtc_hdisplay) {
  252. bits = panel_fitter_scaling(pipe_config->pipe_src_w,
  253. adjusted_mode->crtc_hdisplay);
  254. *pfit_pgm_ratios |= (bits << PFIT_HORIZ_SCALE_SHIFT |
  255. bits << PFIT_VERT_SCALE_SHIFT);
  256. *pfit_control |= (PFIT_ENABLE |
  257. VERT_INTERP_BILINEAR |
  258. HORIZ_INTERP_BILINEAR);
  259. }
  260. } else {
  261. /* Aspects match, Let hw scale both directions */
  262. *pfit_control |= (PFIT_ENABLE |
  263. VERT_AUTO_SCALE | HORIZ_AUTO_SCALE |
  264. VERT_INTERP_BILINEAR |
  265. HORIZ_INTERP_BILINEAR);
  266. }
  267. }
  268. void intel_gmch_panel_fitting(struct intel_crtc *intel_crtc,
  269. struct intel_crtc_state *pipe_config,
  270. int fitting_mode)
  271. {
  272. struct drm_i915_private *dev_priv = to_i915(intel_crtc->base.dev);
  273. u32 pfit_control = 0, pfit_pgm_ratios = 0, border = 0;
  274. struct drm_display_mode *adjusted_mode = &pipe_config->base.adjusted_mode;
  275. /* Native modes don't need fitting */
  276. if (adjusted_mode->crtc_hdisplay == pipe_config->pipe_src_w &&
  277. adjusted_mode->crtc_vdisplay == pipe_config->pipe_src_h)
  278. goto out;
  279. switch (fitting_mode) {
  280. case DRM_MODE_SCALE_CENTER:
  281. /*
  282. * For centered modes, we have to calculate border widths &
  283. * heights and modify the values programmed into the CRTC.
  284. */
  285. centre_horizontally(adjusted_mode, pipe_config->pipe_src_w);
  286. centre_vertically(adjusted_mode, pipe_config->pipe_src_h);
  287. border = LVDS_BORDER_ENABLE;
  288. break;
  289. case DRM_MODE_SCALE_ASPECT:
  290. /* Scale but preserve the aspect ratio */
  291. if (INTEL_GEN(dev_priv) >= 4)
  292. i965_scale_aspect(pipe_config, &pfit_control);
  293. else
  294. i9xx_scale_aspect(pipe_config, &pfit_control,
  295. &pfit_pgm_ratios, &border);
  296. break;
  297. case DRM_MODE_SCALE_FULLSCREEN:
  298. /*
  299. * Full scaling, even if it changes the aspect ratio.
  300. * Fortunately this is all done for us in hw.
  301. */
  302. if (pipe_config->pipe_src_h != adjusted_mode->crtc_vdisplay ||
  303. pipe_config->pipe_src_w != adjusted_mode->crtc_hdisplay) {
  304. pfit_control |= PFIT_ENABLE;
  305. if (INTEL_GEN(dev_priv) >= 4)
  306. pfit_control |= PFIT_SCALING_AUTO;
  307. else
  308. pfit_control |= (VERT_AUTO_SCALE |
  309. VERT_INTERP_BILINEAR |
  310. HORIZ_AUTO_SCALE |
  311. HORIZ_INTERP_BILINEAR);
  312. }
  313. break;
  314. default:
  315. WARN(1, "bad panel fit mode: %d\n", fitting_mode);
  316. return;
  317. }
  318. /* 965+ wants fuzzy fitting */
  319. /* FIXME: handle multiple panels by failing gracefully */
  320. if (INTEL_GEN(dev_priv) >= 4)
  321. pfit_control |= ((intel_crtc->pipe << PFIT_PIPE_SHIFT) |
  322. PFIT_FILTER_FUZZY);
  323. out:
  324. if ((pfit_control & PFIT_ENABLE) == 0) {
  325. pfit_control = 0;
  326. pfit_pgm_ratios = 0;
  327. }
  328. /* Make sure pre-965 set dither correctly for 18bpp panels. */
  329. if (INTEL_GEN(dev_priv) < 4 && pipe_config->pipe_bpp == 18)
  330. pfit_control |= PANEL_8TO6_DITHER_ENABLE;
  331. pipe_config->gmch_pfit.control = pfit_control;
  332. pipe_config->gmch_pfit.pgm_ratios = pfit_pgm_ratios;
  333. pipe_config->gmch_pfit.lvds_border_bits = border;
  334. }
  335. /**
  336. * scale - scale values from one range to another
  337. * @source_val: value in range [@source_min..@source_max]
  338. * @source_min: minimum legal value for @source_val
  339. * @source_max: maximum legal value for @source_val
  340. * @target_min: corresponding target value for @source_min
  341. * @target_max: corresponding target value for @source_max
  342. *
  343. * Return @source_val in range [@source_min..@source_max] scaled to range
  344. * [@target_min..@target_max].
  345. */
  346. static u32 scale(u32 source_val,
  347. u32 source_min, u32 source_max,
  348. u32 target_min, u32 target_max)
  349. {
  350. u64 target_val;
  351. WARN_ON(source_min > source_max);
  352. WARN_ON(target_min > target_max);
  353. /* defensive */
  354. source_val = clamp(source_val, source_min, source_max);
  355. /* avoid overflows */
  356. target_val = mul_u32_u32(source_val - source_min,
  357. target_max - target_min);
  358. target_val = DIV_ROUND_CLOSEST_ULL(target_val, source_max - source_min);
  359. target_val += target_min;
  360. return target_val;
  361. }
  362. /* Scale user_level in range [0..user_max] to [hw_min..hw_max]. */
  363. static inline u32 scale_user_to_hw(struct intel_connector *connector,
  364. u32 user_level, u32 user_max)
  365. {
  366. struct intel_panel *panel = &connector->panel;
  367. return scale(user_level, 0, user_max,
  368. panel->backlight.min, panel->backlight.max);
  369. }
  370. /* Scale user_level in range [0..user_max] to [0..hw_max], clamping the result
  371. * to [hw_min..hw_max]. */
  372. static inline u32 clamp_user_to_hw(struct intel_connector *connector,
  373. u32 user_level, u32 user_max)
  374. {
  375. struct intel_panel *panel = &connector->panel;
  376. u32 hw_level;
  377. hw_level = scale(user_level, 0, user_max, 0, panel->backlight.max);
  378. hw_level = clamp(hw_level, panel->backlight.min, panel->backlight.max);
  379. return hw_level;
  380. }
  381. /* Scale hw_level in range [hw_min..hw_max] to [0..user_max]. */
  382. static inline u32 scale_hw_to_user(struct intel_connector *connector,
  383. u32 hw_level, u32 user_max)
  384. {
  385. struct intel_panel *panel = &connector->panel;
  386. return scale(hw_level, panel->backlight.min, panel->backlight.max,
  387. 0, user_max);
  388. }
  389. static u32 intel_panel_compute_brightness(struct intel_connector *connector,
  390. u32 val)
  391. {
  392. struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
  393. struct intel_panel *panel = &connector->panel;
  394. WARN_ON(panel->backlight.max == 0);
  395. if (i915_modparams.invert_brightness < 0)
  396. return val;
  397. if (i915_modparams.invert_brightness > 0 ||
  398. dev_priv->quirks & QUIRK_INVERT_BRIGHTNESS) {
  399. return panel->backlight.max - val + panel->backlight.min;
  400. }
  401. return val;
  402. }
  403. static u32 lpt_get_backlight(struct intel_connector *connector)
  404. {
  405. struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
  406. return I915_READ(BLC_PWM_PCH_CTL2) & BACKLIGHT_DUTY_CYCLE_MASK;
  407. }
  408. static u32 pch_get_backlight(struct intel_connector *connector)
  409. {
  410. struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
  411. return I915_READ(BLC_PWM_CPU_CTL) & BACKLIGHT_DUTY_CYCLE_MASK;
  412. }
  413. static u32 i9xx_get_backlight(struct intel_connector *connector)
  414. {
  415. struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
  416. struct intel_panel *panel = &connector->panel;
  417. u32 val;
  418. val = I915_READ(BLC_PWM_CTL) & BACKLIGHT_DUTY_CYCLE_MASK;
  419. if (INTEL_GEN(dev_priv) < 4)
  420. val >>= 1;
  421. if (panel->backlight.combination_mode) {
  422. u8 lbpc;
  423. pci_read_config_byte(dev_priv->drm.pdev, LBPC, &lbpc);
  424. val *= lbpc;
  425. }
  426. return val;
  427. }
  428. static u32 _vlv_get_backlight(struct drm_i915_private *dev_priv, enum pipe pipe)
  429. {
  430. if (WARN_ON(pipe != PIPE_A && pipe != PIPE_B))
  431. return 0;
  432. return I915_READ(VLV_BLC_PWM_CTL(pipe)) & BACKLIGHT_DUTY_CYCLE_MASK;
  433. }
  434. static u32 vlv_get_backlight(struct intel_connector *connector)
  435. {
  436. struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
  437. enum pipe pipe = intel_get_pipe_from_connector(connector);
  438. return _vlv_get_backlight(dev_priv, pipe);
  439. }
  440. static u32 bxt_get_backlight(struct intel_connector *connector)
  441. {
  442. struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
  443. struct intel_panel *panel = &connector->panel;
  444. return I915_READ(BXT_BLC_PWM_DUTY(panel->backlight.controller));
  445. }
  446. static u32 pwm_get_backlight(struct intel_connector *connector)
  447. {
  448. struct intel_panel *panel = &connector->panel;
  449. int duty_ns;
  450. duty_ns = pwm_get_duty_cycle(panel->backlight.pwm);
  451. return DIV_ROUND_UP(duty_ns * 100, CRC_PMIC_PWM_PERIOD_NS);
  452. }
  453. static void lpt_set_backlight(const struct drm_connector_state *conn_state, u32 level)
  454. {
  455. struct intel_connector *connector = to_intel_connector(conn_state->connector);
  456. struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
  457. u32 val = I915_READ(BLC_PWM_PCH_CTL2) & ~BACKLIGHT_DUTY_CYCLE_MASK;
  458. I915_WRITE(BLC_PWM_PCH_CTL2, val | level);
  459. }
  460. static void pch_set_backlight(const struct drm_connector_state *conn_state, u32 level)
  461. {
  462. struct intel_connector *connector = to_intel_connector(conn_state->connector);
  463. struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
  464. u32 tmp;
  465. tmp = I915_READ(BLC_PWM_CPU_CTL) & ~BACKLIGHT_DUTY_CYCLE_MASK;
  466. I915_WRITE(BLC_PWM_CPU_CTL, tmp | level);
  467. }
  468. static void i9xx_set_backlight(const struct drm_connector_state *conn_state, u32 level)
  469. {
  470. struct intel_connector *connector = to_intel_connector(conn_state->connector);
  471. struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
  472. struct intel_panel *panel = &connector->panel;
  473. u32 tmp, mask;
  474. WARN_ON(panel->backlight.max == 0);
  475. if (panel->backlight.combination_mode) {
  476. u8 lbpc;
  477. lbpc = level * 0xfe / panel->backlight.max + 1;
  478. level /= lbpc;
  479. pci_write_config_byte(dev_priv->drm.pdev, LBPC, lbpc);
  480. }
  481. if (IS_GEN4(dev_priv)) {
  482. mask = BACKLIGHT_DUTY_CYCLE_MASK;
  483. } else {
  484. level <<= 1;
  485. mask = BACKLIGHT_DUTY_CYCLE_MASK_PNV;
  486. }
  487. tmp = I915_READ(BLC_PWM_CTL) & ~mask;
  488. I915_WRITE(BLC_PWM_CTL, tmp | level);
  489. }
  490. static void vlv_set_backlight(const struct drm_connector_state *conn_state, u32 level)
  491. {
  492. struct intel_connector *connector = to_intel_connector(conn_state->connector);
  493. struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
  494. enum pipe pipe = to_intel_crtc(conn_state->crtc)->pipe;
  495. u32 tmp;
  496. tmp = I915_READ(VLV_BLC_PWM_CTL(pipe)) & ~BACKLIGHT_DUTY_CYCLE_MASK;
  497. I915_WRITE(VLV_BLC_PWM_CTL(pipe), tmp | level);
  498. }
  499. static void bxt_set_backlight(const struct drm_connector_state *conn_state, u32 level)
  500. {
  501. struct intel_connector *connector = to_intel_connector(conn_state->connector);
  502. struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
  503. struct intel_panel *panel = &connector->panel;
  504. I915_WRITE(BXT_BLC_PWM_DUTY(panel->backlight.controller), level);
  505. }
  506. static void pwm_set_backlight(const struct drm_connector_state *conn_state, u32 level)
  507. {
  508. struct intel_panel *panel = &to_intel_connector(conn_state->connector)->panel;
  509. int duty_ns = DIV_ROUND_UP(level * CRC_PMIC_PWM_PERIOD_NS, 100);
  510. pwm_config(panel->backlight.pwm, duty_ns, CRC_PMIC_PWM_PERIOD_NS);
  511. }
  512. static void
  513. intel_panel_actually_set_backlight(const struct drm_connector_state *conn_state, u32 level)
  514. {
  515. struct intel_connector *connector = to_intel_connector(conn_state->connector);
  516. struct intel_panel *panel = &connector->panel;
  517. DRM_DEBUG_DRIVER("set backlight PWM = %d\n", level);
  518. level = intel_panel_compute_brightness(connector, level);
  519. panel->backlight.set(conn_state, level);
  520. }
  521. /* set backlight brightness to level in range [0..max], assuming hw min is
  522. * respected.
  523. */
  524. void intel_panel_set_backlight_acpi(const struct drm_connector_state *conn_state,
  525. u32 user_level, u32 user_max)
  526. {
  527. struct intel_connector *connector = to_intel_connector(conn_state->connector);
  528. struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
  529. struct intel_panel *panel = &connector->panel;
  530. u32 hw_level;
  531. /*
  532. * Lack of crtc may occur during driver init because
  533. * connection_mutex isn't held across the entire backlight
  534. * setup + modeset readout, and the BIOS can issue the
  535. * requests at any time.
  536. */
  537. if (!panel->backlight.present || !conn_state->crtc)
  538. return;
  539. mutex_lock(&dev_priv->backlight_lock);
  540. WARN_ON(panel->backlight.max == 0);
  541. hw_level = clamp_user_to_hw(connector, user_level, user_max);
  542. panel->backlight.level = hw_level;
  543. if (panel->backlight.device)
  544. panel->backlight.device->props.brightness =
  545. scale_hw_to_user(connector,
  546. panel->backlight.level,
  547. panel->backlight.device->props.max_brightness);
  548. if (panel->backlight.enabled)
  549. intel_panel_actually_set_backlight(conn_state, hw_level);
  550. mutex_unlock(&dev_priv->backlight_lock);
  551. }
  552. static void lpt_disable_backlight(const struct drm_connector_state *old_conn_state)
  553. {
  554. struct intel_connector *connector = to_intel_connector(old_conn_state->connector);
  555. struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
  556. u32 tmp;
  557. intel_panel_actually_set_backlight(old_conn_state, 0);
  558. /*
  559. * Although we don't support or enable CPU PWM with LPT/SPT based
  560. * systems, it may have been enabled prior to loading the
  561. * driver. Disable to avoid warnings on LCPLL disable.
  562. *
  563. * This needs rework if we need to add support for CPU PWM on PCH split
  564. * platforms.
  565. */
  566. tmp = I915_READ(BLC_PWM_CPU_CTL2);
  567. if (tmp & BLM_PWM_ENABLE) {
  568. DRM_DEBUG_KMS("cpu backlight was enabled, disabling\n");
  569. I915_WRITE(BLC_PWM_CPU_CTL2, tmp & ~BLM_PWM_ENABLE);
  570. }
  571. tmp = I915_READ(BLC_PWM_PCH_CTL1);
  572. I915_WRITE(BLC_PWM_PCH_CTL1, tmp & ~BLM_PCH_PWM_ENABLE);
  573. }
  574. static void pch_disable_backlight(const struct drm_connector_state *old_conn_state)
  575. {
  576. struct intel_connector *connector = to_intel_connector(old_conn_state->connector);
  577. struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
  578. u32 tmp;
  579. intel_panel_actually_set_backlight(old_conn_state, 0);
  580. tmp = I915_READ(BLC_PWM_CPU_CTL2);
  581. I915_WRITE(BLC_PWM_CPU_CTL2, tmp & ~BLM_PWM_ENABLE);
  582. tmp = I915_READ(BLC_PWM_PCH_CTL1);
  583. I915_WRITE(BLC_PWM_PCH_CTL1, tmp & ~BLM_PCH_PWM_ENABLE);
  584. }
  585. static void i9xx_disable_backlight(const struct drm_connector_state *old_conn_state)
  586. {
  587. intel_panel_actually_set_backlight(old_conn_state, 0);
  588. }
  589. static void i965_disable_backlight(const struct drm_connector_state *old_conn_state)
  590. {
  591. struct drm_i915_private *dev_priv = to_i915(old_conn_state->connector->dev);
  592. u32 tmp;
  593. intel_panel_actually_set_backlight(old_conn_state, 0);
  594. tmp = I915_READ(BLC_PWM_CTL2);
  595. I915_WRITE(BLC_PWM_CTL2, tmp & ~BLM_PWM_ENABLE);
  596. }
  597. static void vlv_disable_backlight(const struct drm_connector_state *old_conn_state)
  598. {
  599. struct intel_connector *connector = to_intel_connector(old_conn_state->connector);
  600. struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
  601. enum pipe pipe = to_intel_crtc(old_conn_state->crtc)->pipe;
  602. u32 tmp;
  603. intel_panel_actually_set_backlight(old_conn_state, 0);
  604. tmp = I915_READ(VLV_BLC_PWM_CTL2(pipe));
  605. I915_WRITE(VLV_BLC_PWM_CTL2(pipe), tmp & ~BLM_PWM_ENABLE);
  606. }
  607. static void bxt_disable_backlight(const struct drm_connector_state *old_conn_state)
  608. {
  609. struct intel_connector *connector = to_intel_connector(old_conn_state->connector);
  610. struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
  611. struct intel_panel *panel = &connector->panel;
  612. u32 tmp, val;
  613. intel_panel_actually_set_backlight(old_conn_state, 0);
  614. tmp = I915_READ(BXT_BLC_PWM_CTL(panel->backlight.controller));
  615. I915_WRITE(BXT_BLC_PWM_CTL(panel->backlight.controller),
  616. tmp & ~BXT_BLC_PWM_ENABLE);
  617. if (panel->backlight.controller == 1) {
  618. val = I915_READ(UTIL_PIN_CTL);
  619. val &= ~UTIL_PIN_ENABLE;
  620. I915_WRITE(UTIL_PIN_CTL, val);
  621. }
  622. }
  623. static void cnp_disable_backlight(const struct drm_connector_state *old_conn_state)
  624. {
  625. struct intel_connector *connector = to_intel_connector(old_conn_state->connector);
  626. struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
  627. struct intel_panel *panel = &connector->panel;
  628. u32 tmp;
  629. intel_panel_actually_set_backlight(old_conn_state, 0);
  630. tmp = I915_READ(BXT_BLC_PWM_CTL(panel->backlight.controller));
  631. I915_WRITE(BXT_BLC_PWM_CTL(panel->backlight.controller),
  632. tmp & ~BXT_BLC_PWM_ENABLE);
  633. }
  634. static void pwm_disable_backlight(const struct drm_connector_state *old_conn_state)
  635. {
  636. struct intel_connector *connector = to_intel_connector(old_conn_state->connector);
  637. struct intel_panel *panel = &connector->panel;
  638. /* Disable the backlight */
  639. pwm_config(panel->backlight.pwm, 0, CRC_PMIC_PWM_PERIOD_NS);
  640. usleep_range(2000, 3000);
  641. pwm_disable(panel->backlight.pwm);
  642. }
  643. void intel_panel_disable_backlight(const struct drm_connector_state *old_conn_state)
  644. {
  645. struct intel_connector *connector = to_intel_connector(old_conn_state->connector);
  646. struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
  647. struct intel_panel *panel = &connector->panel;
  648. if (!panel->backlight.present)
  649. return;
  650. /*
  651. * Do not disable backlight on the vga_switcheroo path. When switching
  652. * away from i915, the other client may depend on i915 to handle the
  653. * backlight. This will leave the backlight on unnecessarily when
  654. * another client is not activated.
  655. */
  656. if (dev_priv->drm.switch_power_state == DRM_SWITCH_POWER_CHANGING) {
  657. DRM_DEBUG_DRIVER("Skipping backlight disable on vga switch\n");
  658. return;
  659. }
  660. mutex_lock(&dev_priv->backlight_lock);
  661. if (panel->backlight.device)
  662. panel->backlight.device->props.power = FB_BLANK_POWERDOWN;
  663. panel->backlight.enabled = false;
  664. panel->backlight.disable(old_conn_state);
  665. mutex_unlock(&dev_priv->backlight_lock);
  666. }
  667. static void lpt_enable_backlight(const struct intel_crtc_state *crtc_state,
  668. const struct drm_connector_state *conn_state)
  669. {
  670. struct intel_connector *connector = to_intel_connector(conn_state->connector);
  671. struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
  672. struct intel_panel *panel = &connector->panel;
  673. u32 pch_ctl1, pch_ctl2, schicken;
  674. pch_ctl1 = I915_READ(BLC_PWM_PCH_CTL1);
  675. if (pch_ctl1 & BLM_PCH_PWM_ENABLE) {
  676. DRM_DEBUG_KMS("pch backlight already enabled\n");
  677. pch_ctl1 &= ~BLM_PCH_PWM_ENABLE;
  678. I915_WRITE(BLC_PWM_PCH_CTL1, pch_ctl1);
  679. }
  680. if (HAS_PCH_LPT(dev_priv)) {
  681. schicken = I915_READ(SOUTH_CHICKEN2);
  682. if (panel->backlight.alternate_pwm_increment)
  683. schicken |= LPT_PWM_GRANULARITY;
  684. else
  685. schicken &= ~LPT_PWM_GRANULARITY;
  686. I915_WRITE(SOUTH_CHICKEN2, schicken);
  687. } else {
  688. schicken = I915_READ(SOUTH_CHICKEN1);
  689. if (panel->backlight.alternate_pwm_increment)
  690. schicken |= SPT_PWM_GRANULARITY;
  691. else
  692. schicken &= ~SPT_PWM_GRANULARITY;
  693. I915_WRITE(SOUTH_CHICKEN1, schicken);
  694. }
  695. pch_ctl2 = panel->backlight.max << 16;
  696. I915_WRITE(BLC_PWM_PCH_CTL2, pch_ctl2);
  697. pch_ctl1 = 0;
  698. if (panel->backlight.active_low_pwm)
  699. pch_ctl1 |= BLM_PCH_POLARITY;
  700. /* After LPT, override is the default. */
  701. if (HAS_PCH_LPT(dev_priv))
  702. pch_ctl1 |= BLM_PCH_OVERRIDE_ENABLE;
  703. I915_WRITE(BLC_PWM_PCH_CTL1, pch_ctl1);
  704. POSTING_READ(BLC_PWM_PCH_CTL1);
  705. I915_WRITE(BLC_PWM_PCH_CTL1, pch_ctl1 | BLM_PCH_PWM_ENABLE);
  706. /* This won't stick until the above enable. */
  707. intel_panel_actually_set_backlight(conn_state, panel->backlight.level);
  708. }
  709. static void pch_enable_backlight(const struct intel_crtc_state *crtc_state,
  710. const struct drm_connector_state *conn_state)
  711. {
  712. struct intel_connector *connector = to_intel_connector(conn_state->connector);
  713. struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
  714. struct intel_panel *panel = &connector->panel;
  715. enum transcoder cpu_transcoder = crtc_state->cpu_transcoder;
  716. u32 cpu_ctl2, pch_ctl1, pch_ctl2;
  717. cpu_ctl2 = I915_READ(BLC_PWM_CPU_CTL2);
  718. if (cpu_ctl2 & BLM_PWM_ENABLE) {
  719. DRM_DEBUG_KMS("cpu backlight already enabled\n");
  720. cpu_ctl2 &= ~BLM_PWM_ENABLE;
  721. I915_WRITE(BLC_PWM_CPU_CTL2, cpu_ctl2);
  722. }
  723. pch_ctl1 = I915_READ(BLC_PWM_PCH_CTL1);
  724. if (pch_ctl1 & BLM_PCH_PWM_ENABLE) {
  725. DRM_DEBUG_KMS("pch backlight already enabled\n");
  726. pch_ctl1 &= ~BLM_PCH_PWM_ENABLE;
  727. I915_WRITE(BLC_PWM_PCH_CTL1, pch_ctl1);
  728. }
  729. if (cpu_transcoder == TRANSCODER_EDP)
  730. cpu_ctl2 = BLM_TRANSCODER_EDP;
  731. else
  732. cpu_ctl2 = BLM_PIPE(cpu_transcoder);
  733. I915_WRITE(BLC_PWM_CPU_CTL2, cpu_ctl2);
  734. POSTING_READ(BLC_PWM_CPU_CTL2);
  735. I915_WRITE(BLC_PWM_CPU_CTL2, cpu_ctl2 | BLM_PWM_ENABLE);
  736. /* This won't stick until the above enable. */
  737. intel_panel_actually_set_backlight(conn_state, panel->backlight.level);
  738. pch_ctl2 = panel->backlight.max << 16;
  739. I915_WRITE(BLC_PWM_PCH_CTL2, pch_ctl2);
  740. pch_ctl1 = 0;
  741. if (panel->backlight.active_low_pwm)
  742. pch_ctl1 |= BLM_PCH_POLARITY;
  743. I915_WRITE(BLC_PWM_PCH_CTL1, pch_ctl1);
  744. POSTING_READ(BLC_PWM_PCH_CTL1);
  745. I915_WRITE(BLC_PWM_PCH_CTL1, pch_ctl1 | BLM_PCH_PWM_ENABLE);
  746. }
  747. static void i9xx_enable_backlight(const struct intel_crtc_state *crtc_state,
  748. const struct drm_connector_state *conn_state)
  749. {
  750. struct intel_connector *connector = to_intel_connector(conn_state->connector);
  751. struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
  752. struct intel_panel *panel = &connector->panel;
  753. u32 ctl, freq;
  754. ctl = I915_READ(BLC_PWM_CTL);
  755. if (ctl & BACKLIGHT_DUTY_CYCLE_MASK_PNV) {
  756. DRM_DEBUG_KMS("backlight already enabled\n");
  757. I915_WRITE(BLC_PWM_CTL, 0);
  758. }
  759. freq = panel->backlight.max;
  760. if (panel->backlight.combination_mode)
  761. freq /= 0xff;
  762. ctl = freq << 17;
  763. if (panel->backlight.combination_mode)
  764. ctl |= BLM_LEGACY_MODE;
  765. if (IS_PINEVIEW(dev_priv) && panel->backlight.active_low_pwm)
  766. ctl |= BLM_POLARITY_PNV;
  767. I915_WRITE(BLC_PWM_CTL, ctl);
  768. POSTING_READ(BLC_PWM_CTL);
  769. /* XXX: combine this into above write? */
  770. intel_panel_actually_set_backlight(conn_state, panel->backlight.level);
  771. /*
  772. * Needed to enable backlight on some 855gm models. BLC_HIST_CTL is
  773. * 855gm only, but checking for gen2 is safe, as 855gm is the only gen2
  774. * that has backlight.
  775. */
  776. if (IS_GEN2(dev_priv))
  777. I915_WRITE(BLC_HIST_CTL, BLM_HISTOGRAM_ENABLE);
  778. }
  779. static void i965_enable_backlight(const struct intel_crtc_state *crtc_state,
  780. const struct drm_connector_state *conn_state)
  781. {
  782. struct intel_connector *connector = to_intel_connector(conn_state->connector);
  783. struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
  784. struct intel_panel *panel = &connector->panel;
  785. enum pipe pipe = to_intel_crtc(conn_state->crtc)->pipe;
  786. u32 ctl, ctl2, freq;
  787. ctl2 = I915_READ(BLC_PWM_CTL2);
  788. if (ctl2 & BLM_PWM_ENABLE) {
  789. DRM_DEBUG_KMS("backlight already enabled\n");
  790. ctl2 &= ~BLM_PWM_ENABLE;
  791. I915_WRITE(BLC_PWM_CTL2, ctl2);
  792. }
  793. freq = panel->backlight.max;
  794. if (panel->backlight.combination_mode)
  795. freq /= 0xff;
  796. ctl = freq << 16;
  797. I915_WRITE(BLC_PWM_CTL, ctl);
  798. ctl2 = BLM_PIPE(pipe);
  799. if (panel->backlight.combination_mode)
  800. ctl2 |= BLM_COMBINATION_MODE;
  801. if (panel->backlight.active_low_pwm)
  802. ctl2 |= BLM_POLARITY_I965;
  803. I915_WRITE(BLC_PWM_CTL2, ctl2);
  804. POSTING_READ(BLC_PWM_CTL2);
  805. I915_WRITE(BLC_PWM_CTL2, ctl2 | BLM_PWM_ENABLE);
  806. intel_panel_actually_set_backlight(conn_state, panel->backlight.level);
  807. }
  808. static void vlv_enable_backlight(const struct intel_crtc_state *crtc_state,
  809. const struct drm_connector_state *conn_state)
  810. {
  811. struct intel_connector *connector = to_intel_connector(conn_state->connector);
  812. struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
  813. struct intel_panel *panel = &connector->panel;
  814. enum pipe pipe = to_intel_crtc(crtc_state->base.crtc)->pipe;
  815. u32 ctl, ctl2;
  816. ctl2 = I915_READ(VLV_BLC_PWM_CTL2(pipe));
  817. if (ctl2 & BLM_PWM_ENABLE) {
  818. DRM_DEBUG_KMS("backlight already enabled\n");
  819. ctl2 &= ~BLM_PWM_ENABLE;
  820. I915_WRITE(VLV_BLC_PWM_CTL2(pipe), ctl2);
  821. }
  822. ctl = panel->backlight.max << 16;
  823. I915_WRITE(VLV_BLC_PWM_CTL(pipe), ctl);
  824. /* XXX: combine this into above write? */
  825. intel_panel_actually_set_backlight(conn_state, panel->backlight.level);
  826. ctl2 = 0;
  827. if (panel->backlight.active_low_pwm)
  828. ctl2 |= BLM_POLARITY_I965;
  829. I915_WRITE(VLV_BLC_PWM_CTL2(pipe), ctl2);
  830. POSTING_READ(VLV_BLC_PWM_CTL2(pipe));
  831. I915_WRITE(VLV_BLC_PWM_CTL2(pipe), ctl2 | BLM_PWM_ENABLE);
  832. }
  833. static void bxt_enable_backlight(const struct intel_crtc_state *crtc_state,
  834. const struct drm_connector_state *conn_state)
  835. {
  836. struct intel_connector *connector = to_intel_connector(conn_state->connector);
  837. struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
  838. struct intel_panel *panel = &connector->panel;
  839. enum pipe pipe = to_intel_crtc(crtc_state->base.crtc)->pipe;
  840. u32 pwm_ctl, val;
  841. /* Controller 1 uses the utility pin. */
  842. if (panel->backlight.controller == 1) {
  843. val = I915_READ(UTIL_PIN_CTL);
  844. if (val & UTIL_PIN_ENABLE) {
  845. DRM_DEBUG_KMS("util pin already enabled\n");
  846. val &= ~UTIL_PIN_ENABLE;
  847. I915_WRITE(UTIL_PIN_CTL, val);
  848. }
  849. val = 0;
  850. if (panel->backlight.util_pin_active_low)
  851. val |= UTIL_PIN_POLARITY;
  852. I915_WRITE(UTIL_PIN_CTL, val | UTIL_PIN_PIPE(pipe) |
  853. UTIL_PIN_MODE_PWM | UTIL_PIN_ENABLE);
  854. }
  855. pwm_ctl = I915_READ(BXT_BLC_PWM_CTL(panel->backlight.controller));
  856. if (pwm_ctl & BXT_BLC_PWM_ENABLE) {
  857. DRM_DEBUG_KMS("backlight already enabled\n");
  858. pwm_ctl &= ~BXT_BLC_PWM_ENABLE;
  859. I915_WRITE(BXT_BLC_PWM_CTL(panel->backlight.controller),
  860. pwm_ctl);
  861. }
  862. I915_WRITE(BXT_BLC_PWM_FREQ(panel->backlight.controller),
  863. panel->backlight.max);
  864. intel_panel_actually_set_backlight(conn_state, panel->backlight.level);
  865. pwm_ctl = 0;
  866. if (panel->backlight.active_low_pwm)
  867. pwm_ctl |= BXT_BLC_PWM_POLARITY;
  868. I915_WRITE(BXT_BLC_PWM_CTL(panel->backlight.controller), pwm_ctl);
  869. POSTING_READ(BXT_BLC_PWM_CTL(panel->backlight.controller));
  870. I915_WRITE(BXT_BLC_PWM_CTL(panel->backlight.controller),
  871. pwm_ctl | BXT_BLC_PWM_ENABLE);
  872. }
  873. static void cnp_enable_backlight(const struct intel_crtc_state *crtc_state,
  874. const struct drm_connector_state *conn_state)
  875. {
  876. struct intel_connector *connector = to_intel_connector(conn_state->connector);
  877. struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
  878. struct intel_panel *panel = &connector->panel;
  879. u32 pwm_ctl;
  880. pwm_ctl = I915_READ(BXT_BLC_PWM_CTL(panel->backlight.controller));
  881. if (pwm_ctl & BXT_BLC_PWM_ENABLE) {
  882. DRM_DEBUG_KMS("backlight already enabled\n");
  883. pwm_ctl &= ~BXT_BLC_PWM_ENABLE;
  884. I915_WRITE(BXT_BLC_PWM_CTL(panel->backlight.controller),
  885. pwm_ctl);
  886. }
  887. I915_WRITE(BXT_BLC_PWM_FREQ(panel->backlight.controller),
  888. panel->backlight.max);
  889. intel_panel_actually_set_backlight(conn_state, panel->backlight.level);
  890. pwm_ctl = 0;
  891. if (panel->backlight.active_low_pwm)
  892. pwm_ctl |= BXT_BLC_PWM_POLARITY;
  893. I915_WRITE(BXT_BLC_PWM_CTL(panel->backlight.controller), pwm_ctl);
  894. POSTING_READ(BXT_BLC_PWM_CTL(panel->backlight.controller));
  895. I915_WRITE(BXT_BLC_PWM_CTL(panel->backlight.controller),
  896. pwm_ctl | BXT_BLC_PWM_ENABLE);
  897. }
  898. static void pwm_enable_backlight(const struct intel_crtc_state *crtc_state,
  899. const struct drm_connector_state *conn_state)
  900. {
  901. struct intel_connector *connector = to_intel_connector(conn_state->connector);
  902. struct intel_panel *panel = &connector->panel;
  903. pwm_enable(panel->backlight.pwm);
  904. intel_panel_actually_set_backlight(conn_state, panel->backlight.level);
  905. }
  906. void intel_panel_enable_backlight(const struct intel_crtc_state *crtc_state,
  907. const struct drm_connector_state *conn_state)
  908. {
  909. struct intel_connector *connector = to_intel_connector(conn_state->connector);
  910. struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
  911. struct intel_panel *panel = &connector->panel;
  912. enum pipe pipe = to_intel_crtc(crtc_state->base.crtc)->pipe;
  913. if (!panel->backlight.present)
  914. return;
  915. DRM_DEBUG_KMS("pipe %c\n", pipe_name(pipe));
  916. mutex_lock(&dev_priv->backlight_lock);
  917. WARN_ON(panel->backlight.max == 0);
  918. if (panel->backlight.level <= panel->backlight.min) {
  919. panel->backlight.level = panel->backlight.max;
  920. if (panel->backlight.device)
  921. panel->backlight.device->props.brightness =
  922. scale_hw_to_user(connector,
  923. panel->backlight.level,
  924. panel->backlight.device->props.max_brightness);
  925. }
  926. panel->backlight.enable(crtc_state, conn_state);
  927. panel->backlight.enabled = true;
  928. if (panel->backlight.device)
  929. panel->backlight.device->props.power = FB_BLANK_UNBLANK;
  930. mutex_unlock(&dev_priv->backlight_lock);
  931. }
  932. #if IS_ENABLED(CONFIG_BACKLIGHT_CLASS_DEVICE)
  933. static u32 intel_panel_get_backlight(struct intel_connector *connector)
  934. {
  935. struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
  936. struct intel_panel *panel = &connector->panel;
  937. u32 val = 0;
  938. mutex_lock(&dev_priv->backlight_lock);
  939. if (panel->backlight.enabled) {
  940. val = panel->backlight.get(connector);
  941. val = intel_panel_compute_brightness(connector, val);
  942. }
  943. mutex_unlock(&dev_priv->backlight_lock);
  944. DRM_DEBUG_DRIVER("get backlight PWM = %d\n", val);
  945. return val;
  946. }
  947. /* set backlight brightness to level in range [0..max], scaling wrt hw min */
  948. static void intel_panel_set_backlight(const struct drm_connector_state *conn_state,
  949. u32 user_level, u32 user_max)
  950. {
  951. struct intel_connector *connector = to_intel_connector(conn_state->connector);
  952. struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
  953. struct intel_panel *panel = &connector->panel;
  954. u32 hw_level;
  955. if (!panel->backlight.present)
  956. return;
  957. mutex_lock(&dev_priv->backlight_lock);
  958. WARN_ON(panel->backlight.max == 0);
  959. hw_level = scale_user_to_hw(connector, user_level, user_max);
  960. panel->backlight.level = hw_level;
  961. if (panel->backlight.enabled)
  962. intel_panel_actually_set_backlight(conn_state, hw_level);
  963. mutex_unlock(&dev_priv->backlight_lock);
  964. }
  965. static int intel_backlight_device_update_status(struct backlight_device *bd)
  966. {
  967. struct intel_connector *connector = bl_get_data(bd);
  968. struct intel_panel *panel = &connector->panel;
  969. struct drm_device *dev = connector->base.dev;
  970. drm_modeset_lock(&dev->mode_config.connection_mutex, NULL);
  971. DRM_DEBUG_KMS("updating intel_backlight, brightness=%d/%d\n",
  972. bd->props.brightness, bd->props.max_brightness);
  973. intel_panel_set_backlight(connector->base.state, bd->props.brightness,
  974. bd->props.max_brightness);
  975. /*
  976. * Allow flipping bl_power as a sub-state of enabled. Sadly the
  977. * backlight class device does not make it easy to to differentiate
  978. * between callbacks for brightness and bl_power, so our backlight_power
  979. * callback needs to take this into account.
  980. */
  981. if (panel->backlight.enabled) {
  982. if (panel->backlight.power) {
  983. bool enable = bd->props.power == FB_BLANK_UNBLANK &&
  984. bd->props.brightness != 0;
  985. panel->backlight.power(connector, enable);
  986. }
  987. } else {
  988. bd->props.power = FB_BLANK_POWERDOWN;
  989. }
  990. drm_modeset_unlock(&dev->mode_config.connection_mutex);
  991. return 0;
  992. }
  993. static int intel_backlight_device_get_brightness(struct backlight_device *bd)
  994. {
  995. struct intel_connector *connector = bl_get_data(bd);
  996. struct drm_device *dev = connector->base.dev;
  997. struct drm_i915_private *dev_priv = to_i915(dev);
  998. u32 hw_level;
  999. int ret;
  1000. intel_runtime_pm_get(dev_priv);
  1001. drm_modeset_lock(&dev->mode_config.connection_mutex, NULL);
  1002. hw_level = intel_panel_get_backlight(connector);
  1003. ret = scale_hw_to_user(connector, hw_level, bd->props.max_brightness);
  1004. drm_modeset_unlock(&dev->mode_config.connection_mutex);
  1005. intel_runtime_pm_put(dev_priv);
  1006. return ret;
  1007. }
  1008. static const struct backlight_ops intel_backlight_device_ops = {
  1009. .update_status = intel_backlight_device_update_status,
  1010. .get_brightness = intel_backlight_device_get_brightness,
  1011. };
  1012. int intel_backlight_device_register(struct intel_connector *connector)
  1013. {
  1014. struct intel_panel *panel = &connector->panel;
  1015. struct backlight_properties props;
  1016. if (WARN_ON(panel->backlight.device))
  1017. return -ENODEV;
  1018. if (!panel->backlight.present)
  1019. return 0;
  1020. WARN_ON(panel->backlight.max == 0);
  1021. memset(&props, 0, sizeof(props));
  1022. props.type = BACKLIGHT_RAW;
  1023. /*
  1024. * Note: Everything should work even if the backlight device max
  1025. * presented to the userspace is arbitrarily chosen.
  1026. */
  1027. props.max_brightness = panel->backlight.max;
  1028. props.brightness = scale_hw_to_user(connector,
  1029. panel->backlight.level,
  1030. props.max_brightness);
  1031. if (panel->backlight.enabled)
  1032. props.power = FB_BLANK_UNBLANK;
  1033. else
  1034. props.power = FB_BLANK_POWERDOWN;
  1035. /*
  1036. * Note: using the same name independent of the connector prevents
  1037. * registration of multiple backlight devices in the driver.
  1038. */
  1039. panel->backlight.device =
  1040. backlight_device_register("intel_backlight",
  1041. connector->base.kdev,
  1042. connector,
  1043. &intel_backlight_device_ops, &props);
  1044. if (IS_ERR(panel->backlight.device)) {
  1045. DRM_ERROR("Failed to register backlight: %ld\n",
  1046. PTR_ERR(panel->backlight.device));
  1047. panel->backlight.device = NULL;
  1048. return -ENODEV;
  1049. }
  1050. DRM_DEBUG_KMS("Connector %s backlight sysfs interface registered\n",
  1051. connector->base.name);
  1052. return 0;
  1053. }
  1054. void intel_backlight_device_unregister(struct intel_connector *connector)
  1055. {
  1056. struct intel_panel *panel = &connector->panel;
  1057. if (panel->backlight.device) {
  1058. backlight_device_unregister(panel->backlight.device);
  1059. panel->backlight.device = NULL;
  1060. }
  1061. }
  1062. #endif /* CONFIG_BACKLIGHT_CLASS_DEVICE */
  1063. /*
  1064. * CNP: PWM clock frequency is 19.2 MHz or 24 MHz.
  1065. * PWM increment = 1
  1066. */
  1067. static u32 cnp_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz)
  1068. {
  1069. struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
  1070. return DIV_ROUND_CLOSEST(KHz(dev_priv->rawclk_freq), pwm_freq_hz);
  1071. }
  1072. /*
  1073. * BXT: PWM clock frequency = 19.2 MHz.
  1074. */
  1075. static u32 bxt_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz)
  1076. {
  1077. return DIV_ROUND_CLOSEST(KHz(19200), pwm_freq_hz);
  1078. }
  1079. /*
  1080. * SPT: This value represents the period of the PWM stream in clock periods
  1081. * multiplied by 16 (default increment) or 128 (alternate increment selected in
  1082. * SCHICKEN_1 bit 0). PWM clock is 24 MHz.
  1083. */
  1084. static u32 spt_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz)
  1085. {
  1086. struct intel_panel *panel = &connector->panel;
  1087. u32 mul;
  1088. if (panel->backlight.alternate_pwm_increment)
  1089. mul = 128;
  1090. else
  1091. mul = 16;
  1092. return DIV_ROUND_CLOSEST(MHz(24), pwm_freq_hz * mul);
  1093. }
  1094. /*
  1095. * LPT: This value represents the period of the PWM stream in clock periods
  1096. * multiplied by 128 (default increment) or 16 (alternate increment, selected in
  1097. * LPT SOUTH_CHICKEN2 register bit 5).
  1098. */
  1099. static u32 lpt_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz)
  1100. {
  1101. struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
  1102. struct intel_panel *panel = &connector->panel;
  1103. u32 mul, clock;
  1104. if (panel->backlight.alternate_pwm_increment)
  1105. mul = 16;
  1106. else
  1107. mul = 128;
  1108. if (HAS_PCH_LPT_H(dev_priv))
  1109. clock = MHz(135); /* LPT:H */
  1110. else
  1111. clock = MHz(24); /* LPT:LP */
  1112. return DIV_ROUND_CLOSEST(clock, pwm_freq_hz * mul);
  1113. }
  1114. /*
  1115. * ILK/SNB/IVB: This value represents the period of the PWM stream in PCH
  1116. * display raw clocks multiplied by 128.
  1117. */
  1118. static u32 pch_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz)
  1119. {
  1120. struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
  1121. return DIV_ROUND_CLOSEST(KHz(dev_priv->rawclk_freq), pwm_freq_hz * 128);
  1122. }
  1123. /*
  1124. * Gen2: This field determines the number of time base events (display core
  1125. * clock frequency/32) in total for a complete cycle of modulated backlight
  1126. * control.
  1127. *
  1128. * Gen3: A time base event equals the display core clock ([DevPNV] HRAW clock)
  1129. * divided by 32.
  1130. */
  1131. static u32 i9xx_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz)
  1132. {
  1133. struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
  1134. int clock;
  1135. if (IS_PINEVIEW(dev_priv))
  1136. clock = KHz(dev_priv->rawclk_freq);
  1137. else
  1138. clock = KHz(dev_priv->cdclk.hw.cdclk);
  1139. return DIV_ROUND_CLOSEST(clock, pwm_freq_hz * 32);
  1140. }
  1141. /*
  1142. * Gen4: This value represents the period of the PWM stream in display core
  1143. * clocks ([DevCTG] HRAW clocks) multiplied by 128.
  1144. *
  1145. */
  1146. static u32 i965_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz)
  1147. {
  1148. struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
  1149. int clock;
  1150. if (IS_G4X(dev_priv))
  1151. clock = KHz(dev_priv->rawclk_freq);
  1152. else
  1153. clock = KHz(dev_priv->cdclk.hw.cdclk);
  1154. return DIV_ROUND_CLOSEST(clock, pwm_freq_hz * 128);
  1155. }
  1156. /*
  1157. * VLV: This value represents the period of the PWM stream in display core
  1158. * clocks ([DevCTG] 200MHz HRAW clocks) multiplied by 128 or 25MHz S0IX clocks
  1159. * multiplied by 16. CHV uses a 19.2MHz S0IX clock.
  1160. */
  1161. static u32 vlv_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz)
  1162. {
  1163. struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
  1164. int mul, clock;
  1165. if ((I915_READ(CBR1_VLV) & CBR_PWM_CLOCK_MUX_SELECT) == 0) {
  1166. if (IS_CHERRYVIEW(dev_priv))
  1167. clock = KHz(19200);
  1168. else
  1169. clock = MHz(25);
  1170. mul = 16;
  1171. } else {
  1172. clock = KHz(dev_priv->rawclk_freq);
  1173. mul = 128;
  1174. }
  1175. return DIV_ROUND_CLOSEST(clock, pwm_freq_hz * mul);
  1176. }
  1177. static u32 get_backlight_max_vbt(struct intel_connector *connector)
  1178. {
  1179. struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
  1180. struct intel_panel *panel = &connector->panel;
  1181. u16 pwm_freq_hz = dev_priv->vbt.backlight.pwm_freq_hz;
  1182. u32 pwm;
  1183. if (!panel->backlight.hz_to_pwm) {
  1184. DRM_DEBUG_KMS("backlight frequency conversion not supported\n");
  1185. return 0;
  1186. }
  1187. if (pwm_freq_hz) {
  1188. DRM_DEBUG_KMS("VBT defined backlight frequency %u Hz\n",
  1189. pwm_freq_hz);
  1190. } else {
  1191. pwm_freq_hz = 200;
  1192. DRM_DEBUG_KMS("default backlight frequency %u Hz\n",
  1193. pwm_freq_hz);
  1194. }
  1195. pwm = panel->backlight.hz_to_pwm(connector, pwm_freq_hz);
  1196. if (!pwm) {
  1197. DRM_DEBUG_KMS("backlight frequency conversion failed\n");
  1198. return 0;
  1199. }
  1200. return pwm;
  1201. }
  1202. /*
  1203. * Note: The setup hooks can't assume pipe is set!
  1204. */
  1205. static u32 get_backlight_min_vbt(struct intel_connector *connector)
  1206. {
  1207. struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
  1208. struct intel_panel *panel = &connector->panel;
  1209. int min;
  1210. WARN_ON(panel->backlight.max == 0);
  1211. /*
  1212. * XXX: If the vbt value is 255, it makes min equal to max, which leads
  1213. * to problems. There are such machines out there. Either our
  1214. * interpretation is wrong or the vbt has bogus data. Or both. Safeguard
  1215. * against this by letting the minimum be at most (arbitrarily chosen)
  1216. * 25% of the max.
  1217. */
  1218. min = clamp_t(int, dev_priv->vbt.backlight.min_brightness, 0, 64);
  1219. if (min != dev_priv->vbt.backlight.min_brightness) {
  1220. DRM_DEBUG_KMS("clamping VBT min backlight %d/255 to %d/255\n",
  1221. dev_priv->vbt.backlight.min_brightness, min);
  1222. }
  1223. /* vbt value is a coefficient in range [0..255] */
  1224. return scale(min, 0, 255, 0, panel->backlight.max);
  1225. }
  1226. static int lpt_setup_backlight(struct intel_connector *connector, enum pipe unused)
  1227. {
  1228. struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
  1229. struct intel_panel *panel = &connector->panel;
  1230. u32 pch_ctl1, pch_ctl2, val;
  1231. bool alt;
  1232. if (HAS_PCH_LPT(dev_priv))
  1233. alt = I915_READ(SOUTH_CHICKEN2) & LPT_PWM_GRANULARITY;
  1234. else
  1235. alt = I915_READ(SOUTH_CHICKEN1) & SPT_PWM_GRANULARITY;
  1236. panel->backlight.alternate_pwm_increment = alt;
  1237. pch_ctl1 = I915_READ(BLC_PWM_PCH_CTL1);
  1238. panel->backlight.active_low_pwm = pch_ctl1 & BLM_PCH_POLARITY;
  1239. pch_ctl2 = I915_READ(BLC_PWM_PCH_CTL2);
  1240. panel->backlight.max = pch_ctl2 >> 16;
  1241. if (!panel->backlight.max)
  1242. panel->backlight.max = get_backlight_max_vbt(connector);
  1243. if (!panel->backlight.max)
  1244. return -ENODEV;
  1245. panel->backlight.min = get_backlight_min_vbt(connector);
  1246. val = lpt_get_backlight(connector);
  1247. val = intel_panel_compute_brightness(connector, val);
  1248. panel->backlight.level = clamp(val, panel->backlight.min,
  1249. panel->backlight.max);
  1250. panel->backlight.enabled = pch_ctl1 & BLM_PCH_PWM_ENABLE;
  1251. return 0;
  1252. }
  1253. static int pch_setup_backlight(struct intel_connector *connector, enum pipe unused)
  1254. {
  1255. struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
  1256. struct intel_panel *panel = &connector->panel;
  1257. u32 cpu_ctl2, pch_ctl1, pch_ctl2, val;
  1258. pch_ctl1 = I915_READ(BLC_PWM_PCH_CTL1);
  1259. panel->backlight.active_low_pwm = pch_ctl1 & BLM_PCH_POLARITY;
  1260. pch_ctl2 = I915_READ(BLC_PWM_PCH_CTL2);
  1261. panel->backlight.max = pch_ctl2 >> 16;
  1262. if (!panel->backlight.max)
  1263. panel->backlight.max = get_backlight_max_vbt(connector);
  1264. if (!panel->backlight.max)
  1265. return -ENODEV;
  1266. panel->backlight.min = get_backlight_min_vbt(connector);
  1267. val = pch_get_backlight(connector);
  1268. val = intel_panel_compute_brightness(connector, val);
  1269. panel->backlight.level = clamp(val, panel->backlight.min,
  1270. panel->backlight.max);
  1271. cpu_ctl2 = I915_READ(BLC_PWM_CPU_CTL2);
  1272. panel->backlight.enabled = (cpu_ctl2 & BLM_PWM_ENABLE) &&
  1273. (pch_ctl1 & BLM_PCH_PWM_ENABLE);
  1274. return 0;
  1275. }
  1276. static int i9xx_setup_backlight(struct intel_connector *connector, enum pipe unused)
  1277. {
  1278. struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
  1279. struct intel_panel *panel = &connector->panel;
  1280. u32 ctl, val;
  1281. ctl = I915_READ(BLC_PWM_CTL);
  1282. if (IS_GEN2(dev_priv) || IS_I915GM(dev_priv) || IS_I945GM(dev_priv))
  1283. panel->backlight.combination_mode = ctl & BLM_LEGACY_MODE;
  1284. if (IS_PINEVIEW(dev_priv))
  1285. panel->backlight.active_low_pwm = ctl & BLM_POLARITY_PNV;
  1286. panel->backlight.max = ctl >> 17;
  1287. if (!panel->backlight.max) {
  1288. panel->backlight.max = get_backlight_max_vbt(connector);
  1289. panel->backlight.max >>= 1;
  1290. }
  1291. if (!panel->backlight.max)
  1292. return -ENODEV;
  1293. if (panel->backlight.combination_mode)
  1294. panel->backlight.max *= 0xff;
  1295. panel->backlight.min = get_backlight_min_vbt(connector);
  1296. val = i9xx_get_backlight(connector);
  1297. val = intel_panel_compute_brightness(connector, val);
  1298. panel->backlight.level = clamp(val, panel->backlight.min,
  1299. panel->backlight.max);
  1300. panel->backlight.enabled = val != 0;
  1301. return 0;
  1302. }
  1303. static int i965_setup_backlight(struct intel_connector *connector, enum pipe unused)
  1304. {
  1305. struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
  1306. struct intel_panel *panel = &connector->panel;
  1307. u32 ctl, ctl2, val;
  1308. ctl2 = I915_READ(BLC_PWM_CTL2);
  1309. panel->backlight.combination_mode = ctl2 & BLM_COMBINATION_MODE;
  1310. panel->backlight.active_low_pwm = ctl2 & BLM_POLARITY_I965;
  1311. ctl = I915_READ(BLC_PWM_CTL);
  1312. panel->backlight.max = ctl >> 16;
  1313. if (!panel->backlight.max)
  1314. panel->backlight.max = get_backlight_max_vbt(connector);
  1315. if (!panel->backlight.max)
  1316. return -ENODEV;
  1317. if (panel->backlight.combination_mode)
  1318. panel->backlight.max *= 0xff;
  1319. panel->backlight.min = get_backlight_min_vbt(connector);
  1320. val = i9xx_get_backlight(connector);
  1321. val = intel_panel_compute_brightness(connector, val);
  1322. panel->backlight.level = clamp(val, panel->backlight.min,
  1323. panel->backlight.max);
  1324. panel->backlight.enabled = ctl2 & BLM_PWM_ENABLE;
  1325. return 0;
  1326. }
  1327. static int vlv_setup_backlight(struct intel_connector *connector, enum pipe pipe)
  1328. {
  1329. struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
  1330. struct intel_panel *panel = &connector->panel;
  1331. u32 ctl, ctl2, val;
  1332. if (WARN_ON(pipe != PIPE_A && pipe != PIPE_B))
  1333. return -ENODEV;
  1334. ctl2 = I915_READ(VLV_BLC_PWM_CTL2(pipe));
  1335. panel->backlight.active_low_pwm = ctl2 & BLM_POLARITY_I965;
  1336. ctl = I915_READ(VLV_BLC_PWM_CTL(pipe));
  1337. panel->backlight.max = ctl >> 16;
  1338. if (!panel->backlight.max)
  1339. panel->backlight.max = get_backlight_max_vbt(connector);
  1340. if (!panel->backlight.max)
  1341. return -ENODEV;
  1342. panel->backlight.min = get_backlight_min_vbt(connector);
  1343. val = _vlv_get_backlight(dev_priv, pipe);
  1344. val = intel_panel_compute_brightness(connector, val);
  1345. panel->backlight.level = clamp(val, panel->backlight.min,
  1346. panel->backlight.max);
  1347. panel->backlight.enabled = ctl2 & BLM_PWM_ENABLE;
  1348. return 0;
  1349. }
  1350. static int
  1351. bxt_setup_backlight(struct intel_connector *connector, enum pipe unused)
  1352. {
  1353. struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
  1354. struct intel_panel *panel = &connector->panel;
  1355. u32 pwm_ctl, val;
  1356. panel->backlight.controller = dev_priv->vbt.backlight.controller;
  1357. pwm_ctl = I915_READ(BXT_BLC_PWM_CTL(panel->backlight.controller));
  1358. /* Controller 1 uses the utility pin. */
  1359. if (panel->backlight.controller == 1) {
  1360. val = I915_READ(UTIL_PIN_CTL);
  1361. panel->backlight.util_pin_active_low =
  1362. val & UTIL_PIN_POLARITY;
  1363. }
  1364. panel->backlight.active_low_pwm = pwm_ctl & BXT_BLC_PWM_POLARITY;
  1365. panel->backlight.max =
  1366. I915_READ(BXT_BLC_PWM_FREQ(panel->backlight.controller));
  1367. if (!panel->backlight.max)
  1368. panel->backlight.max = get_backlight_max_vbt(connector);
  1369. if (!panel->backlight.max)
  1370. return -ENODEV;
  1371. panel->backlight.min = get_backlight_min_vbt(connector);
  1372. val = bxt_get_backlight(connector);
  1373. val = intel_panel_compute_brightness(connector, val);
  1374. panel->backlight.level = clamp(val, panel->backlight.min,
  1375. panel->backlight.max);
  1376. panel->backlight.enabled = pwm_ctl & BXT_BLC_PWM_ENABLE;
  1377. return 0;
  1378. }
  1379. static int
  1380. cnp_setup_backlight(struct intel_connector *connector, enum pipe unused)
  1381. {
  1382. struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
  1383. struct intel_panel *panel = &connector->panel;
  1384. u32 pwm_ctl, val;
  1385. /*
  1386. * CNP has the BXT implementation of backlight, but with only one
  1387. * controller. TODO: ICP has multiple controllers but we only use
  1388. * controller 0 for now.
  1389. */
  1390. panel->backlight.controller = 0;
  1391. pwm_ctl = I915_READ(BXT_BLC_PWM_CTL(panel->backlight.controller));
  1392. panel->backlight.active_low_pwm = pwm_ctl & BXT_BLC_PWM_POLARITY;
  1393. panel->backlight.max =
  1394. I915_READ(BXT_BLC_PWM_FREQ(panel->backlight.controller));
  1395. if (!panel->backlight.max)
  1396. panel->backlight.max = get_backlight_max_vbt(connector);
  1397. if (!panel->backlight.max)
  1398. return -ENODEV;
  1399. panel->backlight.min = get_backlight_min_vbt(connector);
  1400. val = bxt_get_backlight(connector);
  1401. val = intel_panel_compute_brightness(connector, val);
  1402. panel->backlight.level = clamp(val, panel->backlight.min,
  1403. panel->backlight.max);
  1404. panel->backlight.enabled = pwm_ctl & BXT_BLC_PWM_ENABLE;
  1405. return 0;
  1406. }
  1407. static int pwm_setup_backlight(struct intel_connector *connector,
  1408. enum pipe pipe)
  1409. {
  1410. struct drm_device *dev = connector->base.dev;
  1411. struct intel_panel *panel = &connector->panel;
  1412. int retval;
  1413. /* Get the PWM chip for backlight control */
  1414. panel->backlight.pwm = pwm_get(dev->dev, "pwm_backlight");
  1415. if (IS_ERR(panel->backlight.pwm)) {
  1416. DRM_ERROR("Failed to own the pwm chip\n");
  1417. panel->backlight.pwm = NULL;
  1418. return -ENODEV;
  1419. }
  1420. /*
  1421. * FIXME: pwm_apply_args() should be removed when switching to
  1422. * the atomic PWM API.
  1423. */
  1424. pwm_apply_args(panel->backlight.pwm);
  1425. retval = pwm_config(panel->backlight.pwm, CRC_PMIC_PWM_PERIOD_NS,
  1426. CRC_PMIC_PWM_PERIOD_NS);
  1427. if (retval < 0) {
  1428. DRM_ERROR("Failed to configure the pwm chip\n");
  1429. pwm_put(panel->backlight.pwm);
  1430. panel->backlight.pwm = NULL;
  1431. return retval;
  1432. }
  1433. panel->backlight.min = 0; /* 0% */
  1434. panel->backlight.max = 100; /* 100% */
  1435. panel->backlight.level = DIV_ROUND_UP(
  1436. pwm_get_duty_cycle(panel->backlight.pwm) * 100,
  1437. CRC_PMIC_PWM_PERIOD_NS);
  1438. panel->backlight.enabled = panel->backlight.level != 0;
  1439. return 0;
  1440. }
  1441. int intel_panel_setup_backlight(struct drm_connector *connector, enum pipe pipe)
  1442. {
  1443. struct drm_i915_private *dev_priv = to_i915(connector->dev);
  1444. struct intel_connector *intel_connector = to_intel_connector(connector);
  1445. struct intel_panel *panel = &intel_connector->panel;
  1446. int ret;
  1447. if (!dev_priv->vbt.backlight.present) {
  1448. if (dev_priv->quirks & QUIRK_BACKLIGHT_PRESENT) {
  1449. DRM_DEBUG_KMS("no backlight present per VBT, but present per quirk\n");
  1450. } else {
  1451. DRM_DEBUG_KMS("no backlight present per VBT\n");
  1452. return 0;
  1453. }
  1454. }
  1455. /* ensure intel_panel has been initialized first */
  1456. if (WARN_ON(!panel->backlight.setup))
  1457. return -ENODEV;
  1458. /* set level and max in panel struct */
  1459. mutex_lock(&dev_priv->backlight_lock);
  1460. ret = panel->backlight.setup(intel_connector, pipe);
  1461. mutex_unlock(&dev_priv->backlight_lock);
  1462. if (ret) {
  1463. DRM_DEBUG_KMS("failed to setup backlight for connector %s\n",
  1464. connector->name);
  1465. return ret;
  1466. }
  1467. panel->backlight.present = true;
  1468. DRM_DEBUG_KMS("Connector %s backlight initialized, %s, brightness %u/%u\n",
  1469. connector->name,
  1470. enableddisabled(panel->backlight.enabled),
  1471. panel->backlight.level, panel->backlight.max);
  1472. return 0;
  1473. }
  1474. void intel_panel_destroy_backlight(struct drm_connector *connector)
  1475. {
  1476. struct intel_connector *intel_connector = to_intel_connector(connector);
  1477. struct intel_panel *panel = &intel_connector->panel;
  1478. /* dispose of the pwm */
  1479. if (panel->backlight.pwm)
  1480. pwm_put(panel->backlight.pwm);
  1481. panel->backlight.present = false;
  1482. }
  1483. /* Set up chip specific backlight functions */
  1484. static void
  1485. intel_panel_init_backlight_funcs(struct intel_panel *panel)
  1486. {
  1487. struct intel_connector *connector =
  1488. container_of(panel, struct intel_connector, panel);
  1489. struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
  1490. if (connector->base.connector_type == DRM_MODE_CONNECTOR_eDP &&
  1491. intel_dp_aux_init_backlight_funcs(connector) == 0)
  1492. return;
  1493. if (connector->base.connector_type == DRM_MODE_CONNECTOR_DSI &&
  1494. intel_dsi_dcs_init_backlight_funcs(connector) == 0)
  1495. return;
  1496. if (IS_GEN9_LP(dev_priv)) {
  1497. panel->backlight.setup = bxt_setup_backlight;
  1498. panel->backlight.enable = bxt_enable_backlight;
  1499. panel->backlight.disable = bxt_disable_backlight;
  1500. panel->backlight.set = bxt_set_backlight;
  1501. panel->backlight.get = bxt_get_backlight;
  1502. panel->backlight.hz_to_pwm = bxt_hz_to_pwm;
  1503. } else if (HAS_PCH_CNP(dev_priv) || HAS_PCH_ICP(dev_priv)) {
  1504. panel->backlight.setup = cnp_setup_backlight;
  1505. panel->backlight.enable = cnp_enable_backlight;
  1506. panel->backlight.disable = cnp_disable_backlight;
  1507. panel->backlight.set = bxt_set_backlight;
  1508. panel->backlight.get = bxt_get_backlight;
  1509. panel->backlight.hz_to_pwm = cnp_hz_to_pwm;
  1510. } else if (HAS_PCH_LPT(dev_priv) || HAS_PCH_SPT(dev_priv) ||
  1511. HAS_PCH_KBP(dev_priv)) {
  1512. panel->backlight.setup = lpt_setup_backlight;
  1513. panel->backlight.enable = lpt_enable_backlight;
  1514. panel->backlight.disable = lpt_disable_backlight;
  1515. panel->backlight.set = lpt_set_backlight;
  1516. panel->backlight.get = lpt_get_backlight;
  1517. if (HAS_PCH_LPT(dev_priv))
  1518. panel->backlight.hz_to_pwm = lpt_hz_to_pwm;
  1519. else
  1520. panel->backlight.hz_to_pwm = spt_hz_to_pwm;
  1521. } else if (HAS_PCH_SPLIT(dev_priv)) {
  1522. panel->backlight.setup = pch_setup_backlight;
  1523. panel->backlight.enable = pch_enable_backlight;
  1524. panel->backlight.disable = pch_disable_backlight;
  1525. panel->backlight.set = pch_set_backlight;
  1526. panel->backlight.get = pch_get_backlight;
  1527. panel->backlight.hz_to_pwm = pch_hz_to_pwm;
  1528. } else if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) {
  1529. if (connector->base.connector_type == DRM_MODE_CONNECTOR_DSI) {
  1530. panel->backlight.setup = pwm_setup_backlight;
  1531. panel->backlight.enable = pwm_enable_backlight;
  1532. panel->backlight.disable = pwm_disable_backlight;
  1533. panel->backlight.set = pwm_set_backlight;
  1534. panel->backlight.get = pwm_get_backlight;
  1535. } else {
  1536. panel->backlight.setup = vlv_setup_backlight;
  1537. panel->backlight.enable = vlv_enable_backlight;
  1538. panel->backlight.disable = vlv_disable_backlight;
  1539. panel->backlight.set = vlv_set_backlight;
  1540. panel->backlight.get = vlv_get_backlight;
  1541. panel->backlight.hz_to_pwm = vlv_hz_to_pwm;
  1542. }
  1543. } else if (IS_GEN4(dev_priv)) {
  1544. panel->backlight.setup = i965_setup_backlight;
  1545. panel->backlight.enable = i965_enable_backlight;
  1546. panel->backlight.disable = i965_disable_backlight;
  1547. panel->backlight.set = i9xx_set_backlight;
  1548. panel->backlight.get = i9xx_get_backlight;
  1549. panel->backlight.hz_to_pwm = i965_hz_to_pwm;
  1550. } else {
  1551. panel->backlight.setup = i9xx_setup_backlight;
  1552. panel->backlight.enable = i9xx_enable_backlight;
  1553. panel->backlight.disable = i9xx_disable_backlight;
  1554. panel->backlight.set = i9xx_set_backlight;
  1555. panel->backlight.get = i9xx_get_backlight;
  1556. panel->backlight.hz_to_pwm = i9xx_hz_to_pwm;
  1557. }
  1558. }
  1559. int intel_panel_init(struct intel_panel *panel,
  1560. struct drm_display_mode *fixed_mode,
  1561. struct drm_display_mode *downclock_mode)
  1562. {
  1563. intel_panel_init_backlight_funcs(panel);
  1564. panel->fixed_mode = fixed_mode;
  1565. panel->downclock_mode = downclock_mode;
  1566. return 0;
  1567. }
  1568. void intel_panel_fini(struct intel_panel *panel)
  1569. {
  1570. struct intel_connector *intel_connector =
  1571. container_of(panel, struct intel_connector, panel);
  1572. if (panel->fixed_mode)
  1573. drm_mode_destroy(intel_connector->base.dev, panel->fixed_mode);
  1574. if (panel->downclock_mode)
  1575. drm_mode_destroy(intel_connector->base.dev,
  1576. panel->downclock_mode);
  1577. }