intel_guc_log.h 3.2 KB

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  1. /*
  2. * Copyright © 2014-2017 Intel Corporation
  3. *
  4. * Permission is hereby granted, free of charge, to any person obtaining a
  5. * copy of this software and associated documentation files (the "Software"),
  6. * to deal in the Software without restriction, including without limitation
  7. * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  8. * and/or sell copies of the Software, and to permit persons to whom the
  9. * Software is furnished to do so, subject to the following conditions:
  10. *
  11. * The above copyright notice and this permission notice (including the next
  12. * paragraph) shall be included in all copies or substantial portions of the
  13. * Software.
  14. *
  15. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  18. * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19. * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20. * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  21. * IN THE SOFTWARE.
  22. *
  23. */
  24. #ifndef _INTEL_GUC_LOG_H_
  25. #define _INTEL_GUC_LOG_H_
  26. #include <linux/mutex.h>
  27. #include <linux/relay.h>
  28. #include <linux/workqueue.h>
  29. #include "intel_guc_fwif.h"
  30. #include "i915_gem.h"
  31. struct intel_guc;
  32. #ifdef CONFIG_DRM_I915_DEBUG_GUC
  33. #define CRASH_BUFFER_SIZE SZ_2M
  34. #define DPC_BUFFER_SIZE SZ_8M
  35. #define ISR_BUFFER_SIZE SZ_8M
  36. #else
  37. #define CRASH_BUFFER_SIZE SZ_8K
  38. #define DPC_BUFFER_SIZE SZ_32K
  39. #define ISR_BUFFER_SIZE SZ_32K
  40. #endif
  41. /*
  42. * While we're using plain log level in i915, GuC controls are much more...
  43. * "elaborate"? We have a couple of bits for verbosity, separate bit for actual
  44. * log enabling, and separate bit for default logging - which "conveniently"
  45. * ignores the enable bit.
  46. */
  47. #define GUC_LOG_LEVEL_DISABLED 0
  48. #define GUC_LOG_LEVEL_NON_VERBOSE 1
  49. #define GUC_LOG_LEVEL_IS_ENABLED(x) ((x) > GUC_LOG_LEVEL_DISABLED)
  50. #define GUC_LOG_LEVEL_IS_VERBOSE(x) ((x) > GUC_LOG_LEVEL_NON_VERBOSE)
  51. #define GUC_LOG_LEVEL_TO_VERBOSITY(x) ({ \
  52. typeof(x) _x = (x); \
  53. GUC_LOG_LEVEL_IS_VERBOSE(_x) ? _x - 2 : 0; \
  54. })
  55. #define GUC_VERBOSITY_TO_LOG_LEVEL(x) ((x) + 2)
  56. #define GUC_LOG_LEVEL_MAX GUC_VERBOSITY_TO_LOG_LEVEL(GUC_LOG_VERBOSITY_MAX)
  57. struct intel_guc_log {
  58. u32 level;
  59. struct i915_vma *vma;
  60. struct {
  61. void *buf_addr;
  62. struct workqueue_struct *flush_wq;
  63. struct work_struct flush_work;
  64. struct rchan *channel;
  65. struct mutex lock;
  66. u32 full_count;
  67. } relay;
  68. /* logging related stats */
  69. struct {
  70. u32 sampled_overflow;
  71. u32 overflow;
  72. u32 flush;
  73. } stats[GUC_MAX_LOG_BUFFER];
  74. };
  75. void intel_guc_log_init_early(struct intel_guc_log *log);
  76. int intel_guc_log_create(struct intel_guc_log *log);
  77. void intel_guc_log_destroy(struct intel_guc_log *log);
  78. int intel_guc_log_set_level(struct intel_guc_log *log, u32 level);
  79. bool intel_guc_log_relay_enabled(const struct intel_guc_log *log);
  80. int intel_guc_log_relay_open(struct intel_guc_log *log);
  81. void intel_guc_log_relay_flush(struct intel_guc_log *log);
  82. void intel_guc_log_relay_close(struct intel_guc_log *log);
  83. void intel_guc_log_handle_flush_event(struct intel_guc_log *log);
  84. static inline u32 intel_guc_log_get_level(struct intel_guc_log *log)
  85. {
  86. return log->level;
  87. }
  88. #endif