vgpu.c 17 KB

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  1. /*
  2. * Copyright(c) 2011-2016 Intel Corporation. All rights reserved.
  3. *
  4. * Permission is hereby granted, free of charge, to any person obtaining a
  5. * copy of this software and associated documentation files (the "Software"),
  6. * to deal in the Software without restriction, including without limitation
  7. * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  8. * and/or sell copies of the Software, and to permit persons to whom the
  9. * Software is furnished to do so, subject to the following conditions:
  10. *
  11. * The above copyright notice and this permission notice (including the next
  12. * paragraph) shall be included in all copies or substantial portions of the
  13. * Software.
  14. *
  15. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  18. * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19. * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  20. * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  21. * SOFTWARE.
  22. *
  23. * Authors:
  24. * Eddie Dong <eddie.dong@intel.com>
  25. * Kevin Tian <kevin.tian@intel.com>
  26. *
  27. * Contributors:
  28. * Ping Gao <ping.a.gao@intel.com>
  29. * Zhi Wang <zhi.a.wang@intel.com>
  30. * Bing Niu <bing.niu@intel.com>
  31. *
  32. */
  33. #include "i915_drv.h"
  34. #include "gvt.h"
  35. #include "i915_pvinfo.h"
  36. void populate_pvinfo_page(struct intel_vgpu *vgpu)
  37. {
  38. /* setup the ballooning information */
  39. vgpu_vreg64_t(vgpu, vgtif_reg(magic)) = VGT_MAGIC;
  40. vgpu_vreg_t(vgpu, vgtif_reg(version_major)) = 1;
  41. vgpu_vreg_t(vgpu, vgtif_reg(version_minor)) = 0;
  42. vgpu_vreg_t(vgpu, vgtif_reg(display_ready)) = 0;
  43. vgpu_vreg_t(vgpu, vgtif_reg(vgt_id)) = vgpu->id;
  44. vgpu_vreg_t(vgpu, vgtif_reg(vgt_caps)) = VGT_CAPS_FULL_48BIT_PPGTT;
  45. vgpu_vreg_t(vgpu, vgtif_reg(vgt_caps)) |= VGT_CAPS_HWSP_EMULATION;
  46. vgpu_vreg_t(vgpu, vgtif_reg(vgt_caps)) |= VGT_CAPS_HUGE_GTT;
  47. vgpu_vreg_t(vgpu, vgtif_reg(avail_rs.mappable_gmadr.base)) =
  48. vgpu_aperture_gmadr_base(vgpu);
  49. vgpu_vreg_t(vgpu, vgtif_reg(avail_rs.mappable_gmadr.size)) =
  50. vgpu_aperture_sz(vgpu);
  51. vgpu_vreg_t(vgpu, vgtif_reg(avail_rs.nonmappable_gmadr.base)) =
  52. vgpu_hidden_gmadr_base(vgpu);
  53. vgpu_vreg_t(vgpu, vgtif_reg(avail_rs.nonmappable_gmadr.size)) =
  54. vgpu_hidden_sz(vgpu);
  55. vgpu_vreg_t(vgpu, vgtif_reg(avail_rs.fence_num)) = vgpu_fence_sz(vgpu);
  56. vgpu_vreg_t(vgpu, vgtif_reg(cursor_x_hot)) = UINT_MAX;
  57. vgpu_vreg_t(vgpu, vgtif_reg(cursor_y_hot)) = UINT_MAX;
  58. gvt_dbg_core("Populate PVINFO PAGE for vGPU %d\n", vgpu->id);
  59. gvt_dbg_core("aperture base [GMADR] 0x%llx size 0x%llx\n",
  60. vgpu_aperture_gmadr_base(vgpu), vgpu_aperture_sz(vgpu));
  61. gvt_dbg_core("hidden base [GMADR] 0x%llx size=0x%llx\n",
  62. vgpu_hidden_gmadr_base(vgpu), vgpu_hidden_sz(vgpu));
  63. gvt_dbg_core("fence size %d\n", vgpu_fence_sz(vgpu));
  64. WARN_ON(sizeof(struct vgt_if) != VGT_PVINFO_SIZE);
  65. }
  66. #define VGPU_MAX_WEIGHT 16
  67. #define VGPU_WEIGHT(vgpu_num) \
  68. (VGPU_MAX_WEIGHT / (vgpu_num))
  69. static struct {
  70. unsigned int low_mm;
  71. unsigned int high_mm;
  72. unsigned int fence;
  73. /* A vGPU with a weight of 8 will get twice as much GPU as a vGPU
  74. * with a weight of 4 on a contended host, different vGPU type has
  75. * different weight set. Legal weights range from 1 to 16.
  76. */
  77. unsigned int weight;
  78. enum intel_vgpu_edid edid;
  79. char *name;
  80. } vgpu_types[] = {
  81. /* Fixed vGPU type table */
  82. { MB_TO_BYTES(64), MB_TO_BYTES(384), 4, VGPU_WEIGHT(8), GVT_EDID_1024_768, "8" },
  83. { MB_TO_BYTES(128), MB_TO_BYTES(512), 4, VGPU_WEIGHT(4), GVT_EDID_1920_1200, "4" },
  84. { MB_TO_BYTES(256), MB_TO_BYTES(1024), 4, VGPU_WEIGHT(2), GVT_EDID_1920_1200, "2" },
  85. { MB_TO_BYTES(512), MB_TO_BYTES(2048), 4, VGPU_WEIGHT(1), GVT_EDID_1920_1200, "1" },
  86. };
  87. /**
  88. * intel_gvt_init_vgpu_types - initialize vGPU type list
  89. * @gvt : GVT device
  90. *
  91. * Initialize vGPU type list based on available resource.
  92. *
  93. */
  94. int intel_gvt_init_vgpu_types(struct intel_gvt *gvt)
  95. {
  96. unsigned int num_types;
  97. unsigned int i, low_avail, high_avail;
  98. unsigned int min_low;
  99. /* vGPU type name is defined as GVTg_Vx_y which contains
  100. * physical GPU generation type (e.g V4 as BDW server, V5 as
  101. * SKL server).
  102. *
  103. * Depend on physical SKU resource, might see vGPU types like
  104. * GVTg_V4_8, GVTg_V4_4, GVTg_V4_2, etc. We can create
  105. * different types of vGPU on same physical GPU depending on
  106. * available resource. Each vGPU type will have "avail_instance"
  107. * to indicate how many vGPU instance can be created for this
  108. * type.
  109. *
  110. */
  111. low_avail = gvt_aperture_sz(gvt) - HOST_LOW_GM_SIZE;
  112. high_avail = gvt_hidden_sz(gvt) - HOST_HIGH_GM_SIZE;
  113. num_types = sizeof(vgpu_types) / sizeof(vgpu_types[0]);
  114. gvt->types = kcalloc(num_types, sizeof(struct intel_vgpu_type),
  115. GFP_KERNEL);
  116. if (!gvt->types)
  117. return -ENOMEM;
  118. min_low = MB_TO_BYTES(32);
  119. for (i = 0; i < num_types; ++i) {
  120. if (low_avail / vgpu_types[i].low_mm == 0)
  121. break;
  122. gvt->types[i].low_gm_size = vgpu_types[i].low_mm;
  123. gvt->types[i].high_gm_size = vgpu_types[i].high_mm;
  124. gvt->types[i].fence = vgpu_types[i].fence;
  125. if (vgpu_types[i].weight < 1 ||
  126. vgpu_types[i].weight > VGPU_MAX_WEIGHT)
  127. return -EINVAL;
  128. gvt->types[i].weight = vgpu_types[i].weight;
  129. gvt->types[i].resolution = vgpu_types[i].edid;
  130. gvt->types[i].avail_instance = min(low_avail / vgpu_types[i].low_mm,
  131. high_avail / vgpu_types[i].high_mm);
  132. if (IS_GEN8(gvt->dev_priv))
  133. sprintf(gvt->types[i].name, "GVTg_V4_%s",
  134. vgpu_types[i].name);
  135. else if (IS_GEN9(gvt->dev_priv))
  136. sprintf(gvt->types[i].name, "GVTg_V5_%s",
  137. vgpu_types[i].name);
  138. gvt_dbg_core("type[%d]: %s avail %u low %u high %u fence %u weight %u res %s\n",
  139. i, gvt->types[i].name,
  140. gvt->types[i].avail_instance,
  141. gvt->types[i].low_gm_size,
  142. gvt->types[i].high_gm_size, gvt->types[i].fence,
  143. gvt->types[i].weight,
  144. vgpu_edid_str(gvt->types[i].resolution));
  145. }
  146. gvt->num_types = i;
  147. return 0;
  148. }
  149. void intel_gvt_clean_vgpu_types(struct intel_gvt *gvt)
  150. {
  151. kfree(gvt->types);
  152. }
  153. static void intel_gvt_update_vgpu_types(struct intel_gvt *gvt)
  154. {
  155. int i;
  156. unsigned int low_gm_avail, high_gm_avail, fence_avail;
  157. unsigned int low_gm_min, high_gm_min, fence_min;
  158. /* Need to depend on maxium hw resource size but keep on
  159. * static config for now.
  160. */
  161. low_gm_avail = gvt_aperture_sz(gvt) - HOST_LOW_GM_SIZE -
  162. gvt->gm.vgpu_allocated_low_gm_size;
  163. high_gm_avail = gvt_hidden_sz(gvt) - HOST_HIGH_GM_SIZE -
  164. gvt->gm.vgpu_allocated_high_gm_size;
  165. fence_avail = gvt_fence_sz(gvt) - HOST_FENCE -
  166. gvt->fence.vgpu_allocated_fence_num;
  167. for (i = 0; i < gvt->num_types; i++) {
  168. low_gm_min = low_gm_avail / gvt->types[i].low_gm_size;
  169. high_gm_min = high_gm_avail / gvt->types[i].high_gm_size;
  170. fence_min = fence_avail / gvt->types[i].fence;
  171. gvt->types[i].avail_instance = min(min(low_gm_min, high_gm_min),
  172. fence_min);
  173. gvt_dbg_core("update type[%d]: %s avail %u low %u high %u fence %u\n",
  174. i, gvt->types[i].name,
  175. gvt->types[i].avail_instance, gvt->types[i].low_gm_size,
  176. gvt->types[i].high_gm_size, gvt->types[i].fence);
  177. }
  178. }
  179. /**
  180. * intel_gvt_active_vgpu - activate a virtual GPU
  181. * @vgpu: virtual GPU
  182. *
  183. * This function is called when user wants to activate a virtual GPU.
  184. *
  185. */
  186. void intel_gvt_activate_vgpu(struct intel_vgpu *vgpu)
  187. {
  188. mutex_lock(&vgpu->gvt->lock);
  189. vgpu->active = true;
  190. mutex_unlock(&vgpu->gvt->lock);
  191. }
  192. /**
  193. * intel_gvt_deactive_vgpu - deactivate a virtual GPU
  194. * @vgpu: virtual GPU
  195. *
  196. * This function is called when user wants to deactivate a virtual GPU.
  197. * The virtual GPU will be stopped.
  198. *
  199. */
  200. void intel_gvt_deactivate_vgpu(struct intel_vgpu *vgpu)
  201. {
  202. mutex_lock(&vgpu->vgpu_lock);
  203. vgpu->active = false;
  204. if (atomic_read(&vgpu->submission.running_workload_num)) {
  205. mutex_unlock(&vgpu->vgpu_lock);
  206. intel_gvt_wait_vgpu_idle(vgpu);
  207. mutex_lock(&vgpu->vgpu_lock);
  208. }
  209. intel_vgpu_stop_schedule(vgpu);
  210. mutex_unlock(&vgpu->vgpu_lock);
  211. }
  212. /**
  213. * intel_gvt_release_vgpu - release a virtual GPU
  214. * @vgpu: virtual GPU
  215. *
  216. * This function is called when user wants to release a virtual GPU.
  217. * The virtual GPU will be stopped and all runtime information will be
  218. * destroyed.
  219. *
  220. */
  221. void intel_gvt_release_vgpu(struct intel_vgpu *vgpu)
  222. {
  223. intel_gvt_deactivate_vgpu(vgpu);
  224. mutex_lock(&vgpu->vgpu_lock);
  225. intel_vgpu_clean_workloads(vgpu, ALL_ENGINES);
  226. intel_vgpu_dmabuf_cleanup(vgpu);
  227. mutex_unlock(&vgpu->vgpu_lock);
  228. }
  229. /**
  230. * intel_gvt_destroy_vgpu - destroy a virtual GPU
  231. * @vgpu: virtual GPU
  232. *
  233. * This function is called when user wants to destroy a virtual GPU.
  234. *
  235. */
  236. void intel_gvt_destroy_vgpu(struct intel_vgpu *vgpu)
  237. {
  238. struct intel_gvt *gvt = vgpu->gvt;
  239. mutex_lock(&vgpu->vgpu_lock);
  240. WARN(vgpu->active, "vGPU is still active!\n");
  241. intel_gvt_debugfs_remove_vgpu(vgpu);
  242. intel_vgpu_clean_sched_policy(vgpu);
  243. intel_vgpu_clean_submission(vgpu);
  244. intel_vgpu_clean_display(vgpu);
  245. intel_vgpu_clean_opregion(vgpu);
  246. intel_vgpu_reset_ggtt(vgpu, true);
  247. intel_vgpu_clean_gtt(vgpu);
  248. intel_gvt_hypervisor_detach_vgpu(vgpu);
  249. intel_vgpu_free_resource(vgpu);
  250. intel_vgpu_clean_mmio(vgpu);
  251. intel_vgpu_dmabuf_cleanup(vgpu);
  252. mutex_unlock(&vgpu->vgpu_lock);
  253. mutex_lock(&gvt->lock);
  254. idr_remove(&gvt->vgpu_idr, vgpu->id);
  255. if (idr_is_empty(&gvt->vgpu_idr))
  256. intel_gvt_clean_irq(gvt);
  257. intel_gvt_update_vgpu_types(gvt);
  258. mutex_unlock(&gvt->lock);
  259. vfree(vgpu);
  260. }
  261. #define IDLE_VGPU_IDR 0
  262. /**
  263. * intel_gvt_create_idle_vgpu - create an idle virtual GPU
  264. * @gvt: GVT device
  265. *
  266. * This function is called when user wants to create an idle virtual GPU.
  267. *
  268. * Returns:
  269. * pointer to intel_vgpu, error pointer if failed.
  270. */
  271. struct intel_vgpu *intel_gvt_create_idle_vgpu(struct intel_gvt *gvt)
  272. {
  273. struct intel_vgpu *vgpu;
  274. enum intel_engine_id i;
  275. int ret;
  276. vgpu = vzalloc(sizeof(*vgpu));
  277. if (!vgpu)
  278. return ERR_PTR(-ENOMEM);
  279. vgpu->id = IDLE_VGPU_IDR;
  280. vgpu->gvt = gvt;
  281. mutex_init(&vgpu->vgpu_lock);
  282. for (i = 0; i < I915_NUM_ENGINES; i++)
  283. INIT_LIST_HEAD(&vgpu->submission.workload_q_head[i]);
  284. ret = intel_vgpu_init_sched_policy(vgpu);
  285. if (ret)
  286. goto out_free_vgpu;
  287. vgpu->active = false;
  288. return vgpu;
  289. out_free_vgpu:
  290. vfree(vgpu);
  291. return ERR_PTR(ret);
  292. }
  293. /**
  294. * intel_gvt_destroy_vgpu - destroy an idle virtual GPU
  295. * @vgpu: virtual GPU
  296. *
  297. * This function is called when user wants to destroy an idle virtual GPU.
  298. *
  299. */
  300. void intel_gvt_destroy_idle_vgpu(struct intel_vgpu *vgpu)
  301. {
  302. mutex_lock(&vgpu->vgpu_lock);
  303. intel_vgpu_clean_sched_policy(vgpu);
  304. mutex_unlock(&vgpu->vgpu_lock);
  305. vfree(vgpu);
  306. }
  307. static struct intel_vgpu *__intel_gvt_create_vgpu(struct intel_gvt *gvt,
  308. struct intel_vgpu_creation_params *param)
  309. {
  310. struct intel_vgpu *vgpu;
  311. int ret;
  312. gvt_dbg_core("handle %llu low %llu MB high %llu MB fence %llu\n",
  313. param->handle, param->low_gm_sz, param->high_gm_sz,
  314. param->fence_sz);
  315. vgpu = vzalloc(sizeof(*vgpu));
  316. if (!vgpu)
  317. return ERR_PTR(-ENOMEM);
  318. ret = idr_alloc(&gvt->vgpu_idr, vgpu, IDLE_VGPU_IDR + 1, GVT_MAX_VGPU,
  319. GFP_KERNEL);
  320. if (ret < 0)
  321. goto out_free_vgpu;
  322. vgpu->id = ret;
  323. vgpu->handle = param->handle;
  324. vgpu->gvt = gvt;
  325. vgpu->sched_ctl.weight = param->weight;
  326. mutex_init(&vgpu->vgpu_lock);
  327. mutex_init(&vgpu->dmabuf_lock);
  328. INIT_LIST_HEAD(&vgpu->dmabuf_obj_list_head);
  329. INIT_RADIX_TREE(&vgpu->page_track_tree, GFP_KERNEL);
  330. idr_init(&vgpu->object_idr);
  331. intel_vgpu_init_cfg_space(vgpu, param->primary);
  332. ret = intel_vgpu_init_mmio(vgpu);
  333. if (ret)
  334. goto out_clean_idr;
  335. ret = intel_vgpu_alloc_resource(vgpu, param);
  336. if (ret)
  337. goto out_clean_vgpu_mmio;
  338. populate_pvinfo_page(vgpu);
  339. ret = intel_gvt_hypervisor_attach_vgpu(vgpu);
  340. if (ret)
  341. goto out_clean_vgpu_resource;
  342. ret = intel_vgpu_init_gtt(vgpu);
  343. if (ret)
  344. goto out_detach_hypervisor_vgpu;
  345. ret = intel_vgpu_init_opregion(vgpu);
  346. if (ret)
  347. goto out_clean_gtt;
  348. ret = intel_vgpu_init_display(vgpu, param->resolution);
  349. if (ret)
  350. goto out_clean_opregion;
  351. ret = intel_vgpu_setup_submission(vgpu);
  352. if (ret)
  353. goto out_clean_display;
  354. ret = intel_vgpu_init_sched_policy(vgpu);
  355. if (ret)
  356. goto out_clean_submission;
  357. ret = intel_gvt_debugfs_add_vgpu(vgpu);
  358. if (ret)
  359. goto out_clean_sched_policy;
  360. ret = intel_gvt_hypervisor_set_opregion(vgpu);
  361. if (ret)
  362. goto out_clean_sched_policy;
  363. return vgpu;
  364. out_clean_sched_policy:
  365. intel_vgpu_clean_sched_policy(vgpu);
  366. out_clean_submission:
  367. intel_vgpu_clean_submission(vgpu);
  368. out_clean_display:
  369. intel_vgpu_clean_display(vgpu);
  370. out_clean_opregion:
  371. intel_vgpu_clean_opregion(vgpu);
  372. out_clean_gtt:
  373. intel_vgpu_clean_gtt(vgpu);
  374. out_detach_hypervisor_vgpu:
  375. intel_gvt_hypervisor_detach_vgpu(vgpu);
  376. out_clean_vgpu_resource:
  377. intel_vgpu_free_resource(vgpu);
  378. out_clean_vgpu_mmio:
  379. intel_vgpu_clean_mmio(vgpu);
  380. out_clean_idr:
  381. idr_remove(&gvt->vgpu_idr, vgpu->id);
  382. out_free_vgpu:
  383. vfree(vgpu);
  384. return ERR_PTR(ret);
  385. }
  386. /**
  387. * intel_gvt_create_vgpu - create a virtual GPU
  388. * @gvt: GVT device
  389. * @type: type of the vGPU to create
  390. *
  391. * This function is called when user wants to create a virtual GPU.
  392. *
  393. * Returns:
  394. * pointer to intel_vgpu, error pointer if failed.
  395. */
  396. struct intel_vgpu *intel_gvt_create_vgpu(struct intel_gvt *gvt,
  397. struct intel_vgpu_type *type)
  398. {
  399. struct intel_vgpu_creation_params param;
  400. struct intel_vgpu *vgpu;
  401. param.handle = 0;
  402. param.primary = 1;
  403. param.low_gm_sz = type->low_gm_size;
  404. param.high_gm_sz = type->high_gm_size;
  405. param.fence_sz = type->fence;
  406. param.weight = type->weight;
  407. param.resolution = type->resolution;
  408. /* XXX current param based on MB */
  409. param.low_gm_sz = BYTES_TO_MB(param.low_gm_sz);
  410. param.high_gm_sz = BYTES_TO_MB(param.high_gm_sz);
  411. mutex_lock(&gvt->lock);
  412. vgpu = __intel_gvt_create_vgpu(gvt, &param);
  413. if (!IS_ERR(vgpu))
  414. /* calculate left instance change for types */
  415. intel_gvt_update_vgpu_types(gvt);
  416. mutex_unlock(&gvt->lock);
  417. return vgpu;
  418. }
  419. /**
  420. * intel_gvt_reset_vgpu_locked - reset a virtual GPU by DMLR or GT reset
  421. * @vgpu: virtual GPU
  422. * @dmlr: vGPU Device Model Level Reset or GT Reset
  423. * @engine_mask: engines to reset for GT reset
  424. *
  425. * This function is called when user wants to reset a virtual GPU through
  426. * device model reset or GT reset. The caller should hold the vgpu lock.
  427. *
  428. * vGPU Device Model Level Reset (DMLR) simulates the PCI level reset to reset
  429. * the whole vGPU to default state as when it is created. This vGPU function
  430. * is required both for functionary and security concerns.The ultimate goal
  431. * of vGPU FLR is that reuse a vGPU instance by virtual machines. When we
  432. * assign a vGPU to a virtual machine we must isse such reset first.
  433. *
  434. * Full GT Reset and Per-Engine GT Reset are soft reset flow for GPU engines
  435. * (Render, Blitter, Video, Video Enhancement). It is defined by GPU Spec.
  436. * Unlike the FLR, GT reset only reset particular resource of a vGPU per
  437. * the reset request. Guest driver can issue a GT reset by programming the
  438. * virtual GDRST register to reset specific virtual GPU engine or all
  439. * engines.
  440. *
  441. * The parameter dev_level is to identify if we will do DMLR or GT reset.
  442. * The parameter engine_mask is to specific the engines that need to be
  443. * resetted. If value ALL_ENGINES is given for engine_mask, it means
  444. * the caller requests a full GT reset that we will reset all virtual
  445. * GPU engines. For FLR, engine_mask is ignored.
  446. */
  447. void intel_gvt_reset_vgpu_locked(struct intel_vgpu *vgpu, bool dmlr,
  448. unsigned int engine_mask)
  449. {
  450. struct intel_gvt *gvt = vgpu->gvt;
  451. struct intel_gvt_workload_scheduler *scheduler = &gvt->scheduler;
  452. unsigned int resetting_eng = dmlr ? ALL_ENGINES : engine_mask;
  453. gvt_dbg_core("------------------------------------------\n");
  454. gvt_dbg_core("resseting vgpu%d, dmlr %d, engine_mask %08x\n",
  455. vgpu->id, dmlr, engine_mask);
  456. vgpu->resetting_eng = resetting_eng;
  457. intel_vgpu_stop_schedule(vgpu);
  458. /*
  459. * The current_vgpu will set to NULL after stopping the
  460. * scheduler when the reset is triggered by current vgpu.
  461. */
  462. if (scheduler->current_vgpu == NULL) {
  463. mutex_unlock(&vgpu->vgpu_lock);
  464. intel_gvt_wait_vgpu_idle(vgpu);
  465. mutex_lock(&vgpu->vgpu_lock);
  466. }
  467. intel_vgpu_reset_submission(vgpu, resetting_eng);
  468. /* full GPU reset or device model level reset */
  469. if (engine_mask == ALL_ENGINES || dmlr) {
  470. intel_vgpu_select_submission_ops(vgpu, ALL_ENGINES, 0);
  471. intel_vgpu_invalidate_ppgtt(vgpu);
  472. /*fence will not be reset during virtual reset */
  473. if (dmlr) {
  474. intel_vgpu_reset_gtt(vgpu);
  475. intel_vgpu_reset_resource(vgpu);
  476. }
  477. intel_vgpu_reset_mmio(vgpu, dmlr);
  478. populate_pvinfo_page(vgpu);
  479. intel_vgpu_reset_display(vgpu);
  480. if (dmlr) {
  481. intel_vgpu_reset_cfg_space(vgpu);
  482. /* only reset the failsafe mode when dmlr reset */
  483. vgpu->failsafe = false;
  484. vgpu->pv_notified = false;
  485. }
  486. }
  487. vgpu->resetting_eng = 0;
  488. gvt_dbg_core("reset vgpu%d done\n", vgpu->id);
  489. gvt_dbg_core("------------------------------------------\n");
  490. }
  491. /**
  492. * intel_gvt_reset_vgpu - reset a virtual GPU (Function Level)
  493. * @vgpu: virtual GPU
  494. *
  495. * This function is called when user wants to reset a virtual GPU.
  496. *
  497. */
  498. void intel_gvt_reset_vgpu(struct intel_vgpu *vgpu)
  499. {
  500. mutex_lock(&vgpu->vgpu_lock);
  501. intel_gvt_reset_vgpu_locked(vgpu, true, 0);
  502. mutex_unlock(&vgpu->vgpu_lock);
  503. }