platform.c 8.4 KB

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  1. /*
  2. * Platform driver for the Synopsys DesignWare DMA Controller
  3. *
  4. * Copyright (C) 2007-2008 Atmel Corporation
  5. * Copyright (C) 2010-2011 ST Microelectronics
  6. * Copyright (C) 2013 Intel Corporation
  7. *
  8. * Some parts of this driver are derived from the original dw_dmac.
  9. *
  10. * This program is free software; you can redistribute it and/or modify
  11. * it under the terms of the GNU General Public License version 2 as
  12. * published by the Free Software Foundation.
  13. */
  14. #include <linux/module.h>
  15. #include <linux/device.h>
  16. #include <linux/clk.h>
  17. #include <linux/pm_runtime.h>
  18. #include <linux/platform_device.h>
  19. #include <linux/dmaengine.h>
  20. #include <linux/dma-mapping.h>
  21. #include <linux/of.h>
  22. #include <linux/of_dma.h>
  23. #include <linux/acpi.h>
  24. #include <linux/acpi_dma.h>
  25. #include "internal.h"
  26. #define DRV_NAME "dw_dmac"
  27. static struct dma_chan *dw_dma_of_xlate(struct of_phandle_args *dma_spec,
  28. struct of_dma *ofdma)
  29. {
  30. struct dw_dma *dw = ofdma->of_dma_data;
  31. struct dw_dma_slave slave = {
  32. .dma_dev = dw->dma.dev,
  33. };
  34. dma_cap_mask_t cap;
  35. if (dma_spec->args_count != 3)
  36. return NULL;
  37. slave.src_id = dma_spec->args[0];
  38. slave.dst_id = dma_spec->args[0];
  39. slave.m_master = dma_spec->args[1];
  40. slave.p_master = dma_spec->args[2];
  41. if (WARN_ON(slave.src_id >= DW_DMA_MAX_NR_REQUESTS ||
  42. slave.dst_id >= DW_DMA_MAX_NR_REQUESTS ||
  43. slave.m_master >= dw->pdata->nr_masters ||
  44. slave.p_master >= dw->pdata->nr_masters))
  45. return NULL;
  46. dma_cap_zero(cap);
  47. dma_cap_set(DMA_SLAVE, cap);
  48. /* TODO: there should be a simpler way to do this */
  49. return dma_request_channel(cap, dw_dma_filter, &slave);
  50. }
  51. #ifdef CONFIG_ACPI
  52. static bool dw_dma_acpi_filter(struct dma_chan *chan, void *param)
  53. {
  54. struct acpi_dma_spec *dma_spec = param;
  55. struct dw_dma_slave slave = {
  56. .dma_dev = dma_spec->dev,
  57. .src_id = dma_spec->slave_id,
  58. .dst_id = dma_spec->slave_id,
  59. .m_master = 0,
  60. .p_master = 1,
  61. };
  62. return dw_dma_filter(chan, &slave);
  63. }
  64. static void dw_dma_acpi_controller_register(struct dw_dma *dw)
  65. {
  66. struct device *dev = dw->dma.dev;
  67. struct acpi_dma_filter_info *info;
  68. int ret;
  69. info = devm_kzalloc(dev, sizeof(*info), GFP_KERNEL);
  70. if (!info)
  71. return;
  72. dma_cap_zero(info->dma_cap);
  73. dma_cap_set(DMA_SLAVE, info->dma_cap);
  74. info->filter_fn = dw_dma_acpi_filter;
  75. ret = devm_acpi_dma_controller_register(dev, acpi_dma_simple_xlate,
  76. info);
  77. if (ret)
  78. dev_err(dev, "could not register acpi_dma_controller\n");
  79. }
  80. #else /* !CONFIG_ACPI */
  81. static inline void dw_dma_acpi_controller_register(struct dw_dma *dw) {}
  82. #endif /* !CONFIG_ACPI */
  83. #ifdef CONFIG_OF
  84. static struct dw_dma_platform_data *
  85. dw_dma_parse_dt(struct platform_device *pdev)
  86. {
  87. struct device_node *np = pdev->dev.of_node;
  88. struct dw_dma_platform_data *pdata;
  89. u32 tmp, arr[DW_DMA_MAX_NR_MASTERS], mb[DW_DMA_MAX_NR_CHANNELS];
  90. u32 nr_masters;
  91. u32 nr_channels;
  92. if (!np) {
  93. dev_err(&pdev->dev, "Missing DT data\n");
  94. return NULL;
  95. }
  96. if (of_property_read_u32(np, "dma-masters", &nr_masters))
  97. return NULL;
  98. if (nr_masters < 1 || nr_masters > DW_DMA_MAX_NR_MASTERS)
  99. return NULL;
  100. if (of_property_read_u32(np, "dma-channels", &nr_channels))
  101. return NULL;
  102. if (nr_channels > DW_DMA_MAX_NR_CHANNELS)
  103. return NULL;
  104. pdata = devm_kzalloc(&pdev->dev, sizeof(*pdata), GFP_KERNEL);
  105. if (!pdata)
  106. return NULL;
  107. pdata->nr_masters = nr_masters;
  108. pdata->nr_channels = nr_channels;
  109. if (of_property_read_bool(np, "is_private"))
  110. pdata->is_private = true;
  111. /*
  112. * All known devices, which use DT for configuration, support
  113. * memory-to-memory transfers. So enable it by default.
  114. */
  115. pdata->is_memcpy = true;
  116. if (!of_property_read_u32(np, "chan_allocation_order", &tmp))
  117. pdata->chan_allocation_order = (unsigned char)tmp;
  118. if (!of_property_read_u32(np, "chan_priority", &tmp))
  119. pdata->chan_priority = tmp;
  120. if (!of_property_read_u32(np, "block_size", &tmp))
  121. pdata->block_size = tmp;
  122. if (!of_property_read_u32_array(np, "data-width", arr, nr_masters)) {
  123. for (tmp = 0; tmp < nr_masters; tmp++)
  124. pdata->data_width[tmp] = arr[tmp];
  125. } else if (!of_property_read_u32_array(np, "data_width", arr, nr_masters)) {
  126. for (tmp = 0; tmp < nr_masters; tmp++)
  127. pdata->data_width[tmp] = BIT(arr[tmp] & 0x07);
  128. }
  129. if (!of_property_read_u32_array(np, "multi-block", mb, nr_channels)) {
  130. for (tmp = 0; tmp < nr_channels; tmp++)
  131. pdata->multi_block[tmp] = mb[tmp];
  132. } else {
  133. for (tmp = 0; tmp < nr_channels; tmp++)
  134. pdata->multi_block[tmp] = 1;
  135. }
  136. return pdata;
  137. }
  138. #else
  139. static inline struct dw_dma_platform_data *
  140. dw_dma_parse_dt(struct platform_device *pdev)
  141. {
  142. return NULL;
  143. }
  144. #endif
  145. static int dw_probe(struct platform_device *pdev)
  146. {
  147. struct dw_dma_chip *chip;
  148. struct device *dev = &pdev->dev;
  149. struct resource *mem;
  150. const struct dw_dma_platform_data *pdata;
  151. int err;
  152. chip = devm_kzalloc(dev, sizeof(*chip), GFP_KERNEL);
  153. if (!chip)
  154. return -ENOMEM;
  155. chip->irq = platform_get_irq(pdev, 0);
  156. if (chip->irq < 0)
  157. return chip->irq;
  158. mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  159. chip->regs = devm_ioremap_resource(dev, mem);
  160. if (IS_ERR(chip->regs))
  161. return PTR_ERR(chip->regs);
  162. err = dma_coerce_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
  163. if (err)
  164. return err;
  165. pdata = dev_get_platdata(dev);
  166. if (!pdata)
  167. pdata = dw_dma_parse_dt(pdev);
  168. chip->dev = dev;
  169. chip->id = pdev->id;
  170. chip->pdata = pdata;
  171. chip->clk = devm_clk_get(chip->dev, "hclk");
  172. if (IS_ERR(chip->clk))
  173. return PTR_ERR(chip->clk);
  174. err = clk_prepare_enable(chip->clk);
  175. if (err)
  176. return err;
  177. pm_runtime_enable(&pdev->dev);
  178. err = dw_dma_probe(chip);
  179. if (err)
  180. goto err_dw_dma_probe;
  181. platform_set_drvdata(pdev, chip);
  182. if (pdev->dev.of_node) {
  183. err = of_dma_controller_register(pdev->dev.of_node,
  184. dw_dma_of_xlate, chip->dw);
  185. if (err)
  186. dev_err(&pdev->dev,
  187. "could not register of_dma_controller\n");
  188. }
  189. if (ACPI_HANDLE(&pdev->dev))
  190. dw_dma_acpi_controller_register(chip->dw);
  191. return 0;
  192. err_dw_dma_probe:
  193. pm_runtime_disable(&pdev->dev);
  194. clk_disable_unprepare(chip->clk);
  195. return err;
  196. }
  197. static int dw_remove(struct platform_device *pdev)
  198. {
  199. struct dw_dma_chip *chip = platform_get_drvdata(pdev);
  200. if (pdev->dev.of_node)
  201. of_dma_controller_free(pdev->dev.of_node);
  202. dw_dma_remove(chip);
  203. pm_runtime_disable(&pdev->dev);
  204. clk_disable_unprepare(chip->clk);
  205. return 0;
  206. }
  207. static void dw_shutdown(struct platform_device *pdev)
  208. {
  209. struct dw_dma_chip *chip = platform_get_drvdata(pdev);
  210. /*
  211. * We have to call dw_dma_disable() to stop any ongoing transfer. On
  212. * some platforms we can't do that since DMA device is powered off.
  213. * Moreover we have no possibility to check if the platform is affected
  214. * or not. That's why we call pm_runtime_get_sync() / pm_runtime_put()
  215. * unconditionally. On the other hand we can't use
  216. * pm_runtime_suspended() because runtime PM framework is not fully
  217. * used by the driver.
  218. */
  219. pm_runtime_get_sync(chip->dev);
  220. dw_dma_disable(chip);
  221. pm_runtime_put_sync_suspend(chip->dev);
  222. clk_disable_unprepare(chip->clk);
  223. }
  224. #ifdef CONFIG_OF
  225. static const struct of_device_id dw_dma_of_id_table[] = {
  226. { .compatible = "snps,dma-spear1340" },
  227. {}
  228. };
  229. MODULE_DEVICE_TABLE(of, dw_dma_of_id_table);
  230. #endif
  231. #ifdef CONFIG_ACPI
  232. static const struct acpi_device_id dw_dma_acpi_id_table[] = {
  233. { "INTL9C60", 0 },
  234. { "80862286", 0 },
  235. { "808622C0", 0 },
  236. { }
  237. };
  238. MODULE_DEVICE_TABLE(acpi, dw_dma_acpi_id_table);
  239. #endif
  240. #ifdef CONFIG_PM_SLEEP
  241. static int dw_suspend_late(struct device *dev)
  242. {
  243. struct dw_dma_chip *chip = dev_get_drvdata(dev);
  244. dw_dma_disable(chip);
  245. clk_disable_unprepare(chip->clk);
  246. return 0;
  247. }
  248. static int dw_resume_early(struct device *dev)
  249. {
  250. struct dw_dma_chip *chip = dev_get_drvdata(dev);
  251. int ret;
  252. ret = clk_prepare_enable(chip->clk);
  253. if (ret)
  254. return ret;
  255. return dw_dma_enable(chip);
  256. }
  257. #endif /* CONFIG_PM_SLEEP */
  258. static const struct dev_pm_ops dw_dev_pm_ops = {
  259. SET_LATE_SYSTEM_SLEEP_PM_OPS(dw_suspend_late, dw_resume_early)
  260. };
  261. static struct platform_driver dw_driver = {
  262. .probe = dw_probe,
  263. .remove = dw_remove,
  264. .shutdown = dw_shutdown,
  265. .driver = {
  266. .name = DRV_NAME,
  267. .pm = &dw_dev_pm_ops,
  268. .of_match_table = of_match_ptr(dw_dma_of_id_table),
  269. .acpi_match_table = ACPI_PTR(dw_dma_acpi_id_table),
  270. },
  271. };
  272. static int __init dw_init(void)
  273. {
  274. return platform_driver_register(&dw_driver);
  275. }
  276. subsys_initcall(dw_init);
  277. static void __exit dw_exit(void)
  278. {
  279. platform_driver_unregister(&dw_driver);
  280. }
  281. module_exit(dw_exit);
  282. MODULE_LICENSE("GPL v2");
  283. MODULE_DESCRIPTION("Synopsys DesignWare DMA Controller platform driver");
  284. MODULE_ALIAS("platform:" DRV_NAME);