mtk-sha.c 33 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764765766767768769770771772773774775776777778779780781782783784785786787788789790791792793794795796797798799800801802803804805806807808809810811812813814815816817818819820821822823824825826827828829830831832833834835836837838839840841842843844845846847848849850851852853854855856857858859860861862863864865866867868869870871872873874875876877878879880881882883884885886887888889890891892893894895896897898899900901902903904905906907908909910911912913914915916917918919920921922923924925926927928929930931932933934935936937938939940941942943944945946947948949950951952953954955956957958959960961962963964965966967968969970971972973974975976977978979980981982983984985986987988989990991992993994995996997998999100010011002100310041005100610071008100910101011101210131014101510161017101810191020102110221023102410251026102710281029103010311032103310341035103610371038103910401041104210431044104510461047104810491050105110521053105410551056105710581059106010611062106310641065106610671068106910701071107210731074107510761077107810791080108110821083108410851086108710881089109010911092109310941095109610971098109911001101110211031104110511061107110811091110111111121113111411151116111711181119112011211122112311241125112611271128112911301131113211331134113511361137113811391140114111421143114411451146114711481149115011511152115311541155115611571158115911601161116211631164116511661167116811691170117111721173117411751176117711781179118011811182118311841185118611871188118911901191119211931194119511961197119811991200120112021203120412051206120712081209121012111212121312141215121612171218121912201221122212231224122512261227122812291230123112321233123412351236123712381239124012411242124312441245124612471248124912501251125212531254125512561257125812591260126112621263126412651266126712681269127012711272127312741275127612771278127912801281128212831284128512861287128812891290129112921293129412951296129712981299130013011302130313041305130613071308130913101311131213131314131513161317131813191320132113221323132413251326132713281329133013311332133313341335133613371338133913401341134213431344134513461347134813491350135113521353135413551356135713581359
  1. /*
  2. * Cryptographic API.
  3. *
  4. * Driver for EIP97 SHA1/SHA2(HMAC) acceleration.
  5. *
  6. * Copyright (c) 2016 Ryder Lee <ryder.lee@mediatek.com>
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License version 2 as
  10. * published by the Free Software Foundation.
  11. *
  12. * Some ideas are from atmel-sha.c and omap-sham.c drivers.
  13. */
  14. #include <crypto/hmac.h>
  15. #include <crypto/sha.h>
  16. #include "mtk-platform.h"
  17. #define SHA_ALIGN_MSK (sizeof(u32) - 1)
  18. #define SHA_QUEUE_SIZE 512
  19. #define SHA_BUF_SIZE ((u32)PAGE_SIZE)
  20. #define SHA_OP_UPDATE 1
  21. #define SHA_OP_FINAL 2
  22. #define SHA_DATA_LEN_MSK cpu_to_le32(GENMASK(16, 0))
  23. #define SHA_MAX_DIGEST_BUF_SIZE 32
  24. /* SHA command token */
  25. #define SHA_CT_SIZE 5
  26. #define SHA_CT_CTRL_HDR cpu_to_le32(0x02220000)
  27. #define SHA_CMD0 cpu_to_le32(0x03020000)
  28. #define SHA_CMD1 cpu_to_le32(0x21060000)
  29. #define SHA_CMD2 cpu_to_le32(0xe0e63802)
  30. /* SHA transform information */
  31. #define SHA_TFM_HASH cpu_to_le32(0x2 << 0)
  32. #define SHA_TFM_SIZE(x) cpu_to_le32((x) << 8)
  33. #define SHA_TFM_START cpu_to_le32(0x1 << 4)
  34. #define SHA_TFM_CONTINUE cpu_to_le32(0x1 << 5)
  35. #define SHA_TFM_HASH_STORE cpu_to_le32(0x1 << 19)
  36. #define SHA_TFM_SHA1 cpu_to_le32(0x2 << 23)
  37. #define SHA_TFM_SHA256 cpu_to_le32(0x3 << 23)
  38. #define SHA_TFM_SHA224 cpu_to_le32(0x4 << 23)
  39. #define SHA_TFM_SHA512 cpu_to_le32(0x5 << 23)
  40. #define SHA_TFM_SHA384 cpu_to_le32(0x6 << 23)
  41. #define SHA_TFM_DIGEST(x) cpu_to_le32(((x) & GENMASK(3, 0)) << 24)
  42. /* SHA flags */
  43. #define SHA_FLAGS_BUSY BIT(0)
  44. #define SHA_FLAGS_FINAL BIT(1)
  45. #define SHA_FLAGS_FINUP BIT(2)
  46. #define SHA_FLAGS_SG BIT(3)
  47. #define SHA_FLAGS_ALGO_MSK GENMASK(8, 4)
  48. #define SHA_FLAGS_SHA1 BIT(4)
  49. #define SHA_FLAGS_SHA224 BIT(5)
  50. #define SHA_FLAGS_SHA256 BIT(6)
  51. #define SHA_FLAGS_SHA384 BIT(7)
  52. #define SHA_FLAGS_SHA512 BIT(8)
  53. #define SHA_FLAGS_HMAC BIT(9)
  54. #define SHA_FLAGS_PAD BIT(10)
  55. /**
  56. * mtk_sha_info - hardware information of AES
  57. * @cmd: command token, hardware instruction
  58. * @tfm: transform state of cipher algorithm.
  59. * @state: contains keys and initial vectors.
  60. *
  61. */
  62. struct mtk_sha_info {
  63. __le32 ctrl[2];
  64. __le32 cmd[3];
  65. __le32 tfm[2];
  66. __le32 digest[SHA_MAX_DIGEST_BUF_SIZE];
  67. };
  68. struct mtk_sha_reqctx {
  69. struct mtk_sha_info info;
  70. unsigned long flags;
  71. unsigned long op;
  72. u64 digcnt;
  73. size_t bufcnt;
  74. dma_addr_t dma_addr;
  75. __le32 ct_hdr;
  76. u32 ct_size;
  77. dma_addr_t ct_dma;
  78. dma_addr_t tfm_dma;
  79. /* Walk state */
  80. struct scatterlist *sg;
  81. u32 offset; /* Offset in current sg */
  82. u32 total; /* Total request */
  83. size_t ds;
  84. size_t bs;
  85. u8 *buffer;
  86. };
  87. struct mtk_sha_hmac_ctx {
  88. struct crypto_shash *shash;
  89. u8 ipad[SHA512_BLOCK_SIZE] __aligned(sizeof(u32));
  90. u8 opad[SHA512_BLOCK_SIZE] __aligned(sizeof(u32));
  91. };
  92. struct mtk_sha_ctx {
  93. struct mtk_cryp *cryp;
  94. unsigned long flags;
  95. u8 id;
  96. u8 buf[SHA_BUF_SIZE] __aligned(sizeof(u32));
  97. struct mtk_sha_hmac_ctx base[0];
  98. };
  99. struct mtk_sha_drv {
  100. struct list_head dev_list;
  101. /* Device list lock */
  102. spinlock_t lock;
  103. };
  104. static struct mtk_sha_drv mtk_sha = {
  105. .dev_list = LIST_HEAD_INIT(mtk_sha.dev_list),
  106. .lock = __SPIN_LOCK_UNLOCKED(mtk_sha.lock),
  107. };
  108. static int mtk_sha_handle_queue(struct mtk_cryp *cryp, u8 id,
  109. struct ahash_request *req);
  110. static inline u32 mtk_sha_read(struct mtk_cryp *cryp, u32 offset)
  111. {
  112. return readl_relaxed(cryp->base + offset);
  113. }
  114. static inline void mtk_sha_write(struct mtk_cryp *cryp,
  115. u32 offset, u32 value)
  116. {
  117. writel_relaxed(value, cryp->base + offset);
  118. }
  119. static inline void mtk_sha_ring_shift(struct mtk_ring *ring,
  120. struct mtk_desc **cmd_curr,
  121. struct mtk_desc **res_curr,
  122. int *count)
  123. {
  124. *cmd_curr = ring->cmd_next++;
  125. *res_curr = ring->res_next++;
  126. (*count)++;
  127. if (ring->cmd_next == ring->cmd_base + MTK_DESC_NUM) {
  128. ring->cmd_next = ring->cmd_base;
  129. ring->res_next = ring->res_base;
  130. }
  131. }
  132. static struct mtk_cryp *mtk_sha_find_dev(struct mtk_sha_ctx *tctx)
  133. {
  134. struct mtk_cryp *cryp = NULL;
  135. struct mtk_cryp *tmp;
  136. spin_lock_bh(&mtk_sha.lock);
  137. if (!tctx->cryp) {
  138. list_for_each_entry(tmp, &mtk_sha.dev_list, sha_list) {
  139. cryp = tmp;
  140. break;
  141. }
  142. tctx->cryp = cryp;
  143. } else {
  144. cryp = tctx->cryp;
  145. }
  146. /*
  147. * Assign record id to tfm in round-robin fashion, and this
  148. * will help tfm to bind to corresponding descriptor rings.
  149. */
  150. tctx->id = cryp->rec;
  151. cryp->rec = !cryp->rec;
  152. spin_unlock_bh(&mtk_sha.lock);
  153. return cryp;
  154. }
  155. static int mtk_sha_append_sg(struct mtk_sha_reqctx *ctx)
  156. {
  157. size_t count;
  158. while ((ctx->bufcnt < SHA_BUF_SIZE) && ctx->total) {
  159. count = min(ctx->sg->length - ctx->offset, ctx->total);
  160. count = min(count, SHA_BUF_SIZE - ctx->bufcnt);
  161. if (count <= 0) {
  162. /*
  163. * Check if count <= 0 because the buffer is full or
  164. * because the sg length is 0. In the latest case,
  165. * check if there is another sg in the list, a 0 length
  166. * sg doesn't necessarily mean the end of the sg list.
  167. */
  168. if ((ctx->sg->length == 0) && !sg_is_last(ctx->sg)) {
  169. ctx->sg = sg_next(ctx->sg);
  170. continue;
  171. } else {
  172. break;
  173. }
  174. }
  175. scatterwalk_map_and_copy(ctx->buffer + ctx->bufcnt, ctx->sg,
  176. ctx->offset, count, 0);
  177. ctx->bufcnt += count;
  178. ctx->offset += count;
  179. ctx->total -= count;
  180. if (ctx->offset == ctx->sg->length) {
  181. ctx->sg = sg_next(ctx->sg);
  182. if (ctx->sg)
  183. ctx->offset = 0;
  184. else
  185. ctx->total = 0;
  186. }
  187. }
  188. return 0;
  189. }
  190. /*
  191. * The purpose of this padding is to ensure that the padded message is a
  192. * multiple of 512 bits (SHA1/SHA224/SHA256) or 1024 bits (SHA384/SHA512).
  193. * The bit "1" is appended at the end of the message followed by
  194. * "padlen-1" zero bits. Then a 64 bits block (SHA1/SHA224/SHA256) or
  195. * 128 bits block (SHA384/SHA512) equals to the message length in bits
  196. * is appended.
  197. *
  198. * For SHA1/SHA224/SHA256, padlen is calculated as followed:
  199. * - if message length < 56 bytes then padlen = 56 - message length
  200. * - else padlen = 64 + 56 - message length
  201. *
  202. * For SHA384/SHA512, padlen is calculated as followed:
  203. * - if message length < 112 bytes then padlen = 112 - message length
  204. * - else padlen = 128 + 112 - message length
  205. */
  206. static void mtk_sha_fill_padding(struct mtk_sha_reqctx *ctx, u32 len)
  207. {
  208. u32 index, padlen;
  209. u64 bits[2];
  210. u64 size = ctx->digcnt;
  211. size += ctx->bufcnt;
  212. size += len;
  213. bits[1] = cpu_to_be64(size << 3);
  214. bits[0] = cpu_to_be64(size >> 61);
  215. switch (ctx->flags & SHA_FLAGS_ALGO_MSK) {
  216. case SHA_FLAGS_SHA384:
  217. case SHA_FLAGS_SHA512:
  218. index = ctx->bufcnt & 0x7f;
  219. padlen = (index < 112) ? (112 - index) : ((128 + 112) - index);
  220. *(ctx->buffer + ctx->bufcnt) = 0x80;
  221. memset(ctx->buffer + ctx->bufcnt + 1, 0, padlen - 1);
  222. memcpy(ctx->buffer + ctx->bufcnt + padlen, bits, 16);
  223. ctx->bufcnt += padlen + 16;
  224. ctx->flags |= SHA_FLAGS_PAD;
  225. break;
  226. default:
  227. index = ctx->bufcnt & 0x3f;
  228. padlen = (index < 56) ? (56 - index) : ((64 + 56) - index);
  229. *(ctx->buffer + ctx->bufcnt) = 0x80;
  230. memset(ctx->buffer + ctx->bufcnt + 1, 0, padlen - 1);
  231. memcpy(ctx->buffer + ctx->bufcnt + padlen, &bits[1], 8);
  232. ctx->bufcnt += padlen + 8;
  233. ctx->flags |= SHA_FLAGS_PAD;
  234. break;
  235. }
  236. }
  237. /* Initialize basic transform information of SHA */
  238. static void mtk_sha_info_init(struct mtk_sha_reqctx *ctx)
  239. {
  240. struct mtk_sha_info *info = &ctx->info;
  241. ctx->ct_hdr = SHA_CT_CTRL_HDR;
  242. ctx->ct_size = SHA_CT_SIZE;
  243. info->tfm[0] = SHA_TFM_HASH | SHA_TFM_SIZE(SIZE_IN_WORDS(ctx->ds));
  244. switch (ctx->flags & SHA_FLAGS_ALGO_MSK) {
  245. case SHA_FLAGS_SHA1:
  246. info->tfm[0] |= SHA_TFM_SHA1;
  247. break;
  248. case SHA_FLAGS_SHA224:
  249. info->tfm[0] |= SHA_TFM_SHA224;
  250. break;
  251. case SHA_FLAGS_SHA256:
  252. info->tfm[0] |= SHA_TFM_SHA256;
  253. break;
  254. case SHA_FLAGS_SHA384:
  255. info->tfm[0] |= SHA_TFM_SHA384;
  256. break;
  257. case SHA_FLAGS_SHA512:
  258. info->tfm[0] |= SHA_TFM_SHA512;
  259. break;
  260. default:
  261. /* Should not happen... */
  262. return;
  263. }
  264. info->tfm[1] = SHA_TFM_HASH_STORE;
  265. info->ctrl[0] = info->tfm[0] | SHA_TFM_CONTINUE | SHA_TFM_START;
  266. info->ctrl[1] = info->tfm[1];
  267. info->cmd[0] = SHA_CMD0;
  268. info->cmd[1] = SHA_CMD1;
  269. info->cmd[2] = SHA_CMD2 | SHA_TFM_DIGEST(SIZE_IN_WORDS(ctx->ds));
  270. }
  271. /*
  272. * Update input data length field of transform information and
  273. * map it to DMA region.
  274. */
  275. static int mtk_sha_info_update(struct mtk_cryp *cryp,
  276. struct mtk_sha_rec *sha,
  277. size_t len1, size_t len2)
  278. {
  279. struct mtk_sha_reqctx *ctx = ahash_request_ctx(sha->req);
  280. struct mtk_sha_info *info = &ctx->info;
  281. ctx->ct_hdr &= ~SHA_DATA_LEN_MSK;
  282. ctx->ct_hdr |= cpu_to_le32(len1 + len2);
  283. info->cmd[0] &= ~SHA_DATA_LEN_MSK;
  284. info->cmd[0] |= cpu_to_le32(len1 + len2);
  285. /* Setting SHA_TFM_START only for the first iteration */
  286. if (ctx->digcnt)
  287. info->ctrl[0] &= ~SHA_TFM_START;
  288. ctx->digcnt += len1;
  289. ctx->ct_dma = dma_map_single(cryp->dev, info, sizeof(*info),
  290. DMA_BIDIRECTIONAL);
  291. if (unlikely(dma_mapping_error(cryp->dev, ctx->ct_dma))) {
  292. dev_err(cryp->dev, "dma %zu bytes error\n", sizeof(*info));
  293. return -EINVAL;
  294. }
  295. ctx->tfm_dma = ctx->ct_dma + sizeof(info->ctrl) + sizeof(info->cmd);
  296. return 0;
  297. }
  298. /*
  299. * Because of hardware limitation, we must pre-calculate the inner
  300. * and outer digest that need to be processed firstly by engine, then
  301. * apply the result digest to the input message. These complex hashing
  302. * procedures limits HMAC performance, so we use fallback SW encoding.
  303. */
  304. static int mtk_sha_finish_hmac(struct ahash_request *req)
  305. {
  306. struct mtk_sha_ctx *tctx = crypto_tfm_ctx(req->base.tfm);
  307. struct mtk_sha_hmac_ctx *bctx = tctx->base;
  308. struct mtk_sha_reqctx *ctx = ahash_request_ctx(req);
  309. SHASH_DESC_ON_STACK(shash, bctx->shash);
  310. shash->tfm = bctx->shash;
  311. shash->flags = 0; /* not CRYPTO_TFM_REQ_MAY_SLEEP */
  312. return crypto_shash_init(shash) ?:
  313. crypto_shash_update(shash, bctx->opad, ctx->bs) ?:
  314. crypto_shash_finup(shash, req->result, ctx->ds, req->result);
  315. }
  316. /* Initialize request context */
  317. static int mtk_sha_init(struct ahash_request *req)
  318. {
  319. struct crypto_ahash *tfm = crypto_ahash_reqtfm(req);
  320. struct mtk_sha_ctx *tctx = crypto_ahash_ctx(tfm);
  321. struct mtk_sha_reqctx *ctx = ahash_request_ctx(req);
  322. ctx->flags = 0;
  323. ctx->ds = crypto_ahash_digestsize(tfm);
  324. switch (ctx->ds) {
  325. case SHA1_DIGEST_SIZE:
  326. ctx->flags |= SHA_FLAGS_SHA1;
  327. ctx->bs = SHA1_BLOCK_SIZE;
  328. break;
  329. case SHA224_DIGEST_SIZE:
  330. ctx->flags |= SHA_FLAGS_SHA224;
  331. ctx->bs = SHA224_BLOCK_SIZE;
  332. break;
  333. case SHA256_DIGEST_SIZE:
  334. ctx->flags |= SHA_FLAGS_SHA256;
  335. ctx->bs = SHA256_BLOCK_SIZE;
  336. break;
  337. case SHA384_DIGEST_SIZE:
  338. ctx->flags |= SHA_FLAGS_SHA384;
  339. ctx->bs = SHA384_BLOCK_SIZE;
  340. break;
  341. case SHA512_DIGEST_SIZE:
  342. ctx->flags |= SHA_FLAGS_SHA512;
  343. ctx->bs = SHA512_BLOCK_SIZE;
  344. break;
  345. default:
  346. return -EINVAL;
  347. }
  348. ctx->bufcnt = 0;
  349. ctx->digcnt = 0;
  350. ctx->buffer = tctx->buf;
  351. if (tctx->flags & SHA_FLAGS_HMAC) {
  352. struct mtk_sha_hmac_ctx *bctx = tctx->base;
  353. memcpy(ctx->buffer, bctx->ipad, ctx->bs);
  354. ctx->bufcnt = ctx->bs;
  355. ctx->flags |= SHA_FLAGS_HMAC;
  356. }
  357. return 0;
  358. }
  359. static int mtk_sha_xmit(struct mtk_cryp *cryp, struct mtk_sha_rec *sha,
  360. dma_addr_t addr1, size_t len1,
  361. dma_addr_t addr2, size_t len2)
  362. {
  363. struct mtk_sha_reqctx *ctx = ahash_request_ctx(sha->req);
  364. struct mtk_ring *ring = cryp->ring[sha->id];
  365. struct mtk_desc *cmd, *res;
  366. int err, count = 0;
  367. err = mtk_sha_info_update(cryp, sha, len1, len2);
  368. if (err)
  369. return err;
  370. /* Fill in the command/result descriptors */
  371. mtk_sha_ring_shift(ring, &cmd, &res, &count);
  372. res->hdr = MTK_DESC_FIRST | MTK_DESC_BUF_LEN(len1);
  373. cmd->hdr = MTK_DESC_FIRST | MTK_DESC_BUF_LEN(len1) |
  374. MTK_DESC_CT_LEN(ctx->ct_size);
  375. cmd->buf = cpu_to_le32(addr1);
  376. cmd->ct = cpu_to_le32(ctx->ct_dma);
  377. cmd->ct_hdr = ctx->ct_hdr;
  378. cmd->tfm = cpu_to_le32(ctx->tfm_dma);
  379. if (len2) {
  380. mtk_sha_ring_shift(ring, &cmd, &res, &count);
  381. res->hdr = MTK_DESC_BUF_LEN(len2);
  382. cmd->hdr = MTK_DESC_BUF_LEN(len2);
  383. cmd->buf = cpu_to_le32(addr2);
  384. }
  385. cmd->hdr |= MTK_DESC_LAST;
  386. res->hdr |= MTK_DESC_LAST;
  387. /*
  388. * Make sure that all changes to the DMA ring are done before we
  389. * start engine.
  390. */
  391. wmb();
  392. /* Start DMA transfer */
  393. mtk_sha_write(cryp, RDR_PREP_COUNT(sha->id), MTK_DESC_CNT(count));
  394. mtk_sha_write(cryp, CDR_PREP_COUNT(sha->id), MTK_DESC_CNT(count));
  395. return -EINPROGRESS;
  396. }
  397. static int mtk_sha_dma_map(struct mtk_cryp *cryp,
  398. struct mtk_sha_rec *sha,
  399. struct mtk_sha_reqctx *ctx,
  400. size_t count)
  401. {
  402. ctx->dma_addr = dma_map_single(cryp->dev, ctx->buffer,
  403. SHA_BUF_SIZE, DMA_TO_DEVICE);
  404. if (unlikely(dma_mapping_error(cryp->dev, ctx->dma_addr))) {
  405. dev_err(cryp->dev, "dma map error\n");
  406. return -EINVAL;
  407. }
  408. ctx->flags &= ~SHA_FLAGS_SG;
  409. return mtk_sha_xmit(cryp, sha, ctx->dma_addr, count, 0, 0);
  410. }
  411. static int mtk_sha_update_slow(struct mtk_cryp *cryp,
  412. struct mtk_sha_rec *sha)
  413. {
  414. struct mtk_sha_reqctx *ctx = ahash_request_ctx(sha->req);
  415. size_t count;
  416. u32 final;
  417. mtk_sha_append_sg(ctx);
  418. final = (ctx->flags & SHA_FLAGS_FINUP) && !ctx->total;
  419. dev_dbg(cryp->dev, "slow: bufcnt: %zu\n", ctx->bufcnt);
  420. if (final) {
  421. sha->flags |= SHA_FLAGS_FINAL;
  422. mtk_sha_fill_padding(ctx, 0);
  423. }
  424. if (final || (ctx->bufcnt == SHA_BUF_SIZE && ctx->total)) {
  425. count = ctx->bufcnt;
  426. ctx->bufcnt = 0;
  427. return mtk_sha_dma_map(cryp, sha, ctx, count);
  428. }
  429. return 0;
  430. }
  431. static int mtk_sha_update_start(struct mtk_cryp *cryp,
  432. struct mtk_sha_rec *sha)
  433. {
  434. struct mtk_sha_reqctx *ctx = ahash_request_ctx(sha->req);
  435. u32 len, final, tail;
  436. struct scatterlist *sg;
  437. if (!ctx->total)
  438. return 0;
  439. if (ctx->bufcnt || ctx->offset)
  440. return mtk_sha_update_slow(cryp, sha);
  441. sg = ctx->sg;
  442. if (!IS_ALIGNED(sg->offset, sizeof(u32)))
  443. return mtk_sha_update_slow(cryp, sha);
  444. if (!sg_is_last(sg) && !IS_ALIGNED(sg->length, ctx->bs))
  445. /* size is not ctx->bs aligned */
  446. return mtk_sha_update_slow(cryp, sha);
  447. len = min(ctx->total, sg->length);
  448. if (sg_is_last(sg)) {
  449. if (!(ctx->flags & SHA_FLAGS_FINUP)) {
  450. /* not last sg must be ctx->bs aligned */
  451. tail = len & (ctx->bs - 1);
  452. len -= tail;
  453. }
  454. }
  455. ctx->total -= len;
  456. ctx->offset = len; /* offset where to start slow */
  457. final = (ctx->flags & SHA_FLAGS_FINUP) && !ctx->total;
  458. /* Add padding */
  459. if (final) {
  460. size_t count;
  461. tail = len & (ctx->bs - 1);
  462. len -= tail;
  463. ctx->total += tail;
  464. ctx->offset = len; /* offset where to start slow */
  465. sg = ctx->sg;
  466. mtk_sha_append_sg(ctx);
  467. mtk_sha_fill_padding(ctx, len);
  468. ctx->dma_addr = dma_map_single(cryp->dev, ctx->buffer,
  469. SHA_BUF_SIZE, DMA_TO_DEVICE);
  470. if (unlikely(dma_mapping_error(cryp->dev, ctx->dma_addr))) {
  471. dev_err(cryp->dev, "dma map bytes error\n");
  472. return -EINVAL;
  473. }
  474. sha->flags |= SHA_FLAGS_FINAL;
  475. count = ctx->bufcnt;
  476. ctx->bufcnt = 0;
  477. if (len == 0) {
  478. ctx->flags &= ~SHA_FLAGS_SG;
  479. return mtk_sha_xmit(cryp, sha, ctx->dma_addr,
  480. count, 0, 0);
  481. } else {
  482. ctx->sg = sg;
  483. if (!dma_map_sg(cryp->dev, ctx->sg, 1, DMA_TO_DEVICE)) {
  484. dev_err(cryp->dev, "dma_map_sg error\n");
  485. return -EINVAL;
  486. }
  487. ctx->flags |= SHA_FLAGS_SG;
  488. return mtk_sha_xmit(cryp, sha, sg_dma_address(ctx->sg),
  489. len, ctx->dma_addr, count);
  490. }
  491. }
  492. if (!dma_map_sg(cryp->dev, ctx->sg, 1, DMA_TO_DEVICE)) {
  493. dev_err(cryp->dev, "dma_map_sg error\n");
  494. return -EINVAL;
  495. }
  496. ctx->flags |= SHA_FLAGS_SG;
  497. return mtk_sha_xmit(cryp, sha, sg_dma_address(ctx->sg),
  498. len, 0, 0);
  499. }
  500. static int mtk_sha_final_req(struct mtk_cryp *cryp,
  501. struct mtk_sha_rec *sha)
  502. {
  503. struct mtk_sha_reqctx *ctx = ahash_request_ctx(sha->req);
  504. size_t count;
  505. mtk_sha_fill_padding(ctx, 0);
  506. sha->flags |= SHA_FLAGS_FINAL;
  507. count = ctx->bufcnt;
  508. ctx->bufcnt = 0;
  509. return mtk_sha_dma_map(cryp, sha, ctx, count);
  510. }
  511. /* Copy ready hash (+ finalize hmac) */
  512. static int mtk_sha_finish(struct ahash_request *req)
  513. {
  514. struct mtk_sha_reqctx *ctx = ahash_request_ctx(req);
  515. __le32 *digest = ctx->info.digest;
  516. u32 *result = (u32 *)req->result;
  517. int i;
  518. /* Get the hash from the digest buffer */
  519. for (i = 0; i < SIZE_IN_WORDS(ctx->ds); i++)
  520. result[i] = le32_to_cpu(digest[i]);
  521. if (ctx->flags & SHA_FLAGS_HMAC)
  522. return mtk_sha_finish_hmac(req);
  523. return 0;
  524. }
  525. static void mtk_sha_finish_req(struct mtk_cryp *cryp,
  526. struct mtk_sha_rec *sha,
  527. int err)
  528. {
  529. if (likely(!err && (SHA_FLAGS_FINAL & sha->flags)))
  530. err = mtk_sha_finish(sha->req);
  531. sha->flags &= ~(SHA_FLAGS_BUSY | SHA_FLAGS_FINAL);
  532. sha->req->base.complete(&sha->req->base, err);
  533. /* Handle new request */
  534. tasklet_schedule(&sha->queue_task);
  535. }
  536. static int mtk_sha_handle_queue(struct mtk_cryp *cryp, u8 id,
  537. struct ahash_request *req)
  538. {
  539. struct mtk_sha_rec *sha = cryp->sha[id];
  540. struct crypto_async_request *async_req, *backlog;
  541. struct mtk_sha_reqctx *ctx;
  542. unsigned long flags;
  543. int err = 0, ret = 0;
  544. spin_lock_irqsave(&sha->lock, flags);
  545. if (req)
  546. ret = ahash_enqueue_request(&sha->queue, req);
  547. if (SHA_FLAGS_BUSY & sha->flags) {
  548. spin_unlock_irqrestore(&sha->lock, flags);
  549. return ret;
  550. }
  551. backlog = crypto_get_backlog(&sha->queue);
  552. async_req = crypto_dequeue_request(&sha->queue);
  553. if (async_req)
  554. sha->flags |= SHA_FLAGS_BUSY;
  555. spin_unlock_irqrestore(&sha->lock, flags);
  556. if (!async_req)
  557. return ret;
  558. if (backlog)
  559. backlog->complete(backlog, -EINPROGRESS);
  560. req = ahash_request_cast(async_req);
  561. ctx = ahash_request_ctx(req);
  562. sha->req = req;
  563. mtk_sha_info_init(ctx);
  564. if (ctx->op == SHA_OP_UPDATE) {
  565. err = mtk_sha_update_start(cryp, sha);
  566. if (err != -EINPROGRESS && (ctx->flags & SHA_FLAGS_FINUP))
  567. /* No final() after finup() */
  568. err = mtk_sha_final_req(cryp, sha);
  569. } else if (ctx->op == SHA_OP_FINAL) {
  570. err = mtk_sha_final_req(cryp, sha);
  571. }
  572. if (unlikely(err != -EINPROGRESS))
  573. /* Task will not finish it, so do it here */
  574. mtk_sha_finish_req(cryp, sha, err);
  575. return ret;
  576. }
  577. static int mtk_sha_enqueue(struct ahash_request *req, u32 op)
  578. {
  579. struct mtk_sha_reqctx *ctx = ahash_request_ctx(req);
  580. struct mtk_sha_ctx *tctx = crypto_tfm_ctx(req->base.tfm);
  581. ctx->op = op;
  582. return mtk_sha_handle_queue(tctx->cryp, tctx->id, req);
  583. }
  584. static void mtk_sha_unmap(struct mtk_cryp *cryp, struct mtk_sha_rec *sha)
  585. {
  586. struct mtk_sha_reqctx *ctx = ahash_request_ctx(sha->req);
  587. dma_unmap_single(cryp->dev, ctx->ct_dma, sizeof(ctx->info),
  588. DMA_BIDIRECTIONAL);
  589. if (ctx->flags & SHA_FLAGS_SG) {
  590. dma_unmap_sg(cryp->dev, ctx->sg, 1, DMA_TO_DEVICE);
  591. if (ctx->sg->length == ctx->offset) {
  592. ctx->sg = sg_next(ctx->sg);
  593. if (ctx->sg)
  594. ctx->offset = 0;
  595. }
  596. if (ctx->flags & SHA_FLAGS_PAD) {
  597. dma_unmap_single(cryp->dev, ctx->dma_addr,
  598. SHA_BUF_SIZE, DMA_TO_DEVICE);
  599. }
  600. } else
  601. dma_unmap_single(cryp->dev, ctx->dma_addr,
  602. SHA_BUF_SIZE, DMA_TO_DEVICE);
  603. }
  604. static void mtk_sha_complete(struct mtk_cryp *cryp,
  605. struct mtk_sha_rec *sha)
  606. {
  607. int err = 0;
  608. err = mtk_sha_update_start(cryp, sha);
  609. if (err != -EINPROGRESS)
  610. mtk_sha_finish_req(cryp, sha, err);
  611. }
  612. static int mtk_sha_update(struct ahash_request *req)
  613. {
  614. struct mtk_sha_reqctx *ctx = ahash_request_ctx(req);
  615. ctx->total = req->nbytes;
  616. ctx->sg = req->src;
  617. ctx->offset = 0;
  618. if ((ctx->bufcnt + ctx->total < SHA_BUF_SIZE) &&
  619. !(ctx->flags & SHA_FLAGS_FINUP))
  620. return mtk_sha_append_sg(ctx);
  621. return mtk_sha_enqueue(req, SHA_OP_UPDATE);
  622. }
  623. static int mtk_sha_final(struct ahash_request *req)
  624. {
  625. struct mtk_sha_reqctx *ctx = ahash_request_ctx(req);
  626. ctx->flags |= SHA_FLAGS_FINUP;
  627. if (ctx->flags & SHA_FLAGS_PAD)
  628. return mtk_sha_finish(req);
  629. return mtk_sha_enqueue(req, SHA_OP_FINAL);
  630. }
  631. static int mtk_sha_finup(struct ahash_request *req)
  632. {
  633. struct mtk_sha_reqctx *ctx = ahash_request_ctx(req);
  634. int err1, err2;
  635. ctx->flags |= SHA_FLAGS_FINUP;
  636. err1 = mtk_sha_update(req);
  637. if (err1 == -EINPROGRESS || err1 == -EBUSY)
  638. return err1;
  639. /*
  640. * final() has to be always called to cleanup resources
  641. * even if update() failed
  642. */
  643. err2 = mtk_sha_final(req);
  644. return err1 ?: err2;
  645. }
  646. static int mtk_sha_digest(struct ahash_request *req)
  647. {
  648. return mtk_sha_init(req) ?: mtk_sha_finup(req);
  649. }
  650. static int mtk_sha_setkey(struct crypto_ahash *tfm, const u8 *key,
  651. u32 keylen)
  652. {
  653. struct mtk_sha_ctx *tctx = crypto_ahash_ctx(tfm);
  654. struct mtk_sha_hmac_ctx *bctx = tctx->base;
  655. size_t bs = crypto_shash_blocksize(bctx->shash);
  656. size_t ds = crypto_shash_digestsize(bctx->shash);
  657. int err, i;
  658. SHASH_DESC_ON_STACK(shash, bctx->shash);
  659. shash->tfm = bctx->shash;
  660. shash->flags = crypto_shash_get_flags(bctx->shash) &
  661. CRYPTO_TFM_REQ_MAY_SLEEP;
  662. if (keylen > bs) {
  663. err = crypto_shash_digest(shash, key, keylen, bctx->ipad);
  664. if (err)
  665. return err;
  666. keylen = ds;
  667. } else {
  668. memcpy(bctx->ipad, key, keylen);
  669. }
  670. memset(bctx->ipad + keylen, 0, bs - keylen);
  671. memcpy(bctx->opad, bctx->ipad, bs);
  672. for (i = 0; i < bs; i++) {
  673. bctx->ipad[i] ^= HMAC_IPAD_VALUE;
  674. bctx->opad[i] ^= HMAC_OPAD_VALUE;
  675. }
  676. return 0;
  677. }
  678. static int mtk_sha_export(struct ahash_request *req, void *out)
  679. {
  680. const struct mtk_sha_reqctx *ctx = ahash_request_ctx(req);
  681. memcpy(out, ctx, sizeof(*ctx));
  682. return 0;
  683. }
  684. static int mtk_sha_import(struct ahash_request *req, const void *in)
  685. {
  686. struct mtk_sha_reqctx *ctx = ahash_request_ctx(req);
  687. memcpy(ctx, in, sizeof(*ctx));
  688. return 0;
  689. }
  690. static int mtk_sha_cra_init_alg(struct crypto_tfm *tfm,
  691. const char *alg_base)
  692. {
  693. struct mtk_sha_ctx *tctx = crypto_tfm_ctx(tfm);
  694. struct mtk_cryp *cryp = NULL;
  695. cryp = mtk_sha_find_dev(tctx);
  696. if (!cryp)
  697. return -ENODEV;
  698. crypto_ahash_set_reqsize(__crypto_ahash_cast(tfm),
  699. sizeof(struct mtk_sha_reqctx));
  700. if (alg_base) {
  701. struct mtk_sha_hmac_ctx *bctx = tctx->base;
  702. tctx->flags |= SHA_FLAGS_HMAC;
  703. bctx->shash = crypto_alloc_shash(alg_base, 0,
  704. CRYPTO_ALG_NEED_FALLBACK);
  705. if (IS_ERR(bctx->shash)) {
  706. pr_err("base driver %s could not be loaded.\n",
  707. alg_base);
  708. return PTR_ERR(bctx->shash);
  709. }
  710. }
  711. return 0;
  712. }
  713. static int mtk_sha_cra_init(struct crypto_tfm *tfm)
  714. {
  715. return mtk_sha_cra_init_alg(tfm, NULL);
  716. }
  717. static int mtk_sha_cra_sha1_init(struct crypto_tfm *tfm)
  718. {
  719. return mtk_sha_cra_init_alg(tfm, "sha1");
  720. }
  721. static int mtk_sha_cra_sha224_init(struct crypto_tfm *tfm)
  722. {
  723. return mtk_sha_cra_init_alg(tfm, "sha224");
  724. }
  725. static int mtk_sha_cra_sha256_init(struct crypto_tfm *tfm)
  726. {
  727. return mtk_sha_cra_init_alg(tfm, "sha256");
  728. }
  729. static int mtk_sha_cra_sha384_init(struct crypto_tfm *tfm)
  730. {
  731. return mtk_sha_cra_init_alg(tfm, "sha384");
  732. }
  733. static int mtk_sha_cra_sha512_init(struct crypto_tfm *tfm)
  734. {
  735. return mtk_sha_cra_init_alg(tfm, "sha512");
  736. }
  737. static void mtk_sha_cra_exit(struct crypto_tfm *tfm)
  738. {
  739. struct mtk_sha_ctx *tctx = crypto_tfm_ctx(tfm);
  740. if (tctx->flags & SHA_FLAGS_HMAC) {
  741. struct mtk_sha_hmac_ctx *bctx = tctx->base;
  742. crypto_free_shash(bctx->shash);
  743. }
  744. }
  745. static struct ahash_alg algs_sha1_sha224_sha256[] = {
  746. {
  747. .init = mtk_sha_init,
  748. .update = mtk_sha_update,
  749. .final = mtk_sha_final,
  750. .finup = mtk_sha_finup,
  751. .digest = mtk_sha_digest,
  752. .export = mtk_sha_export,
  753. .import = mtk_sha_import,
  754. .halg.digestsize = SHA1_DIGEST_SIZE,
  755. .halg.statesize = sizeof(struct mtk_sha_reqctx),
  756. .halg.base = {
  757. .cra_name = "sha1",
  758. .cra_driver_name = "mtk-sha1",
  759. .cra_priority = 400,
  760. .cra_flags = CRYPTO_ALG_ASYNC,
  761. .cra_blocksize = SHA1_BLOCK_SIZE,
  762. .cra_ctxsize = sizeof(struct mtk_sha_ctx),
  763. .cra_alignmask = SHA_ALIGN_MSK,
  764. .cra_module = THIS_MODULE,
  765. .cra_init = mtk_sha_cra_init,
  766. .cra_exit = mtk_sha_cra_exit,
  767. }
  768. },
  769. {
  770. .init = mtk_sha_init,
  771. .update = mtk_sha_update,
  772. .final = mtk_sha_final,
  773. .finup = mtk_sha_finup,
  774. .digest = mtk_sha_digest,
  775. .export = mtk_sha_export,
  776. .import = mtk_sha_import,
  777. .halg.digestsize = SHA224_DIGEST_SIZE,
  778. .halg.statesize = sizeof(struct mtk_sha_reqctx),
  779. .halg.base = {
  780. .cra_name = "sha224",
  781. .cra_driver_name = "mtk-sha224",
  782. .cra_priority = 400,
  783. .cra_flags = CRYPTO_ALG_ASYNC,
  784. .cra_blocksize = SHA224_BLOCK_SIZE,
  785. .cra_ctxsize = sizeof(struct mtk_sha_ctx),
  786. .cra_alignmask = SHA_ALIGN_MSK,
  787. .cra_module = THIS_MODULE,
  788. .cra_init = mtk_sha_cra_init,
  789. .cra_exit = mtk_sha_cra_exit,
  790. }
  791. },
  792. {
  793. .init = mtk_sha_init,
  794. .update = mtk_sha_update,
  795. .final = mtk_sha_final,
  796. .finup = mtk_sha_finup,
  797. .digest = mtk_sha_digest,
  798. .export = mtk_sha_export,
  799. .import = mtk_sha_import,
  800. .halg.digestsize = SHA256_DIGEST_SIZE,
  801. .halg.statesize = sizeof(struct mtk_sha_reqctx),
  802. .halg.base = {
  803. .cra_name = "sha256",
  804. .cra_driver_name = "mtk-sha256",
  805. .cra_priority = 400,
  806. .cra_flags = CRYPTO_ALG_ASYNC,
  807. .cra_blocksize = SHA256_BLOCK_SIZE,
  808. .cra_ctxsize = sizeof(struct mtk_sha_ctx),
  809. .cra_alignmask = SHA_ALIGN_MSK,
  810. .cra_module = THIS_MODULE,
  811. .cra_init = mtk_sha_cra_init,
  812. .cra_exit = mtk_sha_cra_exit,
  813. }
  814. },
  815. {
  816. .init = mtk_sha_init,
  817. .update = mtk_sha_update,
  818. .final = mtk_sha_final,
  819. .finup = mtk_sha_finup,
  820. .digest = mtk_sha_digest,
  821. .export = mtk_sha_export,
  822. .import = mtk_sha_import,
  823. .setkey = mtk_sha_setkey,
  824. .halg.digestsize = SHA1_DIGEST_SIZE,
  825. .halg.statesize = sizeof(struct mtk_sha_reqctx),
  826. .halg.base = {
  827. .cra_name = "hmac(sha1)",
  828. .cra_driver_name = "mtk-hmac-sha1",
  829. .cra_priority = 400,
  830. .cra_flags = CRYPTO_ALG_ASYNC |
  831. CRYPTO_ALG_NEED_FALLBACK,
  832. .cra_blocksize = SHA1_BLOCK_SIZE,
  833. .cra_ctxsize = sizeof(struct mtk_sha_ctx) +
  834. sizeof(struct mtk_sha_hmac_ctx),
  835. .cra_alignmask = SHA_ALIGN_MSK,
  836. .cra_module = THIS_MODULE,
  837. .cra_init = mtk_sha_cra_sha1_init,
  838. .cra_exit = mtk_sha_cra_exit,
  839. }
  840. },
  841. {
  842. .init = mtk_sha_init,
  843. .update = mtk_sha_update,
  844. .final = mtk_sha_final,
  845. .finup = mtk_sha_finup,
  846. .digest = mtk_sha_digest,
  847. .export = mtk_sha_export,
  848. .import = mtk_sha_import,
  849. .setkey = mtk_sha_setkey,
  850. .halg.digestsize = SHA224_DIGEST_SIZE,
  851. .halg.statesize = sizeof(struct mtk_sha_reqctx),
  852. .halg.base = {
  853. .cra_name = "hmac(sha224)",
  854. .cra_driver_name = "mtk-hmac-sha224",
  855. .cra_priority = 400,
  856. .cra_flags = CRYPTO_ALG_ASYNC |
  857. CRYPTO_ALG_NEED_FALLBACK,
  858. .cra_blocksize = SHA224_BLOCK_SIZE,
  859. .cra_ctxsize = sizeof(struct mtk_sha_ctx) +
  860. sizeof(struct mtk_sha_hmac_ctx),
  861. .cra_alignmask = SHA_ALIGN_MSK,
  862. .cra_module = THIS_MODULE,
  863. .cra_init = mtk_sha_cra_sha224_init,
  864. .cra_exit = mtk_sha_cra_exit,
  865. }
  866. },
  867. {
  868. .init = mtk_sha_init,
  869. .update = mtk_sha_update,
  870. .final = mtk_sha_final,
  871. .finup = mtk_sha_finup,
  872. .digest = mtk_sha_digest,
  873. .export = mtk_sha_export,
  874. .import = mtk_sha_import,
  875. .setkey = mtk_sha_setkey,
  876. .halg.digestsize = SHA256_DIGEST_SIZE,
  877. .halg.statesize = sizeof(struct mtk_sha_reqctx),
  878. .halg.base = {
  879. .cra_name = "hmac(sha256)",
  880. .cra_driver_name = "mtk-hmac-sha256",
  881. .cra_priority = 400,
  882. .cra_flags = CRYPTO_ALG_ASYNC |
  883. CRYPTO_ALG_NEED_FALLBACK,
  884. .cra_blocksize = SHA256_BLOCK_SIZE,
  885. .cra_ctxsize = sizeof(struct mtk_sha_ctx) +
  886. sizeof(struct mtk_sha_hmac_ctx),
  887. .cra_alignmask = SHA_ALIGN_MSK,
  888. .cra_module = THIS_MODULE,
  889. .cra_init = mtk_sha_cra_sha256_init,
  890. .cra_exit = mtk_sha_cra_exit,
  891. }
  892. },
  893. };
  894. static struct ahash_alg algs_sha384_sha512[] = {
  895. {
  896. .init = mtk_sha_init,
  897. .update = mtk_sha_update,
  898. .final = mtk_sha_final,
  899. .finup = mtk_sha_finup,
  900. .digest = mtk_sha_digest,
  901. .export = mtk_sha_export,
  902. .import = mtk_sha_import,
  903. .halg.digestsize = SHA384_DIGEST_SIZE,
  904. .halg.statesize = sizeof(struct mtk_sha_reqctx),
  905. .halg.base = {
  906. .cra_name = "sha384",
  907. .cra_driver_name = "mtk-sha384",
  908. .cra_priority = 400,
  909. .cra_flags = CRYPTO_ALG_ASYNC,
  910. .cra_blocksize = SHA384_BLOCK_SIZE,
  911. .cra_ctxsize = sizeof(struct mtk_sha_ctx),
  912. .cra_alignmask = SHA_ALIGN_MSK,
  913. .cra_module = THIS_MODULE,
  914. .cra_init = mtk_sha_cra_init,
  915. .cra_exit = mtk_sha_cra_exit,
  916. }
  917. },
  918. {
  919. .init = mtk_sha_init,
  920. .update = mtk_sha_update,
  921. .final = mtk_sha_final,
  922. .finup = mtk_sha_finup,
  923. .digest = mtk_sha_digest,
  924. .export = mtk_sha_export,
  925. .import = mtk_sha_import,
  926. .halg.digestsize = SHA512_DIGEST_SIZE,
  927. .halg.statesize = sizeof(struct mtk_sha_reqctx),
  928. .halg.base = {
  929. .cra_name = "sha512",
  930. .cra_driver_name = "mtk-sha512",
  931. .cra_priority = 400,
  932. .cra_flags = CRYPTO_ALG_ASYNC,
  933. .cra_blocksize = SHA512_BLOCK_SIZE,
  934. .cra_ctxsize = sizeof(struct mtk_sha_ctx),
  935. .cra_alignmask = SHA_ALIGN_MSK,
  936. .cra_module = THIS_MODULE,
  937. .cra_init = mtk_sha_cra_init,
  938. .cra_exit = mtk_sha_cra_exit,
  939. }
  940. },
  941. {
  942. .init = mtk_sha_init,
  943. .update = mtk_sha_update,
  944. .final = mtk_sha_final,
  945. .finup = mtk_sha_finup,
  946. .digest = mtk_sha_digest,
  947. .export = mtk_sha_export,
  948. .import = mtk_sha_import,
  949. .setkey = mtk_sha_setkey,
  950. .halg.digestsize = SHA384_DIGEST_SIZE,
  951. .halg.statesize = sizeof(struct mtk_sha_reqctx),
  952. .halg.base = {
  953. .cra_name = "hmac(sha384)",
  954. .cra_driver_name = "mtk-hmac-sha384",
  955. .cra_priority = 400,
  956. .cra_flags = CRYPTO_ALG_ASYNC |
  957. CRYPTO_ALG_NEED_FALLBACK,
  958. .cra_blocksize = SHA384_BLOCK_SIZE,
  959. .cra_ctxsize = sizeof(struct mtk_sha_ctx) +
  960. sizeof(struct mtk_sha_hmac_ctx),
  961. .cra_alignmask = SHA_ALIGN_MSK,
  962. .cra_module = THIS_MODULE,
  963. .cra_init = mtk_sha_cra_sha384_init,
  964. .cra_exit = mtk_sha_cra_exit,
  965. }
  966. },
  967. {
  968. .init = mtk_sha_init,
  969. .update = mtk_sha_update,
  970. .final = mtk_sha_final,
  971. .finup = mtk_sha_finup,
  972. .digest = mtk_sha_digest,
  973. .export = mtk_sha_export,
  974. .import = mtk_sha_import,
  975. .setkey = mtk_sha_setkey,
  976. .halg.digestsize = SHA512_DIGEST_SIZE,
  977. .halg.statesize = sizeof(struct mtk_sha_reqctx),
  978. .halg.base = {
  979. .cra_name = "hmac(sha512)",
  980. .cra_driver_name = "mtk-hmac-sha512",
  981. .cra_priority = 400,
  982. .cra_flags = CRYPTO_ALG_ASYNC |
  983. CRYPTO_ALG_NEED_FALLBACK,
  984. .cra_blocksize = SHA512_BLOCK_SIZE,
  985. .cra_ctxsize = sizeof(struct mtk_sha_ctx) +
  986. sizeof(struct mtk_sha_hmac_ctx),
  987. .cra_alignmask = SHA_ALIGN_MSK,
  988. .cra_module = THIS_MODULE,
  989. .cra_init = mtk_sha_cra_sha512_init,
  990. .cra_exit = mtk_sha_cra_exit,
  991. }
  992. },
  993. };
  994. static void mtk_sha_queue_task(unsigned long data)
  995. {
  996. struct mtk_sha_rec *sha = (struct mtk_sha_rec *)data;
  997. mtk_sha_handle_queue(sha->cryp, sha->id - MTK_RING2, NULL);
  998. }
  999. static void mtk_sha_done_task(unsigned long data)
  1000. {
  1001. struct mtk_sha_rec *sha = (struct mtk_sha_rec *)data;
  1002. struct mtk_cryp *cryp = sha->cryp;
  1003. mtk_sha_unmap(cryp, sha);
  1004. mtk_sha_complete(cryp, sha);
  1005. }
  1006. static irqreturn_t mtk_sha_irq(int irq, void *dev_id)
  1007. {
  1008. struct mtk_sha_rec *sha = (struct mtk_sha_rec *)dev_id;
  1009. struct mtk_cryp *cryp = sha->cryp;
  1010. u32 val = mtk_sha_read(cryp, RDR_STAT(sha->id));
  1011. mtk_sha_write(cryp, RDR_STAT(sha->id), val);
  1012. if (likely((SHA_FLAGS_BUSY & sha->flags))) {
  1013. mtk_sha_write(cryp, RDR_PROC_COUNT(sha->id), MTK_CNT_RST);
  1014. mtk_sha_write(cryp, RDR_THRESH(sha->id),
  1015. MTK_RDR_PROC_THRESH | MTK_RDR_PROC_MODE);
  1016. tasklet_schedule(&sha->done_task);
  1017. } else {
  1018. dev_warn(cryp->dev, "SHA interrupt when no active requests.\n");
  1019. }
  1020. return IRQ_HANDLED;
  1021. }
  1022. /*
  1023. * The purpose of two SHA records is used to get extra performance.
  1024. * It is similar to mtk_aes_record_init().
  1025. */
  1026. static int mtk_sha_record_init(struct mtk_cryp *cryp)
  1027. {
  1028. struct mtk_sha_rec **sha = cryp->sha;
  1029. int i, err = -ENOMEM;
  1030. for (i = 0; i < MTK_REC_NUM; i++) {
  1031. sha[i] = kzalloc(sizeof(**sha), GFP_KERNEL);
  1032. if (!sha[i])
  1033. goto err_cleanup;
  1034. sha[i]->cryp = cryp;
  1035. spin_lock_init(&sha[i]->lock);
  1036. crypto_init_queue(&sha[i]->queue, SHA_QUEUE_SIZE);
  1037. tasklet_init(&sha[i]->queue_task, mtk_sha_queue_task,
  1038. (unsigned long)sha[i]);
  1039. tasklet_init(&sha[i]->done_task, mtk_sha_done_task,
  1040. (unsigned long)sha[i]);
  1041. }
  1042. /* Link to ring2 and ring3 respectively */
  1043. sha[0]->id = MTK_RING2;
  1044. sha[1]->id = MTK_RING3;
  1045. cryp->rec = 1;
  1046. return 0;
  1047. err_cleanup:
  1048. for (; i--; )
  1049. kfree(sha[i]);
  1050. return err;
  1051. }
  1052. static void mtk_sha_record_free(struct mtk_cryp *cryp)
  1053. {
  1054. int i;
  1055. for (i = 0; i < MTK_REC_NUM; i++) {
  1056. tasklet_kill(&cryp->sha[i]->done_task);
  1057. tasklet_kill(&cryp->sha[i]->queue_task);
  1058. kfree(cryp->sha[i]);
  1059. }
  1060. }
  1061. static void mtk_sha_unregister_algs(void)
  1062. {
  1063. int i;
  1064. for (i = 0; i < ARRAY_SIZE(algs_sha1_sha224_sha256); i++)
  1065. crypto_unregister_ahash(&algs_sha1_sha224_sha256[i]);
  1066. for (i = 0; i < ARRAY_SIZE(algs_sha384_sha512); i++)
  1067. crypto_unregister_ahash(&algs_sha384_sha512[i]);
  1068. }
  1069. static int mtk_sha_register_algs(void)
  1070. {
  1071. int err, i;
  1072. for (i = 0; i < ARRAY_SIZE(algs_sha1_sha224_sha256); i++) {
  1073. err = crypto_register_ahash(&algs_sha1_sha224_sha256[i]);
  1074. if (err)
  1075. goto err_sha_224_256_algs;
  1076. }
  1077. for (i = 0; i < ARRAY_SIZE(algs_sha384_sha512); i++) {
  1078. err = crypto_register_ahash(&algs_sha384_sha512[i]);
  1079. if (err)
  1080. goto err_sha_384_512_algs;
  1081. }
  1082. return 0;
  1083. err_sha_384_512_algs:
  1084. for (; i--; )
  1085. crypto_unregister_ahash(&algs_sha384_sha512[i]);
  1086. i = ARRAY_SIZE(algs_sha1_sha224_sha256);
  1087. err_sha_224_256_algs:
  1088. for (; i--; )
  1089. crypto_unregister_ahash(&algs_sha1_sha224_sha256[i]);
  1090. return err;
  1091. }
  1092. int mtk_hash_alg_register(struct mtk_cryp *cryp)
  1093. {
  1094. int err;
  1095. INIT_LIST_HEAD(&cryp->sha_list);
  1096. /* Initialize two hash records */
  1097. err = mtk_sha_record_init(cryp);
  1098. if (err)
  1099. goto err_record;
  1100. err = devm_request_irq(cryp->dev, cryp->irq[MTK_RING2], mtk_sha_irq,
  1101. 0, "mtk-sha", cryp->sha[0]);
  1102. if (err) {
  1103. dev_err(cryp->dev, "unable to request sha irq0.\n");
  1104. goto err_res;
  1105. }
  1106. err = devm_request_irq(cryp->dev, cryp->irq[MTK_RING3], mtk_sha_irq,
  1107. 0, "mtk-sha", cryp->sha[1]);
  1108. if (err) {
  1109. dev_err(cryp->dev, "unable to request sha irq1.\n");
  1110. goto err_res;
  1111. }
  1112. /* Enable ring2 and ring3 interrupt for hash */
  1113. mtk_sha_write(cryp, AIC_ENABLE_SET(MTK_RING2), MTK_IRQ_RDR2);
  1114. mtk_sha_write(cryp, AIC_ENABLE_SET(MTK_RING3), MTK_IRQ_RDR3);
  1115. spin_lock(&mtk_sha.lock);
  1116. list_add_tail(&cryp->sha_list, &mtk_sha.dev_list);
  1117. spin_unlock(&mtk_sha.lock);
  1118. err = mtk_sha_register_algs();
  1119. if (err)
  1120. goto err_algs;
  1121. return 0;
  1122. err_algs:
  1123. spin_lock(&mtk_sha.lock);
  1124. list_del(&cryp->sha_list);
  1125. spin_unlock(&mtk_sha.lock);
  1126. err_res:
  1127. mtk_sha_record_free(cryp);
  1128. err_record:
  1129. dev_err(cryp->dev, "mtk-sha initialization failed.\n");
  1130. return err;
  1131. }
  1132. void mtk_hash_alg_release(struct mtk_cryp *cryp)
  1133. {
  1134. spin_lock(&mtk_sha.lock);
  1135. list_del(&cryp->sha_list);
  1136. spin_unlock(&mtk_sha.lock);
  1137. mtk_sha_unregister_algs();
  1138. mtk_sha_record_free(cryp);
  1139. }