qi.c 19 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * CAAM/SEC 4.x QI transport/backend driver
  4. * Queue Interface backend functionality
  5. *
  6. * Copyright 2013-2016 Freescale Semiconductor, Inc.
  7. * Copyright 2016-2017 NXP
  8. */
  9. #include <linux/cpumask.h>
  10. #include <linux/kthread.h>
  11. #include <soc/fsl/qman.h>
  12. #include "regs.h"
  13. #include "qi.h"
  14. #include "desc.h"
  15. #include "intern.h"
  16. #include "desc_constr.h"
  17. #define PREHDR_RSLS_SHIFT 31
  18. /*
  19. * Use a reasonable backlog of frames (per CPU) as congestion threshold,
  20. * so that resources used by the in-flight buffers do not become a memory hog.
  21. */
  22. #define MAX_RSP_FQ_BACKLOG_PER_CPU 256
  23. #define CAAM_QI_ENQUEUE_RETRIES 10000
  24. #define CAAM_NAPI_WEIGHT 63
  25. /*
  26. * caam_napi - struct holding CAAM NAPI-related params
  27. * @irqtask: IRQ task for QI backend
  28. * @p: QMan portal
  29. */
  30. struct caam_napi {
  31. struct napi_struct irqtask;
  32. struct qman_portal *p;
  33. };
  34. /*
  35. * caam_qi_pcpu_priv - percpu private data structure to main list of pending
  36. * responses expected on each cpu.
  37. * @caam_napi: CAAM NAPI params
  38. * @net_dev: netdev used by NAPI
  39. * @rsp_fq: response FQ from CAAM
  40. */
  41. struct caam_qi_pcpu_priv {
  42. struct caam_napi caam_napi;
  43. struct net_device net_dev;
  44. struct qman_fq *rsp_fq;
  45. } ____cacheline_aligned;
  46. static DEFINE_PER_CPU(struct caam_qi_pcpu_priv, pcpu_qipriv);
  47. static DEFINE_PER_CPU(int, last_cpu);
  48. /*
  49. * caam_qi_priv - CAAM QI backend private params
  50. * @cgr: QMan congestion group
  51. * @qi_pdev: platform device for QI backend
  52. */
  53. struct caam_qi_priv {
  54. struct qman_cgr cgr;
  55. struct platform_device *qi_pdev;
  56. };
  57. static struct caam_qi_priv qipriv ____cacheline_aligned;
  58. /*
  59. * This is written by only one core - the one that initialized the CGR - and
  60. * read by multiple cores (all the others).
  61. */
  62. bool caam_congested __read_mostly;
  63. EXPORT_SYMBOL(caam_congested);
  64. #ifdef CONFIG_DEBUG_FS
  65. /*
  66. * This is a counter for the number of times the congestion group (where all
  67. * the request and response queueus are) reached congestion. Incremented
  68. * each time the congestion callback is called with congested == true.
  69. */
  70. static u64 times_congested;
  71. #endif
  72. /*
  73. * This is a a cache of buffers, from which the users of CAAM QI driver
  74. * can allocate short (CAAM_QI_MEMCACHE_SIZE) buffers. It's faster than
  75. * doing malloc on the hotpath.
  76. * NOTE: A more elegant solution would be to have some headroom in the frames
  77. * being processed. This could be added by the dpaa-ethernet driver.
  78. * This would pose a problem for userspace application processing which
  79. * cannot know of this limitation. So for now, this will work.
  80. * NOTE: The memcache is SMP-safe. No need to handle spinlocks in-here
  81. */
  82. static struct kmem_cache *qi_cache;
  83. int caam_qi_enqueue(struct device *qidev, struct caam_drv_req *req)
  84. {
  85. struct qm_fd fd;
  86. dma_addr_t addr;
  87. int ret;
  88. int num_retries = 0;
  89. qm_fd_clear_fd(&fd);
  90. qm_fd_set_compound(&fd, qm_sg_entry_get_len(&req->fd_sgt[1]));
  91. addr = dma_map_single(qidev, req->fd_sgt, sizeof(req->fd_sgt),
  92. DMA_BIDIRECTIONAL);
  93. if (dma_mapping_error(qidev, addr)) {
  94. dev_err(qidev, "DMA mapping error for QI enqueue request\n");
  95. return -EIO;
  96. }
  97. qm_fd_addr_set64(&fd, addr);
  98. do {
  99. ret = qman_enqueue(req->drv_ctx->req_fq, &fd);
  100. if (likely(!ret))
  101. return 0;
  102. if (ret != -EBUSY)
  103. break;
  104. num_retries++;
  105. } while (num_retries < CAAM_QI_ENQUEUE_RETRIES);
  106. dev_err(qidev, "qman_enqueue failed: %d\n", ret);
  107. return ret;
  108. }
  109. EXPORT_SYMBOL(caam_qi_enqueue);
  110. static void caam_fq_ern_cb(struct qman_portal *qm, struct qman_fq *fq,
  111. const union qm_mr_entry *msg)
  112. {
  113. const struct qm_fd *fd;
  114. struct caam_drv_req *drv_req;
  115. struct device *qidev = &(raw_cpu_ptr(&pcpu_qipriv)->net_dev.dev);
  116. fd = &msg->ern.fd;
  117. if (qm_fd_get_format(fd) != qm_fd_compound) {
  118. dev_err(qidev, "Non-compound FD from CAAM\n");
  119. return;
  120. }
  121. drv_req = (struct caam_drv_req *)phys_to_virt(qm_fd_addr_get64(fd));
  122. if (!drv_req) {
  123. dev_err(qidev,
  124. "Can't find original request for CAAM response\n");
  125. return;
  126. }
  127. dma_unmap_single(drv_req->drv_ctx->qidev, qm_fd_addr(fd),
  128. sizeof(drv_req->fd_sgt), DMA_BIDIRECTIONAL);
  129. drv_req->cbk(drv_req, -EIO);
  130. }
  131. static struct qman_fq *create_caam_req_fq(struct device *qidev,
  132. struct qman_fq *rsp_fq,
  133. dma_addr_t hwdesc,
  134. int fq_sched_flag)
  135. {
  136. int ret;
  137. struct qman_fq *req_fq;
  138. struct qm_mcc_initfq opts;
  139. req_fq = kzalloc(sizeof(*req_fq), GFP_ATOMIC);
  140. if (!req_fq)
  141. return ERR_PTR(-ENOMEM);
  142. req_fq->cb.ern = caam_fq_ern_cb;
  143. req_fq->cb.fqs = NULL;
  144. ret = qman_create_fq(0, QMAN_FQ_FLAG_DYNAMIC_FQID |
  145. QMAN_FQ_FLAG_TO_DCPORTAL, req_fq);
  146. if (ret) {
  147. dev_err(qidev, "Failed to create session req FQ\n");
  148. goto create_req_fq_fail;
  149. }
  150. memset(&opts, 0, sizeof(opts));
  151. opts.we_mask = cpu_to_be16(QM_INITFQ_WE_FQCTRL | QM_INITFQ_WE_DESTWQ |
  152. QM_INITFQ_WE_CONTEXTB |
  153. QM_INITFQ_WE_CONTEXTA | QM_INITFQ_WE_CGID);
  154. opts.fqd.fq_ctrl = cpu_to_be16(QM_FQCTRL_CPCSTASH | QM_FQCTRL_CGE);
  155. qm_fqd_set_destwq(&opts.fqd, qm_channel_caam, 2);
  156. opts.fqd.context_b = cpu_to_be32(qman_fq_fqid(rsp_fq));
  157. qm_fqd_context_a_set64(&opts.fqd, hwdesc);
  158. opts.fqd.cgid = qipriv.cgr.cgrid;
  159. ret = qman_init_fq(req_fq, fq_sched_flag, &opts);
  160. if (ret) {
  161. dev_err(qidev, "Failed to init session req FQ\n");
  162. goto init_req_fq_fail;
  163. }
  164. dev_dbg(qidev, "Allocated request FQ %u for CPU %u\n", req_fq->fqid,
  165. smp_processor_id());
  166. return req_fq;
  167. init_req_fq_fail:
  168. qman_destroy_fq(req_fq);
  169. create_req_fq_fail:
  170. kfree(req_fq);
  171. return ERR_PTR(ret);
  172. }
  173. static int empty_retired_fq(struct device *qidev, struct qman_fq *fq)
  174. {
  175. int ret;
  176. ret = qman_volatile_dequeue(fq, QMAN_VOLATILE_FLAG_WAIT_INT |
  177. QMAN_VOLATILE_FLAG_FINISH,
  178. QM_VDQCR_PRECEDENCE_VDQCR |
  179. QM_VDQCR_NUMFRAMES_TILLEMPTY);
  180. if (ret) {
  181. dev_err(qidev, "Volatile dequeue fail for FQ: %u\n", fq->fqid);
  182. return ret;
  183. }
  184. do {
  185. struct qman_portal *p;
  186. p = qman_get_affine_portal(smp_processor_id());
  187. qman_p_poll_dqrr(p, 16);
  188. } while (fq->flags & QMAN_FQ_STATE_NE);
  189. return 0;
  190. }
  191. static int kill_fq(struct device *qidev, struct qman_fq *fq)
  192. {
  193. u32 flags;
  194. int ret;
  195. ret = qman_retire_fq(fq, &flags);
  196. if (ret < 0) {
  197. dev_err(qidev, "qman_retire_fq failed: %d\n", ret);
  198. return ret;
  199. }
  200. if (!ret)
  201. goto empty_fq;
  202. /* Async FQ retirement condition */
  203. if (ret == 1) {
  204. /* Retry till FQ gets in retired state */
  205. do {
  206. msleep(20);
  207. } while (fq->state != qman_fq_state_retired);
  208. WARN_ON(fq->flags & QMAN_FQ_STATE_BLOCKOOS);
  209. WARN_ON(fq->flags & QMAN_FQ_STATE_ORL);
  210. }
  211. empty_fq:
  212. if (fq->flags & QMAN_FQ_STATE_NE) {
  213. ret = empty_retired_fq(qidev, fq);
  214. if (ret) {
  215. dev_err(qidev, "empty_retired_fq fail for FQ: %u\n",
  216. fq->fqid);
  217. return ret;
  218. }
  219. }
  220. ret = qman_oos_fq(fq);
  221. if (ret)
  222. dev_err(qidev, "OOS of FQID: %u failed\n", fq->fqid);
  223. qman_destroy_fq(fq);
  224. kfree(fq);
  225. return ret;
  226. }
  227. static int empty_caam_fq(struct qman_fq *fq)
  228. {
  229. int ret;
  230. struct qm_mcr_queryfq_np np;
  231. /* Wait till the older CAAM FQ get empty */
  232. do {
  233. ret = qman_query_fq_np(fq, &np);
  234. if (ret)
  235. return ret;
  236. if (!qm_mcr_np_get(&np, frm_cnt))
  237. break;
  238. msleep(20);
  239. } while (1);
  240. /*
  241. * Give extra time for pending jobs from this FQ in holding tanks
  242. * to get processed
  243. */
  244. msleep(20);
  245. return 0;
  246. }
  247. int caam_drv_ctx_update(struct caam_drv_ctx *drv_ctx, u32 *sh_desc)
  248. {
  249. int ret;
  250. u32 num_words;
  251. struct qman_fq *new_fq, *old_fq;
  252. struct device *qidev = drv_ctx->qidev;
  253. num_words = desc_len(sh_desc);
  254. if (num_words > MAX_SDLEN) {
  255. dev_err(qidev, "Invalid descriptor len: %d words\n", num_words);
  256. return -EINVAL;
  257. }
  258. /* Note down older req FQ */
  259. old_fq = drv_ctx->req_fq;
  260. /* Create a new req FQ in parked state */
  261. new_fq = create_caam_req_fq(drv_ctx->qidev, drv_ctx->rsp_fq,
  262. drv_ctx->context_a, 0);
  263. if (unlikely(IS_ERR_OR_NULL(new_fq))) {
  264. dev_err(qidev, "FQ allocation for shdesc update failed\n");
  265. return PTR_ERR(new_fq);
  266. }
  267. /* Hook up new FQ to context so that new requests keep queuing */
  268. drv_ctx->req_fq = new_fq;
  269. /* Empty and remove the older FQ */
  270. ret = empty_caam_fq(old_fq);
  271. if (ret) {
  272. dev_err(qidev, "Old CAAM FQ empty failed: %d\n", ret);
  273. /* We can revert to older FQ */
  274. drv_ctx->req_fq = old_fq;
  275. if (kill_fq(qidev, new_fq))
  276. dev_warn(qidev, "New CAAM FQ kill failed\n");
  277. return ret;
  278. }
  279. /*
  280. * Re-initialise pre-header. Set RSLS and SDLEN.
  281. * Update the shared descriptor for driver context.
  282. */
  283. drv_ctx->prehdr[0] = cpu_to_caam32((1 << PREHDR_RSLS_SHIFT) |
  284. num_words);
  285. memcpy(drv_ctx->sh_desc, sh_desc, desc_bytes(sh_desc));
  286. dma_sync_single_for_device(qidev, drv_ctx->context_a,
  287. sizeof(drv_ctx->sh_desc) +
  288. sizeof(drv_ctx->prehdr),
  289. DMA_BIDIRECTIONAL);
  290. /* Put the new FQ in scheduled state */
  291. ret = qman_schedule_fq(new_fq);
  292. if (ret) {
  293. dev_err(qidev, "Fail to sched new CAAM FQ, ecode = %d\n", ret);
  294. /*
  295. * We can kill new FQ and revert to old FQ.
  296. * Since the desc is already modified, it is success case
  297. */
  298. drv_ctx->req_fq = old_fq;
  299. if (kill_fq(qidev, new_fq))
  300. dev_warn(qidev, "New CAAM FQ kill failed\n");
  301. } else if (kill_fq(qidev, old_fq)) {
  302. dev_warn(qidev, "Old CAAM FQ kill failed\n");
  303. }
  304. return 0;
  305. }
  306. EXPORT_SYMBOL(caam_drv_ctx_update);
  307. struct caam_drv_ctx *caam_drv_ctx_init(struct device *qidev,
  308. int *cpu,
  309. u32 *sh_desc)
  310. {
  311. size_t size;
  312. u32 num_words;
  313. dma_addr_t hwdesc;
  314. struct caam_drv_ctx *drv_ctx;
  315. const cpumask_t *cpus = qman_affine_cpus();
  316. num_words = desc_len(sh_desc);
  317. if (num_words > MAX_SDLEN) {
  318. dev_err(qidev, "Invalid descriptor len: %d words\n",
  319. num_words);
  320. return ERR_PTR(-EINVAL);
  321. }
  322. drv_ctx = kzalloc(sizeof(*drv_ctx), GFP_ATOMIC);
  323. if (!drv_ctx)
  324. return ERR_PTR(-ENOMEM);
  325. /*
  326. * Initialise pre-header - set RSLS and SDLEN - and shared descriptor
  327. * and dma-map them.
  328. */
  329. drv_ctx->prehdr[0] = cpu_to_caam32((1 << PREHDR_RSLS_SHIFT) |
  330. num_words);
  331. memcpy(drv_ctx->sh_desc, sh_desc, desc_bytes(sh_desc));
  332. size = sizeof(drv_ctx->prehdr) + sizeof(drv_ctx->sh_desc);
  333. hwdesc = dma_map_single(qidev, drv_ctx->prehdr, size,
  334. DMA_BIDIRECTIONAL);
  335. if (dma_mapping_error(qidev, hwdesc)) {
  336. dev_err(qidev, "DMA map error for preheader + shdesc\n");
  337. kfree(drv_ctx);
  338. return ERR_PTR(-ENOMEM);
  339. }
  340. drv_ctx->context_a = hwdesc;
  341. /* If given CPU does not own the portal, choose another one that does */
  342. if (!cpumask_test_cpu(*cpu, cpus)) {
  343. int *pcpu = &get_cpu_var(last_cpu);
  344. *pcpu = cpumask_next(*pcpu, cpus);
  345. if (*pcpu >= nr_cpu_ids)
  346. *pcpu = cpumask_first(cpus);
  347. *cpu = *pcpu;
  348. put_cpu_var(last_cpu);
  349. }
  350. drv_ctx->cpu = *cpu;
  351. /* Find response FQ hooked with this CPU */
  352. drv_ctx->rsp_fq = per_cpu(pcpu_qipriv.rsp_fq, drv_ctx->cpu);
  353. /* Attach request FQ */
  354. drv_ctx->req_fq = create_caam_req_fq(qidev, drv_ctx->rsp_fq, hwdesc,
  355. QMAN_INITFQ_FLAG_SCHED);
  356. if (unlikely(IS_ERR_OR_NULL(drv_ctx->req_fq))) {
  357. dev_err(qidev, "create_caam_req_fq failed\n");
  358. dma_unmap_single(qidev, hwdesc, size, DMA_BIDIRECTIONAL);
  359. kfree(drv_ctx);
  360. return ERR_PTR(-ENOMEM);
  361. }
  362. drv_ctx->qidev = qidev;
  363. return drv_ctx;
  364. }
  365. EXPORT_SYMBOL(caam_drv_ctx_init);
  366. void *qi_cache_alloc(gfp_t flags)
  367. {
  368. return kmem_cache_alloc(qi_cache, flags);
  369. }
  370. EXPORT_SYMBOL(qi_cache_alloc);
  371. void qi_cache_free(void *obj)
  372. {
  373. kmem_cache_free(qi_cache, obj);
  374. }
  375. EXPORT_SYMBOL(qi_cache_free);
  376. static int caam_qi_poll(struct napi_struct *napi, int budget)
  377. {
  378. struct caam_napi *np = container_of(napi, struct caam_napi, irqtask);
  379. int cleaned = qman_p_poll_dqrr(np->p, budget);
  380. if (cleaned < budget) {
  381. napi_complete(napi);
  382. qman_p_irqsource_add(np->p, QM_PIRQ_DQRI);
  383. }
  384. return cleaned;
  385. }
  386. void caam_drv_ctx_rel(struct caam_drv_ctx *drv_ctx)
  387. {
  388. if (IS_ERR_OR_NULL(drv_ctx))
  389. return;
  390. /* Remove request FQ */
  391. if (kill_fq(drv_ctx->qidev, drv_ctx->req_fq))
  392. dev_err(drv_ctx->qidev, "Crypto session req FQ kill failed\n");
  393. dma_unmap_single(drv_ctx->qidev, drv_ctx->context_a,
  394. sizeof(drv_ctx->sh_desc) + sizeof(drv_ctx->prehdr),
  395. DMA_BIDIRECTIONAL);
  396. kfree(drv_ctx);
  397. }
  398. EXPORT_SYMBOL(caam_drv_ctx_rel);
  399. void caam_qi_shutdown(struct device *qidev)
  400. {
  401. int i;
  402. struct caam_qi_priv *priv = dev_get_drvdata(qidev);
  403. const cpumask_t *cpus = qman_affine_cpus();
  404. for_each_cpu(i, cpus) {
  405. struct napi_struct *irqtask;
  406. irqtask = &per_cpu_ptr(&pcpu_qipriv.caam_napi, i)->irqtask;
  407. napi_disable(irqtask);
  408. netif_napi_del(irqtask);
  409. if (kill_fq(qidev, per_cpu(pcpu_qipriv.rsp_fq, i)))
  410. dev_err(qidev, "Rsp FQ kill failed, cpu: %d\n", i);
  411. }
  412. qman_delete_cgr_safe(&priv->cgr);
  413. qman_release_cgrid(priv->cgr.cgrid);
  414. kmem_cache_destroy(qi_cache);
  415. platform_device_unregister(priv->qi_pdev);
  416. }
  417. static void cgr_cb(struct qman_portal *qm, struct qman_cgr *cgr, int congested)
  418. {
  419. caam_congested = congested;
  420. if (congested) {
  421. #ifdef CONFIG_DEBUG_FS
  422. times_congested++;
  423. #endif
  424. pr_debug_ratelimited("CAAM entered congestion\n");
  425. } else {
  426. pr_debug_ratelimited("CAAM exited congestion\n");
  427. }
  428. }
  429. static int caam_qi_napi_schedule(struct qman_portal *p, struct caam_napi *np)
  430. {
  431. /*
  432. * In case of threaded ISR, for RT kernels in_irq() does not return
  433. * appropriate value, so use in_serving_softirq to distinguish between
  434. * softirq and irq contexts.
  435. */
  436. if (unlikely(in_irq() || !in_serving_softirq())) {
  437. /* Disable QMan IRQ source and invoke NAPI */
  438. qman_p_irqsource_remove(p, QM_PIRQ_DQRI);
  439. np->p = p;
  440. napi_schedule(&np->irqtask);
  441. return 1;
  442. }
  443. return 0;
  444. }
  445. static enum qman_cb_dqrr_result caam_rsp_fq_dqrr_cb(struct qman_portal *p,
  446. struct qman_fq *rsp_fq,
  447. const struct qm_dqrr_entry *dqrr)
  448. {
  449. struct caam_napi *caam_napi = raw_cpu_ptr(&pcpu_qipriv.caam_napi);
  450. struct caam_drv_req *drv_req;
  451. const struct qm_fd *fd;
  452. struct device *qidev = &(raw_cpu_ptr(&pcpu_qipriv)->net_dev.dev);
  453. u32 status;
  454. if (caam_qi_napi_schedule(p, caam_napi))
  455. return qman_cb_dqrr_stop;
  456. fd = &dqrr->fd;
  457. status = be32_to_cpu(fd->status);
  458. if (unlikely(status)) {
  459. u32 ssrc = status & JRSTA_SSRC_MASK;
  460. u8 err_id = status & JRSTA_CCBERR_ERRID_MASK;
  461. if (ssrc != JRSTA_SSRC_CCB_ERROR ||
  462. err_id != JRSTA_CCBERR_ERRID_ICVCHK)
  463. dev_err(qidev, "Error: %#x in CAAM response FD\n",
  464. status);
  465. }
  466. if (unlikely(qm_fd_get_format(fd) != qm_fd_compound)) {
  467. dev_err(qidev, "Non-compound FD from CAAM\n");
  468. return qman_cb_dqrr_consume;
  469. }
  470. drv_req = (struct caam_drv_req *)phys_to_virt(qm_fd_addr_get64(fd));
  471. if (unlikely(!drv_req)) {
  472. dev_err(qidev,
  473. "Can't find original request for caam response\n");
  474. return qman_cb_dqrr_consume;
  475. }
  476. dma_unmap_single(drv_req->drv_ctx->qidev, qm_fd_addr(fd),
  477. sizeof(drv_req->fd_sgt), DMA_BIDIRECTIONAL);
  478. drv_req->cbk(drv_req, status);
  479. return qman_cb_dqrr_consume;
  480. }
  481. static int alloc_rsp_fq_cpu(struct device *qidev, unsigned int cpu)
  482. {
  483. struct qm_mcc_initfq opts;
  484. struct qman_fq *fq;
  485. int ret;
  486. fq = kzalloc(sizeof(*fq), GFP_KERNEL | GFP_DMA);
  487. if (!fq)
  488. return -ENOMEM;
  489. fq->cb.dqrr = caam_rsp_fq_dqrr_cb;
  490. ret = qman_create_fq(0, QMAN_FQ_FLAG_NO_ENQUEUE |
  491. QMAN_FQ_FLAG_DYNAMIC_FQID, fq);
  492. if (ret) {
  493. dev_err(qidev, "Rsp FQ create failed\n");
  494. kfree(fq);
  495. return -ENODEV;
  496. }
  497. memset(&opts, 0, sizeof(opts));
  498. opts.we_mask = cpu_to_be16(QM_INITFQ_WE_FQCTRL | QM_INITFQ_WE_DESTWQ |
  499. QM_INITFQ_WE_CONTEXTB |
  500. QM_INITFQ_WE_CONTEXTA | QM_INITFQ_WE_CGID);
  501. opts.fqd.fq_ctrl = cpu_to_be16(QM_FQCTRL_CTXASTASHING |
  502. QM_FQCTRL_CPCSTASH | QM_FQCTRL_CGE);
  503. qm_fqd_set_destwq(&opts.fqd, qman_affine_channel(cpu), 3);
  504. opts.fqd.cgid = qipriv.cgr.cgrid;
  505. opts.fqd.context_a.stashing.exclusive = QM_STASHING_EXCL_CTX |
  506. QM_STASHING_EXCL_DATA;
  507. qm_fqd_set_stashing(&opts.fqd, 0, 1, 1);
  508. ret = qman_init_fq(fq, QMAN_INITFQ_FLAG_SCHED, &opts);
  509. if (ret) {
  510. dev_err(qidev, "Rsp FQ init failed\n");
  511. kfree(fq);
  512. return -ENODEV;
  513. }
  514. per_cpu(pcpu_qipriv.rsp_fq, cpu) = fq;
  515. dev_dbg(qidev, "Allocated response FQ %u for CPU %u", fq->fqid, cpu);
  516. return 0;
  517. }
  518. static int init_cgr(struct device *qidev)
  519. {
  520. int ret;
  521. struct qm_mcc_initcgr opts;
  522. const u64 val = (u64)cpumask_weight(qman_affine_cpus()) *
  523. MAX_RSP_FQ_BACKLOG_PER_CPU;
  524. ret = qman_alloc_cgrid(&qipriv.cgr.cgrid);
  525. if (ret) {
  526. dev_err(qidev, "CGR alloc failed for rsp FQs: %d\n", ret);
  527. return ret;
  528. }
  529. qipriv.cgr.cb = cgr_cb;
  530. memset(&opts, 0, sizeof(opts));
  531. opts.we_mask = cpu_to_be16(QM_CGR_WE_CSCN_EN | QM_CGR_WE_CS_THRES |
  532. QM_CGR_WE_MODE);
  533. opts.cgr.cscn_en = QM_CGR_EN;
  534. opts.cgr.mode = QMAN_CGR_MODE_FRAME;
  535. qm_cgr_cs_thres_set64(&opts.cgr.cs_thres, val, 1);
  536. ret = qman_create_cgr(&qipriv.cgr, QMAN_CGR_FLAG_USE_INIT, &opts);
  537. if (ret) {
  538. dev_err(qidev, "Error %d creating CAAM CGRID: %u\n", ret,
  539. qipriv.cgr.cgrid);
  540. return ret;
  541. }
  542. dev_dbg(qidev, "Congestion threshold set to %llu\n", val);
  543. return 0;
  544. }
  545. static int alloc_rsp_fqs(struct device *qidev)
  546. {
  547. int ret, i;
  548. const cpumask_t *cpus = qman_affine_cpus();
  549. /*Now create response FQs*/
  550. for_each_cpu(i, cpus) {
  551. ret = alloc_rsp_fq_cpu(qidev, i);
  552. if (ret) {
  553. dev_err(qidev, "CAAM rsp FQ alloc failed, cpu: %u", i);
  554. return ret;
  555. }
  556. }
  557. return 0;
  558. }
  559. static void free_rsp_fqs(void)
  560. {
  561. int i;
  562. const cpumask_t *cpus = qman_affine_cpus();
  563. for_each_cpu(i, cpus)
  564. kfree(per_cpu(pcpu_qipriv.rsp_fq, i));
  565. }
  566. int caam_qi_init(struct platform_device *caam_pdev)
  567. {
  568. int err, i;
  569. struct platform_device *qi_pdev;
  570. struct device *ctrldev = &caam_pdev->dev, *qidev;
  571. struct caam_drv_private *ctrlpriv;
  572. const cpumask_t *cpus = qman_affine_cpus();
  573. static struct platform_device_info qi_pdev_info = {
  574. .name = "caam_qi",
  575. .id = PLATFORM_DEVID_NONE
  576. };
  577. qi_pdev_info.parent = ctrldev;
  578. qi_pdev_info.dma_mask = dma_get_mask(ctrldev);
  579. qi_pdev = platform_device_register_full(&qi_pdev_info);
  580. if (IS_ERR(qi_pdev))
  581. return PTR_ERR(qi_pdev);
  582. set_dma_ops(&qi_pdev->dev, get_dma_ops(ctrldev));
  583. ctrlpriv = dev_get_drvdata(ctrldev);
  584. qidev = &qi_pdev->dev;
  585. qipriv.qi_pdev = qi_pdev;
  586. dev_set_drvdata(qidev, &qipriv);
  587. /* Initialize the congestion detection */
  588. err = init_cgr(qidev);
  589. if (err) {
  590. dev_err(qidev, "CGR initialization failed: %d\n", err);
  591. platform_device_unregister(qi_pdev);
  592. return err;
  593. }
  594. /* Initialise response FQs */
  595. err = alloc_rsp_fqs(qidev);
  596. if (err) {
  597. dev_err(qidev, "Can't allocate CAAM response FQs: %d\n", err);
  598. free_rsp_fqs();
  599. platform_device_unregister(qi_pdev);
  600. return err;
  601. }
  602. /*
  603. * Enable the NAPI contexts on each of the core which has an affine
  604. * portal.
  605. */
  606. for_each_cpu(i, cpus) {
  607. struct caam_qi_pcpu_priv *priv = per_cpu_ptr(&pcpu_qipriv, i);
  608. struct caam_napi *caam_napi = &priv->caam_napi;
  609. struct napi_struct *irqtask = &caam_napi->irqtask;
  610. struct net_device *net_dev = &priv->net_dev;
  611. net_dev->dev = *qidev;
  612. INIT_LIST_HEAD(&net_dev->napi_list);
  613. netif_napi_add(net_dev, irqtask, caam_qi_poll,
  614. CAAM_NAPI_WEIGHT);
  615. napi_enable(irqtask);
  616. }
  617. /* Hook up QI device to parent controlling caam device */
  618. ctrlpriv->qidev = qidev;
  619. qi_cache = kmem_cache_create("caamqicache", CAAM_QI_MEMCACHE_SIZE, 0,
  620. SLAB_CACHE_DMA, NULL);
  621. if (!qi_cache) {
  622. dev_err(qidev, "Can't allocate CAAM cache\n");
  623. free_rsp_fqs();
  624. platform_device_unregister(qi_pdev);
  625. return -ENOMEM;
  626. }
  627. #ifdef CONFIG_DEBUG_FS
  628. debugfs_create_file("qi_congested", 0444, ctrlpriv->ctl,
  629. &times_congested, &caam_fops_u64_ro);
  630. #endif
  631. dev_info(qidev, "Linux CAAM Queue I/F driver initialised\n");
  632. return 0;
  633. }