jr.c 15 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * CAAM/SEC 4.x transport/backend driver
  4. * JobR backend functionality
  5. *
  6. * Copyright 2008-2012 Freescale Semiconductor, Inc.
  7. */
  8. #include <linux/of_irq.h>
  9. #include <linux/of_address.h>
  10. #include "compat.h"
  11. #include "ctrl.h"
  12. #include "regs.h"
  13. #include "jr.h"
  14. #include "desc.h"
  15. #include "intern.h"
  16. struct jr_driver_data {
  17. /* List of Physical JobR's with the Driver */
  18. struct list_head jr_list;
  19. spinlock_t jr_alloc_lock; /* jr_list lock */
  20. } ____cacheline_aligned;
  21. static struct jr_driver_data driver_data;
  22. static int caam_reset_hw_jr(struct device *dev)
  23. {
  24. struct caam_drv_private_jr *jrp = dev_get_drvdata(dev);
  25. unsigned int timeout = 100000;
  26. /*
  27. * mask interrupts since we are going to poll
  28. * for reset completion status
  29. */
  30. clrsetbits_32(&jrp->rregs->rconfig_lo, 0, JRCFG_IMSK);
  31. /* initiate flush (required prior to reset) */
  32. wr_reg32(&jrp->rregs->jrcommand, JRCR_RESET);
  33. while (((rd_reg32(&jrp->rregs->jrintstatus) & JRINT_ERR_HALT_MASK) ==
  34. JRINT_ERR_HALT_INPROGRESS) && --timeout)
  35. cpu_relax();
  36. if ((rd_reg32(&jrp->rregs->jrintstatus) & JRINT_ERR_HALT_MASK) !=
  37. JRINT_ERR_HALT_COMPLETE || timeout == 0) {
  38. dev_err(dev, "failed to flush job ring %d\n", jrp->ridx);
  39. return -EIO;
  40. }
  41. /* initiate reset */
  42. timeout = 100000;
  43. wr_reg32(&jrp->rregs->jrcommand, JRCR_RESET);
  44. while ((rd_reg32(&jrp->rregs->jrcommand) & JRCR_RESET) && --timeout)
  45. cpu_relax();
  46. if (timeout == 0) {
  47. dev_err(dev, "failed to reset job ring %d\n", jrp->ridx);
  48. return -EIO;
  49. }
  50. /* unmask interrupts */
  51. clrsetbits_32(&jrp->rregs->rconfig_lo, JRCFG_IMSK, 0);
  52. return 0;
  53. }
  54. /*
  55. * Shutdown JobR independent of platform property code
  56. */
  57. static int caam_jr_shutdown(struct device *dev)
  58. {
  59. struct caam_drv_private_jr *jrp = dev_get_drvdata(dev);
  60. dma_addr_t inpbusaddr, outbusaddr;
  61. int ret;
  62. ret = caam_reset_hw_jr(dev);
  63. tasklet_kill(&jrp->irqtask);
  64. /* Release interrupt */
  65. free_irq(jrp->irq, dev);
  66. /* Free rings */
  67. inpbusaddr = rd_reg64(&jrp->rregs->inpring_base);
  68. outbusaddr = rd_reg64(&jrp->rregs->outring_base);
  69. dma_free_coherent(dev, sizeof(dma_addr_t) * JOBR_DEPTH,
  70. jrp->inpring, inpbusaddr);
  71. dma_free_coherent(dev, sizeof(struct jr_outentry) * JOBR_DEPTH,
  72. jrp->outring, outbusaddr);
  73. kfree(jrp->entinfo);
  74. return ret;
  75. }
  76. static int caam_jr_remove(struct platform_device *pdev)
  77. {
  78. int ret;
  79. struct device *jrdev;
  80. struct caam_drv_private_jr *jrpriv;
  81. jrdev = &pdev->dev;
  82. jrpriv = dev_get_drvdata(jrdev);
  83. /*
  84. * Return EBUSY if job ring already allocated.
  85. */
  86. if (atomic_read(&jrpriv->tfm_count)) {
  87. dev_err(jrdev, "Device is busy\n");
  88. return -EBUSY;
  89. }
  90. /* Remove the node from Physical JobR list maintained by driver */
  91. spin_lock(&driver_data.jr_alloc_lock);
  92. list_del(&jrpriv->list_node);
  93. spin_unlock(&driver_data.jr_alloc_lock);
  94. /* Release ring */
  95. ret = caam_jr_shutdown(jrdev);
  96. if (ret)
  97. dev_err(jrdev, "Failed to shut down job ring\n");
  98. irq_dispose_mapping(jrpriv->irq);
  99. return ret;
  100. }
  101. /* Main per-ring interrupt handler */
  102. static irqreturn_t caam_jr_interrupt(int irq, void *st_dev)
  103. {
  104. struct device *dev = st_dev;
  105. struct caam_drv_private_jr *jrp = dev_get_drvdata(dev);
  106. u32 irqstate;
  107. /*
  108. * Check the output ring for ready responses, kick
  109. * tasklet if jobs done.
  110. */
  111. irqstate = rd_reg32(&jrp->rregs->jrintstatus);
  112. if (!irqstate)
  113. return IRQ_NONE;
  114. /*
  115. * If JobR error, we got more development work to do
  116. * Flag a bug now, but we really need to shut down and
  117. * restart the queue (and fix code).
  118. */
  119. if (irqstate & JRINT_JR_ERROR) {
  120. dev_err(dev, "job ring error: irqstate: %08x\n", irqstate);
  121. BUG();
  122. }
  123. /* mask valid interrupts */
  124. clrsetbits_32(&jrp->rregs->rconfig_lo, 0, JRCFG_IMSK);
  125. /* Have valid interrupt at this point, just ACK and trigger */
  126. wr_reg32(&jrp->rregs->jrintstatus, irqstate);
  127. preempt_disable();
  128. tasklet_schedule(&jrp->irqtask);
  129. preempt_enable();
  130. return IRQ_HANDLED;
  131. }
  132. /* Deferred service handler, run as interrupt-fired tasklet */
  133. static void caam_jr_dequeue(unsigned long devarg)
  134. {
  135. int hw_idx, sw_idx, i, head, tail;
  136. struct device *dev = (struct device *)devarg;
  137. struct caam_drv_private_jr *jrp = dev_get_drvdata(dev);
  138. void (*usercall)(struct device *dev, u32 *desc, u32 status, void *arg);
  139. u32 *userdesc, userstatus;
  140. void *userarg;
  141. while (rd_reg32(&jrp->rregs->outring_used)) {
  142. head = READ_ONCE(jrp->head);
  143. spin_lock(&jrp->outlock);
  144. sw_idx = tail = jrp->tail;
  145. hw_idx = jrp->out_ring_read_index;
  146. for (i = 0; CIRC_CNT(head, tail + i, JOBR_DEPTH) >= 1; i++) {
  147. sw_idx = (tail + i) & (JOBR_DEPTH - 1);
  148. if (jrp->outring[hw_idx].desc ==
  149. caam_dma_to_cpu(jrp->entinfo[sw_idx].desc_addr_dma))
  150. break; /* found */
  151. }
  152. /* we should never fail to find a matching descriptor */
  153. BUG_ON(CIRC_CNT(head, tail + i, JOBR_DEPTH) <= 0);
  154. /* Unmap just-run descriptor so we can post-process */
  155. dma_unmap_single(dev,
  156. caam_dma_to_cpu(jrp->outring[hw_idx].desc),
  157. jrp->entinfo[sw_idx].desc_size,
  158. DMA_TO_DEVICE);
  159. /* mark completed, avoid matching on a recycled desc addr */
  160. jrp->entinfo[sw_idx].desc_addr_dma = 0;
  161. /* Stash callback params for use outside of lock */
  162. usercall = jrp->entinfo[sw_idx].callbk;
  163. userarg = jrp->entinfo[sw_idx].cbkarg;
  164. userdesc = jrp->entinfo[sw_idx].desc_addr_virt;
  165. userstatus = caam32_to_cpu(jrp->outring[hw_idx].jrstatus);
  166. /*
  167. * Make sure all information from the job has been obtained
  168. * before telling CAAM that the job has been removed from the
  169. * output ring.
  170. */
  171. mb();
  172. /* set done */
  173. wr_reg32(&jrp->rregs->outring_rmvd, 1);
  174. jrp->out_ring_read_index = (jrp->out_ring_read_index + 1) &
  175. (JOBR_DEPTH - 1);
  176. /*
  177. * if this job completed out-of-order, do not increment
  178. * the tail. Otherwise, increment tail by 1 plus the
  179. * number of subsequent jobs already completed out-of-order
  180. */
  181. if (sw_idx == tail) {
  182. do {
  183. tail = (tail + 1) & (JOBR_DEPTH - 1);
  184. } while (CIRC_CNT(head, tail, JOBR_DEPTH) >= 1 &&
  185. jrp->entinfo[tail].desc_addr_dma == 0);
  186. jrp->tail = tail;
  187. }
  188. spin_unlock(&jrp->outlock);
  189. /* Finally, execute user's callback */
  190. usercall(dev, userdesc, userstatus, userarg);
  191. }
  192. /* reenable / unmask IRQs */
  193. clrsetbits_32(&jrp->rregs->rconfig_lo, JRCFG_IMSK, 0);
  194. }
  195. /**
  196. * caam_jr_alloc() - Alloc a job ring for someone to use as needed.
  197. *
  198. * returns : pointer to the newly allocated physical
  199. * JobR dev can be written to if successful.
  200. **/
  201. struct device *caam_jr_alloc(void)
  202. {
  203. struct caam_drv_private_jr *jrpriv, *min_jrpriv = NULL;
  204. struct device *dev = ERR_PTR(-ENODEV);
  205. int min_tfm_cnt = INT_MAX;
  206. int tfm_cnt;
  207. spin_lock(&driver_data.jr_alloc_lock);
  208. if (list_empty(&driver_data.jr_list)) {
  209. spin_unlock(&driver_data.jr_alloc_lock);
  210. return ERR_PTR(-ENODEV);
  211. }
  212. list_for_each_entry(jrpriv, &driver_data.jr_list, list_node) {
  213. tfm_cnt = atomic_read(&jrpriv->tfm_count);
  214. if (tfm_cnt < min_tfm_cnt) {
  215. min_tfm_cnt = tfm_cnt;
  216. min_jrpriv = jrpriv;
  217. }
  218. if (!min_tfm_cnt)
  219. break;
  220. }
  221. if (min_jrpriv) {
  222. atomic_inc(&min_jrpriv->tfm_count);
  223. dev = min_jrpriv->dev;
  224. }
  225. spin_unlock(&driver_data.jr_alloc_lock);
  226. return dev;
  227. }
  228. EXPORT_SYMBOL(caam_jr_alloc);
  229. /**
  230. * caam_jr_free() - Free the Job Ring
  231. * @rdev - points to the dev that identifies the Job ring to
  232. * be released.
  233. **/
  234. void caam_jr_free(struct device *rdev)
  235. {
  236. struct caam_drv_private_jr *jrpriv = dev_get_drvdata(rdev);
  237. atomic_dec(&jrpriv->tfm_count);
  238. }
  239. EXPORT_SYMBOL(caam_jr_free);
  240. /**
  241. * caam_jr_enqueue() - Enqueue a job descriptor head. Returns 0 if OK,
  242. * -EBUSY if the queue is full, -EIO if it cannot map the caller's
  243. * descriptor.
  244. * @dev: device of the job ring to be used. This device should have
  245. * been assigned prior by caam_jr_register().
  246. * @desc: points to a job descriptor that execute our request. All
  247. * descriptors (and all referenced data) must be in a DMAable
  248. * region, and all data references must be physical addresses
  249. * accessible to CAAM (i.e. within a PAMU window granted
  250. * to it).
  251. * @cbk: pointer to a callback function to be invoked upon completion
  252. * of this request. This has the form:
  253. * callback(struct device *dev, u32 *desc, u32 stat, void *arg)
  254. * where:
  255. * @dev: contains the job ring device that processed this
  256. * response.
  257. * @desc: descriptor that initiated the request, same as
  258. * "desc" being argued to caam_jr_enqueue().
  259. * @status: untranslated status received from CAAM. See the
  260. * reference manual for a detailed description of
  261. * error meaning, or see the JRSTA definitions in the
  262. * register header file
  263. * @areq: optional pointer to an argument passed with the
  264. * original request
  265. * @areq: optional pointer to a user argument for use at callback
  266. * time.
  267. **/
  268. int caam_jr_enqueue(struct device *dev, u32 *desc,
  269. void (*cbk)(struct device *dev, u32 *desc,
  270. u32 status, void *areq),
  271. void *areq)
  272. {
  273. struct caam_drv_private_jr *jrp = dev_get_drvdata(dev);
  274. struct caam_jrentry_info *head_entry;
  275. int head, tail, desc_size;
  276. dma_addr_t desc_dma;
  277. desc_size = (caam32_to_cpu(*desc) & HDR_JD_LENGTH_MASK) * sizeof(u32);
  278. desc_dma = dma_map_single(dev, desc, desc_size, DMA_TO_DEVICE);
  279. if (dma_mapping_error(dev, desc_dma)) {
  280. dev_err(dev, "caam_jr_enqueue(): can't map jobdesc\n");
  281. return -EIO;
  282. }
  283. spin_lock_bh(&jrp->inplock);
  284. head = jrp->head;
  285. tail = READ_ONCE(jrp->tail);
  286. if (!rd_reg32(&jrp->rregs->inpring_avail) ||
  287. CIRC_SPACE(head, tail, JOBR_DEPTH) <= 0) {
  288. spin_unlock_bh(&jrp->inplock);
  289. dma_unmap_single(dev, desc_dma, desc_size, DMA_TO_DEVICE);
  290. return -EBUSY;
  291. }
  292. head_entry = &jrp->entinfo[head];
  293. head_entry->desc_addr_virt = desc;
  294. head_entry->desc_size = desc_size;
  295. head_entry->callbk = (void *)cbk;
  296. head_entry->cbkarg = areq;
  297. head_entry->desc_addr_dma = desc_dma;
  298. jrp->inpring[jrp->inp_ring_write_index] = cpu_to_caam_dma(desc_dma);
  299. /*
  300. * Guarantee that the descriptor's DMA address has been written to
  301. * the next slot in the ring before the write index is updated, since
  302. * other cores may update this index independently.
  303. */
  304. smp_wmb();
  305. jrp->inp_ring_write_index = (jrp->inp_ring_write_index + 1) &
  306. (JOBR_DEPTH - 1);
  307. jrp->head = (head + 1) & (JOBR_DEPTH - 1);
  308. /*
  309. * Ensure that all job information has been written before
  310. * notifying CAAM that a new job was added to the input ring.
  311. */
  312. wmb();
  313. wr_reg32(&jrp->rregs->inpring_jobadd, 1);
  314. spin_unlock_bh(&jrp->inplock);
  315. return 0;
  316. }
  317. EXPORT_SYMBOL(caam_jr_enqueue);
  318. /*
  319. * Init JobR independent of platform property detection
  320. */
  321. static int caam_jr_init(struct device *dev)
  322. {
  323. struct caam_drv_private_jr *jrp;
  324. dma_addr_t inpbusaddr, outbusaddr;
  325. int i, error;
  326. jrp = dev_get_drvdata(dev);
  327. tasklet_init(&jrp->irqtask, caam_jr_dequeue, (unsigned long)dev);
  328. /* Connect job ring interrupt handler. */
  329. error = request_irq(jrp->irq, caam_jr_interrupt, IRQF_SHARED,
  330. dev_name(dev), dev);
  331. if (error) {
  332. dev_err(dev, "can't connect JobR %d interrupt (%d)\n",
  333. jrp->ridx, jrp->irq);
  334. goto out_kill_deq;
  335. }
  336. error = caam_reset_hw_jr(dev);
  337. if (error)
  338. goto out_free_irq;
  339. error = -ENOMEM;
  340. jrp->inpring = dma_alloc_coherent(dev, sizeof(*jrp->inpring) *
  341. JOBR_DEPTH, &inpbusaddr, GFP_KERNEL);
  342. if (!jrp->inpring)
  343. goto out_free_irq;
  344. jrp->outring = dma_alloc_coherent(dev, sizeof(*jrp->outring) *
  345. JOBR_DEPTH, &outbusaddr, GFP_KERNEL);
  346. if (!jrp->outring)
  347. goto out_free_inpring;
  348. jrp->entinfo = kcalloc(JOBR_DEPTH, sizeof(*jrp->entinfo), GFP_KERNEL);
  349. if (!jrp->entinfo)
  350. goto out_free_outring;
  351. for (i = 0; i < JOBR_DEPTH; i++)
  352. jrp->entinfo[i].desc_addr_dma = !0;
  353. /* Setup rings */
  354. jrp->inp_ring_write_index = 0;
  355. jrp->out_ring_read_index = 0;
  356. jrp->head = 0;
  357. jrp->tail = 0;
  358. wr_reg64(&jrp->rregs->inpring_base, inpbusaddr);
  359. wr_reg64(&jrp->rregs->outring_base, outbusaddr);
  360. wr_reg32(&jrp->rregs->inpring_size, JOBR_DEPTH);
  361. wr_reg32(&jrp->rregs->outring_size, JOBR_DEPTH);
  362. jrp->ringsize = JOBR_DEPTH;
  363. spin_lock_init(&jrp->inplock);
  364. spin_lock_init(&jrp->outlock);
  365. /* Select interrupt coalescing parameters */
  366. clrsetbits_32(&jrp->rregs->rconfig_lo, 0, JOBR_INTC |
  367. (JOBR_INTC_COUNT_THLD << JRCFG_ICDCT_SHIFT) |
  368. (JOBR_INTC_TIME_THLD << JRCFG_ICTT_SHIFT));
  369. return 0;
  370. out_free_outring:
  371. dma_free_coherent(dev, sizeof(struct jr_outentry) * JOBR_DEPTH,
  372. jrp->outring, outbusaddr);
  373. out_free_inpring:
  374. dma_free_coherent(dev, sizeof(dma_addr_t) * JOBR_DEPTH,
  375. jrp->inpring, inpbusaddr);
  376. dev_err(dev, "can't allocate job rings for %d\n", jrp->ridx);
  377. out_free_irq:
  378. free_irq(jrp->irq, dev);
  379. out_kill_deq:
  380. tasklet_kill(&jrp->irqtask);
  381. return error;
  382. }
  383. /*
  384. * Probe routine for each detected JobR subsystem.
  385. */
  386. static int caam_jr_probe(struct platform_device *pdev)
  387. {
  388. struct device *jrdev;
  389. struct device_node *nprop;
  390. struct caam_job_ring __iomem *ctrl;
  391. struct caam_drv_private_jr *jrpriv;
  392. static int total_jobrs;
  393. int error;
  394. jrdev = &pdev->dev;
  395. jrpriv = devm_kmalloc(jrdev, sizeof(*jrpriv), GFP_KERNEL);
  396. if (!jrpriv)
  397. return -ENOMEM;
  398. dev_set_drvdata(jrdev, jrpriv);
  399. /* save ring identity relative to detection */
  400. jrpriv->ridx = total_jobrs++;
  401. nprop = pdev->dev.of_node;
  402. /* Get configuration properties from device tree */
  403. /* First, get register page */
  404. ctrl = of_iomap(nprop, 0);
  405. if (!ctrl) {
  406. dev_err(jrdev, "of_iomap() failed\n");
  407. return -ENOMEM;
  408. }
  409. jrpriv->rregs = (struct caam_job_ring __iomem __force *)ctrl;
  410. if (sizeof(dma_addr_t) == sizeof(u64)) {
  411. if (caam_dpaa2)
  412. error = dma_set_mask_and_coherent(jrdev,
  413. DMA_BIT_MASK(49));
  414. else if (of_device_is_compatible(nprop,
  415. "fsl,sec-v5.0-job-ring"))
  416. error = dma_set_mask_and_coherent(jrdev,
  417. DMA_BIT_MASK(40));
  418. else
  419. error = dma_set_mask_and_coherent(jrdev,
  420. DMA_BIT_MASK(36));
  421. } else {
  422. error = dma_set_mask_and_coherent(jrdev, DMA_BIT_MASK(32));
  423. }
  424. if (error) {
  425. dev_err(jrdev, "dma_set_mask_and_coherent failed (%d)\n",
  426. error);
  427. iounmap(ctrl);
  428. return error;
  429. }
  430. /* Identify the interrupt */
  431. jrpriv->irq = irq_of_parse_and_map(nprop, 0);
  432. /* Now do the platform independent part */
  433. error = caam_jr_init(jrdev); /* now turn on hardware */
  434. if (error) {
  435. irq_dispose_mapping(jrpriv->irq);
  436. iounmap(ctrl);
  437. return error;
  438. }
  439. jrpriv->dev = jrdev;
  440. spin_lock(&driver_data.jr_alloc_lock);
  441. list_add_tail(&jrpriv->list_node, &driver_data.jr_list);
  442. spin_unlock(&driver_data.jr_alloc_lock);
  443. atomic_set(&jrpriv->tfm_count, 0);
  444. return 0;
  445. }
  446. static const struct of_device_id caam_jr_match[] = {
  447. {
  448. .compatible = "fsl,sec-v4.0-job-ring",
  449. },
  450. {
  451. .compatible = "fsl,sec4.0-job-ring",
  452. },
  453. {},
  454. };
  455. MODULE_DEVICE_TABLE(of, caam_jr_match);
  456. static struct platform_driver caam_jr_driver = {
  457. .driver = {
  458. .name = "caam_jr",
  459. .of_match_table = caam_jr_match,
  460. },
  461. .probe = caam_jr_probe,
  462. .remove = caam_jr_remove,
  463. };
  464. static int __init jr_driver_init(void)
  465. {
  466. spin_lock_init(&driver_data.jr_alloc_lock);
  467. INIT_LIST_HEAD(&driver_data.jr_list);
  468. return platform_driver_register(&caam_jr_driver);
  469. }
  470. static void __exit jr_driver_exit(void)
  471. {
  472. platform_driver_unregister(&caam_jr_driver);
  473. }
  474. module_init(jr_driver_init);
  475. module_exit(jr_driver_exit);
  476. MODULE_LICENSE("GPL");
  477. MODULE_DESCRIPTION("FSL CAAM JR request backend");
  478. MODULE_AUTHOR("Freescale Semiconductor - NMG/STC");