error.c 13 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * CAAM Error Reporting
  4. *
  5. * Copyright 2009-2011 Freescale Semiconductor, Inc.
  6. */
  7. #include "compat.h"
  8. #include "regs.h"
  9. #include "desc.h"
  10. #include "error.h"
  11. #ifdef DEBUG
  12. #include <linux/highmem.h>
  13. void caam_dump_sg(const char *level, const char *prefix_str, int prefix_type,
  14. int rowsize, int groupsize, struct scatterlist *sg,
  15. size_t tlen, bool ascii)
  16. {
  17. struct scatterlist *it;
  18. void *it_page;
  19. size_t len;
  20. void *buf;
  21. for (it = sg; it && tlen > 0 ; it = sg_next(sg)) {
  22. /*
  23. * make sure the scatterlist's page
  24. * has a valid virtual memory mapping
  25. */
  26. it_page = kmap_atomic(sg_page(it));
  27. if (unlikely(!it_page)) {
  28. pr_err("caam_dump_sg: kmap failed\n");
  29. return;
  30. }
  31. buf = it_page + it->offset;
  32. len = min_t(size_t, tlen, it->length);
  33. print_hex_dump(level, prefix_str, prefix_type, rowsize,
  34. groupsize, buf, len, ascii);
  35. tlen -= len;
  36. kunmap_atomic(it_page);
  37. }
  38. }
  39. #else
  40. void caam_dump_sg(const char *level, const char *prefix_str, int prefix_type,
  41. int rowsize, int groupsize, struct scatterlist *sg,
  42. size_t tlen, bool ascii)
  43. {}
  44. #endif /* DEBUG */
  45. EXPORT_SYMBOL(caam_dump_sg);
  46. static const struct {
  47. u8 value;
  48. const char *error_text;
  49. } desc_error_list[] = {
  50. { 0x00, "No error." },
  51. { 0x01, "SGT Length Error. The descriptor is trying to read more data than is contained in the SGT table." },
  52. { 0x02, "SGT Null Entry Error." },
  53. { 0x03, "Job Ring Control Error. There is a bad value in the Job Ring Control register." },
  54. { 0x04, "Invalid Descriptor Command. The Descriptor Command field is invalid." },
  55. { 0x05, "Reserved." },
  56. { 0x06, "Invalid KEY Command" },
  57. { 0x07, "Invalid LOAD Command" },
  58. { 0x08, "Invalid STORE Command" },
  59. { 0x09, "Invalid OPERATION Command" },
  60. { 0x0A, "Invalid FIFO LOAD Command" },
  61. { 0x0B, "Invalid FIFO STORE Command" },
  62. { 0x0C, "Invalid MOVE/MOVE_LEN Command" },
  63. { 0x0D, "Invalid JUMP Command. A nonlocal JUMP Command is invalid because the target is not a Job Header Command, or the jump is from a Trusted Descriptor to a Job Descriptor, or because the target Descriptor contains a Shared Descriptor." },
  64. { 0x0E, "Invalid MATH Command" },
  65. { 0x0F, "Invalid SIGNATURE Command" },
  66. { 0x10, "Invalid Sequence Command. A SEQ IN PTR OR SEQ OUT PTR Command is invalid or a SEQ KEY, SEQ LOAD, SEQ FIFO LOAD, or SEQ FIFO STORE decremented the input or output sequence length below 0. This error may result if a built-in PROTOCOL Command has encountered a malformed PDU." },
  67. { 0x11, "Skip data type invalid. The type must be 0xE or 0xF."},
  68. { 0x12, "Shared Descriptor Header Error" },
  69. { 0x13, "Header Error. Invalid length or parity, or certain other problems." },
  70. { 0x14, "Burster Error. Burster has gotten to an illegal state" },
  71. { 0x15, "Context Register Length Error. The descriptor is trying to read or write past the end of the Context Register. A SEQ LOAD or SEQ STORE with the VLF bit set was executed with too large a length in the variable length register (VSOL for SEQ STORE or VSIL for SEQ LOAD)." },
  72. { 0x16, "DMA Error" },
  73. { 0x17, "Reserved." },
  74. { 0x1A, "Job failed due to JR reset" },
  75. { 0x1B, "Job failed due to Fail Mode" },
  76. { 0x1C, "DECO Watchdog timer timeout error" },
  77. { 0x1D, "DECO tried to copy a key from another DECO but the other DECO's Key Registers were locked" },
  78. { 0x1E, "DECO attempted to copy data from a DECO that had an unmasked Descriptor error" },
  79. { 0x1F, "LIODN error. DECO was trying to share from itself or from another DECO but the two Non-SEQ LIODN values didn't match or the 'shared from' DECO's Descriptor required that the SEQ LIODNs be the same and they aren't." },
  80. { 0x20, "DECO has completed a reset initiated via the DRR register" },
  81. { 0x21, "Nonce error. When using EKT (CCM) key encryption option in the FIFO STORE Command, the Nonce counter reached its maximum value and this encryption mode can no longer be used." },
  82. { 0x22, "Meta data is too large (> 511 bytes) for TLS decap (input frame; block ciphers) and IPsec decap (output frame, when doing the next header byte update) and DCRC (output frame)." },
  83. { 0x23, "Read Input Frame error" },
  84. { 0x24, "JDKEK, TDKEK or TDSK not loaded error" },
  85. { 0x80, "DNR (do not run) error" },
  86. { 0x81, "undefined protocol command" },
  87. { 0x82, "invalid setting in PDB" },
  88. { 0x83, "Anti-replay LATE error" },
  89. { 0x84, "Anti-replay REPLAY error" },
  90. { 0x85, "Sequence number overflow" },
  91. { 0x86, "Sigver invalid signature" },
  92. { 0x87, "DSA Sign Illegal test descriptor" },
  93. { 0x88, "Protocol Format Error - A protocol has seen an error in the format of data received. When running RSA, this means that formatting with random padding was used, and did not follow the form: 0x00, 0x02, 8-to-N bytes of non-zero pad, 0x00, F data." },
  94. { 0x89, "Protocol Size Error - A protocol has seen an error in size. When running RSA, pdb size N < (size of F) when no formatting is used; or pdb size N < (F + 11) when formatting is used." },
  95. { 0xC1, "Blob Command error: Undefined mode" },
  96. { 0xC2, "Blob Command error: Secure Memory Blob mode error" },
  97. { 0xC4, "Blob Command error: Black Blob key or input size error" },
  98. { 0xC5, "Blob Command error: Invalid key destination" },
  99. { 0xC8, "Blob Command error: Trusted/Secure mode error" },
  100. { 0xF0, "IPsec TTL or hop limit field either came in as 0, or was decremented to 0" },
  101. { 0xF1, "3GPP HFN matches or exceeds the Threshold" },
  102. };
  103. static const struct {
  104. u8 value;
  105. const char *error_text;
  106. } qi_error_list[] = {
  107. { 0x1F, "Job terminated by FQ or ICID flush" },
  108. { 0x20, "FD format error"},
  109. { 0x21, "FD command format error"},
  110. { 0x23, "FL format error"},
  111. { 0x25, "CRJD specified in FD, but not enabled in FLC"},
  112. { 0x30, "Max. buffer size too small"},
  113. { 0x31, "DHR exceeds max. buffer size (allocate mode, S/G format)"},
  114. { 0x32, "SGT exceeds max. buffer size (allocate mode, S/G format"},
  115. { 0x33, "Size over/underflow (allocate mode)"},
  116. { 0x34, "Size over/underflow (reuse mode)"},
  117. { 0x35, "Length exceeds max. short length (allocate mode, S/G/ format)"},
  118. { 0x36, "Memory footprint exceeds max. value (allocate mode, S/G/ format)"},
  119. { 0x41, "SBC frame format not supported (allocate mode)"},
  120. { 0x42, "Pool 0 invalid / pool 1 size < pool 0 size (allocate mode)"},
  121. { 0x43, "Annotation output enabled but ASAR = 0 (allocate mode)"},
  122. { 0x44, "Unsupported or reserved frame format or SGHR = 1 (reuse mode)"},
  123. { 0x45, "DHR correction underflow (reuse mode, single buffer format)"},
  124. { 0x46, "Annotation length exceeds offset (reuse mode)"},
  125. { 0x48, "Annotation output enabled but ASA limited by ASAR (reuse mode)"},
  126. { 0x49, "Data offset correction exceeds input frame data length (reuse mode)"},
  127. { 0x4B, "Annotation output enabled but ASA cannote be expanded (frame list)"},
  128. { 0x51, "Unsupported IF reuse mode"},
  129. { 0x52, "Unsupported FL use mode"},
  130. { 0x53, "Unsupported RJD use mode"},
  131. { 0x54, "Unsupported inline descriptor use mode"},
  132. { 0xC0, "Table buffer pool 0 depletion"},
  133. { 0xC1, "Table buffer pool 1 depletion"},
  134. { 0xC2, "Data buffer pool 0 depletion, no OF allocated"},
  135. { 0xC3, "Data buffer pool 1 depletion, no OF allocated"},
  136. { 0xC4, "Data buffer pool 0 depletion, partial OF allocated"},
  137. { 0xC5, "Data buffer pool 1 depletion, partial OF allocated"},
  138. { 0xD0, "FLC read error"},
  139. { 0xD1, "FL read error"},
  140. { 0xD2, "FL write error"},
  141. { 0xD3, "OF SGT write error"},
  142. { 0xD4, "PTA read error"},
  143. { 0xD5, "PTA write error"},
  144. { 0xD6, "OF SGT F-bit write error"},
  145. { 0xD7, "ASA write error"},
  146. { 0xE1, "FLC[ICR]=0 ICID error"},
  147. { 0xE2, "FLC[ICR]=1 ICID error"},
  148. { 0xE4, "source of ICID flush not trusted (BDI = 0)"},
  149. };
  150. static const char * const cha_id_list[] = {
  151. "",
  152. "AES",
  153. "DES",
  154. "ARC4",
  155. "MDHA",
  156. "RNG",
  157. "SNOW f8",
  158. "Kasumi f8/9",
  159. "PKHA",
  160. "CRCA",
  161. "SNOW f9",
  162. "ZUCE",
  163. "ZUCA",
  164. };
  165. static const char * const err_id_list[] = {
  166. "No error.",
  167. "Mode error.",
  168. "Data size error.",
  169. "Key size error.",
  170. "PKHA A memory size error.",
  171. "PKHA B memory size error.",
  172. "Data arrived out of sequence error.",
  173. "PKHA divide-by-zero error.",
  174. "PKHA modulus even error.",
  175. "DES key parity error.",
  176. "ICV check failed.",
  177. "Hardware error.",
  178. "Unsupported CCM AAD size.",
  179. "Class 1 CHA is not reset",
  180. "Invalid CHA combination was selected",
  181. "Invalid CHA selected.",
  182. };
  183. static const char * const rng_err_id_list[] = {
  184. "",
  185. "",
  186. "",
  187. "Instantiate",
  188. "Not instantiated",
  189. "Test instantiate",
  190. "Prediction resistance",
  191. "Prediction resistance and test request",
  192. "Uninstantiate",
  193. "Secure key generation",
  194. };
  195. static void report_ccb_status(struct device *jrdev, const u32 status,
  196. const char *error)
  197. {
  198. u8 cha_id = (status & JRSTA_CCBERR_CHAID_MASK) >>
  199. JRSTA_CCBERR_CHAID_SHIFT;
  200. u8 err_id = status & JRSTA_CCBERR_ERRID_MASK;
  201. u8 idx = (status & JRSTA_DECOERR_INDEX_MASK) >>
  202. JRSTA_DECOERR_INDEX_SHIFT;
  203. char *idx_str;
  204. const char *cha_str = "unidentified cha_id value 0x";
  205. char cha_err_code[3] = { 0 };
  206. const char *err_str = "unidentified err_id value 0x";
  207. char err_err_code[3] = { 0 };
  208. if (status & JRSTA_DECOERR_JUMP)
  209. idx_str = "jump tgt desc idx";
  210. else
  211. idx_str = "desc idx";
  212. if (cha_id < ARRAY_SIZE(cha_id_list))
  213. cha_str = cha_id_list[cha_id];
  214. else
  215. snprintf(cha_err_code, sizeof(cha_err_code), "%02x", cha_id);
  216. if ((cha_id << JRSTA_CCBERR_CHAID_SHIFT) == JRSTA_CCBERR_CHAID_RNG &&
  217. err_id < ARRAY_SIZE(rng_err_id_list) &&
  218. strlen(rng_err_id_list[err_id])) {
  219. /* RNG-only error */
  220. err_str = rng_err_id_list[err_id];
  221. } else {
  222. err_str = err_id_list[err_id];
  223. }
  224. /*
  225. * CCB ICV check failures are part of normal operation life;
  226. * we leave the upper layers to do what they want with them.
  227. */
  228. if (err_id != JRSTA_CCBERR_ERRID_ICVCHK)
  229. dev_err(jrdev, "%08x: %s: %s %d: %s%s: %s%s\n",
  230. status, error, idx_str, idx,
  231. cha_str, cha_err_code,
  232. err_str, err_err_code);
  233. }
  234. static void report_jump_status(struct device *jrdev, const u32 status,
  235. const char *error)
  236. {
  237. dev_err(jrdev, "%08x: %s: %s() not implemented\n",
  238. status, error, __func__);
  239. }
  240. static void report_deco_status(struct device *jrdev, const u32 status,
  241. const char *error)
  242. {
  243. u8 err_id = status & JRSTA_DECOERR_ERROR_MASK;
  244. u8 idx = (status & JRSTA_DECOERR_INDEX_MASK) >>
  245. JRSTA_DECOERR_INDEX_SHIFT;
  246. char *idx_str;
  247. const char *err_str = "unidentified error value 0x";
  248. char err_err_code[3] = { 0 };
  249. int i;
  250. if (status & JRSTA_DECOERR_JUMP)
  251. idx_str = "jump tgt desc idx";
  252. else
  253. idx_str = "desc idx";
  254. for (i = 0; i < ARRAY_SIZE(desc_error_list); i++)
  255. if (desc_error_list[i].value == err_id)
  256. break;
  257. if (i != ARRAY_SIZE(desc_error_list) && desc_error_list[i].error_text)
  258. err_str = desc_error_list[i].error_text;
  259. else
  260. snprintf(err_err_code, sizeof(err_err_code), "%02x", err_id);
  261. dev_err(jrdev, "%08x: %s: %s %d: %s%s\n",
  262. status, error, idx_str, idx, err_str, err_err_code);
  263. }
  264. static void report_qi_status(struct device *qidev, const u32 status,
  265. const char *error)
  266. {
  267. u8 err_id = status & JRSTA_QIERR_ERROR_MASK;
  268. const char *err_str = "unidentified error value 0x";
  269. char err_err_code[3] = { 0 };
  270. int i;
  271. for (i = 0; i < ARRAY_SIZE(qi_error_list); i++)
  272. if (qi_error_list[i].value == err_id)
  273. break;
  274. if (i != ARRAY_SIZE(qi_error_list) && qi_error_list[i].error_text)
  275. err_str = qi_error_list[i].error_text;
  276. else
  277. snprintf(err_err_code, sizeof(err_err_code), "%02x", err_id);
  278. dev_err(qidev, "%08x: %s: %s%s\n",
  279. status, error, err_str, err_err_code);
  280. }
  281. static void report_jr_status(struct device *jrdev, const u32 status,
  282. const char *error)
  283. {
  284. dev_err(jrdev, "%08x: %s: %s() not implemented\n",
  285. status, error, __func__);
  286. }
  287. static void report_cond_code_status(struct device *jrdev, const u32 status,
  288. const char *error)
  289. {
  290. dev_err(jrdev, "%08x: %s: %s() not implemented\n",
  291. status, error, __func__);
  292. }
  293. void caam_strstatus(struct device *jrdev, u32 status, bool qi_v2)
  294. {
  295. static const struct stat_src {
  296. void (*report_ssed)(struct device *jrdev, const u32 status,
  297. const char *error);
  298. const char *error;
  299. } status_src[16] = {
  300. { NULL, "No error" },
  301. { NULL, NULL },
  302. { report_ccb_status, "CCB" },
  303. { report_jump_status, "Jump" },
  304. { report_deco_status, "DECO" },
  305. { report_qi_status, "Queue Manager Interface" },
  306. { report_jr_status, "Job Ring" },
  307. { report_cond_code_status, "Condition Code" },
  308. { NULL, NULL },
  309. { NULL, NULL },
  310. { NULL, NULL },
  311. { NULL, NULL },
  312. { NULL, NULL },
  313. { NULL, NULL },
  314. { NULL, NULL },
  315. { NULL, NULL },
  316. };
  317. u32 ssrc = status >> JRSTA_SSRC_SHIFT;
  318. const char *error = status_src[ssrc].error;
  319. /*
  320. * If there is an error handling function, call it to report the error.
  321. * Otherwise print the error source name.
  322. */
  323. if (status_src[ssrc].report_ssed)
  324. status_src[ssrc].report_ssed(jrdev, status, error);
  325. else if (error)
  326. dev_err(jrdev, "%d: %s\n", ssrc, error);
  327. else
  328. dev_err(jrdev, "%d: unknown error source\n", ssrc);
  329. }
  330. EXPORT_SYMBOL(caam_strstatus);
  331. MODULE_LICENSE("GPL");
  332. MODULE_DESCRIPTION("FSL CAAM error reporting");
  333. MODULE_AUTHOR("Freescale Semiconductor");