caampkc.c 28 KB

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  1. // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
  2. /*
  3. * caam - Freescale FSL CAAM support for Public Key Cryptography
  4. *
  5. * Copyright 2016 Freescale Semiconductor, Inc.
  6. *
  7. * There is no Shared Descriptor for PKC so that the Job Descriptor must carry
  8. * all the desired key parameters, input and output pointers.
  9. */
  10. #include "compat.h"
  11. #include "regs.h"
  12. #include "intern.h"
  13. #include "jr.h"
  14. #include "error.h"
  15. #include "desc_constr.h"
  16. #include "sg_sw_sec4.h"
  17. #include "caampkc.h"
  18. #define DESC_RSA_PUB_LEN (2 * CAAM_CMD_SZ + sizeof(struct rsa_pub_pdb))
  19. #define DESC_RSA_PRIV_F1_LEN (2 * CAAM_CMD_SZ + \
  20. sizeof(struct rsa_priv_f1_pdb))
  21. #define DESC_RSA_PRIV_F2_LEN (2 * CAAM_CMD_SZ + \
  22. sizeof(struct rsa_priv_f2_pdb))
  23. #define DESC_RSA_PRIV_F3_LEN (2 * CAAM_CMD_SZ + \
  24. sizeof(struct rsa_priv_f3_pdb))
  25. static void rsa_io_unmap(struct device *dev, struct rsa_edesc *edesc,
  26. struct akcipher_request *req)
  27. {
  28. dma_unmap_sg(dev, req->dst, edesc->dst_nents, DMA_FROM_DEVICE);
  29. dma_unmap_sg(dev, req->src, edesc->src_nents, DMA_TO_DEVICE);
  30. if (edesc->sec4_sg_bytes)
  31. dma_unmap_single(dev, edesc->sec4_sg_dma, edesc->sec4_sg_bytes,
  32. DMA_TO_DEVICE);
  33. }
  34. static void rsa_pub_unmap(struct device *dev, struct rsa_edesc *edesc,
  35. struct akcipher_request *req)
  36. {
  37. struct crypto_akcipher *tfm = crypto_akcipher_reqtfm(req);
  38. struct caam_rsa_ctx *ctx = akcipher_tfm_ctx(tfm);
  39. struct caam_rsa_key *key = &ctx->key;
  40. struct rsa_pub_pdb *pdb = &edesc->pdb.pub;
  41. dma_unmap_single(dev, pdb->n_dma, key->n_sz, DMA_TO_DEVICE);
  42. dma_unmap_single(dev, pdb->e_dma, key->e_sz, DMA_TO_DEVICE);
  43. }
  44. static void rsa_priv_f1_unmap(struct device *dev, struct rsa_edesc *edesc,
  45. struct akcipher_request *req)
  46. {
  47. struct crypto_akcipher *tfm = crypto_akcipher_reqtfm(req);
  48. struct caam_rsa_ctx *ctx = akcipher_tfm_ctx(tfm);
  49. struct caam_rsa_key *key = &ctx->key;
  50. struct rsa_priv_f1_pdb *pdb = &edesc->pdb.priv_f1;
  51. dma_unmap_single(dev, pdb->n_dma, key->n_sz, DMA_TO_DEVICE);
  52. dma_unmap_single(dev, pdb->d_dma, key->d_sz, DMA_TO_DEVICE);
  53. }
  54. static void rsa_priv_f2_unmap(struct device *dev, struct rsa_edesc *edesc,
  55. struct akcipher_request *req)
  56. {
  57. struct crypto_akcipher *tfm = crypto_akcipher_reqtfm(req);
  58. struct caam_rsa_ctx *ctx = akcipher_tfm_ctx(tfm);
  59. struct caam_rsa_key *key = &ctx->key;
  60. struct rsa_priv_f2_pdb *pdb = &edesc->pdb.priv_f2;
  61. size_t p_sz = key->p_sz;
  62. size_t q_sz = key->q_sz;
  63. dma_unmap_single(dev, pdb->d_dma, key->d_sz, DMA_TO_DEVICE);
  64. dma_unmap_single(dev, pdb->p_dma, p_sz, DMA_TO_DEVICE);
  65. dma_unmap_single(dev, pdb->q_dma, q_sz, DMA_TO_DEVICE);
  66. dma_unmap_single(dev, pdb->tmp1_dma, p_sz, DMA_BIDIRECTIONAL);
  67. dma_unmap_single(dev, pdb->tmp2_dma, q_sz, DMA_BIDIRECTIONAL);
  68. }
  69. static void rsa_priv_f3_unmap(struct device *dev, struct rsa_edesc *edesc,
  70. struct akcipher_request *req)
  71. {
  72. struct crypto_akcipher *tfm = crypto_akcipher_reqtfm(req);
  73. struct caam_rsa_ctx *ctx = akcipher_tfm_ctx(tfm);
  74. struct caam_rsa_key *key = &ctx->key;
  75. struct rsa_priv_f3_pdb *pdb = &edesc->pdb.priv_f3;
  76. size_t p_sz = key->p_sz;
  77. size_t q_sz = key->q_sz;
  78. dma_unmap_single(dev, pdb->p_dma, p_sz, DMA_TO_DEVICE);
  79. dma_unmap_single(dev, pdb->q_dma, q_sz, DMA_TO_DEVICE);
  80. dma_unmap_single(dev, pdb->dp_dma, p_sz, DMA_TO_DEVICE);
  81. dma_unmap_single(dev, pdb->dq_dma, q_sz, DMA_TO_DEVICE);
  82. dma_unmap_single(dev, pdb->c_dma, p_sz, DMA_TO_DEVICE);
  83. dma_unmap_single(dev, pdb->tmp1_dma, p_sz, DMA_BIDIRECTIONAL);
  84. dma_unmap_single(dev, pdb->tmp2_dma, q_sz, DMA_BIDIRECTIONAL);
  85. }
  86. /* RSA Job Completion handler */
  87. static void rsa_pub_done(struct device *dev, u32 *desc, u32 err, void *context)
  88. {
  89. struct akcipher_request *req = context;
  90. struct rsa_edesc *edesc;
  91. if (err)
  92. caam_jr_strstatus(dev, err);
  93. edesc = container_of(desc, struct rsa_edesc, hw_desc[0]);
  94. rsa_pub_unmap(dev, edesc, req);
  95. rsa_io_unmap(dev, edesc, req);
  96. kfree(edesc);
  97. akcipher_request_complete(req, err);
  98. }
  99. static void rsa_priv_f1_done(struct device *dev, u32 *desc, u32 err,
  100. void *context)
  101. {
  102. struct akcipher_request *req = context;
  103. struct rsa_edesc *edesc;
  104. if (err)
  105. caam_jr_strstatus(dev, err);
  106. edesc = container_of(desc, struct rsa_edesc, hw_desc[0]);
  107. rsa_priv_f1_unmap(dev, edesc, req);
  108. rsa_io_unmap(dev, edesc, req);
  109. kfree(edesc);
  110. akcipher_request_complete(req, err);
  111. }
  112. static void rsa_priv_f2_done(struct device *dev, u32 *desc, u32 err,
  113. void *context)
  114. {
  115. struct akcipher_request *req = context;
  116. struct rsa_edesc *edesc;
  117. if (err)
  118. caam_jr_strstatus(dev, err);
  119. edesc = container_of(desc, struct rsa_edesc, hw_desc[0]);
  120. rsa_priv_f2_unmap(dev, edesc, req);
  121. rsa_io_unmap(dev, edesc, req);
  122. kfree(edesc);
  123. akcipher_request_complete(req, err);
  124. }
  125. static void rsa_priv_f3_done(struct device *dev, u32 *desc, u32 err,
  126. void *context)
  127. {
  128. struct akcipher_request *req = context;
  129. struct rsa_edesc *edesc;
  130. if (err)
  131. caam_jr_strstatus(dev, err);
  132. edesc = container_of(desc, struct rsa_edesc, hw_desc[0]);
  133. rsa_priv_f3_unmap(dev, edesc, req);
  134. rsa_io_unmap(dev, edesc, req);
  135. kfree(edesc);
  136. akcipher_request_complete(req, err);
  137. }
  138. static int caam_rsa_count_leading_zeros(struct scatterlist *sgl,
  139. unsigned int nbytes,
  140. unsigned int flags)
  141. {
  142. struct sg_mapping_iter miter;
  143. int lzeros, ents;
  144. unsigned int len;
  145. unsigned int tbytes = nbytes;
  146. const u8 *buff;
  147. ents = sg_nents_for_len(sgl, nbytes);
  148. if (ents < 0)
  149. return ents;
  150. sg_miter_start(&miter, sgl, ents, SG_MITER_FROM_SG | flags);
  151. lzeros = 0;
  152. len = 0;
  153. while (nbytes > 0) {
  154. while (len && !*buff) {
  155. lzeros++;
  156. len--;
  157. buff++;
  158. }
  159. if (len && *buff)
  160. break;
  161. sg_miter_next(&miter);
  162. buff = miter.addr;
  163. len = miter.length;
  164. nbytes -= lzeros;
  165. lzeros = 0;
  166. }
  167. miter.consumed = lzeros;
  168. sg_miter_stop(&miter);
  169. nbytes -= lzeros;
  170. return tbytes - nbytes;
  171. }
  172. static struct rsa_edesc *rsa_edesc_alloc(struct akcipher_request *req,
  173. size_t desclen)
  174. {
  175. struct crypto_akcipher *tfm = crypto_akcipher_reqtfm(req);
  176. struct caam_rsa_ctx *ctx = akcipher_tfm_ctx(tfm);
  177. struct device *dev = ctx->dev;
  178. struct caam_rsa_req_ctx *req_ctx = akcipher_request_ctx(req);
  179. struct rsa_edesc *edesc;
  180. gfp_t flags = (req->base.flags & CRYPTO_TFM_REQ_MAY_SLEEP) ?
  181. GFP_KERNEL : GFP_ATOMIC;
  182. int sg_flags = (flags == GFP_ATOMIC) ? SG_MITER_ATOMIC : 0;
  183. int sgc;
  184. int sec4_sg_index, sec4_sg_len = 0, sec4_sg_bytes;
  185. int src_nents, dst_nents;
  186. int lzeros;
  187. lzeros = caam_rsa_count_leading_zeros(req->src, req->src_len, sg_flags);
  188. if (lzeros < 0)
  189. return ERR_PTR(lzeros);
  190. req->src_len -= lzeros;
  191. req->src = scatterwalk_ffwd(req_ctx->src, req->src, lzeros);
  192. src_nents = sg_nents_for_len(req->src, req->src_len);
  193. dst_nents = sg_nents_for_len(req->dst, req->dst_len);
  194. if (src_nents > 1)
  195. sec4_sg_len = src_nents;
  196. if (dst_nents > 1)
  197. sec4_sg_len += dst_nents;
  198. sec4_sg_bytes = sec4_sg_len * sizeof(struct sec4_sg_entry);
  199. /* allocate space for base edesc, hw desc commands and link tables */
  200. edesc = kzalloc(sizeof(*edesc) + desclen + sec4_sg_bytes,
  201. GFP_DMA | flags);
  202. if (!edesc)
  203. return ERR_PTR(-ENOMEM);
  204. sgc = dma_map_sg(dev, req->src, src_nents, DMA_TO_DEVICE);
  205. if (unlikely(!sgc)) {
  206. dev_err(dev, "unable to map source\n");
  207. goto src_fail;
  208. }
  209. sgc = dma_map_sg(dev, req->dst, dst_nents, DMA_FROM_DEVICE);
  210. if (unlikely(!sgc)) {
  211. dev_err(dev, "unable to map destination\n");
  212. goto dst_fail;
  213. }
  214. edesc->sec4_sg = (void *)edesc + sizeof(*edesc) + desclen;
  215. sec4_sg_index = 0;
  216. if (src_nents > 1) {
  217. sg_to_sec4_sg_last(req->src, src_nents, edesc->sec4_sg, 0);
  218. sec4_sg_index += src_nents;
  219. }
  220. if (dst_nents > 1)
  221. sg_to_sec4_sg_last(req->dst, dst_nents,
  222. edesc->sec4_sg + sec4_sg_index, 0);
  223. /* Save nents for later use in Job Descriptor */
  224. edesc->src_nents = src_nents;
  225. edesc->dst_nents = dst_nents;
  226. if (!sec4_sg_bytes)
  227. return edesc;
  228. edesc->sec4_sg_dma = dma_map_single(dev, edesc->sec4_sg,
  229. sec4_sg_bytes, DMA_TO_DEVICE);
  230. if (dma_mapping_error(dev, edesc->sec4_sg_dma)) {
  231. dev_err(dev, "unable to map S/G table\n");
  232. goto sec4_sg_fail;
  233. }
  234. edesc->sec4_sg_bytes = sec4_sg_bytes;
  235. return edesc;
  236. sec4_sg_fail:
  237. dma_unmap_sg(dev, req->dst, dst_nents, DMA_FROM_DEVICE);
  238. dst_fail:
  239. dma_unmap_sg(dev, req->src, src_nents, DMA_TO_DEVICE);
  240. src_fail:
  241. kfree(edesc);
  242. return ERR_PTR(-ENOMEM);
  243. }
  244. static int set_rsa_pub_pdb(struct akcipher_request *req,
  245. struct rsa_edesc *edesc)
  246. {
  247. struct crypto_akcipher *tfm = crypto_akcipher_reqtfm(req);
  248. struct caam_rsa_ctx *ctx = akcipher_tfm_ctx(tfm);
  249. struct caam_rsa_key *key = &ctx->key;
  250. struct device *dev = ctx->dev;
  251. struct rsa_pub_pdb *pdb = &edesc->pdb.pub;
  252. int sec4_sg_index = 0;
  253. pdb->n_dma = dma_map_single(dev, key->n, key->n_sz, DMA_TO_DEVICE);
  254. if (dma_mapping_error(dev, pdb->n_dma)) {
  255. dev_err(dev, "Unable to map RSA modulus memory\n");
  256. return -ENOMEM;
  257. }
  258. pdb->e_dma = dma_map_single(dev, key->e, key->e_sz, DMA_TO_DEVICE);
  259. if (dma_mapping_error(dev, pdb->e_dma)) {
  260. dev_err(dev, "Unable to map RSA public exponent memory\n");
  261. dma_unmap_single(dev, pdb->n_dma, key->n_sz, DMA_TO_DEVICE);
  262. return -ENOMEM;
  263. }
  264. if (edesc->src_nents > 1) {
  265. pdb->sgf |= RSA_PDB_SGF_F;
  266. pdb->f_dma = edesc->sec4_sg_dma;
  267. sec4_sg_index += edesc->src_nents;
  268. } else {
  269. pdb->f_dma = sg_dma_address(req->src);
  270. }
  271. if (edesc->dst_nents > 1) {
  272. pdb->sgf |= RSA_PDB_SGF_G;
  273. pdb->g_dma = edesc->sec4_sg_dma +
  274. sec4_sg_index * sizeof(struct sec4_sg_entry);
  275. } else {
  276. pdb->g_dma = sg_dma_address(req->dst);
  277. }
  278. pdb->sgf |= (key->e_sz << RSA_PDB_E_SHIFT) | key->n_sz;
  279. pdb->f_len = req->src_len;
  280. return 0;
  281. }
  282. static int set_rsa_priv_f1_pdb(struct akcipher_request *req,
  283. struct rsa_edesc *edesc)
  284. {
  285. struct crypto_akcipher *tfm = crypto_akcipher_reqtfm(req);
  286. struct caam_rsa_ctx *ctx = akcipher_tfm_ctx(tfm);
  287. struct caam_rsa_key *key = &ctx->key;
  288. struct device *dev = ctx->dev;
  289. struct rsa_priv_f1_pdb *pdb = &edesc->pdb.priv_f1;
  290. int sec4_sg_index = 0;
  291. pdb->n_dma = dma_map_single(dev, key->n, key->n_sz, DMA_TO_DEVICE);
  292. if (dma_mapping_error(dev, pdb->n_dma)) {
  293. dev_err(dev, "Unable to map modulus memory\n");
  294. return -ENOMEM;
  295. }
  296. pdb->d_dma = dma_map_single(dev, key->d, key->d_sz, DMA_TO_DEVICE);
  297. if (dma_mapping_error(dev, pdb->d_dma)) {
  298. dev_err(dev, "Unable to map RSA private exponent memory\n");
  299. dma_unmap_single(dev, pdb->n_dma, key->n_sz, DMA_TO_DEVICE);
  300. return -ENOMEM;
  301. }
  302. if (edesc->src_nents > 1) {
  303. pdb->sgf |= RSA_PRIV_PDB_SGF_G;
  304. pdb->g_dma = edesc->sec4_sg_dma;
  305. sec4_sg_index += edesc->src_nents;
  306. } else {
  307. pdb->g_dma = sg_dma_address(req->src);
  308. }
  309. if (edesc->dst_nents > 1) {
  310. pdb->sgf |= RSA_PRIV_PDB_SGF_F;
  311. pdb->f_dma = edesc->sec4_sg_dma +
  312. sec4_sg_index * sizeof(struct sec4_sg_entry);
  313. } else {
  314. pdb->f_dma = sg_dma_address(req->dst);
  315. }
  316. pdb->sgf |= (key->d_sz << RSA_PDB_D_SHIFT) | key->n_sz;
  317. return 0;
  318. }
  319. static int set_rsa_priv_f2_pdb(struct akcipher_request *req,
  320. struct rsa_edesc *edesc)
  321. {
  322. struct crypto_akcipher *tfm = crypto_akcipher_reqtfm(req);
  323. struct caam_rsa_ctx *ctx = akcipher_tfm_ctx(tfm);
  324. struct caam_rsa_key *key = &ctx->key;
  325. struct device *dev = ctx->dev;
  326. struct rsa_priv_f2_pdb *pdb = &edesc->pdb.priv_f2;
  327. int sec4_sg_index = 0;
  328. size_t p_sz = key->p_sz;
  329. size_t q_sz = key->q_sz;
  330. pdb->d_dma = dma_map_single(dev, key->d, key->d_sz, DMA_TO_DEVICE);
  331. if (dma_mapping_error(dev, pdb->d_dma)) {
  332. dev_err(dev, "Unable to map RSA private exponent memory\n");
  333. return -ENOMEM;
  334. }
  335. pdb->p_dma = dma_map_single(dev, key->p, p_sz, DMA_TO_DEVICE);
  336. if (dma_mapping_error(dev, pdb->p_dma)) {
  337. dev_err(dev, "Unable to map RSA prime factor p memory\n");
  338. goto unmap_d;
  339. }
  340. pdb->q_dma = dma_map_single(dev, key->q, q_sz, DMA_TO_DEVICE);
  341. if (dma_mapping_error(dev, pdb->q_dma)) {
  342. dev_err(dev, "Unable to map RSA prime factor q memory\n");
  343. goto unmap_p;
  344. }
  345. pdb->tmp1_dma = dma_map_single(dev, key->tmp1, p_sz, DMA_BIDIRECTIONAL);
  346. if (dma_mapping_error(dev, pdb->tmp1_dma)) {
  347. dev_err(dev, "Unable to map RSA tmp1 memory\n");
  348. goto unmap_q;
  349. }
  350. pdb->tmp2_dma = dma_map_single(dev, key->tmp2, q_sz, DMA_BIDIRECTIONAL);
  351. if (dma_mapping_error(dev, pdb->tmp2_dma)) {
  352. dev_err(dev, "Unable to map RSA tmp2 memory\n");
  353. goto unmap_tmp1;
  354. }
  355. if (edesc->src_nents > 1) {
  356. pdb->sgf |= RSA_PRIV_PDB_SGF_G;
  357. pdb->g_dma = edesc->sec4_sg_dma;
  358. sec4_sg_index += edesc->src_nents;
  359. } else {
  360. pdb->g_dma = sg_dma_address(req->src);
  361. }
  362. if (edesc->dst_nents > 1) {
  363. pdb->sgf |= RSA_PRIV_PDB_SGF_F;
  364. pdb->f_dma = edesc->sec4_sg_dma +
  365. sec4_sg_index * sizeof(struct sec4_sg_entry);
  366. } else {
  367. pdb->f_dma = sg_dma_address(req->dst);
  368. }
  369. pdb->sgf |= (key->d_sz << RSA_PDB_D_SHIFT) | key->n_sz;
  370. pdb->p_q_len = (q_sz << RSA_PDB_Q_SHIFT) | p_sz;
  371. return 0;
  372. unmap_tmp1:
  373. dma_unmap_single(dev, pdb->tmp1_dma, p_sz, DMA_BIDIRECTIONAL);
  374. unmap_q:
  375. dma_unmap_single(dev, pdb->q_dma, q_sz, DMA_TO_DEVICE);
  376. unmap_p:
  377. dma_unmap_single(dev, pdb->p_dma, p_sz, DMA_TO_DEVICE);
  378. unmap_d:
  379. dma_unmap_single(dev, pdb->d_dma, key->d_sz, DMA_TO_DEVICE);
  380. return -ENOMEM;
  381. }
  382. static int set_rsa_priv_f3_pdb(struct akcipher_request *req,
  383. struct rsa_edesc *edesc)
  384. {
  385. struct crypto_akcipher *tfm = crypto_akcipher_reqtfm(req);
  386. struct caam_rsa_ctx *ctx = akcipher_tfm_ctx(tfm);
  387. struct caam_rsa_key *key = &ctx->key;
  388. struct device *dev = ctx->dev;
  389. struct rsa_priv_f3_pdb *pdb = &edesc->pdb.priv_f3;
  390. int sec4_sg_index = 0;
  391. size_t p_sz = key->p_sz;
  392. size_t q_sz = key->q_sz;
  393. pdb->p_dma = dma_map_single(dev, key->p, p_sz, DMA_TO_DEVICE);
  394. if (dma_mapping_error(dev, pdb->p_dma)) {
  395. dev_err(dev, "Unable to map RSA prime factor p memory\n");
  396. return -ENOMEM;
  397. }
  398. pdb->q_dma = dma_map_single(dev, key->q, q_sz, DMA_TO_DEVICE);
  399. if (dma_mapping_error(dev, pdb->q_dma)) {
  400. dev_err(dev, "Unable to map RSA prime factor q memory\n");
  401. goto unmap_p;
  402. }
  403. pdb->dp_dma = dma_map_single(dev, key->dp, p_sz, DMA_TO_DEVICE);
  404. if (dma_mapping_error(dev, pdb->dp_dma)) {
  405. dev_err(dev, "Unable to map RSA exponent dp memory\n");
  406. goto unmap_q;
  407. }
  408. pdb->dq_dma = dma_map_single(dev, key->dq, q_sz, DMA_TO_DEVICE);
  409. if (dma_mapping_error(dev, pdb->dq_dma)) {
  410. dev_err(dev, "Unable to map RSA exponent dq memory\n");
  411. goto unmap_dp;
  412. }
  413. pdb->c_dma = dma_map_single(dev, key->qinv, p_sz, DMA_TO_DEVICE);
  414. if (dma_mapping_error(dev, pdb->c_dma)) {
  415. dev_err(dev, "Unable to map RSA CRT coefficient qinv memory\n");
  416. goto unmap_dq;
  417. }
  418. pdb->tmp1_dma = dma_map_single(dev, key->tmp1, p_sz, DMA_BIDIRECTIONAL);
  419. if (dma_mapping_error(dev, pdb->tmp1_dma)) {
  420. dev_err(dev, "Unable to map RSA tmp1 memory\n");
  421. goto unmap_qinv;
  422. }
  423. pdb->tmp2_dma = dma_map_single(dev, key->tmp2, q_sz, DMA_BIDIRECTIONAL);
  424. if (dma_mapping_error(dev, pdb->tmp2_dma)) {
  425. dev_err(dev, "Unable to map RSA tmp2 memory\n");
  426. goto unmap_tmp1;
  427. }
  428. if (edesc->src_nents > 1) {
  429. pdb->sgf |= RSA_PRIV_PDB_SGF_G;
  430. pdb->g_dma = edesc->sec4_sg_dma;
  431. sec4_sg_index += edesc->src_nents;
  432. } else {
  433. pdb->g_dma = sg_dma_address(req->src);
  434. }
  435. if (edesc->dst_nents > 1) {
  436. pdb->sgf |= RSA_PRIV_PDB_SGF_F;
  437. pdb->f_dma = edesc->sec4_sg_dma +
  438. sec4_sg_index * sizeof(struct sec4_sg_entry);
  439. } else {
  440. pdb->f_dma = sg_dma_address(req->dst);
  441. }
  442. pdb->sgf |= key->n_sz;
  443. pdb->p_q_len = (q_sz << RSA_PDB_Q_SHIFT) | p_sz;
  444. return 0;
  445. unmap_tmp1:
  446. dma_unmap_single(dev, pdb->tmp1_dma, p_sz, DMA_BIDIRECTIONAL);
  447. unmap_qinv:
  448. dma_unmap_single(dev, pdb->c_dma, p_sz, DMA_TO_DEVICE);
  449. unmap_dq:
  450. dma_unmap_single(dev, pdb->dq_dma, q_sz, DMA_TO_DEVICE);
  451. unmap_dp:
  452. dma_unmap_single(dev, pdb->dp_dma, p_sz, DMA_TO_DEVICE);
  453. unmap_q:
  454. dma_unmap_single(dev, pdb->q_dma, q_sz, DMA_TO_DEVICE);
  455. unmap_p:
  456. dma_unmap_single(dev, pdb->p_dma, p_sz, DMA_TO_DEVICE);
  457. return -ENOMEM;
  458. }
  459. static int caam_rsa_enc(struct akcipher_request *req)
  460. {
  461. struct crypto_akcipher *tfm = crypto_akcipher_reqtfm(req);
  462. struct caam_rsa_ctx *ctx = akcipher_tfm_ctx(tfm);
  463. struct caam_rsa_key *key = &ctx->key;
  464. struct device *jrdev = ctx->dev;
  465. struct rsa_edesc *edesc;
  466. int ret;
  467. if (unlikely(!key->n || !key->e))
  468. return -EINVAL;
  469. if (req->dst_len < key->n_sz) {
  470. req->dst_len = key->n_sz;
  471. dev_err(jrdev, "Output buffer length less than parameter n\n");
  472. return -EOVERFLOW;
  473. }
  474. /* Allocate extended descriptor */
  475. edesc = rsa_edesc_alloc(req, DESC_RSA_PUB_LEN);
  476. if (IS_ERR(edesc))
  477. return PTR_ERR(edesc);
  478. /* Set RSA Encrypt Protocol Data Block */
  479. ret = set_rsa_pub_pdb(req, edesc);
  480. if (ret)
  481. goto init_fail;
  482. /* Initialize Job Descriptor */
  483. init_rsa_pub_desc(edesc->hw_desc, &edesc->pdb.pub);
  484. ret = caam_jr_enqueue(jrdev, edesc->hw_desc, rsa_pub_done, req);
  485. if (!ret)
  486. return -EINPROGRESS;
  487. rsa_pub_unmap(jrdev, edesc, req);
  488. init_fail:
  489. rsa_io_unmap(jrdev, edesc, req);
  490. kfree(edesc);
  491. return ret;
  492. }
  493. static int caam_rsa_dec_priv_f1(struct akcipher_request *req)
  494. {
  495. struct crypto_akcipher *tfm = crypto_akcipher_reqtfm(req);
  496. struct caam_rsa_ctx *ctx = akcipher_tfm_ctx(tfm);
  497. struct device *jrdev = ctx->dev;
  498. struct rsa_edesc *edesc;
  499. int ret;
  500. /* Allocate extended descriptor */
  501. edesc = rsa_edesc_alloc(req, DESC_RSA_PRIV_F1_LEN);
  502. if (IS_ERR(edesc))
  503. return PTR_ERR(edesc);
  504. /* Set RSA Decrypt Protocol Data Block - Private Key Form #1 */
  505. ret = set_rsa_priv_f1_pdb(req, edesc);
  506. if (ret)
  507. goto init_fail;
  508. /* Initialize Job Descriptor */
  509. init_rsa_priv_f1_desc(edesc->hw_desc, &edesc->pdb.priv_f1);
  510. ret = caam_jr_enqueue(jrdev, edesc->hw_desc, rsa_priv_f1_done, req);
  511. if (!ret)
  512. return -EINPROGRESS;
  513. rsa_priv_f1_unmap(jrdev, edesc, req);
  514. init_fail:
  515. rsa_io_unmap(jrdev, edesc, req);
  516. kfree(edesc);
  517. return ret;
  518. }
  519. static int caam_rsa_dec_priv_f2(struct akcipher_request *req)
  520. {
  521. struct crypto_akcipher *tfm = crypto_akcipher_reqtfm(req);
  522. struct caam_rsa_ctx *ctx = akcipher_tfm_ctx(tfm);
  523. struct device *jrdev = ctx->dev;
  524. struct rsa_edesc *edesc;
  525. int ret;
  526. /* Allocate extended descriptor */
  527. edesc = rsa_edesc_alloc(req, DESC_RSA_PRIV_F2_LEN);
  528. if (IS_ERR(edesc))
  529. return PTR_ERR(edesc);
  530. /* Set RSA Decrypt Protocol Data Block - Private Key Form #2 */
  531. ret = set_rsa_priv_f2_pdb(req, edesc);
  532. if (ret)
  533. goto init_fail;
  534. /* Initialize Job Descriptor */
  535. init_rsa_priv_f2_desc(edesc->hw_desc, &edesc->pdb.priv_f2);
  536. ret = caam_jr_enqueue(jrdev, edesc->hw_desc, rsa_priv_f2_done, req);
  537. if (!ret)
  538. return -EINPROGRESS;
  539. rsa_priv_f2_unmap(jrdev, edesc, req);
  540. init_fail:
  541. rsa_io_unmap(jrdev, edesc, req);
  542. kfree(edesc);
  543. return ret;
  544. }
  545. static int caam_rsa_dec_priv_f3(struct akcipher_request *req)
  546. {
  547. struct crypto_akcipher *tfm = crypto_akcipher_reqtfm(req);
  548. struct caam_rsa_ctx *ctx = akcipher_tfm_ctx(tfm);
  549. struct device *jrdev = ctx->dev;
  550. struct rsa_edesc *edesc;
  551. int ret;
  552. /* Allocate extended descriptor */
  553. edesc = rsa_edesc_alloc(req, DESC_RSA_PRIV_F3_LEN);
  554. if (IS_ERR(edesc))
  555. return PTR_ERR(edesc);
  556. /* Set RSA Decrypt Protocol Data Block - Private Key Form #3 */
  557. ret = set_rsa_priv_f3_pdb(req, edesc);
  558. if (ret)
  559. goto init_fail;
  560. /* Initialize Job Descriptor */
  561. init_rsa_priv_f3_desc(edesc->hw_desc, &edesc->pdb.priv_f3);
  562. ret = caam_jr_enqueue(jrdev, edesc->hw_desc, rsa_priv_f3_done, req);
  563. if (!ret)
  564. return -EINPROGRESS;
  565. rsa_priv_f3_unmap(jrdev, edesc, req);
  566. init_fail:
  567. rsa_io_unmap(jrdev, edesc, req);
  568. kfree(edesc);
  569. return ret;
  570. }
  571. static int caam_rsa_dec(struct akcipher_request *req)
  572. {
  573. struct crypto_akcipher *tfm = crypto_akcipher_reqtfm(req);
  574. struct caam_rsa_ctx *ctx = akcipher_tfm_ctx(tfm);
  575. struct caam_rsa_key *key = &ctx->key;
  576. int ret;
  577. if (unlikely(!key->n || !key->d))
  578. return -EINVAL;
  579. if (req->dst_len < key->n_sz) {
  580. req->dst_len = key->n_sz;
  581. dev_err(ctx->dev, "Output buffer length less than parameter n\n");
  582. return -EOVERFLOW;
  583. }
  584. if (key->priv_form == FORM3)
  585. ret = caam_rsa_dec_priv_f3(req);
  586. else if (key->priv_form == FORM2)
  587. ret = caam_rsa_dec_priv_f2(req);
  588. else
  589. ret = caam_rsa_dec_priv_f1(req);
  590. return ret;
  591. }
  592. static void caam_rsa_free_key(struct caam_rsa_key *key)
  593. {
  594. kzfree(key->d);
  595. kzfree(key->p);
  596. kzfree(key->q);
  597. kzfree(key->dp);
  598. kzfree(key->dq);
  599. kzfree(key->qinv);
  600. kzfree(key->tmp1);
  601. kzfree(key->tmp2);
  602. kfree(key->e);
  603. kfree(key->n);
  604. memset(key, 0, sizeof(*key));
  605. }
  606. static void caam_rsa_drop_leading_zeros(const u8 **ptr, size_t *nbytes)
  607. {
  608. while (!**ptr && *nbytes) {
  609. (*ptr)++;
  610. (*nbytes)--;
  611. }
  612. }
  613. /**
  614. * caam_read_rsa_crt - Used for reading dP, dQ, qInv CRT members.
  615. * dP, dQ and qInv could decode to less than corresponding p, q length, as the
  616. * BER-encoding requires that the minimum number of bytes be used to encode the
  617. * integer. dP, dQ, qInv decoded values have to be zero-padded to appropriate
  618. * length.
  619. *
  620. * @ptr : pointer to {dP, dQ, qInv} CRT member
  621. * @nbytes: length in bytes of {dP, dQ, qInv} CRT member
  622. * @dstlen: length in bytes of corresponding p or q prime factor
  623. */
  624. static u8 *caam_read_rsa_crt(const u8 *ptr, size_t nbytes, size_t dstlen)
  625. {
  626. u8 *dst;
  627. caam_rsa_drop_leading_zeros(&ptr, &nbytes);
  628. if (!nbytes)
  629. return NULL;
  630. dst = kzalloc(dstlen, GFP_DMA | GFP_KERNEL);
  631. if (!dst)
  632. return NULL;
  633. memcpy(dst + (dstlen - nbytes), ptr, nbytes);
  634. return dst;
  635. }
  636. /**
  637. * caam_read_raw_data - Read a raw byte stream as a positive integer.
  638. * The function skips buffer's leading zeros, copies the remained data
  639. * to a buffer allocated in the GFP_DMA | GFP_KERNEL zone and returns
  640. * the address of the new buffer.
  641. *
  642. * @buf : The data to read
  643. * @nbytes: The amount of data to read
  644. */
  645. static inline u8 *caam_read_raw_data(const u8 *buf, size_t *nbytes)
  646. {
  647. caam_rsa_drop_leading_zeros(&buf, nbytes);
  648. if (!*nbytes)
  649. return NULL;
  650. return kmemdup(buf, *nbytes, GFP_DMA | GFP_KERNEL);
  651. }
  652. static int caam_rsa_check_key_length(unsigned int len)
  653. {
  654. if (len > 4096)
  655. return -EINVAL;
  656. return 0;
  657. }
  658. static int caam_rsa_set_pub_key(struct crypto_akcipher *tfm, const void *key,
  659. unsigned int keylen)
  660. {
  661. struct caam_rsa_ctx *ctx = akcipher_tfm_ctx(tfm);
  662. struct rsa_key raw_key = {NULL};
  663. struct caam_rsa_key *rsa_key = &ctx->key;
  664. int ret;
  665. /* Free the old RSA key if any */
  666. caam_rsa_free_key(rsa_key);
  667. ret = rsa_parse_pub_key(&raw_key, key, keylen);
  668. if (ret)
  669. return ret;
  670. /* Copy key in DMA zone */
  671. rsa_key->e = kzalloc(raw_key.e_sz, GFP_DMA | GFP_KERNEL);
  672. if (!rsa_key->e)
  673. goto err;
  674. /*
  675. * Skip leading zeros and copy the positive integer to a buffer
  676. * allocated in the GFP_DMA | GFP_KERNEL zone. The decryption descriptor
  677. * expects a positive integer for the RSA modulus and uses its length as
  678. * decryption output length.
  679. */
  680. rsa_key->n = caam_read_raw_data(raw_key.n, &raw_key.n_sz);
  681. if (!rsa_key->n)
  682. goto err;
  683. if (caam_rsa_check_key_length(raw_key.n_sz << 3)) {
  684. caam_rsa_free_key(rsa_key);
  685. return -EINVAL;
  686. }
  687. rsa_key->e_sz = raw_key.e_sz;
  688. rsa_key->n_sz = raw_key.n_sz;
  689. memcpy(rsa_key->e, raw_key.e, raw_key.e_sz);
  690. return 0;
  691. err:
  692. caam_rsa_free_key(rsa_key);
  693. return -ENOMEM;
  694. }
  695. static void caam_rsa_set_priv_key_form(struct caam_rsa_ctx *ctx,
  696. struct rsa_key *raw_key)
  697. {
  698. struct caam_rsa_key *rsa_key = &ctx->key;
  699. size_t p_sz = raw_key->p_sz;
  700. size_t q_sz = raw_key->q_sz;
  701. rsa_key->p = caam_read_raw_data(raw_key->p, &p_sz);
  702. if (!rsa_key->p)
  703. return;
  704. rsa_key->p_sz = p_sz;
  705. rsa_key->q = caam_read_raw_data(raw_key->q, &q_sz);
  706. if (!rsa_key->q)
  707. goto free_p;
  708. rsa_key->q_sz = q_sz;
  709. rsa_key->tmp1 = kzalloc(raw_key->p_sz, GFP_DMA | GFP_KERNEL);
  710. if (!rsa_key->tmp1)
  711. goto free_q;
  712. rsa_key->tmp2 = kzalloc(raw_key->q_sz, GFP_DMA | GFP_KERNEL);
  713. if (!rsa_key->tmp2)
  714. goto free_tmp1;
  715. rsa_key->priv_form = FORM2;
  716. rsa_key->dp = caam_read_rsa_crt(raw_key->dp, raw_key->dp_sz, p_sz);
  717. if (!rsa_key->dp)
  718. goto free_tmp2;
  719. rsa_key->dq = caam_read_rsa_crt(raw_key->dq, raw_key->dq_sz, q_sz);
  720. if (!rsa_key->dq)
  721. goto free_dp;
  722. rsa_key->qinv = caam_read_rsa_crt(raw_key->qinv, raw_key->qinv_sz,
  723. q_sz);
  724. if (!rsa_key->qinv)
  725. goto free_dq;
  726. rsa_key->priv_form = FORM3;
  727. return;
  728. free_dq:
  729. kzfree(rsa_key->dq);
  730. free_dp:
  731. kzfree(rsa_key->dp);
  732. free_tmp2:
  733. kzfree(rsa_key->tmp2);
  734. free_tmp1:
  735. kzfree(rsa_key->tmp1);
  736. free_q:
  737. kzfree(rsa_key->q);
  738. free_p:
  739. kzfree(rsa_key->p);
  740. }
  741. static int caam_rsa_set_priv_key(struct crypto_akcipher *tfm, const void *key,
  742. unsigned int keylen)
  743. {
  744. struct caam_rsa_ctx *ctx = akcipher_tfm_ctx(tfm);
  745. struct rsa_key raw_key = {NULL};
  746. struct caam_rsa_key *rsa_key = &ctx->key;
  747. int ret;
  748. /* Free the old RSA key if any */
  749. caam_rsa_free_key(rsa_key);
  750. ret = rsa_parse_priv_key(&raw_key, key, keylen);
  751. if (ret)
  752. return ret;
  753. /* Copy key in DMA zone */
  754. rsa_key->d = kzalloc(raw_key.d_sz, GFP_DMA | GFP_KERNEL);
  755. if (!rsa_key->d)
  756. goto err;
  757. rsa_key->e = kzalloc(raw_key.e_sz, GFP_DMA | GFP_KERNEL);
  758. if (!rsa_key->e)
  759. goto err;
  760. /*
  761. * Skip leading zeros and copy the positive integer to a buffer
  762. * allocated in the GFP_DMA | GFP_KERNEL zone. The decryption descriptor
  763. * expects a positive integer for the RSA modulus and uses its length as
  764. * decryption output length.
  765. */
  766. rsa_key->n = caam_read_raw_data(raw_key.n, &raw_key.n_sz);
  767. if (!rsa_key->n)
  768. goto err;
  769. if (caam_rsa_check_key_length(raw_key.n_sz << 3)) {
  770. caam_rsa_free_key(rsa_key);
  771. return -EINVAL;
  772. }
  773. rsa_key->d_sz = raw_key.d_sz;
  774. rsa_key->e_sz = raw_key.e_sz;
  775. rsa_key->n_sz = raw_key.n_sz;
  776. memcpy(rsa_key->d, raw_key.d, raw_key.d_sz);
  777. memcpy(rsa_key->e, raw_key.e, raw_key.e_sz);
  778. caam_rsa_set_priv_key_form(ctx, &raw_key);
  779. return 0;
  780. err:
  781. caam_rsa_free_key(rsa_key);
  782. return -ENOMEM;
  783. }
  784. static unsigned int caam_rsa_max_size(struct crypto_akcipher *tfm)
  785. {
  786. struct caam_rsa_ctx *ctx = akcipher_tfm_ctx(tfm);
  787. return ctx->key.n_sz;
  788. }
  789. /* Per session pkc's driver context creation function */
  790. static int caam_rsa_init_tfm(struct crypto_akcipher *tfm)
  791. {
  792. struct caam_rsa_ctx *ctx = akcipher_tfm_ctx(tfm);
  793. ctx->dev = caam_jr_alloc();
  794. if (IS_ERR(ctx->dev)) {
  795. pr_err("Job Ring Device allocation for transform failed\n");
  796. return PTR_ERR(ctx->dev);
  797. }
  798. return 0;
  799. }
  800. /* Per session pkc's driver context cleanup function */
  801. static void caam_rsa_exit_tfm(struct crypto_akcipher *tfm)
  802. {
  803. struct caam_rsa_ctx *ctx = akcipher_tfm_ctx(tfm);
  804. struct caam_rsa_key *key = &ctx->key;
  805. caam_rsa_free_key(key);
  806. caam_jr_free(ctx->dev);
  807. }
  808. static struct akcipher_alg caam_rsa = {
  809. .encrypt = caam_rsa_enc,
  810. .decrypt = caam_rsa_dec,
  811. .sign = caam_rsa_dec,
  812. .verify = caam_rsa_enc,
  813. .set_pub_key = caam_rsa_set_pub_key,
  814. .set_priv_key = caam_rsa_set_priv_key,
  815. .max_size = caam_rsa_max_size,
  816. .init = caam_rsa_init_tfm,
  817. .exit = caam_rsa_exit_tfm,
  818. .reqsize = sizeof(struct caam_rsa_req_ctx),
  819. .base = {
  820. .cra_name = "rsa",
  821. .cra_driver_name = "rsa-caam",
  822. .cra_priority = 3000,
  823. .cra_module = THIS_MODULE,
  824. .cra_ctxsize = sizeof(struct caam_rsa_ctx),
  825. },
  826. };
  827. /* Public Key Cryptography module initialization handler */
  828. static int __init caam_pkc_init(void)
  829. {
  830. struct device_node *dev_node;
  831. struct platform_device *pdev;
  832. struct device *ctrldev;
  833. struct caam_drv_private *priv;
  834. u32 cha_inst, pk_inst;
  835. int err;
  836. dev_node = of_find_compatible_node(NULL, NULL, "fsl,sec-v4.0");
  837. if (!dev_node) {
  838. dev_node = of_find_compatible_node(NULL, NULL, "fsl,sec4.0");
  839. if (!dev_node)
  840. return -ENODEV;
  841. }
  842. pdev = of_find_device_by_node(dev_node);
  843. if (!pdev) {
  844. of_node_put(dev_node);
  845. return -ENODEV;
  846. }
  847. ctrldev = &pdev->dev;
  848. priv = dev_get_drvdata(ctrldev);
  849. of_node_put(dev_node);
  850. /*
  851. * If priv is NULL, it's probably because the caam driver wasn't
  852. * properly initialized (e.g. RNG4 init failed). Thus, bail out here.
  853. */
  854. if (!priv)
  855. return -ENODEV;
  856. /* Determine public key hardware accelerator presence. */
  857. cha_inst = rd_reg32(&priv->ctrl->perfmon.cha_num_ls);
  858. pk_inst = (cha_inst & CHA_ID_LS_PK_MASK) >> CHA_ID_LS_PK_SHIFT;
  859. /* Do not register algorithms if PKHA is not present. */
  860. if (!pk_inst)
  861. return -ENODEV;
  862. err = crypto_register_akcipher(&caam_rsa);
  863. if (err)
  864. dev_warn(ctrldev, "%s alg registration failed\n",
  865. caam_rsa.base.cra_driver_name);
  866. else
  867. dev_info(ctrldev, "caam pkc algorithms registered in /proc/crypto\n");
  868. return err;
  869. }
  870. static void __exit caam_pkc_exit(void)
  871. {
  872. crypto_unregister_akcipher(&caam_rsa);
  873. }
  874. module_init(caam_pkc_init);
  875. module_exit(caam_pkc_exit);
  876. MODULE_LICENSE("Dual BSD/GPL");
  877. MODULE_DESCRIPTION("FSL CAAM support for PKC functions of crypto API");
  878. MODULE_AUTHOR("Freescale Semiconductor");