Kconfig 23 KB

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  1. menuconfig CRYPTO_HW
  2. bool "Hardware crypto devices"
  3. default y
  4. ---help---
  5. Say Y here to get to see options for hardware crypto devices and
  6. processors. This option alone does not add any kernel code.
  7. If you say N, all options in this submenu will be skipped and disabled.
  8. if CRYPTO_HW
  9. config CRYPTO_DEV_PADLOCK
  10. tristate "Support for VIA PadLock ACE"
  11. depends on X86 && !UML
  12. help
  13. Some VIA processors come with an integrated crypto engine
  14. (so called VIA PadLock ACE, Advanced Cryptography Engine)
  15. that provides instructions for very fast cryptographic
  16. operations with supported algorithms.
  17. The instructions are used only when the CPU supports them.
  18. Otherwise software encryption is used.
  19. config CRYPTO_DEV_PADLOCK_AES
  20. tristate "PadLock driver for AES algorithm"
  21. depends on CRYPTO_DEV_PADLOCK
  22. select CRYPTO_BLKCIPHER
  23. select CRYPTO_AES
  24. help
  25. Use VIA PadLock for AES algorithm.
  26. Available in VIA C3 and newer CPUs.
  27. If unsure say M. The compiled module will be
  28. called padlock-aes.
  29. config CRYPTO_DEV_PADLOCK_SHA
  30. tristate "PadLock driver for SHA1 and SHA256 algorithms"
  31. depends on CRYPTO_DEV_PADLOCK
  32. select CRYPTO_HASH
  33. select CRYPTO_SHA1
  34. select CRYPTO_SHA256
  35. help
  36. Use VIA PadLock for SHA1/SHA256 algorithms.
  37. Available in VIA C7 and newer processors.
  38. If unsure say M. The compiled module will be
  39. called padlock-sha.
  40. config CRYPTO_DEV_GEODE
  41. tristate "Support for the Geode LX AES engine"
  42. depends on X86_32 && PCI
  43. select CRYPTO_ALGAPI
  44. select CRYPTO_BLKCIPHER
  45. help
  46. Say 'Y' here to use the AMD Geode LX processor on-board AES
  47. engine for the CryptoAPI AES algorithm.
  48. To compile this driver as a module, choose M here: the module
  49. will be called geode-aes.
  50. config ZCRYPT
  51. tristate "Support for s390 cryptographic adapters"
  52. depends on S390
  53. select HW_RANDOM
  54. help
  55. Select this option if you want to enable support for
  56. s390 cryptographic adapters like:
  57. + PCI-X Cryptographic Coprocessor (PCIXCC)
  58. + Crypto Express 2,3,4 or 5 Coprocessor (CEXxC)
  59. + Crypto Express 2,3,4 or 5 Accelerator (CEXxA)
  60. + Crypto Express 4 or 5 EP11 Coprocessor (CEXxP)
  61. config ZCRYPT_MULTIDEVNODES
  62. bool "Support for multiple zcrypt device nodes"
  63. default y
  64. depends on S390
  65. depends on ZCRYPT
  66. help
  67. With this option enabled the zcrypt device driver can
  68. provide multiple devices nodes in /dev. Each device
  69. node can get customized to limit access and narrow
  70. down the use of the available crypto hardware.
  71. config PKEY
  72. tristate "Kernel API for protected key handling"
  73. depends on S390
  74. depends on ZCRYPT
  75. help
  76. With this option enabled the pkey kernel module provides an API
  77. for creation and handling of protected keys. Other parts of the
  78. kernel or userspace applications may use these functions.
  79. Select this option if you want to enable the kernel and userspace
  80. API for proteced key handling.
  81. Please note that creation of protected keys from secure keys
  82. requires to have at least one CEX card in coprocessor mode
  83. available at runtime.
  84. config CRYPTO_PAES_S390
  85. tristate "PAES cipher algorithms"
  86. depends on S390
  87. depends on ZCRYPT
  88. depends on PKEY
  89. select CRYPTO_ALGAPI
  90. select CRYPTO_BLKCIPHER
  91. help
  92. This is the s390 hardware accelerated implementation of the
  93. AES cipher algorithms for use with protected key.
  94. Select this option if you want to use the paes cipher
  95. for example to use protected key encrypted devices.
  96. config CRYPTO_SHA1_S390
  97. tristate "SHA1 digest algorithm"
  98. depends on S390
  99. select CRYPTO_HASH
  100. help
  101. This is the s390 hardware accelerated implementation of the
  102. SHA-1 secure hash standard (FIPS 180-1/DFIPS 180-2).
  103. It is available as of z990.
  104. config CRYPTO_SHA256_S390
  105. tristate "SHA256 digest algorithm"
  106. depends on S390
  107. select CRYPTO_HASH
  108. help
  109. This is the s390 hardware accelerated implementation of the
  110. SHA256 secure hash standard (DFIPS 180-2).
  111. It is available as of z9.
  112. config CRYPTO_SHA512_S390
  113. tristate "SHA384 and SHA512 digest algorithm"
  114. depends on S390
  115. select CRYPTO_HASH
  116. help
  117. This is the s390 hardware accelerated implementation of the
  118. SHA512 secure hash standard.
  119. It is available as of z10.
  120. config CRYPTO_DES_S390
  121. tristate "DES and Triple DES cipher algorithms"
  122. depends on S390
  123. select CRYPTO_ALGAPI
  124. select CRYPTO_BLKCIPHER
  125. select CRYPTO_DES
  126. help
  127. This is the s390 hardware accelerated implementation of the
  128. DES cipher algorithm (FIPS 46-2), and Triple DES EDE (FIPS 46-3).
  129. As of z990 the ECB and CBC mode are hardware accelerated.
  130. As of z196 the CTR mode is hardware accelerated.
  131. config CRYPTO_AES_S390
  132. tristate "AES cipher algorithms"
  133. depends on S390
  134. select CRYPTO_ALGAPI
  135. select CRYPTO_BLKCIPHER
  136. help
  137. This is the s390 hardware accelerated implementation of the
  138. AES cipher algorithms (FIPS-197).
  139. As of z9 the ECB and CBC modes are hardware accelerated
  140. for 128 bit keys.
  141. As of z10 the ECB and CBC modes are hardware accelerated
  142. for all AES key sizes.
  143. As of z196 the CTR mode is hardware accelerated for all AES
  144. key sizes and XTS mode is hardware accelerated for 256 and
  145. 512 bit keys.
  146. config S390_PRNG
  147. tristate "Pseudo random number generator device driver"
  148. depends on S390
  149. default "m"
  150. help
  151. Select this option if you want to use the s390 pseudo random number
  152. generator. The PRNG is part of the cryptographic processor functions
  153. and uses triple-DES to generate secure random numbers like the
  154. ANSI X9.17 standard. User-space programs access the
  155. pseudo-random-number device through the char device /dev/prandom.
  156. It is available as of z9.
  157. config CRYPTO_GHASH_S390
  158. tristate "GHASH digest algorithm"
  159. depends on S390
  160. select CRYPTO_HASH
  161. help
  162. This is the s390 hardware accelerated implementation of the
  163. GHASH message digest algorithm for GCM (Galois/Counter Mode).
  164. It is available as of z196.
  165. config CRYPTO_CRC32_S390
  166. tristate "CRC-32 algorithms"
  167. depends on S390
  168. select CRYPTO_HASH
  169. select CRC32
  170. help
  171. Select this option if you want to use hardware accelerated
  172. implementations of CRC algorithms. With this option, you
  173. can optimize the computation of CRC-32 (IEEE 802.3 Ethernet)
  174. and CRC-32C (Castagnoli).
  175. It is available with IBM z13 or later.
  176. config CRYPTO_DEV_MARVELL_CESA
  177. tristate "Marvell's Cryptographic Engine driver"
  178. depends on PLAT_ORION || ARCH_MVEBU
  179. select CRYPTO_AES
  180. select CRYPTO_DES
  181. select CRYPTO_BLKCIPHER
  182. select CRYPTO_HASH
  183. select SRAM
  184. help
  185. This driver allows you to utilize the Cryptographic Engines and
  186. Security Accelerator (CESA) which can be found on MVEBU and ORION
  187. platforms.
  188. This driver supports CPU offload through DMA transfers.
  189. config CRYPTO_DEV_NIAGARA2
  190. tristate "Niagara2 Stream Processing Unit driver"
  191. select CRYPTO_DES
  192. select CRYPTO_BLKCIPHER
  193. select CRYPTO_HASH
  194. select CRYPTO_MD5
  195. select CRYPTO_SHA1
  196. select CRYPTO_SHA256
  197. depends on SPARC64
  198. help
  199. Each core of a Niagara2 processor contains a Stream
  200. Processing Unit, which itself contains several cryptographic
  201. sub-units. One set provides the Modular Arithmetic Unit,
  202. used for SSL offload. The other set provides the Cipher
  203. Group, which can perform encryption, decryption, hashing,
  204. checksumming, and raw copies.
  205. config CRYPTO_DEV_HIFN_795X
  206. tristate "Driver HIFN 795x crypto accelerator chips"
  207. select CRYPTO_DES
  208. select CRYPTO_BLKCIPHER
  209. select HW_RANDOM if CRYPTO_DEV_HIFN_795X_RNG
  210. depends on PCI
  211. depends on !ARCH_DMA_ADDR_T_64BIT
  212. help
  213. This option allows you to have support for HIFN 795x crypto adapters.
  214. config CRYPTO_DEV_HIFN_795X_RNG
  215. bool "HIFN 795x random number generator"
  216. depends on CRYPTO_DEV_HIFN_795X
  217. help
  218. Select this option if you want to enable the random number generator
  219. on the HIFN 795x crypto adapters.
  220. source drivers/crypto/caam/Kconfig
  221. config CRYPTO_DEV_TALITOS
  222. tristate "Talitos Freescale Security Engine (SEC)"
  223. select CRYPTO_AEAD
  224. select CRYPTO_AUTHENC
  225. select CRYPTO_BLKCIPHER
  226. select CRYPTO_HASH
  227. select HW_RANDOM
  228. depends on FSL_SOC
  229. help
  230. Say 'Y' here to use the Freescale Security Engine (SEC)
  231. to offload cryptographic algorithm computation.
  232. The Freescale SEC is present on PowerQUICC 'E' processors, such
  233. as the MPC8349E and MPC8548E.
  234. To compile this driver as a module, choose M here: the module
  235. will be called talitos.
  236. config CRYPTO_DEV_TALITOS1
  237. bool "SEC1 (SEC 1.0 and SEC Lite 1.2)"
  238. depends on CRYPTO_DEV_TALITOS
  239. depends on PPC_8xx || PPC_82xx
  240. default y
  241. help
  242. Say 'Y' here to use the Freescale Security Engine (SEC) version 1.0
  243. found on MPC82xx or the Freescale Security Engine (SEC Lite)
  244. version 1.2 found on MPC8xx
  245. config CRYPTO_DEV_TALITOS2
  246. bool "SEC2+ (SEC version 2.0 or upper)"
  247. depends on CRYPTO_DEV_TALITOS
  248. default y if !PPC_8xx
  249. help
  250. Say 'Y' here to use the Freescale Security Engine (SEC)
  251. version 2 and following as found on MPC83xx, MPC85xx, etc ...
  252. config CRYPTO_DEV_IXP4XX
  253. tristate "Driver for IXP4xx crypto hardware acceleration"
  254. depends on ARCH_IXP4XX && IXP4XX_QMGR && IXP4XX_NPE
  255. select CRYPTO_DES
  256. select CRYPTO_AEAD
  257. select CRYPTO_AUTHENC
  258. select CRYPTO_BLKCIPHER
  259. help
  260. Driver for the IXP4xx NPE crypto engine.
  261. config CRYPTO_DEV_PPC4XX
  262. tristate "Driver AMCC PPC4xx crypto accelerator"
  263. depends on PPC && 4xx
  264. select CRYPTO_HASH
  265. select CRYPTO_AEAD
  266. select CRYPTO_AES
  267. select CRYPTO_CCM
  268. select CRYPTO_CTR
  269. select CRYPTO_GCM
  270. select CRYPTO_BLKCIPHER
  271. help
  272. This option allows you to have support for AMCC crypto acceleration.
  273. config HW_RANDOM_PPC4XX
  274. bool "PowerPC 4xx generic true random number generator support"
  275. depends on CRYPTO_DEV_PPC4XX && HW_RANDOM
  276. default y
  277. ---help---
  278. This option provides the kernel-side support for the TRNG hardware
  279. found in the security function of some PowerPC 4xx SoCs.
  280. config CRYPTO_DEV_OMAP
  281. tristate "Support for OMAP crypto HW accelerators"
  282. depends on ARCH_OMAP2PLUS
  283. help
  284. OMAP processors have various crypto HW accelerators. Select this if
  285. you want to use the OMAP modules for any of the crypto algorithms.
  286. if CRYPTO_DEV_OMAP
  287. config CRYPTO_DEV_OMAP_SHAM
  288. tristate "Support for OMAP MD5/SHA1/SHA2 hw accelerator"
  289. depends on ARCH_OMAP2PLUS
  290. select CRYPTO_SHA1
  291. select CRYPTO_MD5
  292. select CRYPTO_SHA256
  293. select CRYPTO_SHA512
  294. select CRYPTO_HMAC
  295. help
  296. OMAP processors have MD5/SHA1/SHA2 hw accelerator. Select this if you
  297. want to use the OMAP module for MD5/SHA1/SHA2 algorithms.
  298. config CRYPTO_DEV_OMAP_AES
  299. tristate "Support for OMAP AES hw engine"
  300. depends on ARCH_OMAP2 || ARCH_OMAP3 || ARCH_OMAP2PLUS
  301. select CRYPTO_AES
  302. select CRYPTO_BLKCIPHER
  303. select CRYPTO_ENGINE
  304. select CRYPTO_CBC
  305. select CRYPTO_ECB
  306. select CRYPTO_CTR
  307. select CRYPTO_AEAD
  308. help
  309. OMAP processors have AES module accelerator. Select this if you
  310. want to use the OMAP module for AES algorithms.
  311. config CRYPTO_DEV_OMAP_DES
  312. tristate "Support for OMAP DES/3DES hw engine"
  313. depends on ARCH_OMAP2PLUS
  314. select CRYPTO_DES
  315. select CRYPTO_BLKCIPHER
  316. select CRYPTO_ENGINE
  317. help
  318. OMAP processors have DES/3DES module accelerator. Select this if you
  319. want to use the OMAP module for DES and 3DES algorithms. Currently
  320. the ECB and CBC modes of operation are supported by the driver. Also
  321. accesses made on unaligned boundaries are supported.
  322. endif # CRYPTO_DEV_OMAP
  323. config CRYPTO_DEV_PICOXCELL
  324. tristate "Support for picoXcell IPSEC and Layer2 crypto engines"
  325. depends on (ARCH_PICOXCELL || COMPILE_TEST) && HAVE_CLK
  326. select CRYPTO_AEAD
  327. select CRYPTO_AES
  328. select CRYPTO_AUTHENC
  329. select CRYPTO_BLKCIPHER
  330. select CRYPTO_DES
  331. select CRYPTO_CBC
  332. select CRYPTO_ECB
  333. select CRYPTO_SEQIV
  334. help
  335. This option enables support for the hardware offload engines in the
  336. Picochip picoXcell SoC devices. Select this for IPSEC ESP offload
  337. and for 3gpp Layer 2 ciphering support.
  338. Saying m here will build a module named pipcoxcell_crypto.
  339. config CRYPTO_DEV_SAHARA
  340. tristate "Support for SAHARA crypto accelerator"
  341. depends on ARCH_MXC && OF
  342. select CRYPTO_BLKCIPHER
  343. select CRYPTO_AES
  344. select CRYPTO_ECB
  345. help
  346. This option enables support for the SAHARA HW crypto accelerator
  347. found in some Freescale i.MX chips.
  348. config CRYPTO_DEV_MXC_SCC
  349. tristate "Support for Freescale Security Controller (SCC)"
  350. depends on ARCH_MXC && OF
  351. select CRYPTO_BLKCIPHER
  352. select CRYPTO_DES
  353. help
  354. This option enables support for the Security Controller (SCC)
  355. found in Freescale i.MX25 chips.
  356. config CRYPTO_DEV_EXYNOS_RNG
  357. tristate "EXYNOS HW pseudo random number generator support"
  358. depends on ARCH_EXYNOS || COMPILE_TEST
  359. depends on HAS_IOMEM
  360. select CRYPTO_RNG
  361. ---help---
  362. This driver provides kernel-side support through the
  363. cryptographic API for the pseudo random number generator hardware
  364. found on Exynos SoCs.
  365. To compile this driver as a module, choose M here: the
  366. module will be called exynos-rng.
  367. If unsure, say Y.
  368. config CRYPTO_DEV_S5P
  369. tristate "Support for Samsung S5PV210/Exynos crypto accelerator"
  370. depends on ARCH_S5PV210 || ARCH_EXYNOS || COMPILE_TEST
  371. depends on HAS_IOMEM
  372. select CRYPTO_AES
  373. select CRYPTO_BLKCIPHER
  374. help
  375. This option allows you to have support for S5P crypto acceleration.
  376. Select this to offload Samsung S5PV210 or S5PC110, Exynos from AES
  377. algorithms execution.
  378. config CRYPTO_DEV_EXYNOS_HASH
  379. bool "Support for Samsung Exynos HASH accelerator"
  380. depends on CRYPTO_DEV_S5P
  381. depends on !CRYPTO_DEV_EXYNOS_RNG && CRYPTO_DEV_EXYNOS_RNG!=m
  382. select CRYPTO_SHA1
  383. select CRYPTO_MD5
  384. select CRYPTO_SHA256
  385. help
  386. Select this to offload Exynos from HASH MD5/SHA1/SHA256.
  387. This will select software SHA1, MD5 and SHA256 as they are
  388. needed for small and zero-size messages.
  389. HASH algorithms will be disabled if EXYNOS_RNG
  390. is enabled due to hw conflict.
  391. config CRYPTO_DEV_NX
  392. bool "Support for IBM PowerPC Nest (NX) cryptographic acceleration"
  393. depends on PPC64
  394. help
  395. This enables support for the NX hardware cryptographic accelerator
  396. coprocessor that is in IBM PowerPC P7+ or later processors. This
  397. does not actually enable any drivers, it only allows you to select
  398. which acceleration type (encryption and/or compression) to enable.
  399. if CRYPTO_DEV_NX
  400. source "drivers/crypto/nx/Kconfig"
  401. endif
  402. config CRYPTO_DEV_UX500
  403. tristate "Driver for ST-Ericsson UX500 crypto hardware acceleration"
  404. depends on ARCH_U8500
  405. help
  406. Driver for ST-Ericsson UX500 crypto engine.
  407. if CRYPTO_DEV_UX500
  408. source "drivers/crypto/ux500/Kconfig"
  409. endif # if CRYPTO_DEV_UX500
  410. config CRYPTO_DEV_ATMEL_AUTHENC
  411. tristate "Support for Atmel IPSEC/SSL hw accelerator"
  412. depends on ARCH_AT91 || COMPILE_TEST
  413. select CRYPTO_AUTHENC
  414. select CRYPTO_DEV_ATMEL_AES
  415. select CRYPTO_DEV_ATMEL_SHA
  416. help
  417. Some Atmel processors can combine the AES and SHA hw accelerators
  418. to enhance support of IPSEC/SSL.
  419. Select this if you want to use the Atmel modules for
  420. authenc(hmac(shaX),Y(cbc)) algorithms.
  421. config CRYPTO_DEV_ATMEL_AES
  422. tristate "Support for Atmel AES hw accelerator"
  423. depends on ARCH_AT91 || COMPILE_TEST
  424. select CRYPTO_AES
  425. select CRYPTO_AEAD
  426. select CRYPTO_BLKCIPHER
  427. help
  428. Some Atmel processors have AES hw accelerator.
  429. Select this if you want to use the Atmel module for
  430. AES algorithms.
  431. To compile this driver as a module, choose M here: the module
  432. will be called atmel-aes.
  433. config CRYPTO_DEV_ATMEL_TDES
  434. tristate "Support for Atmel DES/TDES hw accelerator"
  435. depends on ARCH_AT91 || COMPILE_TEST
  436. select CRYPTO_DES
  437. select CRYPTO_BLKCIPHER
  438. help
  439. Some Atmel processors have DES/TDES hw accelerator.
  440. Select this if you want to use the Atmel module for
  441. DES/TDES algorithms.
  442. To compile this driver as a module, choose M here: the module
  443. will be called atmel-tdes.
  444. config CRYPTO_DEV_ATMEL_SHA
  445. tristate "Support for Atmel SHA hw accelerator"
  446. depends on ARCH_AT91 || COMPILE_TEST
  447. select CRYPTO_HASH
  448. help
  449. Some Atmel processors have SHA1/SHA224/SHA256/SHA384/SHA512
  450. hw accelerator.
  451. Select this if you want to use the Atmel module for
  452. SHA1/SHA224/SHA256/SHA384/SHA512 algorithms.
  453. To compile this driver as a module, choose M here: the module
  454. will be called atmel-sha.
  455. config CRYPTO_DEV_ATMEL_ECC
  456. tristate "Support for Microchip / Atmel ECC hw accelerator"
  457. depends on ARCH_AT91 || COMPILE_TEST
  458. depends on I2C
  459. select CRYPTO_ECDH
  460. select CRC16
  461. help
  462. Microhip / Atmel ECC hw accelerator.
  463. Select this if you want to use the Microchip / Atmel module for
  464. ECDH algorithm.
  465. To compile this driver as a module, choose M here: the module
  466. will be called atmel-ecc.
  467. config CRYPTO_DEV_CCP
  468. bool "Support for AMD Secure Processor"
  469. depends on ((X86 && PCI) || (ARM64 && (OF_ADDRESS || ACPI))) && HAS_IOMEM
  470. help
  471. The AMD Secure Processor provides support for the Cryptographic Coprocessor
  472. (CCP) and the Platform Security Processor (PSP) devices.
  473. if CRYPTO_DEV_CCP
  474. source "drivers/crypto/ccp/Kconfig"
  475. endif
  476. config CRYPTO_DEV_MXS_DCP
  477. tristate "Support for Freescale MXS DCP"
  478. depends on (ARCH_MXS || ARCH_MXC)
  479. select STMP_DEVICE
  480. select CRYPTO_CBC
  481. select CRYPTO_ECB
  482. select CRYPTO_AES
  483. select CRYPTO_BLKCIPHER
  484. select CRYPTO_HASH
  485. help
  486. The Freescale i.MX23/i.MX28 has SHA1/SHA256 and AES128 CBC/ECB
  487. co-processor on the die.
  488. To compile this driver as a module, choose M here: the module
  489. will be called mxs-dcp.
  490. source "drivers/crypto/qat/Kconfig"
  491. source "drivers/crypto/cavium/cpt/Kconfig"
  492. source "drivers/crypto/cavium/nitrox/Kconfig"
  493. config CRYPTO_DEV_CAVIUM_ZIP
  494. tristate "Cavium ZIP driver"
  495. depends on PCI && 64BIT && (ARM64 || COMPILE_TEST)
  496. ---help---
  497. Select this option if you want to enable compression/decompression
  498. acceleration on Cavium's ARM based SoCs
  499. config CRYPTO_DEV_QCE
  500. tristate "Qualcomm crypto engine accelerator"
  501. depends on ARCH_QCOM || COMPILE_TEST
  502. depends on HAS_IOMEM
  503. select CRYPTO_AES
  504. select CRYPTO_DES
  505. select CRYPTO_ECB
  506. select CRYPTO_CBC
  507. select CRYPTO_XTS
  508. select CRYPTO_CTR
  509. select CRYPTO_BLKCIPHER
  510. help
  511. This driver supports Qualcomm crypto engine accelerator
  512. hardware. To compile this driver as a module, choose M here. The
  513. module will be called qcrypto.
  514. config CRYPTO_DEV_QCOM_RNG
  515. tristate "Qualcomm Random Number Generator Driver"
  516. depends on ARCH_QCOM || COMPILE_TEST
  517. select CRYPTO_RNG
  518. help
  519. This driver provides support for the Random Number
  520. Generator hardware found on Qualcomm SoCs.
  521. To compile this driver as a module, choose M here. The
  522. module will be called qcom-rng. If unsure, say N.
  523. config CRYPTO_DEV_VMX
  524. bool "Support for VMX cryptographic acceleration instructions"
  525. depends on PPC64 && VSX
  526. help
  527. Support for VMX cryptographic acceleration instructions.
  528. source "drivers/crypto/vmx/Kconfig"
  529. config CRYPTO_DEV_IMGTEC_HASH
  530. tristate "Imagination Technologies hardware hash accelerator"
  531. depends on MIPS || COMPILE_TEST
  532. select CRYPTO_MD5
  533. select CRYPTO_SHA1
  534. select CRYPTO_SHA256
  535. select CRYPTO_HASH
  536. help
  537. This driver interfaces with the Imagination Technologies
  538. hardware hash accelerator. Supporting MD5/SHA1/SHA224/SHA256
  539. hashing algorithms.
  540. config CRYPTO_DEV_SUN4I_SS
  541. tristate "Support for Allwinner Security System cryptographic accelerator"
  542. depends on ARCH_SUNXI && !64BIT
  543. select CRYPTO_MD5
  544. select CRYPTO_SHA1
  545. select CRYPTO_AES
  546. select CRYPTO_DES
  547. select CRYPTO_BLKCIPHER
  548. help
  549. Some Allwinner SoC have a crypto accelerator named
  550. Security System. Select this if you want to use it.
  551. The Security System handle AES/DES/3DES ciphers in CBC mode
  552. and SHA1 and MD5 hash algorithms.
  553. To compile this driver as a module, choose M here: the module
  554. will be called sun4i-ss.
  555. config CRYPTO_DEV_SUN4I_SS_PRNG
  556. bool "Support for Allwinner Security System PRNG"
  557. depends on CRYPTO_DEV_SUN4I_SS
  558. select CRYPTO_RNG
  559. help
  560. Select this option if you want to provide kernel-side support for
  561. the Pseudo-Random Number Generator found in the Security System.
  562. config CRYPTO_DEV_ROCKCHIP
  563. tristate "Rockchip's Cryptographic Engine driver"
  564. depends on OF && ARCH_ROCKCHIP
  565. select CRYPTO_AES
  566. select CRYPTO_DES
  567. select CRYPTO_MD5
  568. select CRYPTO_SHA1
  569. select CRYPTO_SHA256
  570. select CRYPTO_HASH
  571. select CRYPTO_BLKCIPHER
  572. help
  573. This driver interfaces with the hardware crypto accelerator.
  574. Supporting cbc/ecb chainmode, and aes/des/des3_ede cipher mode.
  575. config CRYPTO_DEV_MEDIATEK
  576. tristate "MediaTek's EIP97 Cryptographic Engine driver"
  577. depends on (ARM && ARCH_MEDIATEK) || COMPILE_TEST
  578. select CRYPTO_AES
  579. select CRYPTO_AEAD
  580. select CRYPTO_BLKCIPHER
  581. select CRYPTO_CTR
  582. select CRYPTO_SHA1
  583. select CRYPTO_SHA256
  584. select CRYPTO_SHA512
  585. select CRYPTO_HMAC
  586. help
  587. This driver allows you to utilize the hardware crypto accelerator
  588. EIP97 which can be found on the MT7623 MT2701, MT8521p, etc ....
  589. Select this if you want to use it for AES/SHA1/SHA2 algorithms.
  590. source "drivers/crypto/chelsio/Kconfig"
  591. source "drivers/crypto/virtio/Kconfig"
  592. config CRYPTO_DEV_BCM_SPU
  593. tristate "Broadcom symmetric crypto/hash acceleration support"
  594. depends on ARCH_BCM_IPROC
  595. depends on MAILBOX
  596. default m
  597. select CRYPTO_DES
  598. select CRYPTO_MD5
  599. select CRYPTO_SHA1
  600. select CRYPTO_SHA256
  601. select CRYPTO_SHA512
  602. help
  603. This driver provides support for Broadcom crypto acceleration using the
  604. Secure Processing Unit (SPU). The SPU driver registers ablkcipher,
  605. ahash, and aead algorithms with the kernel cryptographic API.
  606. source "drivers/crypto/stm32/Kconfig"
  607. config CRYPTO_DEV_SAFEXCEL
  608. tristate "Inside Secure's SafeXcel cryptographic engine driver"
  609. depends on OF
  610. depends on (ARM64 && ARCH_MVEBU) || (COMPILE_TEST && 64BIT)
  611. select CRYPTO_AES
  612. select CRYPTO_AUTHENC
  613. select CRYPTO_BLKCIPHER
  614. select CRYPTO_DES
  615. select CRYPTO_HASH
  616. select CRYPTO_HMAC
  617. select CRYPTO_MD5
  618. select CRYPTO_SHA1
  619. select CRYPTO_SHA256
  620. select CRYPTO_SHA512
  621. help
  622. This driver interfaces with the SafeXcel EIP-197 cryptographic engine
  623. designed by Inside Secure. Select this if you want to use CBC/ECB
  624. chain mode, AES cipher mode and SHA1/SHA224/SHA256/SHA512 hash
  625. algorithms.
  626. config CRYPTO_DEV_ARTPEC6
  627. tristate "Support for Axis ARTPEC-6/7 hardware crypto acceleration."
  628. depends on ARM && (ARCH_ARTPEC || COMPILE_TEST)
  629. depends on OF
  630. select CRYPTO_AEAD
  631. select CRYPTO_AES
  632. select CRYPTO_ALGAPI
  633. select CRYPTO_BLKCIPHER
  634. select CRYPTO_CTR
  635. select CRYPTO_HASH
  636. select CRYPTO_SHA1
  637. select CRYPTO_SHA256
  638. select CRYPTO_SHA512
  639. help
  640. Enables the driver for the on-chip crypto accelerator
  641. of Axis ARTPEC SoCs.
  642. To compile this driver as a module, choose M here.
  643. config CRYPTO_DEV_CCREE
  644. tristate "Support for ARM TrustZone CryptoCell family of security processors"
  645. depends on CRYPTO && CRYPTO_HW && OF && HAS_DMA
  646. default n
  647. select CRYPTO_HASH
  648. select CRYPTO_BLKCIPHER
  649. select CRYPTO_DES
  650. select CRYPTO_AEAD
  651. select CRYPTO_AUTHENC
  652. select CRYPTO_SHA1
  653. select CRYPTO_MD5
  654. select CRYPTO_SHA256
  655. select CRYPTO_SHA512
  656. select CRYPTO_HMAC
  657. select CRYPTO_AES
  658. select CRYPTO_CBC
  659. select CRYPTO_ECB
  660. select CRYPTO_CTR
  661. select CRYPTO_XTS
  662. help
  663. Say 'Y' to enable a driver for the REE interface of the Arm
  664. TrustZone CryptoCell family of processors. Currently the
  665. CryptoCell 712, 710 and 630 are supported.
  666. Choose this if you wish to use hardware acceleration of
  667. cryptographic operations on the system REE.
  668. If unsure say Y.
  669. source "drivers/crypto/hisilicon/Kconfig"
  670. endif # CRYPTO_HW