clk-muxgrf.c 2.6 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102
  1. /*
  2. *
  3. * This software is licensed under the terms of the GNU General Public
  4. * License version 2, as published by the Free Software Foundation, and
  5. * may be copied, distributed, and modified under those terms.
  6. *
  7. * This program is distributed in the hope that it will be useful,
  8. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  9. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  10. * GNU General Public License for more details.
  11. */
  12. #include <linux/slab.h>
  13. #include <linux/bitops.h>
  14. #include <linux/regmap.h>
  15. #include <linux/clk.h>
  16. #include <linux/clk-provider.h>
  17. #include "clk.h"
  18. struct rockchip_muxgrf_clock {
  19. struct clk_hw hw;
  20. struct regmap *regmap;
  21. u32 reg;
  22. u32 shift;
  23. u32 width;
  24. int flags;
  25. };
  26. #define to_muxgrf_clock(_hw) container_of(_hw, struct rockchip_muxgrf_clock, hw)
  27. static u8 rockchip_muxgrf_get_parent(struct clk_hw *hw)
  28. {
  29. struct rockchip_muxgrf_clock *mux = to_muxgrf_clock(hw);
  30. unsigned int mask = GENMASK(mux->width - 1, 0);
  31. unsigned int val;
  32. regmap_read(mux->regmap, mux->reg, &val);
  33. val >>= mux->shift;
  34. val &= mask;
  35. return val;
  36. }
  37. static int rockchip_muxgrf_set_parent(struct clk_hw *hw, u8 index)
  38. {
  39. struct rockchip_muxgrf_clock *mux = to_muxgrf_clock(hw);
  40. unsigned int mask = GENMASK(mux->width + mux->shift - 1, mux->shift);
  41. unsigned int val;
  42. val = index;
  43. val <<= mux->shift;
  44. if (mux->flags & CLK_MUX_HIWORD_MASK)
  45. return regmap_write(mux->regmap, mux->reg, val | (mask << 16));
  46. else
  47. return regmap_update_bits(mux->regmap, mux->reg, mask, val);
  48. }
  49. static const struct clk_ops rockchip_muxgrf_clk_ops = {
  50. .get_parent = rockchip_muxgrf_get_parent,
  51. .set_parent = rockchip_muxgrf_set_parent,
  52. .determine_rate = __clk_mux_determine_rate,
  53. };
  54. struct clk *rockchip_clk_register_muxgrf(const char *name,
  55. const char *const *parent_names, u8 num_parents,
  56. int flags, struct regmap *regmap, int reg,
  57. int shift, int width, int mux_flags)
  58. {
  59. struct rockchip_muxgrf_clock *muxgrf_clock;
  60. struct clk_init_data init;
  61. struct clk *clk;
  62. if (IS_ERR(regmap)) {
  63. pr_err("%s: regmap not available\n", __func__);
  64. return ERR_PTR(-ENOTSUPP);
  65. }
  66. muxgrf_clock = kmalloc(sizeof(*muxgrf_clock), GFP_KERNEL);
  67. if (!muxgrf_clock)
  68. return ERR_PTR(-ENOMEM);
  69. init.name = name;
  70. init.flags = flags;
  71. init.num_parents = num_parents;
  72. init.parent_names = parent_names;
  73. init.ops = &rockchip_muxgrf_clk_ops;
  74. muxgrf_clock->hw.init = &init;
  75. muxgrf_clock->regmap = regmap;
  76. muxgrf_clock->reg = reg;
  77. muxgrf_clock->shift = shift;
  78. muxgrf_clock->width = width;
  79. muxgrf_clock->flags = mux_flags;
  80. clk = clk_register(NULL, &muxgrf_clock->hw);
  81. if (IS_ERR(clk))
  82. kfree(muxgrf_clock);
  83. return clk;
  84. }