hci_intel.c 30 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764765766767768769770771772773774775776777778779780781782783784785786787788789790791792793794795796797798799800801802803804805806807808809810811812813814815816817818819820821822823824825826827828829830831832833834835836837838839840841842843844845846847848849850851852853854855856857858859860861862863864865866867868869870871872873874875876877878879880881882883884885886887888889890891892893894895896897898899900901902903904905906907908909910911912913914915916917918919920921922923924925926927928929930931932933934935936937938939940941942943944945946947948949950951952953954955956957958959960961962963964965966967968969970971972973974975976977978979980981982983984985986987988989990991992993994995996997998999100010011002100310041005100610071008100910101011101210131014101510161017101810191020102110221023102410251026102710281029103010311032103310341035103610371038103910401041104210431044104510461047104810491050105110521053105410551056105710581059106010611062106310641065106610671068106910701071107210731074107510761077107810791080108110821083108410851086108710881089109010911092109310941095109610971098109911001101110211031104110511061107110811091110111111121113111411151116111711181119112011211122112311241125112611271128112911301131113211331134113511361137113811391140114111421143114411451146114711481149115011511152115311541155115611571158115911601161116211631164116511661167116811691170117111721173117411751176117711781179118011811182118311841185118611871188118911901191119211931194119511961197119811991200120112021203120412051206120712081209121012111212121312141215121612171218121912201221122212231224122512261227122812291230123112321233123412351236123712381239124012411242124312441245124612471248124912501251125212531254125512561257125812591260126112621263
  1. /*
  2. *
  3. * Bluetooth HCI UART driver for Intel devices
  4. *
  5. * Copyright (C) 2015 Intel Corporation
  6. *
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License as published by
  10. * the Free Software Foundation; either version 2 of the License, or
  11. * (at your option) any later version.
  12. *
  13. * This program is distributed in the hope that it will be useful,
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16. * GNU General Public License for more details.
  17. *
  18. * You should have received a copy of the GNU General Public License
  19. * along with this program; if not, write to the Free Software
  20. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  21. *
  22. */
  23. #include <linux/kernel.h>
  24. #include <linux/errno.h>
  25. #include <linux/skbuff.h>
  26. #include <linux/firmware.h>
  27. #include <linux/module.h>
  28. #include <linux/wait.h>
  29. #include <linux/tty.h>
  30. #include <linux/platform_device.h>
  31. #include <linux/gpio/consumer.h>
  32. #include <linux/acpi.h>
  33. #include <linux/interrupt.h>
  34. #include <linux/pm_runtime.h>
  35. #include <net/bluetooth/bluetooth.h>
  36. #include <net/bluetooth/hci_core.h>
  37. #include "hci_uart.h"
  38. #include "btintel.h"
  39. #define STATE_BOOTLOADER 0
  40. #define STATE_DOWNLOADING 1
  41. #define STATE_FIRMWARE_LOADED 2
  42. #define STATE_FIRMWARE_FAILED 3
  43. #define STATE_BOOTING 4
  44. #define STATE_LPM_ENABLED 5
  45. #define STATE_TX_ACTIVE 6
  46. #define STATE_SUSPENDED 7
  47. #define STATE_LPM_TRANSACTION 8
  48. #define HCI_LPM_WAKE_PKT 0xf0
  49. #define HCI_LPM_PKT 0xf1
  50. #define HCI_LPM_MAX_SIZE 10
  51. #define HCI_LPM_HDR_SIZE HCI_EVENT_HDR_SIZE
  52. #define LPM_OP_TX_NOTIFY 0x00
  53. #define LPM_OP_SUSPEND_ACK 0x02
  54. #define LPM_OP_RESUME_ACK 0x03
  55. #define LPM_SUSPEND_DELAY_MS 1000
  56. struct hci_lpm_pkt {
  57. __u8 opcode;
  58. __u8 dlen;
  59. __u8 data[0];
  60. } __packed;
  61. struct intel_device {
  62. struct list_head list;
  63. struct platform_device *pdev;
  64. struct gpio_desc *reset;
  65. struct hci_uart *hu;
  66. struct mutex hu_lock;
  67. int irq;
  68. };
  69. static LIST_HEAD(intel_device_list);
  70. static DEFINE_MUTEX(intel_device_list_lock);
  71. struct intel_data {
  72. struct sk_buff *rx_skb;
  73. struct sk_buff_head txq;
  74. struct work_struct busy_work;
  75. struct hci_uart *hu;
  76. unsigned long flags;
  77. };
  78. static u8 intel_convert_speed(unsigned int speed)
  79. {
  80. switch (speed) {
  81. case 9600:
  82. return 0x00;
  83. case 19200:
  84. return 0x01;
  85. case 38400:
  86. return 0x02;
  87. case 57600:
  88. return 0x03;
  89. case 115200:
  90. return 0x04;
  91. case 230400:
  92. return 0x05;
  93. case 460800:
  94. return 0x06;
  95. case 921600:
  96. return 0x07;
  97. case 1843200:
  98. return 0x08;
  99. case 3250000:
  100. return 0x09;
  101. case 2000000:
  102. return 0x0a;
  103. case 3000000:
  104. return 0x0b;
  105. default:
  106. return 0xff;
  107. }
  108. }
  109. static int intel_wait_booting(struct hci_uart *hu)
  110. {
  111. struct intel_data *intel = hu->priv;
  112. int err;
  113. err = wait_on_bit_timeout(&intel->flags, STATE_BOOTING,
  114. TASK_INTERRUPTIBLE,
  115. msecs_to_jiffies(1000));
  116. if (err == -EINTR) {
  117. bt_dev_err(hu->hdev, "Device boot interrupted");
  118. return -EINTR;
  119. }
  120. if (err) {
  121. bt_dev_err(hu->hdev, "Device boot timeout");
  122. return -ETIMEDOUT;
  123. }
  124. return err;
  125. }
  126. #ifdef CONFIG_PM
  127. static int intel_wait_lpm_transaction(struct hci_uart *hu)
  128. {
  129. struct intel_data *intel = hu->priv;
  130. int err;
  131. err = wait_on_bit_timeout(&intel->flags, STATE_LPM_TRANSACTION,
  132. TASK_INTERRUPTIBLE,
  133. msecs_to_jiffies(1000));
  134. if (err == -EINTR) {
  135. bt_dev_err(hu->hdev, "LPM transaction interrupted");
  136. return -EINTR;
  137. }
  138. if (err) {
  139. bt_dev_err(hu->hdev, "LPM transaction timeout");
  140. return -ETIMEDOUT;
  141. }
  142. return err;
  143. }
  144. static int intel_lpm_suspend(struct hci_uart *hu)
  145. {
  146. static const u8 suspend[] = { 0x01, 0x01, 0x01 };
  147. struct intel_data *intel = hu->priv;
  148. struct sk_buff *skb;
  149. if (!test_bit(STATE_LPM_ENABLED, &intel->flags) ||
  150. test_bit(STATE_SUSPENDED, &intel->flags))
  151. return 0;
  152. if (test_bit(STATE_TX_ACTIVE, &intel->flags))
  153. return -EAGAIN;
  154. bt_dev_dbg(hu->hdev, "Suspending");
  155. skb = bt_skb_alloc(sizeof(suspend), GFP_KERNEL);
  156. if (!skb) {
  157. bt_dev_err(hu->hdev, "Failed to alloc memory for LPM packet");
  158. return -ENOMEM;
  159. }
  160. skb_put_data(skb, suspend, sizeof(suspend));
  161. hci_skb_pkt_type(skb) = HCI_LPM_PKT;
  162. set_bit(STATE_LPM_TRANSACTION, &intel->flags);
  163. /* LPM flow is a priority, enqueue packet at list head */
  164. skb_queue_head(&intel->txq, skb);
  165. hci_uart_tx_wakeup(hu);
  166. intel_wait_lpm_transaction(hu);
  167. /* Even in case of failure, continue and test the suspended flag */
  168. clear_bit(STATE_LPM_TRANSACTION, &intel->flags);
  169. if (!test_bit(STATE_SUSPENDED, &intel->flags)) {
  170. bt_dev_err(hu->hdev, "Device suspend error");
  171. return -EINVAL;
  172. }
  173. bt_dev_dbg(hu->hdev, "Suspended");
  174. hci_uart_set_flow_control(hu, true);
  175. return 0;
  176. }
  177. static int intel_lpm_resume(struct hci_uart *hu)
  178. {
  179. struct intel_data *intel = hu->priv;
  180. struct sk_buff *skb;
  181. if (!test_bit(STATE_LPM_ENABLED, &intel->flags) ||
  182. !test_bit(STATE_SUSPENDED, &intel->flags))
  183. return 0;
  184. bt_dev_dbg(hu->hdev, "Resuming");
  185. hci_uart_set_flow_control(hu, false);
  186. skb = bt_skb_alloc(0, GFP_KERNEL);
  187. if (!skb) {
  188. bt_dev_err(hu->hdev, "Failed to alloc memory for LPM packet");
  189. return -ENOMEM;
  190. }
  191. hci_skb_pkt_type(skb) = HCI_LPM_WAKE_PKT;
  192. set_bit(STATE_LPM_TRANSACTION, &intel->flags);
  193. /* LPM flow is a priority, enqueue packet at list head */
  194. skb_queue_head(&intel->txq, skb);
  195. hci_uart_tx_wakeup(hu);
  196. intel_wait_lpm_transaction(hu);
  197. /* Even in case of failure, continue and test the suspended flag */
  198. clear_bit(STATE_LPM_TRANSACTION, &intel->flags);
  199. if (test_bit(STATE_SUSPENDED, &intel->flags)) {
  200. bt_dev_err(hu->hdev, "Device resume error");
  201. return -EINVAL;
  202. }
  203. bt_dev_dbg(hu->hdev, "Resumed");
  204. return 0;
  205. }
  206. #endif /* CONFIG_PM */
  207. static int intel_lpm_host_wake(struct hci_uart *hu)
  208. {
  209. static const u8 lpm_resume_ack[] = { LPM_OP_RESUME_ACK, 0x00 };
  210. struct intel_data *intel = hu->priv;
  211. struct sk_buff *skb;
  212. hci_uart_set_flow_control(hu, false);
  213. clear_bit(STATE_SUSPENDED, &intel->flags);
  214. skb = bt_skb_alloc(sizeof(lpm_resume_ack), GFP_KERNEL);
  215. if (!skb) {
  216. bt_dev_err(hu->hdev, "Failed to alloc memory for LPM packet");
  217. return -ENOMEM;
  218. }
  219. skb_put_data(skb, lpm_resume_ack, sizeof(lpm_resume_ack));
  220. hci_skb_pkt_type(skb) = HCI_LPM_PKT;
  221. /* LPM flow is a priority, enqueue packet at list head */
  222. skb_queue_head(&intel->txq, skb);
  223. hci_uart_tx_wakeup(hu);
  224. bt_dev_dbg(hu->hdev, "Resumed by controller");
  225. return 0;
  226. }
  227. static irqreturn_t intel_irq(int irq, void *dev_id)
  228. {
  229. struct intel_device *idev = dev_id;
  230. dev_info(&idev->pdev->dev, "hci_intel irq\n");
  231. mutex_lock(&idev->hu_lock);
  232. if (idev->hu)
  233. intel_lpm_host_wake(idev->hu);
  234. mutex_unlock(&idev->hu_lock);
  235. /* Host/Controller are now LPM resumed, trigger a new delayed suspend */
  236. pm_runtime_get(&idev->pdev->dev);
  237. pm_runtime_mark_last_busy(&idev->pdev->dev);
  238. pm_runtime_put_autosuspend(&idev->pdev->dev);
  239. return IRQ_HANDLED;
  240. }
  241. static int intel_set_power(struct hci_uart *hu, bool powered)
  242. {
  243. struct list_head *p;
  244. int err = -ENODEV;
  245. if (!hu->tty->dev)
  246. return err;
  247. mutex_lock(&intel_device_list_lock);
  248. list_for_each(p, &intel_device_list) {
  249. struct intel_device *idev = list_entry(p, struct intel_device,
  250. list);
  251. /* tty device and pdev device should share the same parent
  252. * which is the UART port.
  253. */
  254. if (hu->tty->dev->parent != idev->pdev->dev.parent)
  255. continue;
  256. if (!idev->reset) {
  257. err = -ENOTSUPP;
  258. break;
  259. }
  260. BT_INFO("hu %p, Switching compatible pm device (%s) to %u",
  261. hu, dev_name(&idev->pdev->dev), powered);
  262. gpiod_set_value(idev->reset, powered);
  263. /* Provide to idev a hu reference which is used to run LPM
  264. * transactions (lpm suspend/resume) from PM callbacks.
  265. * hu needs to be protected against concurrent removing during
  266. * these PM ops.
  267. */
  268. mutex_lock(&idev->hu_lock);
  269. idev->hu = powered ? hu : NULL;
  270. mutex_unlock(&idev->hu_lock);
  271. if (idev->irq < 0)
  272. break;
  273. if (powered && device_can_wakeup(&idev->pdev->dev)) {
  274. err = devm_request_threaded_irq(&idev->pdev->dev,
  275. idev->irq, NULL,
  276. intel_irq,
  277. IRQF_ONESHOT,
  278. "bt-host-wake", idev);
  279. if (err) {
  280. BT_ERR("hu %p, unable to allocate irq-%d",
  281. hu, idev->irq);
  282. break;
  283. }
  284. device_wakeup_enable(&idev->pdev->dev);
  285. pm_runtime_set_active(&idev->pdev->dev);
  286. pm_runtime_use_autosuspend(&idev->pdev->dev);
  287. pm_runtime_set_autosuspend_delay(&idev->pdev->dev,
  288. LPM_SUSPEND_DELAY_MS);
  289. pm_runtime_enable(&idev->pdev->dev);
  290. } else if (!powered && device_may_wakeup(&idev->pdev->dev)) {
  291. devm_free_irq(&idev->pdev->dev, idev->irq, idev);
  292. device_wakeup_disable(&idev->pdev->dev);
  293. pm_runtime_disable(&idev->pdev->dev);
  294. }
  295. }
  296. mutex_unlock(&intel_device_list_lock);
  297. return err;
  298. }
  299. static void intel_busy_work(struct work_struct *work)
  300. {
  301. struct list_head *p;
  302. struct intel_data *intel = container_of(work, struct intel_data,
  303. busy_work);
  304. if (!intel->hu->tty->dev)
  305. return;
  306. /* Link is busy, delay the suspend */
  307. mutex_lock(&intel_device_list_lock);
  308. list_for_each(p, &intel_device_list) {
  309. struct intel_device *idev = list_entry(p, struct intel_device,
  310. list);
  311. if (intel->hu->tty->dev->parent == idev->pdev->dev.parent) {
  312. pm_runtime_get(&idev->pdev->dev);
  313. pm_runtime_mark_last_busy(&idev->pdev->dev);
  314. pm_runtime_put_autosuspend(&idev->pdev->dev);
  315. break;
  316. }
  317. }
  318. mutex_unlock(&intel_device_list_lock);
  319. }
  320. static int intel_open(struct hci_uart *hu)
  321. {
  322. struct intel_data *intel;
  323. BT_DBG("hu %p", hu);
  324. intel = kzalloc(sizeof(*intel), GFP_KERNEL);
  325. if (!intel)
  326. return -ENOMEM;
  327. skb_queue_head_init(&intel->txq);
  328. INIT_WORK(&intel->busy_work, intel_busy_work);
  329. intel->hu = hu;
  330. hu->priv = intel;
  331. if (!intel_set_power(hu, true))
  332. set_bit(STATE_BOOTING, &intel->flags);
  333. return 0;
  334. }
  335. static int intel_close(struct hci_uart *hu)
  336. {
  337. struct intel_data *intel = hu->priv;
  338. BT_DBG("hu %p", hu);
  339. cancel_work_sync(&intel->busy_work);
  340. intel_set_power(hu, false);
  341. skb_queue_purge(&intel->txq);
  342. kfree_skb(intel->rx_skb);
  343. kfree(intel);
  344. hu->priv = NULL;
  345. return 0;
  346. }
  347. static int intel_flush(struct hci_uart *hu)
  348. {
  349. struct intel_data *intel = hu->priv;
  350. BT_DBG("hu %p", hu);
  351. skb_queue_purge(&intel->txq);
  352. return 0;
  353. }
  354. static int inject_cmd_complete(struct hci_dev *hdev, __u16 opcode)
  355. {
  356. struct sk_buff *skb;
  357. struct hci_event_hdr *hdr;
  358. struct hci_ev_cmd_complete *evt;
  359. skb = bt_skb_alloc(sizeof(*hdr) + sizeof(*evt) + 1, GFP_KERNEL);
  360. if (!skb)
  361. return -ENOMEM;
  362. hdr = skb_put(skb, sizeof(*hdr));
  363. hdr->evt = HCI_EV_CMD_COMPLETE;
  364. hdr->plen = sizeof(*evt) + 1;
  365. evt = skb_put(skb, sizeof(*evt));
  366. evt->ncmd = 0x01;
  367. evt->opcode = cpu_to_le16(opcode);
  368. skb_put_u8(skb, 0x00);
  369. hci_skb_pkt_type(skb) = HCI_EVENT_PKT;
  370. return hci_recv_frame(hdev, skb);
  371. }
  372. static int intel_set_baudrate(struct hci_uart *hu, unsigned int speed)
  373. {
  374. struct intel_data *intel = hu->priv;
  375. struct hci_dev *hdev = hu->hdev;
  376. u8 speed_cmd[] = { 0x06, 0xfc, 0x01, 0x00 };
  377. struct sk_buff *skb;
  378. int err;
  379. /* This can be the first command sent to the chip, check
  380. * that the controller is ready.
  381. */
  382. err = intel_wait_booting(hu);
  383. clear_bit(STATE_BOOTING, &intel->flags);
  384. /* In case of timeout, try to continue anyway */
  385. if (err && err != -ETIMEDOUT)
  386. return err;
  387. bt_dev_info(hdev, "Change controller speed to %d", speed);
  388. speed_cmd[3] = intel_convert_speed(speed);
  389. if (speed_cmd[3] == 0xff) {
  390. bt_dev_err(hdev, "Unsupported speed");
  391. return -EINVAL;
  392. }
  393. /* Device will not accept speed change if Intel version has not been
  394. * previously requested.
  395. */
  396. skb = __hci_cmd_sync(hdev, 0xfc05, 0, NULL, HCI_CMD_TIMEOUT);
  397. if (IS_ERR(skb)) {
  398. bt_dev_err(hdev, "Reading Intel version information failed (%ld)",
  399. PTR_ERR(skb));
  400. return PTR_ERR(skb);
  401. }
  402. kfree_skb(skb);
  403. skb = bt_skb_alloc(sizeof(speed_cmd), GFP_KERNEL);
  404. if (!skb) {
  405. bt_dev_err(hdev, "Failed to alloc memory for baudrate packet");
  406. return -ENOMEM;
  407. }
  408. skb_put_data(skb, speed_cmd, sizeof(speed_cmd));
  409. hci_skb_pkt_type(skb) = HCI_COMMAND_PKT;
  410. hci_uart_set_flow_control(hu, true);
  411. skb_queue_tail(&intel->txq, skb);
  412. hci_uart_tx_wakeup(hu);
  413. /* wait 100ms to change baudrate on controller side */
  414. msleep(100);
  415. hci_uart_set_baudrate(hu, speed);
  416. hci_uart_set_flow_control(hu, false);
  417. return 0;
  418. }
  419. static int intel_setup(struct hci_uart *hu)
  420. {
  421. struct intel_data *intel = hu->priv;
  422. struct hci_dev *hdev = hu->hdev;
  423. struct sk_buff *skb;
  424. struct intel_version ver;
  425. struct intel_boot_params params;
  426. struct list_head *p;
  427. const struct firmware *fw;
  428. char fwname[64];
  429. u32 boot_param;
  430. ktime_t calltime, delta, rettime;
  431. unsigned long long duration;
  432. unsigned int init_speed, oper_speed;
  433. int speed_change = 0;
  434. int err;
  435. bt_dev_dbg(hdev, "start intel_setup");
  436. hu->hdev->set_diag = btintel_set_diag;
  437. hu->hdev->set_bdaddr = btintel_set_bdaddr;
  438. /* Set the default boot parameter to 0x0 and it is updated to
  439. * SKU specific boot parameter after reading Intel_Write_Boot_Params
  440. * command while downloading the firmware.
  441. */
  442. boot_param = 0x00000000;
  443. calltime = ktime_get();
  444. if (hu->init_speed)
  445. init_speed = hu->init_speed;
  446. else
  447. init_speed = hu->proto->init_speed;
  448. if (hu->oper_speed)
  449. oper_speed = hu->oper_speed;
  450. else
  451. oper_speed = hu->proto->oper_speed;
  452. if (oper_speed && init_speed && oper_speed != init_speed)
  453. speed_change = 1;
  454. /* Check that the controller is ready */
  455. err = intel_wait_booting(hu);
  456. clear_bit(STATE_BOOTING, &intel->flags);
  457. /* In case of timeout, try to continue anyway */
  458. if (err && err != -ETIMEDOUT)
  459. return err;
  460. set_bit(STATE_BOOTLOADER, &intel->flags);
  461. /* Read the Intel version information to determine if the device
  462. * is in bootloader mode or if it already has operational firmware
  463. * loaded.
  464. */
  465. err = btintel_read_version(hdev, &ver);
  466. if (err)
  467. return err;
  468. /* The hardware platform number has a fixed value of 0x37 and
  469. * for now only accept this single value.
  470. */
  471. if (ver.hw_platform != 0x37) {
  472. bt_dev_err(hdev, "Unsupported Intel hardware platform (%u)",
  473. ver.hw_platform);
  474. return -EINVAL;
  475. }
  476. /* Check for supported iBT hardware variants of this firmware
  477. * loading method.
  478. *
  479. * This check has been put in place to ensure correct forward
  480. * compatibility options when newer hardware variants come along.
  481. */
  482. switch (ver.hw_variant) {
  483. case 0x0b: /* LnP */
  484. case 0x0c: /* WsP */
  485. case 0x12: /* ThP */
  486. break;
  487. default:
  488. bt_dev_err(hdev, "Unsupported Intel hardware variant (%u)",
  489. ver.hw_variant);
  490. return -EINVAL;
  491. }
  492. btintel_version_info(hdev, &ver);
  493. /* The firmware variant determines if the device is in bootloader
  494. * mode or is running operational firmware. The value 0x06 identifies
  495. * the bootloader and the value 0x23 identifies the operational
  496. * firmware.
  497. *
  498. * When the operational firmware is already present, then only
  499. * the check for valid Bluetooth device address is needed. This
  500. * determines if the device will be added as configured or
  501. * unconfigured controller.
  502. *
  503. * It is not possible to use the Secure Boot Parameters in this
  504. * case since that command is only available in bootloader mode.
  505. */
  506. if (ver.fw_variant == 0x23) {
  507. clear_bit(STATE_BOOTLOADER, &intel->flags);
  508. btintel_check_bdaddr(hdev);
  509. return 0;
  510. }
  511. /* If the device is not in bootloader mode, then the only possible
  512. * choice is to return an error and abort the device initialization.
  513. */
  514. if (ver.fw_variant != 0x06) {
  515. bt_dev_err(hdev, "Unsupported Intel firmware variant (%u)",
  516. ver.fw_variant);
  517. return -ENODEV;
  518. }
  519. /* Read the secure boot parameters to identify the operating
  520. * details of the bootloader.
  521. */
  522. err = btintel_read_boot_params(hdev, &params);
  523. if (err)
  524. return err;
  525. /* It is required that every single firmware fragment is acknowledged
  526. * with a command complete event. If the boot parameters indicate
  527. * that this bootloader does not send them, then abort the setup.
  528. */
  529. if (params.limited_cce != 0x00) {
  530. bt_dev_err(hdev, "Unsupported Intel firmware loading method (%u)",
  531. params.limited_cce);
  532. return -EINVAL;
  533. }
  534. /* If the OTP has no valid Bluetooth device address, then there will
  535. * also be no valid address for the operational firmware.
  536. */
  537. if (!bacmp(&params.otp_bdaddr, BDADDR_ANY)) {
  538. bt_dev_info(hdev, "No device address configured");
  539. set_bit(HCI_QUIRK_INVALID_BDADDR, &hdev->quirks);
  540. }
  541. /* With this Intel bootloader only the hardware variant and device
  542. * revision information are used to select the right firmware for SfP
  543. * and WsP.
  544. *
  545. * The firmware filename is ibt-<hw_variant>-<dev_revid>.sfi.
  546. *
  547. * Currently the supported hardware variants are:
  548. * 11 (0x0b) for iBT 3.0 (LnP/SfP)
  549. * 12 (0x0c) for iBT 3.5 (WsP)
  550. *
  551. * For ThP/JfP and for future SKU's, the FW name varies based on HW
  552. * variant, HW revision and FW revision, as these are dependent on CNVi
  553. * and RF Combination.
  554. *
  555. * 18 (0x12) for iBT3.5 (ThP/JfP)
  556. *
  557. * The firmware file name for these will be
  558. * ibt-<hw_variant>-<hw_revision>-<fw_revision>.sfi.
  559. *
  560. */
  561. switch (ver.hw_variant) {
  562. case 0x0b: /* SfP */
  563. case 0x0c: /* WsP */
  564. snprintf(fwname, sizeof(fwname), "intel/ibt-%u-%u.sfi",
  565. le16_to_cpu(ver.hw_variant),
  566. le16_to_cpu(params.dev_revid));
  567. break;
  568. case 0x12: /* ThP */
  569. snprintf(fwname, sizeof(fwname), "intel/ibt-%u-%u-%u.sfi",
  570. le16_to_cpu(ver.hw_variant),
  571. le16_to_cpu(ver.hw_revision),
  572. le16_to_cpu(ver.fw_revision));
  573. break;
  574. default:
  575. bt_dev_err(hdev, "Unsupported Intel hardware variant (%u)",
  576. ver.hw_variant);
  577. return -EINVAL;
  578. }
  579. err = request_firmware(&fw, fwname, &hdev->dev);
  580. if (err < 0) {
  581. bt_dev_err(hdev, "Failed to load Intel firmware file (%d)",
  582. err);
  583. return err;
  584. }
  585. bt_dev_info(hdev, "Found device firmware: %s", fwname);
  586. /* Save the DDC file name for later */
  587. switch (ver.hw_variant) {
  588. case 0x0b: /* SfP */
  589. case 0x0c: /* WsP */
  590. snprintf(fwname, sizeof(fwname), "intel/ibt-%u-%u.ddc",
  591. le16_to_cpu(ver.hw_variant),
  592. le16_to_cpu(params.dev_revid));
  593. break;
  594. case 0x12: /* ThP */
  595. snprintf(fwname, sizeof(fwname), "intel/ibt-%u-%u-%u.ddc",
  596. le16_to_cpu(ver.hw_variant),
  597. le16_to_cpu(ver.hw_revision),
  598. le16_to_cpu(ver.fw_revision));
  599. break;
  600. default:
  601. bt_dev_err(hdev, "Unsupported Intel hardware variant (%u)",
  602. ver.hw_variant);
  603. return -EINVAL;
  604. }
  605. if (fw->size < 644) {
  606. bt_dev_err(hdev, "Invalid size of firmware file (%zu)",
  607. fw->size);
  608. err = -EBADF;
  609. goto done;
  610. }
  611. set_bit(STATE_DOWNLOADING, &intel->flags);
  612. /* Start firmware downloading and get boot parameter */
  613. err = btintel_download_firmware(hdev, fw, &boot_param);
  614. if (err < 0)
  615. goto done;
  616. set_bit(STATE_FIRMWARE_LOADED, &intel->flags);
  617. bt_dev_info(hdev, "Waiting for firmware download to complete");
  618. /* Before switching the device into operational mode and with that
  619. * booting the loaded firmware, wait for the bootloader notification
  620. * that all fragments have been successfully received.
  621. *
  622. * When the event processing receives the notification, then the
  623. * STATE_DOWNLOADING flag will be cleared.
  624. *
  625. * The firmware loading should not take longer than 5 seconds
  626. * and thus just timeout if that happens and fail the setup
  627. * of this device.
  628. */
  629. err = wait_on_bit_timeout(&intel->flags, STATE_DOWNLOADING,
  630. TASK_INTERRUPTIBLE,
  631. msecs_to_jiffies(5000));
  632. if (err == -EINTR) {
  633. bt_dev_err(hdev, "Firmware loading interrupted");
  634. err = -EINTR;
  635. goto done;
  636. }
  637. if (err) {
  638. bt_dev_err(hdev, "Firmware loading timeout");
  639. err = -ETIMEDOUT;
  640. goto done;
  641. }
  642. if (test_bit(STATE_FIRMWARE_FAILED, &intel->flags)) {
  643. bt_dev_err(hdev, "Firmware loading failed");
  644. err = -ENOEXEC;
  645. goto done;
  646. }
  647. rettime = ktime_get();
  648. delta = ktime_sub(rettime, calltime);
  649. duration = (unsigned long long) ktime_to_ns(delta) >> 10;
  650. bt_dev_info(hdev, "Firmware loaded in %llu usecs", duration);
  651. done:
  652. release_firmware(fw);
  653. if (err < 0)
  654. return err;
  655. /* We need to restore the default speed before Intel reset */
  656. if (speed_change) {
  657. err = intel_set_baudrate(hu, init_speed);
  658. if (err)
  659. return err;
  660. }
  661. calltime = ktime_get();
  662. set_bit(STATE_BOOTING, &intel->flags);
  663. err = btintel_send_intel_reset(hdev, boot_param);
  664. if (err)
  665. return err;
  666. /* The bootloader will not indicate when the device is ready. This
  667. * is done by the operational firmware sending bootup notification.
  668. *
  669. * Booting into operational firmware should not take longer than
  670. * 1 second. However if that happens, then just fail the setup
  671. * since something went wrong.
  672. */
  673. bt_dev_info(hdev, "Waiting for device to boot");
  674. err = intel_wait_booting(hu);
  675. if (err)
  676. return err;
  677. clear_bit(STATE_BOOTING, &intel->flags);
  678. rettime = ktime_get();
  679. delta = ktime_sub(rettime, calltime);
  680. duration = (unsigned long long) ktime_to_ns(delta) >> 10;
  681. bt_dev_info(hdev, "Device booted in %llu usecs", duration);
  682. /* Enable LPM if matching pdev with wakeup enabled, set TX active
  683. * until further LPM TX notification.
  684. */
  685. mutex_lock(&intel_device_list_lock);
  686. list_for_each(p, &intel_device_list) {
  687. struct intel_device *dev = list_entry(p, struct intel_device,
  688. list);
  689. if (!hu->tty->dev)
  690. break;
  691. if (hu->tty->dev->parent == dev->pdev->dev.parent) {
  692. if (device_may_wakeup(&dev->pdev->dev)) {
  693. set_bit(STATE_LPM_ENABLED, &intel->flags);
  694. set_bit(STATE_TX_ACTIVE, &intel->flags);
  695. }
  696. break;
  697. }
  698. }
  699. mutex_unlock(&intel_device_list_lock);
  700. /* Ignore errors, device can work without DDC parameters */
  701. btintel_load_ddc_config(hdev, fwname);
  702. skb = __hci_cmd_sync(hdev, HCI_OP_RESET, 0, NULL, HCI_CMD_TIMEOUT);
  703. if (IS_ERR(skb))
  704. return PTR_ERR(skb);
  705. kfree_skb(skb);
  706. if (speed_change) {
  707. err = intel_set_baudrate(hu, oper_speed);
  708. if (err)
  709. return err;
  710. }
  711. bt_dev_info(hdev, "Setup complete");
  712. clear_bit(STATE_BOOTLOADER, &intel->flags);
  713. return 0;
  714. }
  715. static int intel_recv_event(struct hci_dev *hdev, struct sk_buff *skb)
  716. {
  717. struct hci_uart *hu = hci_get_drvdata(hdev);
  718. struct intel_data *intel = hu->priv;
  719. struct hci_event_hdr *hdr;
  720. if (!test_bit(STATE_BOOTLOADER, &intel->flags) &&
  721. !test_bit(STATE_BOOTING, &intel->flags))
  722. goto recv;
  723. hdr = (void *)skb->data;
  724. /* When the firmware loading completes the device sends
  725. * out a vendor specific event indicating the result of
  726. * the firmware loading.
  727. */
  728. if (skb->len == 7 && hdr->evt == 0xff && hdr->plen == 0x05 &&
  729. skb->data[2] == 0x06) {
  730. if (skb->data[3] != 0x00)
  731. set_bit(STATE_FIRMWARE_FAILED, &intel->flags);
  732. if (test_and_clear_bit(STATE_DOWNLOADING, &intel->flags) &&
  733. test_bit(STATE_FIRMWARE_LOADED, &intel->flags)) {
  734. smp_mb__after_atomic();
  735. wake_up_bit(&intel->flags, STATE_DOWNLOADING);
  736. }
  737. /* When switching to the operational firmware the device
  738. * sends a vendor specific event indicating that the bootup
  739. * completed.
  740. */
  741. } else if (skb->len == 9 && hdr->evt == 0xff && hdr->plen == 0x07 &&
  742. skb->data[2] == 0x02) {
  743. if (test_and_clear_bit(STATE_BOOTING, &intel->flags)) {
  744. smp_mb__after_atomic();
  745. wake_up_bit(&intel->flags, STATE_BOOTING);
  746. }
  747. }
  748. recv:
  749. return hci_recv_frame(hdev, skb);
  750. }
  751. static void intel_recv_lpm_notify(struct hci_dev *hdev, int value)
  752. {
  753. struct hci_uart *hu = hci_get_drvdata(hdev);
  754. struct intel_data *intel = hu->priv;
  755. bt_dev_dbg(hdev, "TX idle notification (%d)", value);
  756. if (value) {
  757. set_bit(STATE_TX_ACTIVE, &intel->flags);
  758. schedule_work(&intel->busy_work);
  759. } else {
  760. clear_bit(STATE_TX_ACTIVE, &intel->flags);
  761. }
  762. }
  763. static int intel_recv_lpm(struct hci_dev *hdev, struct sk_buff *skb)
  764. {
  765. struct hci_lpm_pkt *lpm = (void *)skb->data;
  766. struct hci_uart *hu = hci_get_drvdata(hdev);
  767. struct intel_data *intel = hu->priv;
  768. switch (lpm->opcode) {
  769. case LPM_OP_TX_NOTIFY:
  770. if (lpm->dlen < 1) {
  771. bt_dev_err(hu->hdev, "Invalid LPM notification packet");
  772. break;
  773. }
  774. intel_recv_lpm_notify(hdev, lpm->data[0]);
  775. break;
  776. case LPM_OP_SUSPEND_ACK:
  777. set_bit(STATE_SUSPENDED, &intel->flags);
  778. if (test_and_clear_bit(STATE_LPM_TRANSACTION, &intel->flags)) {
  779. smp_mb__after_atomic();
  780. wake_up_bit(&intel->flags, STATE_LPM_TRANSACTION);
  781. }
  782. break;
  783. case LPM_OP_RESUME_ACK:
  784. clear_bit(STATE_SUSPENDED, &intel->flags);
  785. if (test_and_clear_bit(STATE_LPM_TRANSACTION, &intel->flags)) {
  786. smp_mb__after_atomic();
  787. wake_up_bit(&intel->flags, STATE_LPM_TRANSACTION);
  788. }
  789. break;
  790. default:
  791. bt_dev_err(hdev, "Unknown LPM opcode (%02x)", lpm->opcode);
  792. break;
  793. }
  794. kfree_skb(skb);
  795. return 0;
  796. }
  797. #define INTEL_RECV_LPM \
  798. .type = HCI_LPM_PKT, \
  799. .hlen = HCI_LPM_HDR_SIZE, \
  800. .loff = 1, \
  801. .lsize = 1, \
  802. .maxlen = HCI_LPM_MAX_SIZE
  803. static const struct h4_recv_pkt intel_recv_pkts[] = {
  804. { H4_RECV_ACL, .recv = hci_recv_frame },
  805. { H4_RECV_SCO, .recv = hci_recv_frame },
  806. { H4_RECV_EVENT, .recv = intel_recv_event },
  807. { INTEL_RECV_LPM, .recv = intel_recv_lpm },
  808. };
  809. static int intel_recv(struct hci_uart *hu, const void *data, int count)
  810. {
  811. struct intel_data *intel = hu->priv;
  812. if (!test_bit(HCI_UART_REGISTERED, &hu->flags))
  813. return -EUNATCH;
  814. intel->rx_skb = h4_recv_buf(hu->hdev, intel->rx_skb, data, count,
  815. intel_recv_pkts,
  816. ARRAY_SIZE(intel_recv_pkts));
  817. if (IS_ERR(intel->rx_skb)) {
  818. int err = PTR_ERR(intel->rx_skb);
  819. bt_dev_err(hu->hdev, "Frame reassembly failed (%d)", err);
  820. intel->rx_skb = NULL;
  821. return err;
  822. }
  823. return count;
  824. }
  825. static int intel_enqueue(struct hci_uart *hu, struct sk_buff *skb)
  826. {
  827. struct intel_data *intel = hu->priv;
  828. struct list_head *p;
  829. BT_DBG("hu %p skb %p", hu, skb);
  830. if (!hu->tty->dev)
  831. goto out_enqueue;
  832. /* Be sure our controller is resumed and potential LPM transaction
  833. * completed before enqueuing any packet.
  834. */
  835. mutex_lock(&intel_device_list_lock);
  836. list_for_each(p, &intel_device_list) {
  837. struct intel_device *idev = list_entry(p, struct intel_device,
  838. list);
  839. if (hu->tty->dev->parent == idev->pdev->dev.parent) {
  840. pm_runtime_get_sync(&idev->pdev->dev);
  841. pm_runtime_mark_last_busy(&idev->pdev->dev);
  842. pm_runtime_put_autosuspend(&idev->pdev->dev);
  843. break;
  844. }
  845. }
  846. mutex_unlock(&intel_device_list_lock);
  847. out_enqueue:
  848. skb_queue_tail(&intel->txq, skb);
  849. return 0;
  850. }
  851. static struct sk_buff *intel_dequeue(struct hci_uart *hu)
  852. {
  853. struct intel_data *intel = hu->priv;
  854. struct sk_buff *skb;
  855. skb = skb_dequeue(&intel->txq);
  856. if (!skb)
  857. return skb;
  858. if (test_bit(STATE_BOOTLOADER, &intel->flags) &&
  859. (hci_skb_pkt_type(skb) == HCI_COMMAND_PKT)) {
  860. struct hci_command_hdr *cmd = (void *)skb->data;
  861. __u16 opcode = le16_to_cpu(cmd->opcode);
  862. /* When the 0xfc01 command is issued to boot into
  863. * the operational firmware, it will actually not
  864. * send a command complete event. To keep the flow
  865. * control working inject that event here.
  866. */
  867. if (opcode == 0xfc01)
  868. inject_cmd_complete(hu->hdev, opcode);
  869. }
  870. /* Prepend skb with frame type */
  871. memcpy(skb_push(skb, 1), &hci_skb_pkt_type(skb), 1);
  872. return skb;
  873. }
  874. static const struct hci_uart_proto intel_proto = {
  875. .id = HCI_UART_INTEL,
  876. .name = "Intel",
  877. .manufacturer = 2,
  878. .init_speed = 115200,
  879. .oper_speed = 3000000,
  880. .open = intel_open,
  881. .close = intel_close,
  882. .flush = intel_flush,
  883. .setup = intel_setup,
  884. .set_baudrate = intel_set_baudrate,
  885. .recv = intel_recv,
  886. .enqueue = intel_enqueue,
  887. .dequeue = intel_dequeue,
  888. };
  889. #ifdef CONFIG_ACPI
  890. static const struct acpi_device_id intel_acpi_match[] = {
  891. { "INT33E1", 0 },
  892. { },
  893. };
  894. MODULE_DEVICE_TABLE(acpi, intel_acpi_match);
  895. #endif
  896. #ifdef CONFIG_PM
  897. static int intel_suspend_device(struct device *dev)
  898. {
  899. struct intel_device *idev = dev_get_drvdata(dev);
  900. mutex_lock(&idev->hu_lock);
  901. if (idev->hu)
  902. intel_lpm_suspend(idev->hu);
  903. mutex_unlock(&idev->hu_lock);
  904. return 0;
  905. }
  906. static int intel_resume_device(struct device *dev)
  907. {
  908. struct intel_device *idev = dev_get_drvdata(dev);
  909. mutex_lock(&idev->hu_lock);
  910. if (idev->hu)
  911. intel_lpm_resume(idev->hu);
  912. mutex_unlock(&idev->hu_lock);
  913. return 0;
  914. }
  915. #endif
  916. #ifdef CONFIG_PM_SLEEP
  917. static int intel_suspend(struct device *dev)
  918. {
  919. struct intel_device *idev = dev_get_drvdata(dev);
  920. if (device_may_wakeup(dev))
  921. enable_irq_wake(idev->irq);
  922. return intel_suspend_device(dev);
  923. }
  924. static int intel_resume(struct device *dev)
  925. {
  926. struct intel_device *idev = dev_get_drvdata(dev);
  927. if (device_may_wakeup(dev))
  928. disable_irq_wake(idev->irq);
  929. return intel_resume_device(dev);
  930. }
  931. #endif
  932. static const struct dev_pm_ops intel_pm_ops = {
  933. SET_SYSTEM_SLEEP_PM_OPS(intel_suspend, intel_resume)
  934. SET_RUNTIME_PM_OPS(intel_suspend_device, intel_resume_device, NULL)
  935. };
  936. static const struct acpi_gpio_params reset_gpios = { 0, 0, false };
  937. static const struct acpi_gpio_params host_wake_gpios = { 1, 0, false };
  938. static const struct acpi_gpio_mapping acpi_hci_intel_gpios[] = {
  939. { "reset-gpios", &reset_gpios, 1 },
  940. { "host-wake-gpios", &host_wake_gpios, 1 },
  941. { },
  942. };
  943. static int intel_probe(struct platform_device *pdev)
  944. {
  945. struct intel_device *idev;
  946. int ret;
  947. idev = devm_kzalloc(&pdev->dev, sizeof(*idev), GFP_KERNEL);
  948. if (!idev)
  949. return -ENOMEM;
  950. mutex_init(&idev->hu_lock);
  951. idev->pdev = pdev;
  952. ret = devm_acpi_dev_add_driver_gpios(&pdev->dev, acpi_hci_intel_gpios);
  953. if (ret)
  954. dev_dbg(&pdev->dev, "Unable to add GPIO mapping table\n");
  955. idev->reset = devm_gpiod_get(&pdev->dev, "reset", GPIOD_OUT_LOW);
  956. if (IS_ERR(idev->reset)) {
  957. dev_err(&pdev->dev, "Unable to retrieve gpio\n");
  958. return PTR_ERR(idev->reset);
  959. }
  960. idev->irq = platform_get_irq(pdev, 0);
  961. if (idev->irq < 0) {
  962. struct gpio_desc *host_wake;
  963. dev_err(&pdev->dev, "No IRQ, falling back to gpio-irq\n");
  964. host_wake = devm_gpiod_get(&pdev->dev, "host-wake", GPIOD_IN);
  965. if (IS_ERR(host_wake)) {
  966. dev_err(&pdev->dev, "Unable to retrieve IRQ\n");
  967. goto no_irq;
  968. }
  969. idev->irq = gpiod_to_irq(host_wake);
  970. if (idev->irq < 0) {
  971. dev_err(&pdev->dev, "No corresponding irq for gpio\n");
  972. goto no_irq;
  973. }
  974. }
  975. /* Only enable wake-up/irq when controller is powered */
  976. device_set_wakeup_capable(&pdev->dev, true);
  977. device_wakeup_disable(&pdev->dev);
  978. no_irq:
  979. platform_set_drvdata(pdev, idev);
  980. /* Place this instance on the device list */
  981. mutex_lock(&intel_device_list_lock);
  982. list_add_tail(&idev->list, &intel_device_list);
  983. mutex_unlock(&intel_device_list_lock);
  984. dev_info(&pdev->dev, "registered, gpio(%d)/irq(%d).\n",
  985. desc_to_gpio(idev->reset), idev->irq);
  986. return 0;
  987. }
  988. static int intel_remove(struct platform_device *pdev)
  989. {
  990. struct intel_device *idev = platform_get_drvdata(pdev);
  991. device_wakeup_disable(&pdev->dev);
  992. mutex_lock(&intel_device_list_lock);
  993. list_del(&idev->list);
  994. mutex_unlock(&intel_device_list_lock);
  995. dev_info(&pdev->dev, "unregistered.\n");
  996. return 0;
  997. }
  998. static struct platform_driver intel_driver = {
  999. .probe = intel_probe,
  1000. .remove = intel_remove,
  1001. .driver = {
  1002. .name = "hci_intel",
  1003. .acpi_match_table = ACPI_PTR(intel_acpi_match),
  1004. .pm = &intel_pm_ops,
  1005. },
  1006. };
  1007. int __init intel_init(void)
  1008. {
  1009. platform_driver_register(&intel_driver);
  1010. return hci_uart_register_proto(&intel_proto);
  1011. }
  1012. int __exit intel_deinit(void)
  1013. {
  1014. platform_driver_unregister(&intel_driver);
  1015. return hci_uart_unregister_proto(&intel_proto);
  1016. }