init_64.c 38 KB

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  1. /*
  2. * linux/arch/x86_64/mm/init.c
  3. *
  4. * Copyright (C) 1995 Linus Torvalds
  5. * Copyright (C) 2000 Pavel Machek <pavel@ucw.cz>
  6. * Copyright (C) 2002,2003 Andi Kleen <ak@suse.de>
  7. */
  8. #include <linux/signal.h>
  9. #include <linux/sched.h>
  10. #include <linux/kernel.h>
  11. #include <linux/errno.h>
  12. #include <linux/string.h>
  13. #include <linux/types.h>
  14. #include <linux/ptrace.h>
  15. #include <linux/mman.h>
  16. #include <linux/mm.h>
  17. #include <linux/swap.h>
  18. #include <linux/smp.h>
  19. #include <linux/init.h>
  20. #include <linux/initrd.h>
  21. #include <linux/pagemap.h>
  22. #include <linux/memblock.h>
  23. #include <linux/proc_fs.h>
  24. #include <linux/pci.h>
  25. #include <linux/pfn.h>
  26. #include <linux/poison.h>
  27. #include <linux/dma-mapping.h>
  28. #include <linux/memory.h>
  29. #include <linux/memory_hotplug.h>
  30. #include <linux/memremap.h>
  31. #include <linux/nmi.h>
  32. #include <linux/gfp.h>
  33. #include <linux/kcore.h>
  34. #include <asm/processor.h>
  35. #include <asm/bios_ebda.h>
  36. #include <linux/uaccess.h>
  37. #include <asm/pgtable.h>
  38. #include <asm/pgalloc.h>
  39. #include <asm/dma.h>
  40. #include <asm/fixmap.h>
  41. #include <asm/e820/api.h>
  42. #include <asm/apic.h>
  43. #include <asm/tlb.h>
  44. #include <asm/mmu_context.h>
  45. #include <asm/proto.h>
  46. #include <asm/smp.h>
  47. #include <asm/sections.h>
  48. #include <asm/kdebug.h>
  49. #include <asm/numa.h>
  50. #include <asm/set_memory.h>
  51. #include <asm/init.h>
  52. #include <asm/uv/uv.h>
  53. #include <asm/setup.h>
  54. #include "mm_internal.h"
  55. #include "ident_map.c"
  56. /*
  57. * NOTE: pagetable_init alloc all the fixmap pagetables contiguous on the
  58. * physical space so we can cache the place of the first one and move
  59. * around without checking the pgd every time.
  60. */
  61. /* Bits supported by the hardware: */
  62. pteval_t __supported_pte_mask __read_mostly = ~0;
  63. /* Bits allowed in normal kernel mappings: */
  64. pteval_t __default_kernel_pte_mask __read_mostly = ~0;
  65. EXPORT_SYMBOL_GPL(__supported_pte_mask);
  66. /* Used in PAGE_KERNEL_* macros which are reasonably used out-of-tree: */
  67. EXPORT_SYMBOL(__default_kernel_pte_mask);
  68. int force_personality32;
  69. /*
  70. * noexec32=on|off
  71. * Control non executable heap for 32bit processes.
  72. * To control the stack too use noexec=off
  73. *
  74. * on PROT_READ does not imply PROT_EXEC for 32-bit processes (default)
  75. * off PROT_READ implies PROT_EXEC
  76. */
  77. static int __init nonx32_setup(char *str)
  78. {
  79. if (!strcmp(str, "on"))
  80. force_personality32 &= ~READ_IMPLIES_EXEC;
  81. else if (!strcmp(str, "off"))
  82. force_personality32 |= READ_IMPLIES_EXEC;
  83. return 1;
  84. }
  85. __setup("noexec32=", nonx32_setup);
  86. static void sync_global_pgds_l5(unsigned long start, unsigned long end)
  87. {
  88. unsigned long addr;
  89. for (addr = start; addr <= end; addr = ALIGN(addr + 1, PGDIR_SIZE)) {
  90. const pgd_t *pgd_ref = pgd_offset_k(addr);
  91. struct page *page;
  92. /* Check for overflow */
  93. if (addr < start)
  94. break;
  95. if (pgd_none(*pgd_ref))
  96. continue;
  97. spin_lock(&pgd_lock);
  98. list_for_each_entry(page, &pgd_list, lru) {
  99. pgd_t *pgd;
  100. spinlock_t *pgt_lock;
  101. pgd = (pgd_t *)page_address(page) + pgd_index(addr);
  102. /* the pgt_lock only for Xen */
  103. pgt_lock = &pgd_page_get_mm(page)->page_table_lock;
  104. spin_lock(pgt_lock);
  105. if (!pgd_none(*pgd_ref) && !pgd_none(*pgd))
  106. BUG_ON(pgd_page_vaddr(*pgd) != pgd_page_vaddr(*pgd_ref));
  107. if (pgd_none(*pgd))
  108. set_pgd(pgd, *pgd_ref);
  109. spin_unlock(pgt_lock);
  110. }
  111. spin_unlock(&pgd_lock);
  112. }
  113. }
  114. static void sync_global_pgds_l4(unsigned long start, unsigned long end)
  115. {
  116. unsigned long addr;
  117. for (addr = start; addr <= end; addr = ALIGN(addr + 1, PGDIR_SIZE)) {
  118. pgd_t *pgd_ref = pgd_offset_k(addr);
  119. const p4d_t *p4d_ref;
  120. struct page *page;
  121. /*
  122. * With folded p4d, pgd_none() is always false, we need to
  123. * handle synchonization on p4d level.
  124. */
  125. MAYBE_BUILD_BUG_ON(pgd_none(*pgd_ref));
  126. p4d_ref = p4d_offset(pgd_ref, addr);
  127. if (p4d_none(*p4d_ref))
  128. continue;
  129. spin_lock(&pgd_lock);
  130. list_for_each_entry(page, &pgd_list, lru) {
  131. pgd_t *pgd;
  132. p4d_t *p4d;
  133. spinlock_t *pgt_lock;
  134. pgd = (pgd_t *)page_address(page) + pgd_index(addr);
  135. p4d = p4d_offset(pgd, addr);
  136. /* the pgt_lock only for Xen */
  137. pgt_lock = &pgd_page_get_mm(page)->page_table_lock;
  138. spin_lock(pgt_lock);
  139. if (!p4d_none(*p4d_ref) && !p4d_none(*p4d))
  140. BUG_ON(p4d_page_vaddr(*p4d)
  141. != p4d_page_vaddr(*p4d_ref));
  142. if (p4d_none(*p4d))
  143. set_p4d(p4d, *p4d_ref);
  144. spin_unlock(pgt_lock);
  145. }
  146. spin_unlock(&pgd_lock);
  147. }
  148. }
  149. /*
  150. * When memory was added make sure all the processes MM have
  151. * suitable PGD entries in the local PGD level page.
  152. */
  153. void sync_global_pgds(unsigned long start, unsigned long end)
  154. {
  155. if (pgtable_l5_enabled())
  156. sync_global_pgds_l5(start, end);
  157. else
  158. sync_global_pgds_l4(start, end);
  159. }
  160. /*
  161. * NOTE: This function is marked __ref because it calls __init function
  162. * (alloc_bootmem_pages). It's safe to do it ONLY when after_bootmem == 0.
  163. */
  164. static __ref void *spp_getpage(void)
  165. {
  166. void *ptr;
  167. if (after_bootmem)
  168. ptr = (void *) get_zeroed_page(GFP_ATOMIC);
  169. else
  170. ptr = memblock_alloc(PAGE_SIZE, PAGE_SIZE);
  171. if (!ptr || ((unsigned long)ptr & ~PAGE_MASK)) {
  172. panic("set_pte_phys: cannot allocate page data %s\n",
  173. after_bootmem ? "after bootmem" : "");
  174. }
  175. pr_debug("spp_getpage %p\n", ptr);
  176. return ptr;
  177. }
  178. static p4d_t *fill_p4d(pgd_t *pgd, unsigned long vaddr)
  179. {
  180. if (pgd_none(*pgd)) {
  181. p4d_t *p4d = (p4d_t *)spp_getpage();
  182. pgd_populate(&init_mm, pgd, p4d);
  183. if (p4d != p4d_offset(pgd, 0))
  184. printk(KERN_ERR "PAGETABLE BUG #00! %p <-> %p\n",
  185. p4d, p4d_offset(pgd, 0));
  186. }
  187. return p4d_offset(pgd, vaddr);
  188. }
  189. static pud_t *fill_pud(p4d_t *p4d, unsigned long vaddr)
  190. {
  191. if (p4d_none(*p4d)) {
  192. pud_t *pud = (pud_t *)spp_getpage();
  193. p4d_populate(&init_mm, p4d, pud);
  194. if (pud != pud_offset(p4d, 0))
  195. printk(KERN_ERR "PAGETABLE BUG #01! %p <-> %p\n",
  196. pud, pud_offset(p4d, 0));
  197. }
  198. return pud_offset(p4d, vaddr);
  199. }
  200. static pmd_t *fill_pmd(pud_t *pud, unsigned long vaddr)
  201. {
  202. if (pud_none(*pud)) {
  203. pmd_t *pmd = (pmd_t *) spp_getpage();
  204. pud_populate(&init_mm, pud, pmd);
  205. if (pmd != pmd_offset(pud, 0))
  206. printk(KERN_ERR "PAGETABLE BUG #02! %p <-> %p\n",
  207. pmd, pmd_offset(pud, 0));
  208. }
  209. return pmd_offset(pud, vaddr);
  210. }
  211. static pte_t *fill_pte(pmd_t *pmd, unsigned long vaddr)
  212. {
  213. if (pmd_none(*pmd)) {
  214. pte_t *pte = (pte_t *) spp_getpage();
  215. pmd_populate_kernel(&init_mm, pmd, pte);
  216. if (pte != pte_offset_kernel(pmd, 0))
  217. printk(KERN_ERR "PAGETABLE BUG #03!\n");
  218. }
  219. return pte_offset_kernel(pmd, vaddr);
  220. }
  221. static void __set_pte_vaddr(pud_t *pud, unsigned long vaddr, pte_t new_pte)
  222. {
  223. pmd_t *pmd = fill_pmd(pud, vaddr);
  224. pte_t *pte = fill_pte(pmd, vaddr);
  225. set_pte(pte, new_pte);
  226. /*
  227. * It's enough to flush this one mapping.
  228. * (PGE mappings get flushed as well)
  229. */
  230. __flush_tlb_one_kernel(vaddr);
  231. }
  232. void set_pte_vaddr_p4d(p4d_t *p4d_page, unsigned long vaddr, pte_t new_pte)
  233. {
  234. p4d_t *p4d = p4d_page + p4d_index(vaddr);
  235. pud_t *pud = fill_pud(p4d, vaddr);
  236. __set_pte_vaddr(pud, vaddr, new_pte);
  237. }
  238. void set_pte_vaddr_pud(pud_t *pud_page, unsigned long vaddr, pte_t new_pte)
  239. {
  240. pud_t *pud = pud_page + pud_index(vaddr);
  241. __set_pte_vaddr(pud, vaddr, new_pte);
  242. }
  243. void set_pte_vaddr(unsigned long vaddr, pte_t pteval)
  244. {
  245. pgd_t *pgd;
  246. p4d_t *p4d_page;
  247. pr_debug("set_pte_vaddr %lx to %lx\n", vaddr, native_pte_val(pteval));
  248. pgd = pgd_offset_k(vaddr);
  249. if (pgd_none(*pgd)) {
  250. printk(KERN_ERR
  251. "PGD FIXMAP MISSING, it should be setup in head.S!\n");
  252. return;
  253. }
  254. p4d_page = p4d_offset(pgd, 0);
  255. set_pte_vaddr_p4d(p4d_page, vaddr, pteval);
  256. }
  257. pmd_t * __init populate_extra_pmd(unsigned long vaddr)
  258. {
  259. pgd_t *pgd;
  260. p4d_t *p4d;
  261. pud_t *pud;
  262. pgd = pgd_offset_k(vaddr);
  263. p4d = fill_p4d(pgd, vaddr);
  264. pud = fill_pud(p4d, vaddr);
  265. return fill_pmd(pud, vaddr);
  266. }
  267. pte_t * __init populate_extra_pte(unsigned long vaddr)
  268. {
  269. pmd_t *pmd;
  270. pmd = populate_extra_pmd(vaddr);
  271. return fill_pte(pmd, vaddr);
  272. }
  273. /*
  274. * Create large page table mappings for a range of physical addresses.
  275. */
  276. static void __init __init_extra_mapping(unsigned long phys, unsigned long size,
  277. enum page_cache_mode cache)
  278. {
  279. pgd_t *pgd;
  280. p4d_t *p4d;
  281. pud_t *pud;
  282. pmd_t *pmd;
  283. pgprot_t prot;
  284. pgprot_val(prot) = pgprot_val(PAGE_KERNEL_LARGE) |
  285. pgprot_val(pgprot_4k_2_large(cachemode2pgprot(cache)));
  286. BUG_ON((phys & ~PMD_MASK) || (size & ~PMD_MASK));
  287. for (; size; phys += PMD_SIZE, size -= PMD_SIZE) {
  288. pgd = pgd_offset_k((unsigned long)__va(phys));
  289. if (pgd_none(*pgd)) {
  290. p4d = (p4d_t *) spp_getpage();
  291. set_pgd(pgd, __pgd(__pa(p4d) | _KERNPG_TABLE |
  292. _PAGE_USER));
  293. }
  294. p4d = p4d_offset(pgd, (unsigned long)__va(phys));
  295. if (p4d_none(*p4d)) {
  296. pud = (pud_t *) spp_getpage();
  297. set_p4d(p4d, __p4d(__pa(pud) | _KERNPG_TABLE |
  298. _PAGE_USER));
  299. }
  300. pud = pud_offset(p4d, (unsigned long)__va(phys));
  301. if (pud_none(*pud)) {
  302. pmd = (pmd_t *) spp_getpage();
  303. set_pud(pud, __pud(__pa(pmd) | _KERNPG_TABLE |
  304. _PAGE_USER));
  305. }
  306. pmd = pmd_offset(pud, phys);
  307. BUG_ON(!pmd_none(*pmd));
  308. set_pmd(pmd, __pmd(phys | pgprot_val(prot)));
  309. }
  310. }
  311. void __init init_extra_mapping_wb(unsigned long phys, unsigned long size)
  312. {
  313. __init_extra_mapping(phys, size, _PAGE_CACHE_MODE_WB);
  314. }
  315. void __init init_extra_mapping_uc(unsigned long phys, unsigned long size)
  316. {
  317. __init_extra_mapping(phys, size, _PAGE_CACHE_MODE_UC);
  318. }
  319. /*
  320. * The head.S code sets up the kernel high mapping:
  321. *
  322. * from __START_KERNEL_map to __START_KERNEL_map + size (== _end-_text)
  323. *
  324. * phys_base holds the negative offset to the kernel, which is added
  325. * to the compile time generated pmds. This results in invalid pmds up
  326. * to the point where we hit the physaddr 0 mapping.
  327. *
  328. * We limit the mappings to the region from _text to _brk_end. _brk_end
  329. * is rounded up to the 2MB boundary. This catches the invalid pmds as
  330. * well, as they are located before _text:
  331. */
  332. void __init cleanup_highmap(void)
  333. {
  334. unsigned long vaddr = __START_KERNEL_map;
  335. unsigned long vaddr_end = __START_KERNEL_map + KERNEL_IMAGE_SIZE;
  336. unsigned long end = roundup((unsigned long)_brk_end, PMD_SIZE) - 1;
  337. pmd_t *pmd = level2_kernel_pgt;
  338. /*
  339. * Native path, max_pfn_mapped is not set yet.
  340. * Xen has valid max_pfn_mapped set in
  341. * arch/x86/xen/mmu.c:xen_setup_kernel_pagetable().
  342. */
  343. if (max_pfn_mapped)
  344. vaddr_end = __START_KERNEL_map + (max_pfn_mapped << PAGE_SHIFT);
  345. for (; vaddr + PMD_SIZE - 1 < vaddr_end; pmd++, vaddr += PMD_SIZE) {
  346. if (pmd_none(*pmd))
  347. continue;
  348. if (vaddr < (unsigned long) _text || vaddr > end)
  349. set_pmd(pmd, __pmd(0));
  350. }
  351. }
  352. /*
  353. * Create PTE level page table mapping for physical addresses.
  354. * It returns the last physical address mapped.
  355. */
  356. static unsigned long __meminit
  357. phys_pte_init(pte_t *pte_page, unsigned long paddr, unsigned long paddr_end,
  358. pgprot_t prot)
  359. {
  360. unsigned long pages = 0, paddr_next;
  361. unsigned long paddr_last = paddr_end;
  362. pte_t *pte;
  363. int i;
  364. pte = pte_page + pte_index(paddr);
  365. i = pte_index(paddr);
  366. for (; i < PTRS_PER_PTE; i++, paddr = paddr_next, pte++) {
  367. paddr_next = (paddr & PAGE_MASK) + PAGE_SIZE;
  368. if (paddr >= paddr_end) {
  369. if (!after_bootmem &&
  370. !e820__mapped_any(paddr & PAGE_MASK, paddr_next,
  371. E820_TYPE_RAM) &&
  372. !e820__mapped_any(paddr & PAGE_MASK, paddr_next,
  373. E820_TYPE_RESERVED_KERN))
  374. set_pte(pte, __pte(0));
  375. continue;
  376. }
  377. /*
  378. * We will re-use the existing mapping.
  379. * Xen for example has some special requirements, like mapping
  380. * pagetable pages as RO. So assume someone who pre-setup
  381. * these mappings are more intelligent.
  382. */
  383. if (!pte_none(*pte)) {
  384. if (!after_bootmem)
  385. pages++;
  386. continue;
  387. }
  388. if (0)
  389. pr_info(" pte=%p addr=%lx pte=%016lx\n", pte, paddr,
  390. pfn_pte(paddr >> PAGE_SHIFT, PAGE_KERNEL).pte);
  391. pages++;
  392. set_pte(pte, pfn_pte(paddr >> PAGE_SHIFT, prot));
  393. paddr_last = (paddr & PAGE_MASK) + PAGE_SIZE;
  394. }
  395. update_page_count(PG_LEVEL_4K, pages);
  396. return paddr_last;
  397. }
  398. /*
  399. * Create PMD level page table mapping for physical addresses. The virtual
  400. * and physical address have to be aligned at this level.
  401. * It returns the last physical address mapped.
  402. */
  403. static unsigned long __meminit
  404. phys_pmd_init(pmd_t *pmd_page, unsigned long paddr, unsigned long paddr_end,
  405. unsigned long page_size_mask, pgprot_t prot)
  406. {
  407. unsigned long pages = 0, paddr_next;
  408. unsigned long paddr_last = paddr_end;
  409. int i = pmd_index(paddr);
  410. for (; i < PTRS_PER_PMD; i++, paddr = paddr_next) {
  411. pmd_t *pmd = pmd_page + pmd_index(paddr);
  412. pte_t *pte;
  413. pgprot_t new_prot = prot;
  414. paddr_next = (paddr & PMD_MASK) + PMD_SIZE;
  415. if (paddr >= paddr_end) {
  416. if (!after_bootmem &&
  417. !e820__mapped_any(paddr & PMD_MASK, paddr_next,
  418. E820_TYPE_RAM) &&
  419. !e820__mapped_any(paddr & PMD_MASK, paddr_next,
  420. E820_TYPE_RESERVED_KERN))
  421. set_pmd(pmd, __pmd(0));
  422. continue;
  423. }
  424. if (!pmd_none(*pmd)) {
  425. if (!pmd_large(*pmd)) {
  426. spin_lock(&init_mm.page_table_lock);
  427. pte = (pte_t *)pmd_page_vaddr(*pmd);
  428. paddr_last = phys_pte_init(pte, paddr,
  429. paddr_end, prot);
  430. spin_unlock(&init_mm.page_table_lock);
  431. continue;
  432. }
  433. /*
  434. * If we are ok with PG_LEVEL_2M mapping, then we will
  435. * use the existing mapping,
  436. *
  437. * Otherwise, we will split the large page mapping but
  438. * use the same existing protection bits except for
  439. * large page, so that we don't violate Intel's TLB
  440. * Application note (317080) which says, while changing
  441. * the page sizes, new and old translations should
  442. * not differ with respect to page frame and
  443. * attributes.
  444. */
  445. if (page_size_mask & (1 << PG_LEVEL_2M)) {
  446. if (!after_bootmem)
  447. pages++;
  448. paddr_last = paddr_next;
  449. continue;
  450. }
  451. new_prot = pte_pgprot(pte_clrhuge(*(pte_t *)pmd));
  452. }
  453. if (page_size_mask & (1<<PG_LEVEL_2M)) {
  454. pages++;
  455. spin_lock(&init_mm.page_table_lock);
  456. set_pte((pte_t *)pmd,
  457. pfn_pte((paddr & PMD_MASK) >> PAGE_SHIFT,
  458. __pgprot(pgprot_val(prot) | _PAGE_PSE)));
  459. spin_unlock(&init_mm.page_table_lock);
  460. paddr_last = paddr_next;
  461. continue;
  462. }
  463. pte = alloc_low_page();
  464. paddr_last = phys_pte_init(pte, paddr, paddr_end, new_prot);
  465. spin_lock(&init_mm.page_table_lock);
  466. pmd_populate_kernel(&init_mm, pmd, pte);
  467. spin_unlock(&init_mm.page_table_lock);
  468. }
  469. update_page_count(PG_LEVEL_2M, pages);
  470. return paddr_last;
  471. }
  472. /*
  473. * Create PUD level page table mapping for physical addresses. The virtual
  474. * and physical address do not have to be aligned at this level. KASLR can
  475. * randomize virtual addresses up to this level.
  476. * It returns the last physical address mapped.
  477. */
  478. static unsigned long __meminit
  479. phys_pud_init(pud_t *pud_page, unsigned long paddr, unsigned long paddr_end,
  480. unsigned long page_size_mask)
  481. {
  482. unsigned long pages = 0, paddr_next;
  483. unsigned long paddr_last = paddr_end;
  484. unsigned long vaddr = (unsigned long)__va(paddr);
  485. int i = pud_index(vaddr);
  486. for (; i < PTRS_PER_PUD; i++, paddr = paddr_next) {
  487. pud_t *pud;
  488. pmd_t *pmd;
  489. pgprot_t prot = PAGE_KERNEL;
  490. vaddr = (unsigned long)__va(paddr);
  491. pud = pud_page + pud_index(vaddr);
  492. paddr_next = (paddr & PUD_MASK) + PUD_SIZE;
  493. if (paddr >= paddr_end) {
  494. if (!after_bootmem &&
  495. !e820__mapped_any(paddr & PUD_MASK, paddr_next,
  496. E820_TYPE_RAM) &&
  497. !e820__mapped_any(paddr & PUD_MASK, paddr_next,
  498. E820_TYPE_RESERVED_KERN))
  499. set_pud(pud, __pud(0));
  500. continue;
  501. }
  502. if (!pud_none(*pud)) {
  503. if (!pud_large(*pud)) {
  504. pmd = pmd_offset(pud, 0);
  505. paddr_last = phys_pmd_init(pmd, paddr,
  506. paddr_end,
  507. page_size_mask,
  508. prot);
  509. __flush_tlb_all();
  510. continue;
  511. }
  512. /*
  513. * If we are ok with PG_LEVEL_1G mapping, then we will
  514. * use the existing mapping.
  515. *
  516. * Otherwise, we will split the gbpage mapping but use
  517. * the same existing protection bits except for large
  518. * page, so that we don't violate Intel's TLB
  519. * Application note (317080) which says, while changing
  520. * the page sizes, new and old translations should
  521. * not differ with respect to page frame and
  522. * attributes.
  523. */
  524. if (page_size_mask & (1 << PG_LEVEL_1G)) {
  525. if (!after_bootmem)
  526. pages++;
  527. paddr_last = paddr_next;
  528. continue;
  529. }
  530. prot = pte_pgprot(pte_clrhuge(*(pte_t *)pud));
  531. }
  532. if (page_size_mask & (1<<PG_LEVEL_1G)) {
  533. pages++;
  534. spin_lock(&init_mm.page_table_lock);
  535. set_pte((pte_t *)pud,
  536. pfn_pte((paddr & PUD_MASK) >> PAGE_SHIFT,
  537. PAGE_KERNEL_LARGE));
  538. spin_unlock(&init_mm.page_table_lock);
  539. paddr_last = paddr_next;
  540. continue;
  541. }
  542. pmd = alloc_low_page();
  543. paddr_last = phys_pmd_init(pmd, paddr, paddr_end,
  544. page_size_mask, prot);
  545. spin_lock(&init_mm.page_table_lock);
  546. pud_populate(&init_mm, pud, pmd);
  547. spin_unlock(&init_mm.page_table_lock);
  548. }
  549. __flush_tlb_all();
  550. update_page_count(PG_LEVEL_1G, pages);
  551. return paddr_last;
  552. }
  553. static unsigned long __meminit
  554. phys_p4d_init(p4d_t *p4d_page, unsigned long paddr, unsigned long paddr_end,
  555. unsigned long page_size_mask)
  556. {
  557. unsigned long paddr_next, paddr_last = paddr_end;
  558. unsigned long vaddr = (unsigned long)__va(paddr);
  559. int i = p4d_index(vaddr);
  560. if (!pgtable_l5_enabled())
  561. return phys_pud_init((pud_t *) p4d_page, paddr, paddr_end, page_size_mask);
  562. for (; i < PTRS_PER_P4D; i++, paddr = paddr_next) {
  563. p4d_t *p4d;
  564. pud_t *pud;
  565. vaddr = (unsigned long)__va(paddr);
  566. p4d = p4d_page + p4d_index(vaddr);
  567. paddr_next = (paddr & P4D_MASK) + P4D_SIZE;
  568. if (paddr >= paddr_end) {
  569. if (!after_bootmem &&
  570. !e820__mapped_any(paddr & P4D_MASK, paddr_next,
  571. E820_TYPE_RAM) &&
  572. !e820__mapped_any(paddr & P4D_MASK, paddr_next,
  573. E820_TYPE_RESERVED_KERN))
  574. set_p4d(p4d, __p4d(0));
  575. continue;
  576. }
  577. if (!p4d_none(*p4d)) {
  578. pud = pud_offset(p4d, 0);
  579. paddr_last = phys_pud_init(pud, paddr,
  580. paddr_end,
  581. page_size_mask);
  582. __flush_tlb_all();
  583. continue;
  584. }
  585. pud = alloc_low_page();
  586. paddr_last = phys_pud_init(pud, paddr, paddr_end,
  587. page_size_mask);
  588. spin_lock(&init_mm.page_table_lock);
  589. p4d_populate(&init_mm, p4d, pud);
  590. spin_unlock(&init_mm.page_table_lock);
  591. }
  592. __flush_tlb_all();
  593. return paddr_last;
  594. }
  595. /*
  596. * Create page table mapping for the physical memory for specific physical
  597. * addresses. The virtual and physical addresses have to be aligned on PMD level
  598. * down. It returns the last physical address mapped.
  599. */
  600. unsigned long __meminit
  601. kernel_physical_mapping_init(unsigned long paddr_start,
  602. unsigned long paddr_end,
  603. unsigned long page_size_mask)
  604. {
  605. bool pgd_changed = false;
  606. unsigned long vaddr, vaddr_start, vaddr_end, vaddr_next, paddr_last;
  607. paddr_last = paddr_end;
  608. vaddr = (unsigned long)__va(paddr_start);
  609. vaddr_end = (unsigned long)__va(paddr_end);
  610. vaddr_start = vaddr;
  611. for (; vaddr < vaddr_end; vaddr = vaddr_next) {
  612. pgd_t *pgd = pgd_offset_k(vaddr);
  613. p4d_t *p4d;
  614. vaddr_next = (vaddr & PGDIR_MASK) + PGDIR_SIZE;
  615. if (pgd_val(*pgd)) {
  616. p4d = (p4d_t *)pgd_page_vaddr(*pgd);
  617. paddr_last = phys_p4d_init(p4d, __pa(vaddr),
  618. __pa(vaddr_end),
  619. page_size_mask);
  620. continue;
  621. }
  622. p4d = alloc_low_page();
  623. paddr_last = phys_p4d_init(p4d, __pa(vaddr), __pa(vaddr_end),
  624. page_size_mask);
  625. spin_lock(&init_mm.page_table_lock);
  626. if (pgtable_l5_enabled())
  627. pgd_populate(&init_mm, pgd, p4d);
  628. else
  629. p4d_populate(&init_mm, p4d_offset(pgd, vaddr), (pud_t *) p4d);
  630. spin_unlock(&init_mm.page_table_lock);
  631. pgd_changed = true;
  632. }
  633. if (pgd_changed)
  634. sync_global_pgds(vaddr_start, vaddr_end - 1);
  635. __flush_tlb_all();
  636. return paddr_last;
  637. }
  638. #ifndef CONFIG_NUMA
  639. void __init initmem_init(void)
  640. {
  641. memblock_set_node(0, PHYS_ADDR_MAX, &memblock.memory, 0);
  642. }
  643. #endif
  644. void __init paging_init(void)
  645. {
  646. sparse_memory_present_with_active_regions(MAX_NUMNODES);
  647. sparse_init();
  648. /*
  649. * clear the default setting with node 0
  650. * note: don't use nodes_clear here, that is really clearing when
  651. * numa support is not compiled in, and later node_set_state
  652. * will not set it back.
  653. */
  654. node_clear_state(0, N_MEMORY);
  655. if (N_MEMORY != N_NORMAL_MEMORY)
  656. node_clear_state(0, N_NORMAL_MEMORY);
  657. zone_sizes_init();
  658. }
  659. /*
  660. * Memory hotplug specific functions
  661. */
  662. #ifdef CONFIG_MEMORY_HOTPLUG
  663. /*
  664. * After memory hotplug the variables max_pfn, max_low_pfn and high_memory need
  665. * updating.
  666. */
  667. static void update_end_of_memory_vars(u64 start, u64 size)
  668. {
  669. unsigned long end_pfn = PFN_UP(start + size);
  670. if (end_pfn > max_pfn) {
  671. max_pfn = end_pfn;
  672. max_low_pfn = end_pfn;
  673. high_memory = (void *)__va(max_pfn * PAGE_SIZE - 1) + 1;
  674. }
  675. }
  676. int add_pages(int nid, unsigned long start_pfn, unsigned long nr_pages,
  677. struct vmem_altmap *altmap, bool want_memblock)
  678. {
  679. int ret;
  680. ret = __add_pages(nid, start_pfn, nr_pages, altmap, want_memblock);
  681. WARN_ON_ONCE(ret);
  682. /* update max_pfn, max_low_pfn and high_memory */
  683. update_end_of_memory_vars(start_pfn << PAGE_SHIFT,
  684. nr_pages << PAGE_SHIFT);
  685. return ret;
  686. }
  687. int arch_add_memory(int nid, u64 start, u64 size, struct vmem_altmap *altmap,
  688. bool want_memblock)
  689. {
  690. unsigned long start_pfn = start >> PAGE_SHIFT;
  691. unsigned long nr_pages = size >> PAGE_SHIFT;
  692. init_memory_mapping(start, start + size);
  693. return add_pages(nid, start_pfn, nr_pages, altmap, want_memblock);
  694. }
  695. #define PAGE_INUSE 0xFD
  696. static void __meminit free_pagetable(struct page *page, int order)
  697. {
  698. unsigned long magic;
  699. unsigned int nr_pages = 1 << order;
  700. /* bootmem page has reserved flag */
  701. if (PageReserved(page)) {
  702. __ClearPageReserved(page);
  703. magic = (unsigned long)page->freelist;
  704. if (magic == SECTION_INFO || magic == MIX_SECTION_INFO) {
  705. while (nr_pages--)
  706. put_page_bootmem(page++);
  707. } else
  708. while (nr_pages--)
  709. free_reserved_page(page++);
  710. } else
  711. free_pages((unsigned long)page_address(page), order);
  712. }
  713. static void __meminit free_hugepage_table(struct page *page,
  714. struct vmem_altmap *altmap)
  715. {
  716. if (altmap)
  717. vmem_altmap_free(altmap, PMD_SIZE / PAGE_SIZE);
  718. else
  719. free_pagetable(page, get_order(PMD_SIZE));
  720. }
  721. static void __meminit free_pte_table(pte_t *pte_start, pmd_t *pmd)
  722. {
  723. pte_t *pte;
  724. int i;
  725. for (i = 0; i < PTRS_PER_PTE; i++) {
  726. pte = pte_start + i;
  727. if (!pte_none(*pte))
  728. return;
  729. }
  730. /* free a pte talbe */
  731. free_pagetable(pmd_page(*pmd), 0);
  732. spin_lock(&init_mm.page_table_lock);
  733. pmd_clear(pmd);
  734. spin_unlock(&init_mm.page_table_lock);
  735. }
  736. static void __meminit free_pmd_table(pmd_t *pmd_start, pud_t *pud)
  737. {
  738. pmd_t *pmd;
  739. int i;
  740. for (i = 0; i < PTRS_PER_PMD; i++) {
  741. pmd = pmd_start + i;
  742. if (!pmd_none(*pmd))
  743. return;
  744. }
  745. /* free a pmd talbe */
  746. free_pagetable(pud_page(*pud), 0);
  747. spin_lock(&init_mm.page_table_lock);
  748. pud_clear(pud);
  749. spin_unlock(&init_mm.page_table_lock);
  750. }
  751. static void __meminit free_pud_table(pud_t *pud_start, p4d_t *p4d)
  752. {
  753. pud_t *pud;
  754. int i;
  755. for (i = 0; i < PTRS_PER_PUD; i++) {
  756. pud = pud_start + i;
  757. if (!pud_none(*pud))
  758. return;
  759. }
  760. /* free a pud talbe */
  761. free_pagetable(p4d_page(*p4d), 0);
  762. spin_lock(&init_mm.page_table_lock);
  763. p4d_clear(p4d);
  764. spin_unlock(&init_mm.page_table_lock);
  765. }
  766. static void __meminit
  767. remove_pte_table(pte_t *pte_start, unsigned long addr, unsigned long end,
  768. bool direct)
  769. {
  770. unsigned long next, pages = 0;
  771. pte_t *pte;
  772. void *page_addr;
  773. phys_addr_t phys_addr;
  774. pte = pte_start + pte_index(addr);
  775. for (; addr < end; addr = next, pte++) {
  776. next = (addr + PAGE_SIZE) & PAGE_MASK;
  777. if (next > end)
  778. next = end;
  779. if (!pte_present(*pte))
  780. continue;
  781. /*
  782. * We mapped [0,1G) memory as identity mapping when
  783. * initializing, in arch/x86/kernel/head_64.S. These
  784. * pagetables cannot be removed.
  785. */
  786. phys_addr = pte_val(*pte) + (addr & PAGE_MASK);
  787. if (phys_addr < (phys_addr_t)0x40000000)
  788. return;
  789. if (PAGE_ALIGNED(addr) && PAGE_ALIGNED(next)) {
  790. /*
  791. * Do not free direct mapping pages since they were
  792. * freed when offlining, or simplely not in use.
  793. */
  794. if (!direct)
  795. free_pagetable(pte_page(*pte), 0);
  796. spin_lock(&init_mm.page_table_lock);
  797. pte_clear(&init_mm, addr, pte);
  798. spin_unlock(&init_mm.page_table_lock);
  799. /* For non-direct mapping, pages means nothing. */
  800. pages++;
  801. } else {
  802. /*
  803. * If we are here, we are freeing vmemmap pages since
  804. * direct mapped memory ranges to be freed are aligned.
  805. *
  806. * If we are not removing the whole page, it means
  807. * other page structs in this page are being used and
  808. * we canot remove them. So fill the unused page_structs
  809. * with 0xFD, and remove the page when it is wholly
  810. * filled with 0xFD.
  811. */
  812. memset((void *)addr, PAGE_INUSE, next - addr);
  813. page_addr = page_address(pte_page(*pte));
  814. if (!memchr_inv(page_addr, PAGE_INUSE, PAGE_SIZE)) {
  815. free_pagetable(pte_page(*pte), 0);
  816. spin_lock(&init_mm.page_table_lock);
  817. pte_clear(&init_mm, addr, pte);
  818. spin_unlock(&init_mm.page_table_lock);
  819. }
  820. }
  821. }
  822. /* Call free_pte_table() in remove_pmd_table(). */
  823. flush_tlb_all();
  824. if (direct)
  825. update_page_count(PG_LEVEL_4K, -pages);
  826. }
  827. static void __meminit
  828. remove_pmd_table(pmd_t *pmd_start, unsigned long addr, unsigned long end,
  829. bool direct, struct vmem_altmap *altmap)
  830. {
  831. unsigned long next, pages = 0;
  832. pte_t *pte_base;
  833. pmd_t *pmd;
  834. void *page_addr;
  835. pmd = pmd_start + pmd_index(addr);
  836. for (; addr < end; addr = next, pmd++) {
  837. next = pmd_addr_end(addr, end);
  838. if (!pmd_present(*pmd))
  839. continue;
  840. if (pmd_large(*pmd)) {
  841. if (IS_ALIGNED(addr, PMD_SIZE) &&
  842. IS_ALIGNED(next, PMD_SIZE)) {
  843. if (!direct)
  844. free_hugepage_table(pmd_page(*pmd),
  845. altmap);
  846. spin_lock(&init_mm.page_table_lock);
  847. pmd_clear(pmd);
  848. spin_unlock(&init_mm.page_table_lock);
  849. pages++;
  850. } else {
  851. /* If here, we are freeing vmemmap pages. */
  852. memset((void *)addr, PAGE_INUSE, next - addr);
  853. page_addr = page_address(pmd_page(*pmd));
  854. if (!memchr_inv(page_addr, PAGE_INUSE,
  855. PMD_SIZE)) {
  856. free_hugepage_table(pmd_page(*pmd),
  857. altmap);
  858. spin_lock(&init_mm.page_table_lock);
  859. pmd_clear(pmd);
  860. spin_unlock(&init_mm.page_table_lock);
  861. }
  862. }
  863. continue;
  864. }
  865. pte_base = (pte_t *)pmd_page_vaddr(*pmd);
  866. remove_pte_table(pte_base, addr, next, direct);
  867. free_pte_table(pte_base, pmd);
  868. }
  869. /* Call free_pmd_table() in remove_pud_table(). */
  870. if (direct)
  871. update_page_count(PG_LEVEL_2M, -pages);
  872. }
  873. static void __meminit
  874. remove_pud_table(pud_t *pud_start, unsigned long addr, unsigned long end,
  875. struct vmem_altmap *altmap, bool direct)
  876. {
  877. unsigned long next, pages = 0;
  878. pmd_t *pmd_base;
  879. pud_t *pud;
  880. void *page_addr;
  881. pud = pud_start + pud_index(addr);
  882. for (; addr < end; addr = next, pud++) {
  883. next = pud_addr_end(addr, end);
  884. if (!pud_present(*pud))
  885. continue;
  886. if (pud_large(*pud)) {
  887. if (IS_ALIGNED(addr, PUD_SIZE) &&
  888. IS_ALIGNED(next, PUD_SIZE)) {
  889. if (!direct)
  890. free_pagetable(pud_page(*pud),
  891. get_order(PUD_SIZE));
  892. spin_lock(&init_mm.page_table_lock);
  893. pud_clear(pud);
  894. spin_unlock(&init_mm.page_table_lock);
  895. pages++;
  896. } else {
  897. /* If here, we are freeing vmemmap pages. */
  898. memset((void *)addr, PAGE_INUSE, next - addr);
  899. page_addr = page_address(pud_page(*pud));
  900. if (!memchr_inv(page_addr, PAGE_INUSE,
  901. PUD_SIZE)) {
  902. free_pagetable(pud_page(*pud),
  903. get_order(PUD_SIZE));
  904. spin_lock(&init_mm.page_table_lock);
  905. pud_clear(pud);
  906. spin_unlock(&init_mm.page_table_lock);
  907. }
  908. }
  909. continue;
  910. }
  911. pmd_base = pmd_offset(pud, 0);
  912. remove_pmd_table(pmd_base, addr, next, direct, altmap);
  913. free_pmd_table(pmd_base, pud);
  914. }
  915. if (direct)
  916. update_page_count(PG_LEVEL_1G, -pages);
  917. }
  918. static void __meminit
  919. remove_p4d_table(p4d_t *p4d_start, unsigned long addr, unsigned long end,
  920. struct vmem_altmap *altmap, bool direct)
  921. {
  922. unsigned long next, pages = 0;
  923. pud_t *pud_base;
  924. p4d_t *p4d;
  925. p4d = p4d_start + p4d_index(addr);
  926. for (; addr < end; addr = next, p4d++) {
  927. next = p4d_addr_end(addr, end);
  928. if (!p4d_present(*p4d))
  929. continue;
  930. BUILD_BUG_ON(p4d_large(*p4d));
  931. pud_base = pud_offset(p4d, 0);
  932. remove_pud_table(pud_base, addr, next, altmap, direct);
  933. /*
  934. * For 4-level page tables we do not want to free PUDs, but in the
  935. * 5-level case we should free them. This code will have to change
  936. * to adapt for boot-time switching between 4 and 5 level page tables.
  937. */
  938. if (pgtable_l5_enabled())
  939. free_pud_table(pud_base, p4d);
  940. }
  941. if (direct)
  942. update_page_count(PG_LEVEL_512G, -pages);
  943. }
  944. /* start and end are both virtual address. */
  945. static void __meminit
  946. remove_pagetable(unsigned long start, unsigned long end, bool direct,
  947. struct vmem_altmap *altmap)
  948. {
  949. unsigned long next;
  950. unsigned long addr;
  951. pgd_t *pgd;
  952. p4d_t *p4d;
  953. for (addr = start; addr < end; addr = next) {
  954. next = pgd_addr_end(addr, end);
  955. pgd = pgd_offset_k(addr);
  956. if (!pgd_present(*pgd))
  957. continue;
  958. p4d = p4d_offset(pgd, 0);
  959. remove_p4d_table(p4d, addr, next, altmap, direct);
  960. }
  961. flush_tlb_all();
  962. }
  963. void __ref vmemmap_free(unsigned long start, unsigned long end,
  964. struct vmem_altmap *altmap)
  965. {
  966. remove_pagetable(start, end, false, altmap);
  967. }
  968. #ifdef CONFIG_MEMORY_HOTREMOVE
  969. static void __meminit
  970. kernel_physical_mapping_remove(unsigned long start, unsigned long end)
  971. {
  972. start = (unsigned long)__va(start);
  973. end = (unsigned long)__va(end);
  974. remove_pagetable(start, end, true, NULL);
  975. }
  976. int __ref arch_remove_memory(u64 start, u64 size, struct vmem_altmap *altmap)
  977. {
  978. unsigned long start_pfn = start >> PAGE_SHIFT;
  979. unsigned long nr_pages = size >> PAGE_SHIFT;
  980. struct page *page = pfn_to_page(start_pfn);
  981. struct zone *zone;
  982. int ret;
  983. /* With altmap the first mapped page is offset from @start */
  984. if (altmap)
  985. page += vmem_altmap_offset(altmap);
  986. zone = page_zone(page);
  987. ret = __remove_pages(zone, start_pfn, nr_pages, altmap);
  988. WARN_ON_ONCE(ret);
  989. kernel_physical_mapping_remove(start, start + size);
  990. return ret;
  991. }
  992. #endif
  993. #endif /* CONFIG_MEMORY_HOTPLUG */
  994. static struct kcore_list kcore_vsyscall;
  995. static void __init register_page_bootmem_info(void)
  996. {
  997. #ifdef CONFIG_NUMA
  998. int i;
  999. for_each_online_node(i)
  1000. register_page_bootmem_info_node(NODE_DATA(i));
  1001. #endif
  1002. }
  1003. void __init mem_init(void)
  1004. {
  1005. pci_iommu_alloc();
  1006. /* clear_bss() already clear the empty_zero_page */
  1007. /* this will put all memory onto the freelists */
  1008. memblock_free_all();
  1009. after_bootmem = 1;
  1010. x86_init.hyper.init_after_bootmem();
  1011. /*
  1012. * Must be done after boot memory is put on freelist, because here we
  1013. * might set fields in deferred struct pages that have not yet been
  1014. * initialized, and memblock_free_all() initializes all the reserved
  1015. * deferred pages for us.
  1016. */
  1017. register_page_bootmem_info();
  1018. /* Register memory areas for /proc/kcore */
  1019. if (get_gate_vma(&init_mm))
  1020. kclist_add(&kcore_vsyscall, (void *)VSYSCALL_ADDR, PAGE_SIZE, KCORE_USER);
  1021. mem_init_print_info(NULL);
  1022. }
  1023. int kernel_set_to_readonly;
  1024. void set_kernel_text_rw(void)
  1025. {
  1026. unsigned long start = PFN_ALIGN(_text);
  1027. unsigned long end = PFN_ALIGN(__stop___ex_table);
  1028. if (!kernel_set_to_readonly)
  1029. return;
  1030. pr_debug("Set kernel text: %lx - %lx for read write\n",
  1031. start, end);
  1032. /*
  1033. * Make the kernel identity mapping for text RW. Kernel text
  1034. * mapping will always be RO. Refer to the comment in
  1035. * static_protections() in pageattr.c
  1036. */
  1037. set_memory_rw(start, (end - start) >> PAGE_SHIFT);
  1038. }
  1039. void set_kernel_text_ro(void)
  1040. {
  1041. unsigned long start = PFN_ALIGN(_text);
  1042. unsigned long end = PFN_ALIGN(__stop___ex_table);
  1043. if (!kernel_set_to_readonly)
  1044. return;
  1045. pr_debug("Set kernel text: %lx - %lx for read only\n",
  1046. start, end);
  1047. /*
  1048. * Set the kernel identity mapping for text RO.
  1049. */
  1050. set_memory_ro(start, (end - start) >> PAGE_SHIFT);
  1051. }
  1052. void mark_rodata_ro(void)
  1053. {
  1054. unsigned long start = PFN_ALIGN(_text);
  1055. unsigned long rodata_start = PFN_ALIGN(__start_rodata);
  1056. unsigned long end = (unsigned long) &__end_rodata_hpage_align;
  1057. unsigned long text_end = PFN_ALIGN(&__stop___ex_table);
  1058. unsigned long rodata_end = PFN_ALIGN(&__end_rodata);
  1059. unsigned long all_end;
  1060. printk(KERN_INFO "Write protecting the kernel read-only data: %luk\n",
  1061. (end - start) >> 10);
  1062. set_memory_ro(start, (end - start) >> PAGE_SHIFT);
  1063. kernel_set_to_readonly = 1;
  1064. /*
  1065. * The rodata/data/bss/brk section (but not the kernel text!)
  1066. * should also be not-executable.
  1067. *
  1068. * We align all_end to PMD_SIZE because the existing mapping
  1069. * is a full PMD. If we would align _brk_end to PAGE_SIZE we
  1070. * split the PMD and the reminder between _brk_end and the end
  1071. * of the PMD will remain mapped executable.
  1072. *
  1073. * Any PMD which was setup after the one which covers _brk_end
  1074. * has been zapped already via cleanup_highmem().
  1075. */
  1076. all_end = roundup((unsigned long)_brk_end, PMD_SIZE);
  1077. set_memory_nx(text_end, (all_end - text_end) >> PAGE_SHIFT);
  1078. #ifdef CONFIG_CPA_DEBUG
  1079. printk(KERN_INFO "Testing CPA: undo %lx-%lx\n", start, end);
  1080. set_memory_rw(start, (end-start) >> PAGE_SHIFT);
  1081. printk(KERN_INFO "Testing CPA: again\n");
  1082. set_memory_ro(start, (end-start) >> PAGE_SHIFT);
  1083. #endif
  1084. free_kernel_image_pages((void *)text_end, (void *)rodata_start);
  1085. free_kernel_image_pages((void *)rodata_end, (void *)_sdata);
  1086. debug_checkwx();
  1087. }
  1088. int kern_addr_valid(unsigned long addr)
  1089. {
  1090. unsigned long above = ((long)addr) >> __VIRTUAL_MASK_SHIFT;
  1091. pgd_t *pgd;
  1092. p4d_t *p4d;
  1093. pud_t *pud;
  1094. pmd_t *pmd;
  1095. pte_t *pte;
  1096. if (above != 0 && above != -1UL)
  1097. return 0;
  1098. pgd = pgd_offset_k(addr);
  1099. if (pgd_none(*pgd))
  1100. return 0;
  1101. p4d = p4d_offset(pgd, addr);
  1102. if (p4d_none(*p4d))
  1103. return 0;
  1104. pud = pud_offset(p4d, addr);
  1105. if (pud_none(*pud))
  1106. return 0;
  1107. if (pud_large(*pud))
  1108. return pfn_valid(pud_pfn(*pud));
  1109. pmd = pmd_offset(pud, addr);
  1110. if (pmd_none(*pmd))
  1111. return 0;
  1112. if (pmd_large(*pmd))
  1113. return pfn_valid(pmd_pfn(*pmd));
  1114. pte = pte_offset_kernel(pmd, addr);
  1115. if (pte_none(*pte))
  1116. return 0;
  1117. return pfn_valid(pte_pfn(*pte));
  1118. }
  1119. /*
  1120. * Block size is the minimum amount of memory which can be hotplugged or
  1121. * hotremoved. It must be power of two and must be equal or larger than
  1122. * MIN_MEMORY_BLOCK_SIZE.
  1123. */
  1124. #define MAX_BLOCK_SIZE (2UL << 30)
  1125. /* Amount of ram needed to start using large blocks */
  1126. #define MEM_SIZE_FOR_LARGE_BLOCK (64UL << 30)
  1127. /* Adjustable memory block size */
  1128. static unsigned long set_memory_block_size;
  1129. int __init set_memory_block_size_order(unsigned int order)
  1130. {
  1131. unsigned long size = 1UL << order;
  1132. if (size > MEM_SIZE_FOR_LARGE_BLOCK || size < MIN_MEMORY_BLOCK_SIZE)
  1133. return -EINVAL;
  1134. set_memory_block_size = size;
  1135. return 0;
  1136. }
  1137. static unsigned long probe_memory_block_size(void)
  1138. {
  1139. unsigned long boot_mem_end = max_pfn << PAGE_SHIFT;
  1140. unsigned long bz;
  1141. /* If memory block size has been set, then use it */
  1142. bz = set_memory_block_size;
  1143. if (bz)
  1144. goto done;
  1145. /* Use regular block if RAM is smaller than MEM_SIZE_FOR_LARGE_BLOCK */
  1146. if (boot_mem_end < MEM_SIZE_FOR_LARGE_BLOCK) {
  1147. bz = MIN_MEMORY_BLOCK_SIZE;
  1148. goto done;
  1149. }
  1150. /* Find the largest allowed block size that aligns to memory end */
  1151. for (bz = MAX_BLOCK_SIZE; bz > MIN_MEMORY_BLOCK_SIZE; bz >>= 1) {
  1152. if (IS_ALIGNED(boot_mem_end, bz))
  1153. break;
  1154. }
  1155. done:
  1156. pr_info("x86/mm: Memory block size: %ldMB\n", bz >> 20);
  1157. return bz;
  1158. }
  1159. static unsigned long memory_block_size_probed;
  1160. unsigned long memory_block_size_bytes(void)
  1161. {
  1162. if (!memory_block_size_probed)
  1163. memory_block_size_probed = probe_memory_block_size();
  1164. return memory_block_size_probed;
  1165. }
  1166. #ifdef CONFIG_SPARSEMEM_VMEMMAP
  1167. /*
  1168. * Initialise the sparsemem vmemmap using huge-pages at the PMD level.
  1169. */
  1170. static long __meminitdata addr_start, addr_end;
  1171. static void __meminitdata *p_start, *p_end;
  1172. static int __meminitdata node_start;
  1173. static int __meminit vmemmap_populate_hugepages(unsigned long start,
  1174. unsigned long end, int node, struct vmem_altmap *altmap)
  1175. {
  1176. unsigned long addr;
  1177. unsigned long next;
  1178. pgd_t *pgd;
  1179. p4d_t *p4d;
  1180. pud_t *pud;
  1181. pmd_t *pmd;
  1182. for (addr = start; addr < end; addr = next) {
  1183. next = pmd_addr_end(addr, end);
  1184. pgd = vmemmap_pgd_populate(addr, node);
  1185. if (!pgd)
  1186. return -ENOMEM;
  1187. p4d = vmemmap_p4d_populate(pgd, addr, node);
  1188. if (!p4d)
  1189. return -ENOMEM;
  1190. pud = vmemmap_pud_populate(p4d, addr, node);
  1191. if (!pud)
  1192. return -ENOMEM;
  1193. pmd = pmd_offset(pud, addr);
  1194. if (pmd_none(*pmd)) {
  1195. void *p;
  1196. if (altmap)
  1197. p = altmap_alloc_block_buf(PMD_SIZE, altmap);
  1198. else
  1199. p = vmemmap_alloc_block_buf(PMD_SIZE, node);
  1200. if (p) {
  1201. pte_t entry;
  1202. entry = pfn_pte(__pa(p) >> PAGE_SHIFT,
  1203. PAGE_KERNEL_LARGE);
  1204. set_pmd(pmd, __pmd(pte_val(entry)));
  1205. /* check to see if we have contiguous blocks */
  1206. if (p_end != p || node_start != node) {
  1207. if (p_start)
  1208. pr_debug(" [%lx-%lx] PMD -> [%p-%p] on node %d\n",
  1209. addr_start, addr_end-1, p_start, p_end-1, node_start);
  1210. addr_start = addr;
  1211. node_start = node;
  1212. p_start = p;
  1213. }
  1214. addr_end = addr + PMD_SIZE;
  1215. p_end = p + PMD_SIZE;
  1216. continue;
  1217. } else if (altmap)
  1218. return -ENOMEM; /* no fallback */
  1219. } else if (pmd_large(*pmd)) {
  1220. vmemmap_verify((pte_t *)pmd, node, addr, next);
  1221. continue;
  1222. }
  1223. if (vmemmap_populate_basepages(addr, next, node))
  1224. return -ENOMEM;
  1225. }
  1226. return 0;
  1227. }
  1228. int __meminit vmemmap_populate(unsigned long start, unsigned long end, int node,
  1229. struct vmem_altmap *altmap)
  1230. {
  1231. int err;
  1232. if (boot_cpu_has(X86_FEATURE_PSE))
  1233. err = vmemmap_populate_hugepages(start, end, node, altmap);
  1234. else if (altmap) {
  1235. pr_err_once("%s: no cpu support for altmap allocations\n",
  1236. __func__);
  1237. err = -ENOMEM;
  1238. } else
  1239. err = vmemmap_populate_basepages(start, end, node);
  1240. if (!err)
  1241. sync_global_pgds(start, end - 1);
  1242. return err;
  1243. }
  1244. #if defined(CONFIG_MEMORY_HOTPLUG_SPARSE) && defined(CONFIG_HAVE_BOOTMEM_INFO_NODE)
  1245. void register_page_bootmem_memmap(unsigned long section_nr,
  1246. struct page *start_page, unsigned long nr_pages)
  1247. {
  1248. unsigned long addr = (unsigned long)start_page;
  1249. unsigned long end = (unsigned long)(start_page + nr_pages);
  1250. unsigned long next;
  1251. pgd_t *pgd;
  1252. p4d_t *p4d;
  1253. pud_t *pud;
  1254. pmd_t *pmd;
  1255. unsigned int nr_pmd_pages;
  1256. struct page *page;
  1257. for (; addr < end; addr = next) {
  1258. pte_t *pte = NULL;
  1259. pgd = pgd_offset_k(addr);
  1260. if (pgd_none(*pgd)) {
  1261. next = (addr + PAGE_SIZE) & PAGE_MASK;
  1262. continue;
  1263. }
  1264. get_page_bootmem(section_nr, pgd_page(*pgd), MIX_SECTION_INFO);
  1265. p4d = p4d_offset(pgd, addr);
  1266. if (p4d_none(*p4d)) {
  1267. next = (addr + PAGE_SIZE) & PAGE_MASK;
  1268. continue;
  1269. }
  1270. get_page_bootmem(section_nr, p4d_page(*p4d), MIX_SECTION_INFO);
  1271. pud = pud_offset(p4d, addr);
  1272. if (pud_none(*pud)) {
  1273. next = (addr + PAGE_SIZE) & PAGE_MASK;
  1274. continue;
  1275. }
  1276. get_page_bootmem(section_nr, pud_page(*pud), MIX_SECTION_INFO);
  1277. if (!boot_cpu_has(X86_FEATURE_PSE)) {
  1278. next = (addr + PAGE_SIZE) & PAGE_MASK;
  1279. pmd = pmd_offset(pud, addr);
  1280. if (pmd_none(*pmd))
  1281. continue;
  1282. get_page_bootmem(section_nr, pmd_page(*pmd),
  1283. MIX_SECTION_INFO);
  1284. pte = pte_offset_kernel(pmd, addr);
  1285. if (pte_none(*pte))
  1286. continue;
  1287. get_page_bootmem(section_nr, pte_page(*pte),
  1288. SECTION_INFO);
  1289. } else {
  1290. next = pmd_addr_end(addr, end);
  1291. pmd = pmd_offset(pud, addr);
  1292. if (pmd_none(*pmd))
  1293. continue;
  1294. nr_pmd_pages = 1 << get_order(PMD_SIZE);
  1295. page = pmd_page(*pmd);
  1296. while (nr_pmd_pages--)
  1297. get_page_bootmem(section_nr, page++,
  1298. SECTION_INFO);
  1299. }
  1300. }
  1301. }
  1302. #endif
  1303. void __meminit vmemmap_populate_print_last(void)
  1304. {
  1305. if (p_start) {
  1306. pr_debug(" [%lx-%lx] PMD -> [%p-%p] on node %d\n",
  1307. addr_start, addr_end-1, p_start, p_end-1, node_start);
  1308. p_start = NULL;
  1309. p_end = NULL;
  1310. node_start = 0;
  1311. }
  1312. }
  1313. #endif