setup.c 16 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * KFR2R09 board support code
  4. *
  5. * Copyright (C) 2009 Magnus Damm
  6. */
  7. #include <asm/clock.h>
  8. #include <asm/io.h>
  9. #include <asm/machvec.h>
  10. #include <asm/suspend.h>
  11. #include <cpu/sh7724.h>
  12. #include <linux/clkdev.h>
  13. #include <linux/delay.h>
  14. #include <linux/dma-mapping.h>
  15. #include <linux/gpio.h>
  16. #include <linux/gpio/machine.h>
  17. #include <linux/i2c.h>
  18. #include <linux/init.h>
  19. #include <linux/input.h>
  20. #include <linux/input/sh_keysc.h>
  21. #include <linux/interrupt.h>
  22. #include <linux/memblock.h>
  23. #include <linux/mfd/tmio.h>
  24. #include <linux/mmc/host.h>
  25. #include <linux/mtd/onenand.h>
  26. #include <linux/mtd/physmap.h>
  27. #include <linux/platform_data/lv5207lp.h>
  28. #include <linux/platform_device.h>
  29. #include <linux/regulator/fixed.h>
  30. #include <linux/regulator/machine.h>
  31. #include <linux/sh_intc.h>
  32. #include <linux/usb/r8a66597.h>
  33. #include <linux/videodev2.h>
  34. #include <mach/kfr2r09.h>
  35. #include <media/drv-intf/renesas-ceu.h>
  36. #include <media/i2c/rj54n1cb0c.h>
  37. #include <video/sh_mobile_lcdc.h>
  38. #define CEU_BUFFER_MEMORY_SIZE (4 << 20)
  39. static phys_addr_t ceu_dma_membase;
  40. /* set VIO_CKO clock to 25MHz */
  41. #define CEU_MCLK_FREQ 25000000
  42. #define DRVCRB 0xA405018C
  43. static struct mtd_partition kfr2r09_nor_flash_partitions[] =
  44. {
  45. {
  46. .name = "boot",
  47. .offset = 0,
  48. .size = (4 * 1024 * 1024),
  49. .mask_flags = MTD_WRITEABLE, /* Read-only */
  50. },
  51. {
  52. .name = "other",
  53. .offset = MTDPART_OFS_APPEND,
  54. .size = MTDPART_SIZ_FULL,
  55. },
  56. };
  57. static struct physmap_flash_data kfr2r09_nor_flash_data = {
  58. .width = 2,
  59. .parts = kfr2r09_nor_flash_partitions,
  60. .nr_parts = ARRAY_SIZE(kfr2r09_nor_flash_partitions),
  61. };
  62. static struct resource kfr2r09_nor_flash_resources[] = {
  63. [0] = {
  64. .name = "NOR Flash",
  65. .start = 0x00000000,
  66. .end = 0x03ffffff,
  67. .flags = IORESOURCE_MEM,
  68. }
  69. };
  70. static struct platform_device kfr2r09_nor_flash_device = {
  71. .name = "physmap-flash",
  72. .resource = kfr2r09_nor_flash_resources,
  73. .num_resources = ARRAY_SIZE(kfr2r09_nor_flash_resources),
  74. .dev = {
  75. .platform_data = &kfr2r09_nor_flash_data,
  76. },
  77. };
  78. static struct resource kfr2r09_nand_flash_resources[] = {
  79. [0] = {
  80. .name = "NAND Flash",
  81. .start = 0x10000000,
  82. .end = 0x1001ffff,
  83. .flags = IORESOURCE_MEM,
  84. }
  85. };
  86. static struct platform_device kfr2r09_nand_flash_device = {
  87. .name = "onenand-flash",
  88. .resource = kfr2r09_nand_flash_resources,
  89. .num_resources = ARRAY_SIZE(kfr2r09_nand_flash_resources),
  90. };
  91. static struct sh_keysc_info kfr2r09_sh_keysc_info = {
  92. .mode = SH_KEYSC_MODE_1, /* KEYOUT0->4, KEYIN0->4 */
  93. .scan_timing = 3,
  94. .delay = 10,
  95. .keycodes = {
  96. KEY_PHONE, KEY_CLEAR, KEY_MAIL, KEY_WWW, KEY_ENTER,
  97. KEY_1, KEY_2, KEY_3, 0, KEY_UP,
  98. KEY_4, KEY_5, KEY_6, 0, KEY_LEFT,
  99. KEY_7, KEY_8, KEY_9, KEY_PROG1, KEY_RIGHT,
  100. KEY_S, KEY_0, KEY_P, KEY_PROG2, KEY_DOWN,
  101. 0, 0, 0, 0, 0
  102. },
  103. };
  104. static struct resource kfr2r09_sh_keysc_resources[] = {
  105. [0] = {
  106. .name = "KEYSC",
  107. .start = 0x044b0000,
  108. .end = 0x044b000f,
  109. .flags = IORESOURCE_MEM,
  110. },
  111. [1] = {
  112. .start = evt2irq(0xbe0),
  113. .flags = IORESOURCE_IRQ,
  114. },
  115. };
  116. static struct platform_device kfr2r09_sh_keysc_device = {
  117. .name = "sh_keysc",
  118. .id = 0, /* "keysc0" clock */
  119. .num_resources = ARRAY_SIZE(kfr2r09_sh_keysc_resources),
  120. .resource = kfr2r09_sh_keysc_resources,
  121. .dev = {
  122. .platform_data = &kfr2r09_sh_keysc_info,
  123. },
  124. };
  125. static const struct fb_videomode kfr2r09_lcdc_modes[] = {
  126. {
  127. .name = "TX07D34VM0AAA",
  128. .xres = 240,
  129. .yres = 400,
  130. .left_margin = 0,
  131. .right_margin = 16,
  132. .hsync_len = 8,
  133. .upper_margin = 0,
  134. .lower_margin = 1,
  135. .vsync_len = 1,
  136. .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
  137. },
  138. };
  139. static struct sh_mobile_lcdc_info kfr2r09_sh_lcdc_info = {
  140. .clock_source = LCDC_CLK_BUS,
  141. .ch[0] = {
  142. .chan = LCDC_CHAN_MAINLCD,
  143. .fourcc = V4L2_PIX_FMT_RGB565,
  144. .interface_type = SYS18,
  145. .clock_divider = 6,
  146. .flags = LCDC_FLAGS_DWPOL,
  147. .lcd_modes = kfr2r09_lcdc_modes,
  148. .num_modes = ARRAY_SIZE(kfr2r09_lcdc_modes),
  149. .panel_cfg = {
  150. .width = 35,
  151. .height = 58,
  152. .setup_sys = kfr2r09_lcd_setup,
  153. .start_transfer = kfr2r09_lcd_start,
  154. },
  155. .sys_bus_cfg = {
  156. .ldmt2r = 0x07010904,
  157. .ldmt3r = 0x14012914,
  158. /* set 1s delay to encourage fsync() */
  159. .deferred_io_msec = 1000,
  160. },
  161. }
  162. };
  163. static struct resource kfr2r09_sh_lcdc_resources[] = {
  164. [0] = {
  165. .name = "LCDC",
  166. .start = 0xfe940000, /* P4-only space */
  167. .end = 0xfe942fff,
  168. .flags = IORESOURCE_MEM,
  169. },
  170. [1] = {
  171. .start = evt2irq(0xf40),
  172. .flags = IORESOURCE_IRQ,
  173. },
  174. };
  175. static struct platform_device kfr2r09_sh_lcdc_device = {
  176. .name = "sh_mobile_lcdc_fb",
  177. .num_resources = ARRAY_SIZE(kfr2r09_sh_lcdc_resources),
  178. .resource = kfr2r09_sh_lcdc_resources,
  179. .dev = {
  180. .platform_data = &kfr2r09_sh_lcdc_info,
  181. },
  182. };
  183. static struct lv5207lp_platform_data kfr2r09_backlight_data = {
  184. .fbdev = &kfr2r09_sh_lcdc_device.dev,
  185. .def_value = 13,
  186. .max_value = 13,
  187. };
  188. static struct i2c_board_info kfr2r09_backlight_board_info = {
  189. I2C_BOARD_INFO("lv5207lp", 0x75),
  190. .platform_data = &kfr2r09_backlight_data,
  191. };
  192. static struct r8a66597_platdata kfr2r09_usb0_gadget_data = {
  193. .on_chip = 1,
  194. };
  195. static struct resource kfr2r09_usb0_gadget_resources[] = {
  196. [0] = {
  197. .start = 0x04d80000,
  198. .end = 0x04d80123,
  199. .flags = IORESOURCE_MEM,
  200. },
  201. [1] = {
  202. .start = evt2irq(0xa20),
  203. .end = evt2irq(0xa20),
  204. .flags = IORESOURCE_IRQ | IRQF_TRIGGER_LOW,
  205. },
  206. };
  207. static struct platform_device kfr2r09_usb0_gadget_device = {
  208. .name = "r8a66597_udc",
  209. .id = 0,
  210. .dev = {
  211. .dma_mask = NULL, /* not use dma */
  212. .coherent_dma_mask = 0xffffffff,
  213. .platform_data = &kfr2r09_usb0_gadget_data,
  214. },
  215. .num_resources = ARRAY_SIZE(kfr2r09_usb0_gadget_resources),
  216. .resource = kfr2r09_usb0_gadget_resources,
  217. };
  218. static struct ceu_platform_data ceu_pdata = {
  219. .num_subdevs = 1,
  220. .subdevs = {
  221. { /* [0] = rj54n1cb0c */
  222. .flags = 0,
  223. .bus_width = 8,
  224. .bus_shift = 0,
  225. .i2c_adapter_id = 1,
  226. .i2c_address = 0x50,
  227. },
  228. },
  229. };
  230. static struct resource kfr2r09_ceu_resources[] = {
  231. [0] = {
  232. .name = "CEU",
  233. .start = 0xfe910000,
  234. .end = 0xfe91009f,
  235. .flags = IORESOURCE_MEM,
  236. },
  237. [1] = {
  238. .start = evt2irq(0x880),
  239. .end = evt2irq(0x880),
  240. .flags = IORESOURCE_IRQ,
  241. },
  242. };
  243. static struct platform_device kfr2r09_ceu_device = {
  244. .name = "renesas-ceu",
  245. .id = 0, /* "ceu0" clock */
  246. .num_resources = ARRAY_SIZE(kfr2r09_ceu_resources),
  247. .resource = kfr2r09_ceu_resources,
  248. .dev = {
  249. .platform_data = &ceu_pdata,
  250. },
  251. };
  252. static struct rj54n1_pdata rj54n1_priv = {
  253. .mclk_freq = CEU_MCLK_FREQ,
  254. .ioctl_high = false,
  255. };
  256. static struct i2c_board_info kfr2r09_i2c_camera = {
  257. I2C_BOARD_INFO("rj54n1cb0c", 0x50),
  258. .platform_data = &rj54n1_priv,
  259. };
  260. static struct gpiod_lookup_table rj54n1_gpios = {
  261. .dev_id = "1-0050",
  262. .table = {
  263. GPIO_LOOKUP("sh7724_pfc", GPIO_PTB4, "poweron",
  264. GPIO_ACTIVE_HIGH),
  265. GPIO_LOOKUP("sh7724_pfc", GPIO_PTB7, "enable",
  266. GPIO_ACTIVE_HIGH),
  267. },
  268. };
  269. /* Fixed 3.3V regulator to be used by SDHI0 */
  270. static struct regulator_consumer_supply fixed3v3_power_consumers[] =
  271. {
  272. REGULATOR_SUPPLY("vmmc", "sh_mobile_sdhi.0"),
  273. REGULATOR_SUPPLY("vqmmc", "sh_mobile_sdhi.0"),
  274. };
  275. static struct resource kfr2r09_sh_sdhi0_resources[] = {
  276. [0] = {
  277. .name = "SDHI0",
  278. .start = 0x04ce0000,
  279. .end = 0x04ce00ff,
  280. .flags = IORESOURCE_MEM,
  281. },
  282. [1] = {
  283. .start = evt2irq(0xe80),
  284. .flags = IORESOURCE_IRQ,
  285. },
  286. };
  287. static struct tmio_mmc_data sh7724_sdhi0_data = {
  288. .chan_priv_tx = (void *)SHDMA_SLAVE_SDHI0_TX,
  289. .chan_priv_rx = (void *)SHDMA_SLAVE_SDHI0_RX,
  290. .capabilities = MMC_CAP_SDIO_IRQ,
  291. .capabilities2 = MMC_CAP2_NO_WRITE_PROTECT,
  292. };
  293. static struct platform_device kfr2r09_sh_sdhi0_device = {
  294. .name = "sh_mobile_sdhi",
  295. .num_resources = ARRAY_SIZE(kfr2r09_sh_sdhi0_resources),
  296. .resource = kfr2r09_sh_sdhi0_resources,
  297. .dev = {
  298. .platform_data = &sh7724_sdhi0_data,
  299. },
  300. };
  301. static struct platform_device *kfr2r09_devices[] __initdata = {
  302. &kfr2r09_nor_flash_device,
  303. &kfr2r09_nand_flash_device,
  304. &kfr2r09_sh_keysc_device,
  305. &kfr2r09_sh_lcdc_device,
  306. &kfr2r09_sh_sdhi0_device,
  307. };
  308. #define BSC_CS0BCR 0xfec10004
  309. #define BSC_CS0WCR 0xfec10024
  310. #define BSC_CS4BCR 0xfec10010
  311. #define BSC_CS4WCR 0xfec10030
  312. #define PORT_MSELCRB 0xa4050182
  313. #ifdef CONFIG_I2C
  314. static int kfr2r09_usb0_gadget_i2c_setup(void)
  315. {
  316. struct i2c_adapter *a;
  317. struct i2c_msg msg;
  318. unsigned char buf[2];
  319. int ret;
  320. a = i2c_get_adapter(0);
  321. if (!a)
  322. return -ENODEV;
  323. /* set bit 1 (the second bit) of chip at 0x09, register 0x13 */
  324. buf[0] = 0x13;
  325. msg.addr = 0x09;
  326. msg.buf = buf;
  327. msg.len = 1;
  328. msg.flags = 0;
  329. ret = i2c_transfer(a, &msg, 1);
  330. if (ret != 1)
  331. return -ENODEV;
  332. buf[0] = 0;
  333. msg.addr = 0x09;
  334. msg.buf = buf;
  335. msg.len = 1;
  336. msg.flags = I2C_M_RD;
  337. ret = i2c_transfer(a, &msg, 1);
  338. if (ret != 1)
  339. return -ENODEV;
  340. buf[1] = buf[0] | (1 << 1);
  341. buf[0] = 0x13;
  342. msg.addr = 0x09;
  343. msg.buf = buf;
  344. msg.len = 2;
  345. msg.flags = 0;
  346. ret = i2c_transfer(a, &msg, 1);
  347. if (ret != 1)
  348. return -ENODEV;
  349. return 0;
  350. }
  351. static int kfr2r09_serial_i2c_setup(void)
  352. {
  353. struct i2c_adapter *a;
  354. struct i2c_msg msg;
  355. unsigned char buf[2];
  356. int ret;
  357. a = i2c_get_adapter(0);
  358. if (!a)
  359. return -ENODEV;
  360. /* set bit 6 (the 7th bit) of chip at 0x09, register 0x13 */
  361. buf[0] = 0x13;
  362. msg.addr = 0x09;
  363. msg.buf = buf;
  364. msg.len = 1;
  365. msg.flags = 0;
  366. ret = i2c_transfer(a, &msg, 1);
  367. if (ret != 1)
  368. return -ENODEV;
  369. buf[0] = 0;
  370. msg.addr = 0x09;
  371. msg.buf = buf;
  372. msg.len = 1;
  373. msg.flags = I2C_M_RD;
  374. ret = i2c_transfer(a, &msg, 1);
  375. if (ret != 1)
  376. return -ENODEV;
  377. buf[1] = buf[0] | (1 << 6);
  378. buf[0] = 0x13;
  379. msg.addr = 0x09;
  380. msg.buf = buf;
  381. msg.len = 2;
  382. msg.flags = 0;
  383. ret = i2c_transfer(a, &msg, 1);
  384. if (ret != 1)
  385. return -ENODEV;
  386. return 0;
  387. }
  388. #else
  389. static int kfr2r09_usb0_gadget_i2c_setup(void)
  390. {
  391. return -ENODEV;
  392. }
  393. static int kfr2r09_serial_i2c_setup(void)
  394. {
  395. return -ENODEV;
  396. }
  397. #endif
  398. static int kfr2r09_usb0_gadget_setup(void)
  399. {
  400. int plugged_in;
  401. gpio_request(GPIO_PTN4, NULL); /* USB_DET */
  402. gpio_direction_input(GPIO_PTN4);
  403. plugged_in = gpio_get_value(GPIO_PTN4);
  404. if (!plugged_in)
  405. return -ENODEV; /* no cable plugged in */
  406. if (kfr2r09_usb0_gadget_i2c_setup() != 0)
  407. return -ENODEV; /* unable to configure using i2c */
  408. __raw_writew((__raw_readw(PORT_MSELCRB) & ~0xc000) | 0x8000, PORT_MSELCRB);
  409. gpio_request(GPIO_FN_PDSTATUS, NULL); /* R-standby disables USB clock */
  410. gpio_request(GPIO_PTV6, NULL); /* USBCLK_ON */
  411. gpio_direction_output(GPIO_PTV6, 1); /* USBCLK_ON = H */
  412. msleep(20); /* wait 20ms to let the clock settle */
  413. clk_enable(clk_get(NULL, "usb0"));
  414. __raw_writew(0x0600, 0xa40501d4);
  415. return 0;
  416. }
  417. extern char kfr2r09_sdram_enter_start;
  418. extern char kfr2r09_sdram_enter_end;
  419. extern char kfr2r09_sdram_leave_start;
  420. extern char kfr2r09_sdram_leave_end;
  421. static int __init kfr2r09_devices_setup(void)
  422. {
  423. static struct clk *camera_clk;
  424. /* register board specific self-refresh code */
  425. sh_mobile_register_self_refresh(SUSP_SH_STANDBY | SUSP_SH_SF |
  426. SUSP_SH_RSTANDBY,
  427. &kfr2r09_sdram_enter_start,
  428. &kfr2r09_sdram_enter_end,
  429. &kfr2r09_sdram_leave_start,
  430. &kfr2r09_sdram_leave_end);
  431. regulator_register_always_on(0, "fixed-3.3V", fixed3v3_power_consumers,
  432. ARRAY_SIZE(fixed3v3_power_consumers), 3300000);
  433. /* enable SCIF1 serial port for YC401 console support */
  434. gpio_request(GPIO_FN_SCIF1_RXD, NULL);
  435. gpio_request(GPIO_FN_SCIF1_TXD, NULL);
  436. kfr2r09_serial_i2c_setup(); /* ECONTMSK(bit6=L10ONEN) set 1 */
  437. gpio_request(GPIO_PTG3, NULL); /* HPON_ON */
  438. gpio_direction_output(GPIO_PTG3, 1); /* HPON_ON = H */
  439. /* setup NOR flash at CS0 */
  440. __raw_writel(0x36db0400, BSC_CS0BCR);
  441. __raw_writel(0x00000500, BSC_CS0WCR);
  442. /* setup NAND flash at CS4 */
  443. __raw_writel(0x36db0400, BSC_CS4BCR);
  444. __raw_writel(0x00000500, BSC_CS4WCR);
  445. /* setup KEYSC pins */
  446. gpio_request(GPIO_FN_KEYOUT0, NULL);
  447. gpio_request(GPIO_FN_KEYOUT1, NULL);
  448. gpio_request(GPIO_FN_KEYOUT2, NULL);
  449. gpio_request(GPIO_FN_KEYOUT3, NULL);
  450. gpio_request(GPIO_FN_KEYOUT4_IN6, NULL);
  451. gpio_request(GPIO_FN_KEYIN0, NULL);
  452. gpio_request(GPIO_FN_KEYIN1, NULL);
  453. gpio_request(GPIO_FN_KEYIN2, NULL);
  454. gpio_request(GPIO_FN_KEYIN3, NULL);
  455. gpio_request(GPIO_FN_KEYIN4, NULL);
  456. gpio_request(GPIO_FN_KEYOUT5_IN5, NULL);
  457. /* setup LCDC pins for SYS panel */
  458. gpio_request(GPIO_FN_LCDD17, NULL);
  459. gpio_request(GPIO_FN_LCDD16, NULL);
  460. gpio_request(GPIO_FN_LCDD15, NULL);
  461. gpio_request(GPIO_FN_LCDD14, NULL);
  462. gpio_request(GPIO_FN_LCDD13, NULL);
  463. gpio_request(GPIO_FN_LCDD12, NULL);
  464. gpio_request(GPIO_FN_LCDD11, NULL);
  465. gpio_request(GPIO_FN_LCDD10, NULL);
  466. gpio_request(GPIO_FN_LCDD9, NULL);
  467. gpio_request(GPIO_FN_LCDD8, NULL);
  468. gpio_request(GPIO_FN_LCDD7, NULL);
  469. gpio_request(GPIO_FN_LCDD6, NULL);
  470. gpio_request(GPIO_FN_LCDD5, NULL);
  471. gpio_request(GPIO_FN_LCDD4, NULL);
  472. gpio_request(GPIO_FN_LCDD3, NULL);
  473. gpio_request(GPIO_FN_LCDD2, NULL);
  474. gpio_request(GPIO_FN_LCDD1, NULL);
  475. gpio_request(GPIO_FN_LCDD0, NULL);
  476. gpio_request(GPIO_FN_LCDRS, NULL); /* LCD_RS */
  477. gpio_request(GPIO_FN_LCDCS, NULL); /* LCD_CS/ */
  478. gpio_request(GPIO_FN_LCDRD, NULL); /* LCD_RD/ */
  479. gpio_request(GPIO_FN_LCDWR, NULL); /* LCD_WR/ */
  480. gpio_request(GPIO_FN_LCDVSYN, NULL); /* LCD_VSYNC */
  481. gpio_request(GPIO_PTE4, NULL); /* LCD_RST/ */
  482. gpio_direction_output(GPIO_PTE4, 1);
  483. gpio_request(GPIO_PTF4, NULL); /* PROTECT/ */
  484. gpio_direction_output(GPIO_PTF4, 1);
  485. gpio_request(GPIO_PTU0, NULL); /* LEDSTDBY/ */
  486. gpio_direction_output(GPIO_PTU0, 1);
  487. /* setup USB function */
  488. if (kfr2r09_usb0_gadget_setup() == 0)
  489. platform_device_register(&kfr2r09_usb0_gadget_device);
  490. /* CEU */
  491. gpio_request(GPIO_FN_VIO_CKO, NULL);
  492. gpio_request(GPIO_FN_VIO0_CLK, NULL);
  493. gpio_request(GPIO_FN_VIO0_VD, NULL);
  494. gpio_request(GPIO_FN_VIO0_HD, NULL);
  495. gpio_request(GPIO_FN_VIO0_FLD, NULL);
  496. gpio_request(GPIO_FN_VIO0_D7, NULL);
  497. gpio_request(GPIO_FN_VIO0_D6, NULL);
  498. gpio_request(GPIO_FN_VIO0_D5, NULL);
  499. gpio_request(GPIO_FN_VIO0_D4, NULL);
  500. gpio_request(GPIO_FN_VIO0_D3, NULL);
  501. gpio_request(GPIO_FN_VIO0_D2, NULL);
  502. gpio_request(GPIO_FN_VIO0_D1, NULL);
  503. gpio_request(GPIO_FN_VIO0_D0, NULL);
  504. /* SDHI0 connected to yc304 */
  505. gpio_request(GPIO_FN_SDHI0CD, NULL);
  506. gpio_request(GPIO_FN_SDHI0D3, NULL);
  507. gpio_request(GPIO_FN_SDHI0D2, NULL);
  508. gpio_request(GPIO_FN_SDHI0D1, NULL);
  509. gpio_request(GPIO_FN_SDHI0D0, NULL);
  510. gpio_request(GPIO_FN_SDHI0CMD, NULL);
  511. gpio_request(GPIO_FN_SDHI0CLK, NULL);
  512. i2c_register_board_info(0, &kfr2r09_backlight_board_info, 1);
  513. /* Set camera clock frequency and register and alias for rj54n1. */
  514. camera_clk = clk_get(NULL, "video_clk");
  515. if (!IS_ERR(camera_clk)) {
  516. clk_set_rate(camera_clk,
  517. clk_round_rate(camera_clk, CEU_MCLK_FREQ));
  518. clk_put(camera_clk);
  519. }
  520. clk_add_alias(NULL, "1-0050", "video_clk", NULL);
  521. /* set DRVCRB
  522. *
  523. * use 1.8 V for VccQ_VIO
  524. * use 2.85V for VccQ_SR
  525. */
  526. __raw_writew((__raw_readw(DRVCRB) & ~0x0003) | 0x0001, DRVCRB);
  527. gpiod_add_lookup_table(&rj54n1_gpios);
  528. i2c_register_board_info(1, &kfr2r09_i2c_camera, 1);
  529. /* Initialize CEU platform device separately to map memory first */
  530. device_initialize(&kfr2r09_ceu_device.dev);
  531. arch_setup_pdev_archdata(&kfr2r09_ceu_device);
  532. dma_declare_coherent_memory(&kfr2r09_ceu_device.dev,
  533. ceu_dma_membase, ceu_dma_membase,
  534. ceu_dma_membase + CEU_BUFFER_MEMORY_SIZE - 1,
  535. DMA_MEMORY_EXCLUSIVE);
  536. platform_device_add(&kfr2r09_ceu_device);
  537. return platform_add_devices(kfr2r09_devices,
  538. ARRAY_SIZE(kfr2r09_devices));
  539. }
  540. device_initcall(kfr2r09_devices_setup);
  541. /* Return the board specific boot mode pin configuration */
  542. static int kfr2r09_mode_pins(void)
  543. {
  544. /* MD0=1, MD1=1, MD2=0: Clock Mode 3
  545. * MD3=0: 16-bit Area0 Bus Width
  546. * MD5=1: Little Endian
  547. * MD8=1: Test Mode Disabled
  548. */
  549. return MODE_PIN0 | MODE_PIN1 | MODE_PIN5 | MODE_PIN8;
  550. }
  551. /* Reserve a portion of memory for CEU buffers */
  552. static void __init kfr2r09_mv_mem_reserve(void)
  553. {
  554. phys_addr_t phys;
  555. phys_addr_t size = CEU_BUFFER_MEMORY_SIZE;
  556. phys = memblock_alloc_base(size, PAGE_SIZE, MEMBLOCK_ALLOC_ANYWHERE);
  557. memblock_free(phys, size);
  558. memblock_remove(phys, size);
  559. ceu_dma_membase = phys;
  560. }
  561. /*
  562. * The Machine Vector
  563. */
  564. static struct sh_machine_vector mv_kfr2r09 __initmv = {
  565. .mv_name = "kfr2r09",
  566. .mv_mode_pins = kfr2r09_mode_pins,
  567. .mv_mem_reserve = kfr2r09_mv_mem_reserve,
  568. };